US20100080218A1 - Protocol extensions in a display port compatible interface - Google Patents
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- US20100080218A1 US20100080218A1 US12/286,192 US28619208A US2010080218A1 US 20100080218 A1 US20100080218 A1 US 20100080218A1 US 28619208 A US28619208 A US 28619208A US 2010080218 A1 US2010080218 A1 US 2010080218A1
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- 238000004891 communication Methods 0.000 claims description 111
- 238000000034 method Methods 0.000 claims description 26
- 238000004519 manufacturing process Methods 0.000 claims 6
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/14—Digital output to display device ; Cooperation and interconnection of the display device with other functional units
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/003—Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
- G09G5/006—Details of the interface to the display terminal
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
- H04N21/41—Structure of client; Structure of client peripherals
- H04N21/4104—Peripherals receiving signals from specially adapted client devices
- H04N21/4122—Peripherals receiving signals from specially adapted client devices additional display device, e.g. video projector
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
- H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
- H04N21/436—Interfacing a local distribution network, e.g. communicating with another STB or one or more peripheral devices inside the home
- H04N21/4363—Adapting the video stream to a specific local network, e.g. a Bluetooth® network
- H04N21/43632—Adapting the video stream to a specific local network, e.g. a Bluetooth® network involving a wired protocol, e.g. IEEE 1394
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
- G09G2330/02—Details of power systems and of start or stop of display operation
- G09G2330/021—Power management, e.g. power saving
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2370/00—Aspects of data communication
- G09G2370/10—Use of a protocol of communication by packets in interfaces along the display data pipeline
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- G—PHYSICS
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- G09G2370/00—Aspects of data communication
- G09G2370/12—Use of DVI or HDMI protocol in interfaces along the display data pipeline
Definitions
- the subject matter disclosed herein relates generally to techniques for transmitting data.
- VESA Video Electronics Standards Association
- DisplayPort defines a manner for transporting video, audio and other data between a source device and a target device over a digital communications interface.
- DisplayPort defines a unidirectional Main Link for transporting audio/video data streams and a half-duplex bidirectional auxiliary channel (AUX CH) for plug-and-play operations.
- FIG. 1 depicts a system in accordance with an embodiment.
- FIG. 2 depicts a manner of forming a communication that controls a target device to enter a particular power use state in accordance with an embodiment.
- FIG. 3 depicts a communication that can be used as a delta frame update of a slice of the display frame in accordance with an embodiment.
- FIG. 4 depicts a communication that can be used to write pixels in a region in accordance with an embodiment.
- FIG. 5 depicts a communication that can be used to write to a memory location in a target device in accordance with an embodiment.
- FIG. 6 depicts an example of communications from a source to a target using extension packets in accordance with an embodiment.
- FIG. 7 depicts a process in accordance with an embodiment.
- DisplayPort specification refers to The Video Electronics Standards Association (VESA) DisplayPort Standard, Version 1, Revision 1a (2008) and revisions thereof as well as compatible standards.
- VESA Video Electronics Standards Association
- the DisplayPort specification provides for the option to use extension packets. Use of extension packets may be negotiated by the source and target devices.
- Table 2-42 from the DisplayPort specification version 1.1 (reproduced below) describes header bytes of an extension packet.
- Byte# Content HB0 Usage of this byte is vendor specific.
- HB2 Usage of this byte is vendor specific.
- HB3 Usage of this byte is vendor specific.
- Various embodiments provide for use of the header bytes of an extension packet to describe a command and format of an extension packet.
- the extension packet may be used to control power usage of a target device, write a delta frame update, write a rectangular delta frame update, and configure registers or write to memory of the target device.
- header byte HB 0 may be used to define which version of the proprietary protocol extension the packet is intended to follow. In some embodiments, header byte HB 0 may be predefined as 0x1h. In some embodiments, header byte HB 2 may communicate the following:
- header byte HB 3 may define the payload size of the extension packet.
- the payload size may range from 1 to 256 bytes, words, double words, or quad words.
- FIG. 1 depicts a system 100 in accordance with an embodiment.
- System 100 may include a source device such as a host system 102 and a target device 150 .
- Host system 102 may include a processor 110 with multiple cores, host memory 112 , storage 114 , graphics subsystem 115 .
- Chipset 105 may provide communicatively coupling between devices in host system 102 .
- Graphics subsystem 115 may manage transmission of audio and video to target device 150 .
- Various display functions can be offloaded to target device 150 from graphics subsystem 115 .
- graphics subsystem 115 may offload control of screen brightness (i.e., backlight control) to target device 150 .
- host system 102 may transmit extension packets using interface 145 to target device 150 .
- Interface 145 may include a Main Link and an AUX channel, both described in the DisplayPort specification.
- host system 102 e.g., graphics subsystem 115
- Target device 150 may be a display device with capabilities to display visual content and broadcast audio content.
- target device 150 may include control logic such as a timing controller (TCON) that controls writing of pixels as well as a register that directs operation of target device 150 .
- TCON timing controller
- target device 150 may include backlight control capabilities.
- FIG. 2 depicts a manner of forming a communication that controls a target device to enter a particular power use state in accordance with an embodiment.
- Communication 200 may be transmitted using an extension packet of the DisplayPort specification.
- Communication 200 includes at least header portions HB 0 -HB 3 and payload portions P 0 -P 2 .
- Header portion HB 0 may store an indication of a generation number of the protocol. For example, HB 0 may be set to 0x1h to indicate a first generation, but can be changed for subsequent generations.
- the target device can use the generation information to determine whether the target device is using the proper decoder logic to properly interpret the command.
- Header byte HB 1 may be set at 0x4h in accordance with the DisplayPort specification version 1.1.
- Header byte HB 2 may indicate (1) a command of a power usage state of the target device as well as (2) the amount of information conveyed by each byte in the payload (shown as Unit) and (3) whether the payload of communication 200 stores data or not (shown as D).
- a first section (e.g., bits 7 to 3 ) of byte HB 2 may indicate a power usage command.
- Command active represents the current active state defined by the DisplayPort specification.
- Command standby may cause the differential link (e.g., Main Link) to be placed in electrical idle to save power when the Main Link interface speed is faster than the frame rate and resolution of the display panel.
- Command idle state may cause the Main Link to be power managed with associated PLL and clocks in low power states for scenarios such as data is only pushed during alternative frame or delta frame update.
- Command off state may be the disconnect state of the Main Link, where the Main Link can be completely powered off.
- a second section (e.g., bits 2 and 1 ) of byte HB 2 may indicate the amount information conveyed in each byte of a payload section of communication 200 .
- the following scheme may be used to indicate a size of the information conveyed in each byte of the payload.
- a third section (e.g., bit 0 ) of byte HB 2 may indicate whether the payload of command 200 includes data. In one example, if bit 0 is 0, no data is included in the payload but when bit 0 is 1, data is included in the payload. For example, if command 200 indicates an active mode, then no exit latency may be stated and no data can be transmitted in the payload and the exit latency may have been indicated in an earlier communication that requested entering lower power use mode.
- Header byte HB 3 may indicate a number of bytes in a payload portion of communication 200 .
- header portion HB 3 may be set to 0x3h to indicate three payload bytes (portions P 0 to P 2 ).
- payload portions P 1 and P 2 collectively indicate the exit latency time whereas payload portion P 0 includes the time unit of the exit latency time.
- Exit latency time may be the time to reaching the active state from a lower power state (e.g., standby, idle, or off).
- the following scheme may be used in portion P 0 to indicate a time unit of the exit latency indicated by portions P 1 and P 2 .
- FIG. 3 depicts a communication 300 that can be used as a delta frame update of a slice of the display frame in accordance with an embodiment.
- Communication 300 can be used for a slice delta frame update.
- Header bytes HB 0 and HB 1 of communication 300 may be substantially similar to those of communication 200 .
- Header byte HB 2 may include (1) a first section that indicates communication 300 requests writing of a delta frame slice, (2) a second section that indicates an amount of information conveyed in each byte in the payload, and (3) a third section that indicates whether the payload of communication 300 stores data or not.
- the first section of portion HB 2 is 00100 to indicate writing of a delta frame slice, although other values may be used.
- Second and third sections of portion HB 2 (e.g., unit and D) may be similar to those of communication 200 .
- Header byte HB 3 may indicate a number of bytes in a payload of communication 300 .
- the first two bytes of the payload store a starting X pixel coordinate of the write and the second two bytes of the payload store a starting Y pixel coordinate of the write.
- the ensuing payload portions may store color values of red, green, and blue portions of each pixel until the end of the slice. Pixels may be written in order from left edge to the right edge of the displayed area. The last red, green, and blue color values in the payload may correspond to the bottom right hand corner of an image slice.
- Red, green and blue color codes for each pixel can be byte-aligned.
- the color code can vary in number of bits to represent color depth, and the size of information in the payload (e.g., second section of portion HB 2 ) may allow for variations in number of data bits for each pixel. For example, if 10 bits are used to represent each color, then there could be 30 consecutive bits to represent red, green and blue for each pixel.
- the maximum number of pixels that a single packet can carry is 1364 because of the field size reserved for payload information and the unit of the payload size (which amounts to 4 kilobytes). Frame slices that require more than the 4 kilobytes of information in the payload may do so through multiple packets.
- FIG. 4 depicts a communication 400 that can be used to write pixels in a region in accordance with an embodiment.
- Communication 400 is similar to communication 300 except that its payload portion indicates both starting and ending X, Y pixel coordinate of an image.
- Communication 400 can be used to write a portion of a displayed area in which the displayed area does not reach an edge.
- Communication 400 can be used for a rectangular delta frame update.
- FIG. 5 depicts a communication 500 that can be used to write to a memory location in a target device in accordance with an embodiment.
- Portions HB 0 and HB 1 of communication 500 may be substantially similar to those of communication 200 .
- Portion HB 2 may include (1) a first section that indicates communication 500 requests writing to a memory location, (2) a second section that indicates the size of information of each byte in the payload (shown as Unit), and (3) a third section that indicates whether the payload of communication 500 stores data or not (shown as D).
- the first section of portion HB 2 is 00010 to indicate writing to a register, although other values may be used.
- the second and third sections of portion HB 2 may be similar to those of communication 200 .
- Header byte HB 3 may indicate a size of a payload of communication 500 .
- portion HB 3 is set to 0x6h to indicate 6 bytes of payload.
- the payload portion of communication 500 stores the register or memory address that is to be written followed by content to be written to the address.
- Communication 500 can be used for hardware level co-ordination of functionality between a source device such as an Intel CPU and a target device such as timing controller in a display panel so that the CPU does not have to be burdened with software overhead during idle.
- Communication 500 can be used for direct register configuration capability through Display Port natively instead of using the AUX channel.
- the AUX channel is an interconnect between a processor and display that allows software to control registers, but at a low speed. Use of extension packets can allow must faster control than use of the AUX channel.
- FIG. 6 depicts an example of communications from a source to a target using extension packets in accordance with an embodiment.
- Communication 602 can be used to reduce power use of the input/output (I/O) PHY and controller of the target to opportunistically shutdown unused resources that can tolerate the advertised exit latency.
- Communication 604 can be used to restore the target device to active mode.
- Communication 606 can be used to configure a register in a target device to enable desired function with updated parameters.
- Communication 608 can be used to update a displayed region.
- the target device may respond to communication 608 by writing pixels in communication 608 starting at the specified starting X and Y address.
- FIG. 7 depicts a process 700 in accordance with an embodiment.
- Block 701 may include a source device and target device negotiating use of extension packets.
- the DisplayPort specification describes a manner to negotiate use of extension packets.
- Block 702 may include the source device forming a communication with a desired command. If the source device is to set a power consumption mode of a target device, then the format of the communication may be communication 200 . If the source device is to transmit an image to a target device for display, then the format of the communication may be communication 300 or 400 . If the source device is to program a register of a target device, then the format of the communication may be communication 500 .
- Block 703 may include the source device transmitting the communication according to a first protocol to the target device.
- the first protocol may be the DisplayPort specification, although other standards may be used.
- the communication may be transmitted using an I/O PHY and Main Link constructed in accordance with the DisplayPort specification, although other standards may be used.
- Block 704 may include the target device executing the instruction in the communication. For example, if power consumption of the target device is to be established, then the target device may set its power consumption to that set by the communication. For example, if an image is to be displayed, then the target device may display the image in a manner set by the communication. For example, if a register is to be programmed, then the target device may perform based on the programming of the register.
- graphics and/or video processing techniques described herein may be implemented in various hardware architectures.
- graphics and/or video functionality may be integrated within a chipset.
- a discrete graphics and/or video processor may be used.
- the graphics and/or video functions may be implemented by a general purpose processor, including a multicore processor.
- the functions may be implemented in a consumer electronics device.
- Embodiments of the present invention may be provided, for example, as a computer program product which may include one or more machine-readable media having stored thereon machine-executable instructions that, when executed by one or more machines such as a computer, network of computers, or other electronic devices, may result in the one or more machines carrying out operations in accordance with embodiments of the present invention.
- a machine-readable medium may include, but is not limited to, floppy diskettes, optical disks, CD-ROMs (Compact Disc-Read Only Memories), and magneto-optical disks, ROMs (Read Only Memories), RAMs (Random Access Memories), EPROMs (Erasable Programmable Read Only Memories), EEPROMs (Electrically Erasable Programmable Read Only Memories), magnetic or optical cards, flash memory, or other type of media/machine-readable medium suitable for storing machine-executable instructions.
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Abstract
Description
- The subject matter disclosed herein relates generally to techniques for transmitting data.
- Some display devices are increasing their resolution and number of bits per color. Breakthroughs in resolution and color use higher data rates from the source device to the display. Standards and proprietary techniques have been defined to permit control of a display device by the source device. For example, the Video Electronics Standards Association (VESA) DisplayPort Standard,
Version 1, Revision 1a (2008) defines a manner for transporting video, audio and other data between a source device and a target device over a digital communications interface. DisplayPort defines a unidirectional Main Link for transporting audio/video data streams and a half-duplex bidirectional auxiliary channel (AUX CH) for plug-and-play operations. - Embodiments of the present invention are illustrated by way of example, and not by way of limitation, in the drawings and in which like reference numerals refer to similar elements.
-
FIG. 1 depicts a system in accordance with an embodiment. -
FIG. 2 depicts a manner of forming a communication that controls a target device to enter a particular power use state in accordance with an embodiment. -
FIG. 3 depicts a communication that can be used as a delta frame update of a slice of the display frame in accordance with an embodiment. -
FIG. 4 depicts a communication that can be used to write pixels in a region in accordance with an embodiment. -
FIG. 5 depicts a communication that can be used to write to a memory location in a target device in accordance with an embodiment. -
FIG. 6 depicts an example of communications from a source to a target using extension packets in accordance with an embodiment. -
FIG. 7 depicts a process in accordance with an embodiment. - Reference throughout this specification to “one embodiment” or “an embodiment” means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the present invention. Thus, the appearances of the phrase “in one embodiment” or “an embodiment” in various places throughout this specification are not necessarily all referring to the same embodiment. Furthermore, the particular features, structures, or characteristics may be combined in one or more embodiments.
- As used herein, DisplayPort specification refers to The Video Electronics Standards Association (VESA) DisplayPort Standard,
Version 1, Revision 1a (2008) and revisions thereof as well as compatible standards. The DisplayPort specification provides for the option to use extension packets. Use of extension packets may be negotiated by the source and target devices. - Table 2-42 from the DisplayPort specification version 1.1 (reproduced below) describes header bytes of an extension packet.
-
Byte# Content HB0 Usage of this byte is vendor specific. HB1 04h (predefined) HB2 Usage of this byte is vendor specific. HB3 Usage of this byte is vendor specific. - Various embodiments provide for use of the header bytes of an extension packet to describe a command and format of an extension packet. The extension packet may be used to control power usage of a target device, write a delta frame update, write a rectangular delta frame update, and configure registers or write to memory of the target device.
- In some embodiments, header byte HB0 may be used to define which version of the proprietary protocol extension the packet is intended to follow. In some embodiments, header byte HB0 may be predefined as 0x1h. In some embodiments, header byte HB2 may communicate the following:
-
First section Second section Third section Command Size of payload Whether payload stores data
In some embodiments, header byte HB3 may define the payload size of the extension packet. The payload size may range from 1 to 256 bytes, words, double words, or quad words. -
FIG. 1 depicts asystem 100 in accordance with an embodiment.System 100 may include a source device such as ahost system 102 and atarget device 150.Host system 102 may include aprocessor 110 with multiple cores,host memory 112,storage 114,graphics subsystem 115.Chipset 105 may provide communicatively coupling between devices inhost system 102.Graphics subsystem 115 may manage transmission of audio and video to targetdevice 150. Various display functions can be offloaded to targetdevice 150 fromgraphics subsystem 115. For example,graphics subsystem 115 may offload control of screen brightness (i.e., backlight control) to targetdevice 150. - For example,
host system 102 may transmit extensionpackets using interface 145 to targetdevice 150.Interface 145 may include a Main Link and an AUX channel, both described in the DisplayPort specification. In various embodiments, host system 102 (e.g., graphics subsystem 115) may form and transmit communications to targetdevice 150 at least in a manner described with respect toFIGS. 2-5 . -
Target device 150 may be a display device with capabilities to display visual content and broadcast audio content. For example,target device 150 may include control logic such as a timing controller (TCON) that controls writing of pixels as well as a register that directs operation oftarget device 150. In addition,target device 150 may include backlight control capabilities. -
FIG. 2 depicts a manner of forming a communication that controls a target device to enter a particular power use state in accordance with an embodiment.Communication 200 may be transmitted using an extension packet of the DisplayPort specification.Communication 200 includes at least header portions HB0-HB3 and payload portions P0-P2. Header portion HB0 may store an indication of a generation number of the protocol. For example, HB0 may be set to 0x1h to indicate a first generation, but can be changed for subsequent generations. The target device can use the generation information to determine whether the target device is using the proper decoder logic to properly interpret the command. - Header byte HB1 may be set at 0x4h in accordance with the DisplayPort specification version 1.1.
- Header byte HB2 may indicate (1) a command of a power usage state of the target device as well as (2) the amount of information conveyed by each byte in the payload (shown as Unit) and (3) whether the payload of
communication 200 stores data or not (shown as D). For example, a first section (e.g.,bits 7 to 3) of byte HB2 may indicate a power usage command. -
Value Command 01000 Active 01001 Standby 01010 Idle 01011 Off - Command active represents the current active state defined by the DisplayPort specification. Command standby may cause the differential link (e.g., Main Link) to be placed in electrical idle to save power when the Main Link interface speed is faster than the frame rate and resolution of the display panel. Command idle state may cause the Main Link to be power managed with associated PLL and clocks in low power states for scenarios such as data is only pushed during alternative frame or delta frame update. Command off state may be the disconnect state of the Main Link, where the Main Link can be completely powered off.
- A second section (e.g.,
bits 2 and 1) of byte HB2 may indicate the amount information conveyed in each byte of a payload section ofcommunication 200. The following scheme may be used to indicate a size of the information conveyed in each byte of the payload. -
Value Command 00 Byte 01 Word 10 Dword 11 Qword - A third section (e.g., bit 0) of byte HB2 may indicate whether the payload of
command 200 includes data. In one example, ifbit 0 is 0, no data is included in the payload but whenbit 0 is 1, data is included in the payload. For example, ifcommand 200 indicates an active mode, then no exit latency may be stated and no data can be transmitted in the payload and the exit latency may have been indicated in an earlier communication that requested entering lower power use mode. - Header byte HB3 may indicate a number of bytes in a payload portion of
communication 200. To communicate power usage, header portion HB3 may be set to 0x3h to indicate three payload bytes (portions P0 to P2). - When the third section of byte HB2 indicates that payload of
communication 200 includes data, payload portions P1 and P2 collectively indicate the exit latency time whereas payload portion P0 includes the time unit of the exit latency time. Exit latency time may be the time to reaching the active state from a lower power state (e.g., standby, idle, or off). The following scheme may be used in portion P0 to indicate a time unit of the exit latency indicated by portions P1 and P2. -
Value of P0 Time unit of exit latency 0x8h Nanosecond 0x9h Microsecond 0x10h Millisecond -
FIG. 3 depicts acommunication 300 that can be used as a delta frame update of a slice of the display frame in accordance with an embodiment.Communication 300 can be used for a slice delta frame update. Header bytes HB0 and HB1 ofcommunication 300 may be substantially similar to those ofcommunication 200. Header byte HB2 may include (1) a first section that indicatescommunication 300 requests writing of a delta frame slice, (2) a second section that indicates an amount of information conveyed in each byte in the payload, and (3) a third section that indicates whether the payload ofcommunication 300 stores data or not. In this example, the first section of portion HB2 is 00100 to indicate writing of a delta frame slice, although other values may be used. Second and third sections of portion HB2 (e.g., unit and D) may be similar to those ofcommunication 200. Header byte HB3 may indicate a number of bytes in a payload ofcommunication 300. - In this example, when the third section of portion HB2 indicates the payload of
communication 300 includes data, the first two bytes of the payload store a starting X pixel coordinate of the write and the second two bytes of the payload store a starting Y pixel coordinate of the write. The ensuing payload portions may store color values of red, green, and blue portions of each pixel until the end of the slice. Pixels may be written in order from left edge to the right edge of the displayed area. The last red, green, and blue color values in the payload may correspond to the bottom right hand corner of an image slice. - Red, green and blue color codes for each pixel can be byte-aligned. However, the color code can vary in number of bits to represent color depth, and the size of information in the payload (e.g., second section of portion HB2) may allow for variations in number of data bits for each pixel. For example, if 10 bits are used to represent each color, then there could be 30 consecutive bits to represent red, green and blue for each pixel.
- In one embodiment, the maximum number of pixels that a single packet can carry is 1364 because of the field size reserved for payload information and the unit of the payload size (which amounts to 4 kilobytes). Frame slices that require more than the 4 kilobytes of information in the payload may do so through multiple packets.
-
FIG. 4 depicts acommunication 400 that can be used to write pixels in a region in accordance with an embodiment.Communication 400 is similar tocommunication 300 except that its payload portion indicates both starting and ending X, Y pixel coordinate of an image.Communication 400 can be used to write a portion of a displayed area in which the displayed area does not reach an edge.Communication 400 can be used for a rectangular delta frame update. -
FIG. 5 depicts acommunication 500 that can be used to write to a memory location in a target device in accordance with an embodiment. Portions HB0 and HB1 ofcommunication 500 may be substantially similar to those ofcommunication 200. Portion HB2 may include (1) a first section that indicatescommunication 500 requests writing to a memory location, (2) a second section that indicates the size of information of each byte in the payload (shown as Unit), and (3) a third section that indicates whether the payload ofcommunication 500 stores data or not (shown as D). In this example, the first section of portion HB2 is 00010 to indicate writing to a register, although other values may be used. The second and third sections of portion HB2 may be similar to those ofcommunication 200. - Header byte HB3 may indicate a size of a payload of
communication 500. In this example, portion HB3 is set to 0x6h to indicate 6 bytes of payload. - In this example, the payload portion of
communication 500 stores the register or memory address that is to be written followed by content to be written to the address. -
Communication 500 can be used for hardware level co-ordination of functionality between a source device such as an Intel CPU and a target device such as timing controller in a display panel so that the CPU does not have to be burdened with software overhead during idle.Communication 500 can be used for direct register configuration capability through Display Port natively instead of using the AUX channel. The AUX channel is an interconnect between a processor and display that allows software to control registers, but at a low speed. Use of extension packets can allow must faster control than use of the AUX channel. -
FIG. 6 depicts an example of communications from a source to a target using extension packets in accordance with an embodiment.Communication 602 can be used to reduce power use of the input/output (I/O) PHY and controller of the target to opportunistically shutdown unused resources that can tolerate the advertised exit latency.Communication 604 can be used to restore the target device to active mode. -
Communication 606 can be used to configure a register in a target device to enable desired function with updated parameters. -
Communication 608 can be used to update a displayed region. The target device may respond tocommunication 608 by writing pixels incommunication 608 starting at the specified starting X and Y address. -
FIG. 7 depicts aprocess 700 in accordance with an embodiment.Block 701 may include a source device and target device negotiating use of extension packets. The DisplayPort specification describes a manner to negotiate use of extension packets. -
Block 702 may include the source device forming a communication with a desired command. If the source device is to set a power consumption mode of a target device, then the format of the communication may becommunication 200. If the source device is to transmit an image to a target device for display, then the format of the communication may becommunication communication 500. -
Block 703 may include the source device transmitting the communication according to a first protocol to the target device. The first protocol may be the DisplayPort specification, although other standards may be used. The communication may be transmitted using an I/O PHY and Main Link constructed in accordance with the DisplayPort specification, although other standards may be used. -
Block 704 may include the target device executing the instruction in the communication. For example, if power consumption of the target device is to be established, then the target device may set its power consumption to that set by the communication. For example, if an image is to be displayed, then the target device may display the image in a manner set by the communication. For example, if a register is to be programmed, then the target device may perform based on the programming of the register. - The graphics and/or video processing techniques described herein may be implemented in various hardware architectures. For example, graphics and/or video functionality may be integrated within a chipset. Alternatively, a discrete graphics and/or video processor may be used. As still another embodiment, the graphics and/or video functions may be implemented by a general purpose processor, including a multicore processor. In a further embodiment, the functions may be implemented in a consumer electronics device.
- Embodiments of the present invention may be provided, for example, as a computer program product which may include one or more machine-readable media having stored thereon machine-executable instructions that, when executed by one or more machines such as a computer, network of computers, or other electronic devices, may result in the one or more machines carrying out operations in accordance with embodiments of the present invention. A machine-readable medium may include, but is not limited to, floppy diskettes, optical disks, CD-ROMs (Compact Disc-Read Only Memories), and magneto-optical disks, ROMs (Read Only Memories), RAMs (Random Access Memories), EPROMs (Erasable Programmable Read Only Memories), EEPROMs (Electrically Erasable Programmable Read Only Memories), magnetic or optical cards, flash memory, or other type of media/machine-readable medium suitable for storing machine-executable instructions.
- The drawings and the forgoing description gave examples of the present invention. Although depicted as a number of disparate functional items, those skilled in the art will appreciate that one or more of such elements may well be combined into single functional elements. Alternatively, certain elements may be split into multiple functional elements. Elements from one embodiment may be added to another embodiment. For example, orders of processes described herein may be changed and are not limited to the manner described herein. Moreover, the actions of any flow diagram need not be implemented in the order shown; nor do all of the acts necessarily need to be performed. Also, those acts that are not dependent on other acts may be performed in parallel with the other acts. The scope of the present invention, however, is by no means limited by these specific examples. Numerous variations, whether explicitly given in the specification or not, such as differences in structure, dimension, and use of material, are possible. The scope of the invention is at least as broad as given by the following claims.
Claims (28)
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TW103125134A TWI518517B (en) | 2008-09-29 | 2009-09-28 | Method, apparatus and system using communications to control a target device |
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JP2017134138A JP6615837B2 (en) | 2008-09-29 | 2017-07-07 | Protocol extension in interface conforming to DisplayPort |
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Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20100164968A1 (en) * | 2008-12-30 | 2010-07-01 | Kwa Seh W | Hybrid graphics display power management |
US20120079295A1 (en) * | 2010-09-24 | 2012-03-29 | Hayek George R | Techniques to transmit commands to a target device |
CN102725743A (en) * | 2010-09-24 | 2012-10-10 | 英特尔公司 | Techniques to control display activity |
US8549197B2 (en) | 2010-03-30 | 2013-10-01 | Icron Technologies Corporation | Method and system for communicating displayport information |
US8933951B2 (en) | 2010-03-31 | 2015-01-13 | Intel Corporation | Techniques for controlling frame refresh |
TWI502360B (en) * | 2013-01-31 | 2015-10-01 | Acer Inc | An electrical system |
US20150287356A1 (en) * | 2014-04-08 | 2015-10-08 | Ignis Innovation Inc. | Display system with shared level resources for portable devices |
US9942512B2 (en) | 2015-10-23 | 2018-04-10 | Samsung Electronics Co., Ltd. | Display apparatus and control method thereof |
US20210103327A1 (en) * | 2020-12-18 | 2021-04-08 | Intel Corporation | Advanced link power management for displayport |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP2140893B1 (en) * | 2008-06-30 | 2012-08-01 | Animas Corporation | System for using status indicators in wireless communications with medical devices |
US7961656B2 (en) * | 2008-09-29 | 2011-06-14 | Intel Corporation | Protocol extensions in a display port compatible interface |
US8594002B2 (en) * | 2010-09-15 | 2013-11-26 | Intel Corporation | Method and system of mapping displayport over a wireless interface |
US9445305B2 (en) * | 2011-09-12 | 2016-09-13 | Microsoft Corporation | Low energy beacon encoding |
JP5994275B2 (en) * | 2012-02-14 | 2016-09-21 | セイコーエプソン株式会社 | Display device and control method of display device |
US9559882B2 (en) * | 2014-04-01 | 2017-01-31 | Apple Inc. | Apparatus and methods for flexible provision of control data in large data structures |
KR101599356B1 (en) | 2014-07-23 | 2016-03-03 | 주식회사 넥시아 디바이스 | Displayport to hdmi converter and converting method |
US9558718B2 (en) * | 2014-09-03 | 2017-01-31 | Qualcomm Incorporated | Streaming video data in the graphics domain |
US20160350061A1 (en) * | 2015-05-29 | 2016-12-01 | Qualcomm Incorporated | Remote rendering from a source device to a sink device |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20070150616A1 (en) * | 2003-05-30 | 2007-06-28 | Seung-Myun Baek | Home network system |
US20090158377A1 (en) * | 2007-12-17 | 2009-06-18 | Wael William Diab | Method And System For Utilizing A Single Connection For Efficient Delivery Of Power And Multimedia Information |
US7558264B1 (en) * | 2001-09-28 | 2009-07-07 | Emc Corporation | Packet classification in a storage system |
US7864695B2 (en) * | 2006-01-30 | 2011-01-04 | Fujitsu Limited | Traffic load density measuring system, traffic load density measuring method, transmitter, receiver, and recording medium |
Family Cites Families (36)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5821924A (en) | 1992-09-04 | 1998-10-13 | Elonex I.P. Holdings, Ltd. | Computer peripherals low-power-consumption standby system |
TW243523B (en) | 1993-04-26 | 1995-03-21 | Motorola Inc | Method and apparatus for minimizing mean calculation rate for an active addressed display |
JP3320200B2 (en) * | 1994-04-28 | 2002-09-03 | キヤノン株式会社 | Communication terminal equipment for telecommunication systems |
JPH10105132A (en) * | 1996-10-03 | 1998-04-24 | Nec Gumma Ltd | Lcd control circuits for reducing power consumption |
JP2001016222A (en) * | 1999-06-30 | 2001-01-19 | Toshiba Corp | Network system, electronic equipment and power supply control method |
JP2001016221A (en) * | 1999-06-30 | 2001-01-19 | Toshiba Corp | Network system, electronic equipment and power supply control method |
JP3833483B2 (en) * | 2001-03-06 | 2006-10-11 | インターナショナル・ビジネス・マシーンズ・コーポレーション | Image display system, image data transmission apparatus, display image data transmission method, differential transfer method, program, and storage medium |
US20030046693A1 (en) * | 2001-08-29 | 2003-03-06 | Digeo, Inc. | System and method for focused navigation within an interactive television user interface |
JP2003140630A (en) * | 2001-11-02 | 2003-05-16 | Canon Inc | Unit and system for display |
JP2003222990A (en) * | 2001-11-21 | 2003-08-08 | Asahi Glass Co Ltd | Loading structure of photomask with pellicle |
US7017053B2 (en) * | 2002-01-04 | 2006-03-21 | Ati Technologies, Inc. | System for reduced power consumption by monitoring video content and method thereof |
JP2004309577A (en) * | 2003-04-02 | 2004-11-04 | Minolta Co Ltd | Portable image display device |
US7839860B2 (en) * | 2003-05-01 | 2010-11-23 | Genesis Microchip Inc. | Packet based video display interface |
US8059673B2 (en) | 2003-05-01 | 2011-11-15 | Genesis Microchip Inc. | Dynamic resource re-allocation in a packet based video display interface |
SG135022A1 (en) * | 2003-05-01 | 2007-09-28 | Genesis Microchip Inc | Method and apparatus for efficient transmission of multimedia data packets |
US20040218599A1 (en) * | 2003-05-01 | 2004-11-04 | Genesis Microchip Inc. | Packet based video display interface and methods of use thereof |
JP2005027120A (en) * | 2003-07-03 | 2005-01-27 | Olympus Corp | Bidirectional data communication system |
US7725826B2 (en) * | 2004-03-26 | 2010-05-25 | Harman International Industries, Incorporated | Audio-related system node instantiation |
JP3826942B2 (en) * | 2004-06-11 | 2006-09-27 | セイコーエプソン株式会社 | Image transfer using drawing command hook |
US8009601B2 (en) * | 2004-10-27 | 2011-08-30 | Intel Corporation | Power saving when using aggregated packets |
KR100643235B1 (en) * | 2004-10-30 | 2006-11-10 | 삼성전자주식회사 | Display apparatus and control method thereof |
JP2006211164A (en) * | 2005-01-27 | 2006-08-10 | Hitachi Ltd | Multidisplay composing method and device |
JP2006268738A (en) * | 2005-03-25 | 2006-10-05 | Sanyo Electric Co Ltd | Information processing apparatus, correction program creation method and correction program creation program |
US7813831B2 (en) * | 2005-06-09 | 2010-10-12 | Whirlpool Corporation | Software architecture system and method for operating an appliance in multiple operating modes |
JP2007025073A (en) * | 2005-07-13 | 2007-02-01 | Sony Corp | Data transmission method, data transmission apparatus, data receiving apparatus, and program |
JP4581955B2 (en) * | 2005-10-04 | 2010-11-17 | ソニー株式会社 | Content transmission apparatus, content transmission method, and computer program |
KR100786509B1 (en) | 2006-06-08 | 2007-12-17 | 삼성에스디아이 주식회사 | Organic electro luminescence display and driving method thereof |
JP2008084366A (en) * | 2006-09-26 | 2008-04-10 | Sharp Corp | Information processing device and video recording system |
JP4176122B2 (en) * | 2006-10-24 | 2008-11-05 | 株式会社東芝 | Server terminal, screen sharing method and program |
US8670645B2 (en) * | 2006-11-07 | 2014-03-11 | Sony Corporation | Electronic apparatus, content reproducing method, and content decoding method |
CA2671056A1 (en) * | 2006-12-05 | 2008-06-12 | Thomson Licensing | Method, apparatus and system for playout device control and optimization |
US20080143695A1 (en) * | 2006-12-19 | 2008-06-19 | Dale Juenemann | Low power static image display self-refresh |
JP2008182524A (en) * | 2007-01-25 | 2008-08-07 | Funai Electric Co Ltd | Video image and sound system |
KR20080090784A (en) * | 2007-04-06 | 2008-10-09 | 엘지전자 주식회사 | A controlling method and a receiving apparatus for electronic program information |
CN201114500Y (en) * | 2007-10-30 | 2008-09-10 | 康佳集团股份有限公司 | A TV set with side DP interface |
US7961656B2 (en) * | 2008-09-29 | 2011-06-14 | Intel Corporation | Protocol extensions in a display port compatible interface |
-
2008
- 2008-09-29 US US12/286,192 patent/US7961656B2/en not_active Expired - Fee Related
-
2009
- 2009-09-28 TW TW101103570A patent/TWI456403B/en active
- 2009-09-28 JP JP2009222990A patent/JP4937323B2/en active Active
- 2009-09-28 TW TW098132686A patent/TWI507886B/en active
- 2009-09-28 TW TW103125134A patent/TWI518517B/en active
- 2009-09-29 KR KR1020090092283A patent/KR20100036211A/en active Search and Examination
- 2009-09-29 CN CN201310210017.5A patent/CN103324455B/en active Active
- 2009-09-29 CN CN2009102214536A patent/CN101715119B/en active Active
-
2011
- 2011-04-19 US US13/089,731 patent/US8121060B2/en active Active
-
2012
- 2012-01-12 US US13/349,276 patent/US8411586B2/en active Active
- 2012-01-26 KR KR1020120007689A patent/KR101577855B1/en active IP Right Grant
- 2012-02-16 JP JP2012031772A patent/JP5588470B2/en active Active
-
2014
- 2014-07-23 JP JP2014149782A patent/JP6175035B2/en active Active
-
2017
- 2017-07-07 JP JP2017134138A patent/JP6615837B2/en active Active
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7558264B1 (en) * | 2001-09-28 | 2009-07-07 | Emc Corporation | Packet classification in a storage system |
US20070150616A1 (en) * | 2003-05-30 | 2007-06-28 | Seung-Myun Baek | Home network system |
US7864695B2 (en) * | 2006-01-30 | 2011-01-04 | Fujitsu Limited | Traffic load density measuring system, traffic load density measuring method, transmitter, receiver, and recording medium |
US20090158377A1 (en) * | 2007-12-17 | 2009-06-18 | Wael William Diab | Method And System For Utilizing A Single Connection For Efficient Delivery Of Power And Multimedia Information |
Cited By (23)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9865233B2 (en) | 2008-12-30 | 2018-01-09 | Intel Corporation | Hybrid graphics display power management |
US20100164968A1 (en) * | 2008-12-30 | 2010-07-01 | Kwa Seh W | Hybrid graphics display power management |
US8549197B2 (en) | 2010-03-30 | 2013-10-01 | Icron Technologies Corporation | Method and system for communicating displayport information |
US8933951B2 (en) | 2010-03-31 | 2015-01-13 | Intel Corporation | Techniques for controlling frame refresh |
EP2857930A3 (en) * | 2010-09-24 | 2015-12-23 | Intel Corporation | Techniques to transmit commands to a target device |
US20120079295A1 (en) * | 2010-09-24 | 2012-03-29 | Hayek George R | Techniques to transmit commands to a target device |
US8941592B2 (en) | 2010-09-24 | 2015-01-27 | Intel Corporation | Techniques to control display activity |
US9052902B2 (en) * | 2010-09-24 | 2015-06-09 | Intel Corporation | Techniques to transmit commands to a target device to reduce power consumption |
CN102725743A (en) * | 2010-09-24 | 2012-10-10 | 英特尔公司 | Techniques to control display activity |
WO2012040697A2 (en) | 2010-09-24 | 2012-03-29 | Intel Corporation | Techniques to transmit commands to a target device |
EP2619653A4 (en) * | 2010-09-24 | 2015-12-23 | Intel Corp | Techniques to transmit commands to a target device |
TWI553550B (en) * | 2010-09-24 | 2016-10-11 | 英特爾公司 | Techniques to transmit commands to a target device |
TWI559222B (en) * | 2010-09-24 | 2016-11-21 | 英特爾公司 | Techniques to transmit commands to a target device |
TWI502360B (en) * | 2013-01-31 | 2015-10-01 | Acer Inc | An electrical system |
US20150287356A1 (en) * | 2014-04-08 | 2015-10-08 | Ignis Innovation Inc. | Display system with shared level resources for portable devices |
US10192479B2 (en) * | 2014-04-08 | 2019-01-29 | Ignis Innovation Inc. | Display system using system level resources to calculate compensation parameters for a display module in a portable device |
US20190122605A1 (en) * | 2014-04-08 | 2019-04-25 | Ignis Innovation Inc. | Display system using system level resources to calculate compensation parameters for a display module in a protable device |
US11145245B2 (en) * | 2014-04-08 | 2021-10-12 | Ignis Innovation Inc. | Display system using system level resources to calculate compensation parameters for a display module in a portable device |
US11545084B2 (en) * | 2014-04-08 | 2023-01-03 | Ignis Innovation Inc. | Display system using system level resources to calculate compensation parameters for a display module in a portable device |
US20230081884A1 (en) * | 2014-04-08 | 2023-03-16 | Ignis Innovation Inc. | Display system using system level resources to calculate compensation parameters for a display module in a portable device |
US11908400B2 (en) * | 2014-04-08 | 2024-02-20 | Ignis Innovation Inc. | Display system using system level resources to calculate compensation parameters for a display module in a portable device |
US9942512B2 (en) | 2015-10-23 | 2018-04-10 | Samsung Electronics Co., Ltd. | Display apparatus and control method thereof |
US20210103327A1 (en) * | 2020-12-18 | 2021-04-08 | Intel Corporation | Advanced link power management for displayport |
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CN101715119B (en) | 2013-07-03 |
KR20100036211A (en) | 2010-04-07 |
CN103324455A (en) | 2013-09-25 |
CN103324455B (en) | 2016-05-18 |
JP5588470B2 (en) | 2014-09-10 |
TW201506635A (en) | 2015-02-16 |
JP2015007782A (en) | 2015-01-15 |
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