US20100073266A1 - Display device and method of driving the same - Google Patents
Display device and method of driving the same Download PDFInfo
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- US20100073266A1 US20100073266A1 US12/408,298 US40829809A US2010073266A1 US 20100073266 A1 US20100073266 A1 US 20100073266A1 US 40829809 A US40829809 A US 40829809A US 2010073266 A1 US2010073266 A1 US 2010073266A1
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Definitions
- the present invention relates to a display device and a method of driving the same, and more particularly, to an organic light emitting device (OLED) and a method of driving the same.
- OLED organic light emitting device
- a pixel of an organic light emitting device includes an organic light emitting element, and a thin film transistor (TFT) and a capacitor that drive the OLED.
- TFT thin film transistor
- the TFT is classified into a polysilicon TFT and an amorphous silicon TFT according to the kind of active layer.
- amorphous silicon forms a thin film by depositing at a low temperature
- amorphous silicon may be used for a semiconductor layer of a switching element of a display device that uses glass having a low melting point as a substrate.
- the amorphous silicon TFT has low electron mobility, it may be difficult to form a display element in a large size.
- a threshold voltage may be transited and thus the amorphous silicon TFT may be deteriorated.
- deterioration of the amorphous silicon TFT may shorten a life-span of an OLED.
- LTPS low temperature polycrystalline silicon
- a laser shot mark formed when crystallizing the polysilicon TFT with a laser may cause a deviation in a threshold voltage of driving transistors within one panel and thus uniformity of a screen may be deteriorated.
- the OLED may include a compensation circuit.
- the compensation circuit includes a plurality of TFTs.
- a TFT that is included in the compensation circuit and a driving transistor of an OLED may generate a leakage current according to the characteristics thereof. Accordingly, luminance of the OLED may be lowered, or a function of the compensation pixel may not be appropriately performed.
- a hold type of flat panel display device such as an organic light emitting device displays a fixed image for a predetermined time period, for example for one frame, regardless of whether it is a still picture or a motion picture.
- the object when displaying some object that continuously moves, the object stays at a specific position for a frame and stays at a position to which the object moves after a time period of a frame in a next frame, and thus a motion of the object may be discretely displayed.
- a time period of a frame is a time period in which an afterimage is sustained, even if motion of the object is displayed in this way, motion of the object may be continuously viewed.
- the display device displays as an object stays at a position A in a first frame and at a position B in a second frame.
- a line of sight of a person moves from the position A to the position B along an estimated movement path of the object.
- the object is not actually displayed at an intermediate position between the positions A and B.
- luminance that is recognized by a person for the first frame is an integrated value of luminance of pixels in a path between the position A and the position B, i.e., an average value between luminance of an object and luminance of a background, an object may be blurredly viewed.
- the present invention provides a display device having advantages of reducing a blurring phenomenon of an image of an organic light emitting device, compensating a deviation in a threshold voltage of an organic light emitting device having a polysilicon TFT, and sustaining reliability of each TFT.
- the present invention discloses a display device including: a light-emitting device; a first capacitor connected between a first contact point and a second contact point; a driving transistor including an input terminal connected to a first voltage, an output terminal, and a control terminal, the control terminal connected to the second contact point; a first switching transistor controlled by a first control signal and connected between a data voltage and the first contact point; a second switching transistor controlled by a second control signal and connected between a second voltage and the first contact point; a third switching transistor controlled by a third control signal and connected between the second contact point and the second voltage; a fourth switching transistor controlled by the first control signal and connected between the second contact point and the output terminal of the driving transistor; and a fifth switching transistor controlled by the second control signal and connected between the light-emitting device and the output terminal of the driving transistor.
- the present invention also discloses a method of driving a display device including a light-emitting device, a capacitor connected between a first contact point and a second contact point, and a driving transistor including an input terminal, an output terminal, and a control terminal, the control terminal connected to the second contact point, the method including: disconnecting the output terminal of the driving transistor, the second contact point, and the light-emitting device from each other; connecting a data voltage to the first contact point and connecting the second contact point to the output terminal of the driving transistor; connecting a second voltage to the second contact point; disconnecting the second contact point from the second voltage; disconnecting the output terminal of the driving transistor from the second contact point and disconnecting the first contact point from the data voltage; and connecting the second voltage to the first contact point and connecting the light-emitting device to the output terminal of the driving transistor.
- the present invention also discloses a display device including: a substrate; a first semiconductor, a second semiconductor, a third semiconductor, a fourth semiconductor, a fifth semiconductor, and a sixth semiconductor arranged on the substrate; a gate insulating layer arranged on the first semiconductor, the second semiconductor, the third semiconductor, the fourth semiconductor, the fifth semiconductor, and the sixth semiconductor; a first control terminal, a second control terminal, a third control terminal, a fourth control terminal, a fifth control terminal, a sixth control terminal, and a sustain electrode arranged on the gate insulating layer; an interlayer insulating film arranged on the first control terminal, the second control terminal, the third control terminal, the fourth control terminal, the fifth control terminal, and the sixth control terminal; an electrode member opposite to a first input terminal, a second input terminal, a third input terminal, a fourth input terminal, a fifth input terminal, and a sixth input terminal, a first output terminal, a second output terminal, a third output terminal, a fourth output terminal, a fifth output terminal, a sixth
- a blurring phenomenon of an image of an organic light emitting device can be reduced and a deviation of a threshold voltage can be compensated.
- FIG. 1 is a block diagram of an organic light emitting device according to an exemplary embodiment of the present invention.
- FIG. 2 is an equivalent circuit diagram of a pixel in an organic light emitting device according to an exemplary embodiment of the present invention.
- FIG. 3 shows an example of a waveform diagram showing a driving signal that is applied to one row of pixels in an organic light emitting device according to an exemplary embodiment of the present invention.
- FIG. 4 , FIG. 5 , FIG. 6 , FIG. 7 , and FIG. 8 are equivalent circuit diagrams of a pixel in each period that is shown in FIG. 3 .
- FIG. 9 is a layout view of an organic light emitting device according to an exemplary embodiment of the present invention.
- FIG. 10 and FIG. 11 are cross-sectional views of the organic light emitting device taken along lines X-X and XI-XI, respectively, of FIG. 9 .
- FIG. 12 is a graph showing a magnitude of a current according to the difference between an input voltage and an output voltage of a driving transistor in an organic light emitting device in a conventional art.
- FIG. 13 is a graph showing a magnitude of a current according to the difference between an input voltage and an output voltage of a driving transistor in an organic light emitting device according to an exemplary embodiment of the present invention.
- FIG. 1 and FIG. 2 An organic light emitting device according to an exemplary embodiment of the present invention is described with reference to FIG. 1 and FIG. 2 .
- FIG. 1 is a block diagram of an organic light emitting device according to an exemplary embodiment of the present invention
- FIG. 2 is an equivalent circuit diagram of a pixel in an organic light emitting device according to an exemplary embodiment of the present invention.
- the organic light emitting device includes a display panel 300 , a scanning driver 400 , a data driver 500 , and a signal controller 600 .
- the display panel 300 includes a plurality of signal lines G 1 -G n and D 1 -D m , a plurality of voltage lines (not shown), and a plurality of pixels PX that are connected thereto and that are arranged in an approximate matrix form.
- the signal lines G 1 -G n and D 1 -D m include a plurality of scanning signal lines G 1 -G n that transfer a scanning signal and a plurality of data lines D 1 -D m that transfer a data signal.
- the scanning signal lines G 1 -G n respectively include first scanning signal lines G a1 , G a2 , . . . , G an that transfer a first scanning signal Vga, second scanning signal lines G bl , G b2 , . . . , G bn that transfer a second scanning signal Vgb, and third scanning signal lines G c1 , G c2 , G cn that transfer a third scanning signal Vgc.
- the scanning signal lines G 1 -G n extend in a row direction and are substantially parallel to each other, and the data lines D 1 -D m extend in a column direction and are substantially parallel to each other.
- each pixel PX includes an organic light emitting element LD, a driving transistor Qd, a capacitor Cst, and five switching transistors Qs 1 -Qs 5 .
- the driving transistor Qd has an output terminal, an input terminal, and a control terminal.
- the control terminal of the driving transistor Qd is connected to the capacitor Cst at a contact point N 2 , the input terminal thereof is connected to a driving voltage Vdd, and the output terminal thereof is connected to the switching transistor Qs 5 .
- One end of the capacitor Cst is connected to the driving transistor Qd at the contact point N 2 and is connected to the switching transistors Qs 1 and Qs 2 at a contact point N 1 .
- the switching transistors Qs 1 -Qs 5 may be included in three switching units SU 1 , SU 2 , and SU 3 .
- the switching transistor Qs 1 operates in response to the first scanning signal Vgai and is connected between the contact point N 1 and the data voltage Vdat.
- the switching transistor Qs 2 operates in response to the second scanning signal Vgbi and is connected between the contact point N 1 and the sustain voltage Vsus.
- the switching unit SU 2 intermits a connection between the sustain voltage Vsus and the contact point N 2 in response to the third scanning signal Vgci, and includes the switching transistor Qs 2 that is connected between the sustain voltage Vsus and the contact point N 2 .
- the switching unit SU 3 selects one of the contact point N 2 and the light-emitting device LD in response to the first and second scanning signals Vgai and Vgbi, connects the selected one to the output terminal of the driving transistor Qd, and includes two switching transistors Qs 4 and Qs 5 .
- the switching transistor Qs 4 operates in response to the first scanning signal Vgai, is connected between the output terminal of the driving transistor Qd and the contact point N 2
- the switching transistor Qs 5 operates in response to the second scanning signal Vgbi and is connected between the output terminal of the driving transistor Qd and the organic light emitting element LD.
- the switching transistors Qs 1 , Qs 3 , and Qs 4 are n-channel electric field effect transistors, and the switching transistors Qs 2 and Qs 5 and the driving transistor Qd are p-channel electric field effect transistors.
- the electric field effect transistor includes, for example, a TFT, and the TFT may include polysilicon or amorphous silicon.
- Channel types of the switching transistors Qs 1 -Q 5 and the driving transistor Qd may be reversed, and in this case, waveforms of a signal for driving them may also be reversed.
- An anode and a cathode of the organic light emitting element LD are connected to the switching transistor Qs 5 and the common voltage Vss, respectively.
- the organic light emitting element LD emits light with different intensity according to the magnitude of a current I LD that is supplied by the driving transistor Qd through the switching transistor Qs 5 , thereby displaying an image, and the magnitude of the current I LD depends on the magnitude of a voltage between the control terminal and the input terminal of the driving transistor Qd.
- the scanning driver 400 is connected to the scanning signal lines G 1 -G n of the display panel 300 and applies a scanning signal consisting of a combination of a high voltage Von and a low voltage Voff to each of the scanning signal lines G 1 -G n .
- the high voltage Von may electrically connect the switching transistors Qs 1 , Qs 3 , and Qs 4 , or turn off the switching transistors Qs 2 and Qs 5
- the low voltage Voff may turn off the switching transistors Qs 1 , Qs 3 , and Qs 4 , or electrically connect the switching transistors Qs 2 and Qs 5 .
- the sustain voltage Vsus is a lower than the driving voltage Vdd.
- the sustain voltage Vsus is applied through a sustain voltage line (not shown), and the driving voltage Vdd is applied through a driving voltage line (not shown).
- the data driver 500 is connected to data lines D 1 -D m of the display panel 300 and applies a data voltage Vdat representing an image signal to the data lines D 1 -D m .
- the signal controller 600 controls operations of the scanning driver 400 and the data driver 500 .
- Each of the driving devices 400 , 500 , and 600 may be directly mounted on the display panel 300 in at least one integrated circuit (IC) chip form, may be mounted on a flexible printed circuit film (not shown) to be attached to the display panel 300 in a tape carrier package (TCP) form, or may be mounted on a separate printed circuit board (PCB) (not shown).
- IC integrated circuit
- TCP tape carrier package
- PCB separate printed circuit board
- the driving devices 400 , 500 , and 600 together with the signal lines G 1 -G n and D 1 -D n and the transistors Qs 1 through Qs 5 and Qd may be integrated with the display panel 300 .
- the driving devices 400 , 500 , and 600 may be integrated into a single chip, and in this case, at least one of the driving devices 400 , 500 , and 600 , or at least one circuit element constituting them may be formed outside of the single chip.
- FIG. 1 A display operation of the organic light emitting device will now be described in detail with reference to FIG. 1 , FIG. 2 , FIG. 3 , FIG. 4 , FIG. 5 , FIG. 6 , FIG. 7 , and FIG. 8 .
- FIG. 3 shows an example of a waveform diagram of a driving signal that is applied to one row of pixels in an organic light emitting device according to an exemplary embodiment of the present invention
- FIG. 4 , FIG. 5 , FIG. 6 , FIG. 7 , and FIG. 8 are equivalent circuit diagrams of a pixel in each period that is shown in FIG. 3 .
- the signal controller 600 receives an input image signal Din and an input control signal ICON that controls the display of the input image signal Din from an external graphics controller (not shown).
- the input control signal ICON includes, for example, a vertical synchronization signal, a horizontal synchronization signal, a main clock signal, and a data enable signal.
- the signal controller 600 appropriately processes the input image signal Din to correspond to an operating condition of the display panel 300 based on the input image signal Din and the input control signal ICON, and generates a scan control signal CONT 1 , a data control signal CONT 2 , and an output image signal Dout.
- the signal controller 600 sends the scan control signal CONT 1 to the scanning driver 400 and sends the data control signal CONT 2 and an output image signal Dout to the data driver 500 .
- the scan control signal CONT 1 may include a scanning start signal STV that instructs the scanning start of a high voltage Von for the scanning signal lines G 1 -G n , at least one clock signal that controls an output period of a high voltage Von, and an output enable signal OE that limits a sustain time period of the high voltage Von.
- the data control signal CONT 2 includes a horizontal synchronization start signal that notifies the transmission start of a digital image signal Dout for one row of pixels PX, and a data clock signal HCLK and a load signal that apply an analog data voltage to the data lines D 1 -D m .
- the scanning driver 400 sequentially changes a scanning signal that is applied to the scanning signal lines G 1 -G n to a high voltage Von and then to a low voltage Voff according to a scan control signal CONT 1 from the signal controller 600 .
- the data driver 500 receives a digital output image signal Dout for each row of pixels PX, converts the output image signal Dout to an analog data voltage Vdat, and then applies the analog data voltage Vdat to the data lines D 1 -D m .
- the data driver 500 outputs a data voltage Vdat for one row of pixels PX for one horizontal period 1 H.
- the scanning driver 400 changes the second scanning signal Vgbi that is applied to a second scanning signal line G bi to a high voltage Von according to a scan control signal CONT 1 from the signal controller 600 , and sustains scanning signals Vgai and Vgci that are applied to the first and third scanning signal lines G ai and G ci , respectively, at a low voltage Voff.
- the first, third, and fourth switching transistors Qs 1 , Qs 3 , and Qs 4 are turned off, and the second and fourth switching transistors Qs 2 and Qs 5 sustain a turned-off state.
- the organic light emitting element LD does not emit light, and this is called a first period T 1 .
- the scanning driver 400 changes a voltage of the scanning signals Vgai and Vgci that are applied to the first and third scanning signal lines G ai and G ci from a low voltage Voff to a high voltage Von according to the scan control signal CONT 1 from the signal controller 600 , and sustains the second scanning signal Vgbi that is applied to the second scanning signal line G bi at a high voltage Von.
- the switching transistors Qs 1 , Qs 3 , and Qs 4 are turned on and the switching transistors Qs 2 and Qs 5 sustain a turned-off state, and this is called a second period T 2 .
- the data voltage Vdat is applied to the contact point N 1
- the sustain voltage Vsus is applied to the contact point N 2
- a voltage difference between the two contact points N 1 and N 2 is stored in the capacitor Cst.
- the driving transistor Qd is turned on to flow a current, but because the switching transistor Qs 5 is turned off, the organic light emitting element LD does not emit light.
- the scanning driver 400 changes a voltage of a scanning signal Vgci that is applied to the third scanning signal line G ci from a high voltage Von to a low voltage Voff according to the scan control signal CONT 1 from the signal controller 600 , and sustains the first and second scanning signals Vgai and Vgbi that are applied to the first and second scanning signal lines G ai and G bi , respectively, at a high voltage Von.
- the first and fourth switching transistors Qs 1 and Qs 4 are turned on, and the second, third, and fifth switching transistors Qs 2 , Qs 3 , and Qs 5 sustain a turned-off state, and this is called a third period T 3 .
- the contact point N 2 is separated from the sustain voltage Vsus.
- the driving transistor Qd sustains a turned-on state, charges that have been charged to the capacitor Cst are discharged through the driving transistor Qd.
- the discharge stops when a voltage difference between the control terminal and the input terminal of the driving transistor Qd becomes a threshold voltage Vth of the driving transistor Qd.
- V N2 Vdd+Vth (Equation 1)
- Equation 2 a voltage that is stored in the capacitor Cst is represented by Equation 2.
- V N1 ⁇ V N2 Vdat ⁇ ( Vdd+Vth ) (Equation 2)
- the scanning driver 400 changes a voltage of the first scanning signal Vgai that is applied to the first scanning signal line G ai from a high voltage Von to a low voltage Voff according to the scan control signal CONT 1 from the signal controller 600 , sustains a voltage of the second scanning signal Vgbi that is applied to the second scanning signal line G bi at a high voltage Von, and sustains the third scanning signal Vgci that is applied to the third scanning signal line G ci at a low voltage Voff.
- the first and fourth switching transistors Qs 1 and Qs 4 are turned off, and the second, third, and fifth switching transistors Qs 2 , Qs 3 , and Qs 5 sustain a turned-off state.
- the driving transistor Qd is electrically connected to flow a current, but because the switching transistor Qs 5 is turned off, the organic light emitting element LD does not emit light.
- the scanning driver 400 changes a voltage of the second scanning signal Vgbi that is applied to the second scanning signal line G bi from a high voltage Von to a low voltage Voff according to the scan control signal CONT 1 from the signal controller 600 , and sustains the first and third scanning signals Vgai and Vgci that are applied to the first and third scanning signal lines G ai and G ci , respectively, at a low voltage Voff.
- the second and fifth switching transistors Qs 2 and Qs 5 are turned on, and the first, third, and fourth switching transistors Qs 1 , Qs 3 , and Qs 4 sustain a turned-off state, and this is called a fifth period T 5 .
- the contact point N 1 is separated from the data voltage Vdat to be connected to the sustain voltage Vsus, and the control terminal of the driving transistor Qd is floated.
- V N2 Vdd+Vth ⁇ Vdat+Vsus (Equation 3)
- the output terminal of the driving transistor Qd is connected to the light-emitting device LD, and the driving transistor Qd flows an output current I LD that is controlled by a voltage difference Vgs between the control terminal and the input terminal of the driving transistor Qd.
- K is a constant according to characteristics of the driving transistor Qd
- K ⁇ Ci ⁇ W/L
- ⁇ electric field effect mobility
- Ci capacity of a gate insulation layer
- W is a channel width of the driving transistor Qd
- L is a channel length of the driving transistor Qd.
- the output current I LD in the light emitting period T 3 is determined by only the data voltage Vdat and the sustain voltage Vsus.
- the output current I LD is not influenced by a threshold voltage Vth of the driving transistor Qd.
- the output current I LD is supplied to the organic light emitting element LD, and the organic light emitting element LD emits light with different intensity according to a magnitude of the output current I LD , thereby displaying an image.
- the fifth period T 5 is sustained until a first period T 1 for an i-th row of pixels PX starts again in a next frame, and an operation in each of the periods T 1 -T 5 is equally repeated in a next row of pixels PX.
- a first period T 1 of an (i+1)th row starts after a fifth period T 5 of an i-th row ends.
- the fifth switching transistor Qs 5 is turned off, the light-emitting device LD does not emit light, and in the fifth period T 5 , because the fifth switching transistor Qs 5 is turned on, the light-emitting device LD emits light.
- the first period T 1 secures a portion of a period in which the light-emitting device does not emit light
- the fourth period T 4 functions as a buffer before a time period in which the light-emitting device emits light.
- the sum of the first to fourth periods T 1 -T 4 may be identical to a length of the fifth period T 5 .
- the sum of the first to fourth periods T 1 -T 4 and the fifth period T 5 may be about half a frame.
- each of the periods T 1 -T 5 may be adjusted as needed.
- FIG. 9 is a layout view of an organic light emitting device according to an exemplary embodiment of the present invention
- FIG. 10 and FIG. 11 are cross-sectional views of the organic light emitting device taken along lines X-X and XI-XI, respectively, of FIG. 9 .
- a blocking layer 111 that is made of silicon oxide or silicon nitride is formed on a substrate 110 that is made of transparent glass, etc.
- the blocking layer 111 may have a dual-layer structure.
- Each of the first, third, and fourth semiconductor islands 154 s 1 , 154 s 3 , and 154 s 4 includes a plurality of extrinsic regions including n-type conductive impurities and at least one intrinsic region that includes a very small amount of conductive impurities.
- Each of the second, fifth, and sixth semiconductor islands 154 s 2 , 154 s 5 , and 154 d includes a plurality of extrinsic regions including p-type conductive impurities and at least one intrinsic region that includes a very small amount of conductive impurities.
- the p-type conductive impurities may include boron (B), gallium (Ga), etc.
- the n-type conductive impurities may include phosphorus (P), arsenic (As), etc.
- an extrinsic region includes a source region 153 d , a drain region 155 d , and an intermediate region 152 d , and these regions are doped with p-type impurities and are separated from each other.
- the intrinsic region includes a pair of channel regions 156 d 1 and 156 d 2 that are positioned between the extrinsic regions 152 d , 153 d , and 155 d.
- the extrinsic regions may further include a lightly doped region (not shown) that is positioned between the channel regions 156 d 1 and 156 d 2 and the source and drain regions 153 a , 153 d , and 155 d.
- a lightly doped region (not shown) that is positioned between the channel regions 156 d 1 and 156 d 2 and the source and drain regions 153 a , 153 d , and 155 d.
- the lightly doped region may be replaced with an offset region that includes very few impurities.
- the first to fifth semiconductors 154 s 1 - 154 s 5 also include source and drain regions, an intermediate region, and a channel region (not shown), as in the sixth semiconductor 154 d.
- a gate insulating layer 140 that is made of silicon oxide or silicon nitride is formed on the semiconductors 154 s 1 - 5 and 154 d and the blocking layer 111 .
- a plurality of gate conductors including first, second, and third gate lines 121 a , 121 b , and 121 c , first and second electrode members 124 d and 128 , a sustain voltage line 126 , a common voltage line 127 , and a first driving voltage line 176 a are formed on the gate insulating layer 140 .
- the first, second, and third gate lines 121 a , 121 b , and 121 c transfer a gate signal and extend substantially in a horizontal direction.
- the first gate line 121 a includes first and fourth control electrodes 124 s 1 and 124 s 4
- the second gate line 121 b includes second and fifth control electrodes 124 s 2 and 124 s 5
- the third gate line 121 c includes a third control electrode 124 s 3 .
- the second electrode member 124 d forms a sixth control electrode 124 d.
- Each of the first to sixth control electrodes 124 s 1 - 5 and 124 d respectively includes two protruding portions 124 s 1 a and 124 s 1 b , 124 s 2 a and 124 s 2 b , 124 s 3 a and 124 s 3 b , 124 s 4 a and 124 s 4 b , 124 s 5 a and 124 s 5 b , and 124 da and 124 db that are opposite to each other.
- the protruding portions 124 s 1 a , 124 s 1 b , 124 s 2 a , 124 s 2 b , 124 s 3 a , 124 s 3 b , 124 s 4 a , 124 s 4 b , 124 s 5 a , 124 s 5 b , 124 da , and 124 db are shown in pairs, but the quantity of the protruding portions is not limited thereto and the protruding portions may be formed in a quantity of more than pairs.
- the first to sixth control electrodes 124 s 1 - 5 and 124 d intersect the first to sixth semiconductor islands 154 s 1 - 5 and 154 d and overlap each of the channel regions 156 d 1 and 156 d 2 .
- Each of the gate lines 121 a - c includes wide end parts 129 a , 129 b and 129 c , in order to connect to other layers or an external driving circuit.
- the gate lines 121 a - c are extended to be directly connected to the gate driving circuit.
- the second electrode member 128 forms a storage electrode 128 .
- a sustain voltage Vsus is applied to the sustain voltage line 126 and extends in a horizontal direction.
- a driving voltage Vdd is applied to the first driving voltage line 176 a and extends in a horizontal direction.
- An interlayer insulating film 160 is formed on the gate conductors 121 a - c , 124 d , and 128 .
- a plurality of data conductors including a data line 171 , a second driving voltage line 176 b , and third to eighth electrode members 177 a , 177 b , 177 c , 177 d , 177 e , and 177 f are formed on the interlayer insulating film 160 .
- the data line 171 transfers a data signal and mainly extends in a vertical direction to intersect the gate lines 121 a - c.
- Each data line 171 includes a first input electrode 173 s 1 that is connected to a source region of the first semiconductor 154 s 1 through the contact hole 163 s 1 , and may include a wide end part 179 in order to connect to other layers or an external driving circuit.
- the data line 171 is extended to be directly connected to a data driving circuit.
- the third electrode member 177 a includes a first output electrode 175 s 1 that is connected to a drain region of the first semiconductor island 154 s 1 through the contact hole 165 s 1 , a second output electrode 175 s 2 that is connected to a drain region of the second semiconductor 154 s 2 through the contact hole 165 s 2 , and a wide part 178 that forms a capacitor Cst by overlapping with the storage electrode 128 .
- the fourth electrode member 177 b includes a second input electrode 173 s 2 that is connected to a source region of the second semiconductor island 154 s 2 through the contact hole 163 s 2 , and the second input electrode 173 s 2 is connected to the sustain voltage line 126 through the contact hole 162 a.
- the fifth electrode member 177 c includes a third input electrode 173 s 3 that is connected to a source region of the third semiconductor island 154 s 3 through the contact hole 163 s 3 , and the third input electrode 173 s 3 is connected to the sustain voltage line 126 through the contact hole 162 b.
- the sixth electrode member 177 d includes a third output electrode 175 s 3 that is connected to a drain region of the third semiconductor 154 s 3 through the contact hole 165 s 3 and a fourth input electrode 173 s 4 that is connected to a source region of the fourth semiconductor island 154 s 4 through the contact hole 163 s 4 .
- the sixth electrode member 177 d is connected to the first and second output electrodes 175 s 1 and 175 s 2 through the contact hole 164 and is connected to the sixth control electrode 124 d through the contact hole 166 .
- the seventh electrode member 177 e includes a fourth output electrode 175 s 4 that is connected to a drain region of the fourth semiconductor island 154 s 4 through the contact hole 165 s 4 , a fifth input electrode 173 s 5 that is connected to a source region of the fifth semiconductor island 154 s 5 through the contact hole 163 s 5 , and a sixth output electrode 175 d that is connected to a drain region of the sixth semiconductor 154 d through the contact hole 165 d.
- the eighth electrode member 177 f includes a fifth output electrode 175 s 5 that is connected to a drain region of the fifth semiconductor 154 s 5 through the contact hole 165 s 5 .
- the second driving voltage line 176 b transfers a driving voltage and extends substantially in a vertical direction to cross the gate lines 121 a - c.
- the second driving voltage line 176 b includes a plurality of sixth input electrodes 173 d that are connected to a source region of the sixth semiconductor 154 d through the contact hole 163 d.
- the second driving voltage line 176 b is connected to the first driving voltage line 176 a through the contact holes 167 a and 167 b.
- a passivation layer 180 is formed on the data conductors 171 , 172 , 175 a , and 175 b.
- the passivation layer 180 includes a lower layer 180 p that is made of an inorganic material and an upper part 180 q that is made of an organic material.
- a plurality of contact holes 185 that expose the fifth output electrode 175 s 5 are formed in the passivation layer 180 .
- a plurality of contact holes 182 that expose an end part of the data line 171 may also be formed in the passivation layer 180 , and a plurality of contact holes 181 a - c that respectively expose an end part of the gate lines 121 a - c may be formed in the passivation layer 180 and the interlayer insulating film 160 .
- a reflection layer 192 is formed on the passivation layer 180 , and a plurality of pixel electrodes 191 are formed on the reflection layer 192 .
- Each pixel electrode 191 is physically and electrically connected to a fifth output electrode 175 s 5 through a contact hole 185 .
- a plurality of contact assistants 81 a , 81 b , 81 c and 82 may also be formed on the passivation layer 180 , and they are connected to an exposed end part of the gate lines 121 a - c and the data line 171 .
- a partition 360 is formed on the passivation layer 180 .
- the partition 360 encloses a periphery of an edge of the pixel electrode 191 like a bank to define an opening, and is made of an organic insulator or an inorganic insulator.
- the partition 360 may also be made of a photoresist including a black pigment, and in this case, the partition 360 performs a function of a light blocking member and has a simple forming process.
- An organic light emitting member 370 is formed in a region on the pixel electrode 191 that is surrounded by the partition 360 .
- the organic light emitting member 370 is made of an organic material that emits light of any one of three primary colors of red, green, and blue.
- a common electrode 270 is formed on the organic light emitting member 370 .
- the common electrode 270 receives a common voltage and is made of a reflective metal including calcium (Ca), barium (Ba), magnesium (Mg), aluminum, silver, etc., or a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO).
- a reflective metal including calcium (Ca), barium (Ba), magnesium (Mg), aluminum, silver, etc., or a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO).
- the common electrode 270 is connected to a common voltage line 127 through a contact hole (not shown), thereby lowering resistance of the common electrode 270 .
- the first/second/third/fourth/fifth semiconductor islands 154 s 1 - 5 , the first/second/third/fourth/fifth control electrodes 124 s 1 - 5 , the first/second/third/fourth/fifth input electrodes 173 s 1 - 5 , and the first/second/third/fourth/fifth output electrodes 175 s 1 - 5 respectively constitute first/second/third/fourth/fifth switching TFTs Qs 1 /Qs 2 /Qs 3 /Qs 4 /Qs 5 , and channels of the first/second/third/fourth/fifth switching TFTs Qs 1 /Qs 2 /Qs 3 /Qs 4 /Qs 5 are formed in channel regions of the first/second/third/fourth/fifth semiconductor islands 154 s 1 - 5 .
- the sixth semiconductor island 154 d , the sixth control electrode 124 d , the sixth input electrode 173 d , and the sixth output electrode 175 d constitute a driving TFT Qd, and a channel of the driving TFT Qd is formed in a channel region of the sixth semiconductor 154 d.
- one electrode of each of the first to fourth switching transistors Qs 1 , Qs 2 , Qs 3 , and Qs 4 and the driving transistors Qd is connected to a capacitor Cst that is formed by the storage electrode 128 and a wide part 178 of the third electrode member.
- each of the control electrodes 124 s 1 - 4 and 124 d of the first to fourth switching transistors Qs 1 - 4 and the driving transistor Qd respectively has two protruding portions 124 s 1 a and 124 s 1 b , 124 s 2 a and 124 s 2 b , 124 s 3 a and 124 s 3 b , 124 s 4 a and 124 s 4 b , and 124 da and 124 db that are opposite to each other, a channel thereof is divided into two parts.
- the pixel electrode 191 , the organic light emitting member 370 , and the common electrode 270 constitute an organic light emitting diode, and the pixel electrode 191 becomes an anode and the common electrode 270 becomes a cathode, or the pixel electrode 191 becomes a cathode and the common electrode 270 becomes an anode.
- FIG. 12 is a graph showing a magnitude of a current according to the difference between an input voltage and an output voltage of a driving transistor in an organic light emitting device in a conventional art
- FIG. 13 is a graph showing a magnitude of a current according to the difference between an input voltage and an output voltage of a driving transistor in an organic light emitting device according to an exemplary embodiment of the present invention.
- FIG. 12 shows a case where a control terminal of the driving transistor includes one protruding portion
- FIG. 13 shows a case where a control terminal of the driving transistor includes two or more protruding portions according to an exemplary embodiment of the present invention.
- a curved line of a current I LD according to the difference Vgs between an input voltage and an output voltage of the driving transistor sequentially has different forms.
- a current I LD according to a voltage difference Vgs may be sequentially unstable.
- a curved line of a current I LD according to the difference Vgs between an input voltage and an output voltage of the driving transistor sequentially has the same form.
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Also Published As
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US10475377B2 (en) | 2019-11-12 |
KR20100033126A (ko) | 2010-03-29 |
US20160049115A1 (en) | 2016-02-18 |
KR101518742B1 (ko) | 2015-05-11 |
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