US20090300232A1 - Data transmission method between a host device and a display apparatus - Google Patents

Data transmission method between a host device and a display apparatus Download PDF

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Publication number
US20090300232A1
US20090300232A1 US12/128,679 US12867908A US2009300232A1 US 20090300232 A1 US20090300232 A1 US 20090300232A1 US 12867908 A US12867908 A US 12867908A US 2009300232 A1 US2009300232 A1 US 2009300232A1
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United States
Prior art keywords
data
host device
control module
display apparatus
data packets
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US12/128,679
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English (en)
Inventor
Chun-Yu Chen
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Himax Technologies Ltd
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Himax Technologies Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Himax Technologies Ltd filed Critical Himax Technologies Ltd
Priority to US12/128,679 priority Critical patent/US20090300232A1/en
Assigned to HIMAX TECHNOLOGIES LIMITED reassignment HIMAX TECHNOLOGIES LIMITED ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: CHEN, CHUN-YU
Priority to TW097147082A priority patent/TW200949550A/zh
Priority to CN2009101330065A priority patent/CN101593506B/zh
Publication of US20090300232A1 publication Critical patent/US20090300232A1/en
Abandoned legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/003—Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2370/00—Aspects of data communication
    • G09G2370/04—Exchange of auxiliary data, i.e. other than image data, between monitor and graphics controller
    • G09G2370/045—Exchange of auxiliary data, i.e. other than image data, between monitor and graphics controller using multiple communication channels, e.g. parallel and serial
    • G09G2370/047—Exchange of auxiliary data, i.e. other than image data, between monitor and graphics controller using multiple communication channels, e.g. parallel and serial using display data channel standard [DDC] communication
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/363—Graphics controllers

Definitions

  • the invention relates to a system and method for data transmission, and more particularly to a data transmission method for performing a Display Data Channel/command interface (DDC/CI) transmission between a host device and a display apparatus.
  • DDC/CI Display Data Channel/command interface
  • DDC Display Data Channel
  • DDC/CI command interface
  • the VESA's DDC/CI standard defines communication protocol and implementation of applications for PC (host device) and monitor bi-directional communications.
  • a communication line is typically provided in a DVI or D-SBU port, which is used as the video port to support a display data channel (DDC) so that extended display identification data (EDID) information may be transmitted from the display apparatus to the computer.
  • DDC display data channel
  • EDID extended display identification data
  • implementations are based on Inter-Integrated Circuit (I2C) data transfer and a software decoder, such as implementations utilizing a microprocessor or an additional chip capable of receiving I2C data packet.
  • I2C Inter-Integrated Circuit
  • the implementations process a request from the host device per byte or per bit, reducing the performance of DDC/CI data transfer between the host device and the display apparatus.
  • a display apparatus is provided.
  • the display apparatus is coupled to a host device and comprises a control module and a microprocessor.
  • the control module sequentially receives data packets from the host device, acquires data content from each of the received data packets, collects each of the data contents, and, when data transfer has been completed, sends a control signal.
  • the microprocessor is coupled to the control module and, in response to the control signal, acquires the collected data contents from the control module, decodes the acquired data contents to generate a decoded result and performs at least one operation corresponding to the decoded result to generate a reply information to the host device.
  • a data transmission method for transmission between a host device and a display apparatus is further provided.
  • the display apparatus comprises a microprocessor and a control module.
  • the method comprises the following steps. Data packets from the host device are sequentially received by the control module. Next, data content from each of the received data packets are acquired. Thereafter, each of the data contents is collected and a control signal is sent when data transfer has been completed. The collected data contents are acquired from the control module by the microprocessor in response to the control signal. Next, the acquired data contents are decoded to generate a decoded result. Finally, at least one operation corresponding to the decoded result is performed to generate a reply information to respond to the host device.
  • a communication system is further provided.
  • the communication system comprises a host device and a display apparatus.
  • the host device sends a request with a plurality of data packets.
  • the display apparatus is coupled to the host device and comprises a control module and a microprocessor.
  • the control module sequentially receives data packets from the host device, acquires data content from each of the received data packets, collects each of the data contents, and, when data transfer has been completed, sends a control signal.
  • the microprocessor is coupled to the control module and, in response to the control signal, acquires the collected data contents from the control module, decodes the acquired data contents to generate a decoded result and performs at least one operation corresponding to the decoded result to generate a reply information to the host device.
  • a data transmission method for performing a Display data channel/command interface (DDC/CI) transmission between a host device and a display apparatus is further provided.
  • the display apparatus comprises a microprocessor and a control module.
  • the microprocessor is informed to acquire the received data packets when data transfer has been completed.
  • the acquired data packets are then decoded by the microprocessor to generate a decoded result, wherein each of the acquired data packets is stored together during the data transfer.
  • FIG. 1 shows an embodiment of a communication system
  • FIG. 2 shows an embodiment of the data format of a data packet
  • FIG. 3 is a flowchart of a data transmission method for transmission from a host device to a display apparatus according to the invention
  • FIG. 4 is a flowchart of a data transmission method for transmission from a display apparatus to a host device according to the invention.
  • FIG. 5 shows another embodiment, of a communication system.
  • FIG. 1 shows an embodiment of a communication system 10 .
  • the communication system 10 comprises a display apparatus 100 and a host device 200 in which the display apparatus 100 is connected to the host device 200 through a communication line 300 .
  • the communication line 300 comprises a serial clock (SCL) line to send and receive a clock signal, and a serial data (SDA) line to send and receive data.
  • the display apparatus 100 and the host device 200 may perform I2C communication with each other through the communication line 300 .
  • the host device 200 such as a personal computer (PC), sends a request to the display apparatus 100 to obtain data from the display apparatus 100 or adjust settings data of the display apparatus 100 , and waits for a response therefrom via the communication line 300 .
  • the request usually follows a specific communication standard and contains a plurality of data packets. Each data packet may contain a specific data format, e.g. a portion of header data and a portion of data content (i.e. a corresponding command data).
  • FIG. 2 shows an embodiment of the data format of a data packet 20 .
  • the data packet 20 contains a portion of header data 22 and a portion of data content 24 that represents a corresponding command data.
  • the header data 22 may comprise a field Destination_Address for indicating where the data packet is to be sent to, a field Source_Address for indicating where the data packet was received from, and a field Length for indicating lengths of the data content contained.
  • the data packet 20 may be compatible with, in this embodiment, a DDC/CI standard.
  • the request follows a DDC/CI standard and thus data content is a DDC/CI command.
  • the display apparatus 100 may further comprise a control module 110 and a microprocessor 120 which is coupled to control module 110 .
  • the control module 110 receives the request, processes data packets from the received request to collect data contents during the data transfer and sends a control signal to inform the microprocessor 120 when the data transfer has been completed.
  • the control signal may be, for example, an interrupt signal S 1 generated by the control module 110 , but is not limited thereto.
  • the microprocessor 120 acquires the collected data contents from the control module 110 , decodes the acquired data contents to generate a decoded result and performs at least one operation corresponding to the decoded result to generate a reply information to the host device 200 .
  • the request is a command relating to obtaining settings data of the display apparatus 100
  • the microprocessor 120 may decode the request to recognize the meaning of the command and generate a corresponding reply information with the required settings data to the control module 110 to respond to the host device 200 .
  • the microprocessor 120 may send a notification signal (e.g. an interrupt signal S 2 ) to inform the control module 110 .
  • a notification signal e.g. an interrupt signal S 2
  • the control module 110 further comprises an interface unit 130 and a buffering unit 140 .
  • the interface unit 130 may further comprise a protocol converter 132 and a connection interface 134 .
  • the connection interface 134 of the interface unit 130 is coupled to a connection interface 210 of the host device 200 to perform an I2C communication therebetween via the communication line 300 .
  • the connection interface 210 and the connection interface 134 may be any connectable serial interfaces such as an I2C interface, as the same as the communication line 300 .
  • the host device 200 is capable of performing DDC/CI or I2C communication with the display apparatus 100 via the communication line 300 .
  • the control module 110 is capable of receiving the data packets from the host device 200 via the connection interface 134 and the protocol converter 132 is capable of acquiring the data content from each of the received data packets.
  • a data packet may comprise a portion of header data and a portion of data content (i.e. a corresponding command data).
  • the protocol converter 132 may decode a received data packet and acquire only the necessary data content (e.g. the data content representing a command) from the received data packet.
  • the protocol converter 132 may also decode a reply information generated by the microprocessor 120 and generate data packets with corresponding header data based on the decoded result so as to pass the data packets to the host device 200 using an I2C communication via the communication line 300 .
  • the buffering unit 140 is coupled between the interface unit 130 and the microprocessor 120 for collecting each of the data contents acquired by the interface unit 130 or storing the reply information generated by the microprocessor 120 .
  • the buffering unit 140 may comprise a WR buffer 142 and a RD buffer 144 in which the WR buffer 142 is used for the interface unit 130 to collect each of the data contents acquired, while the RD buffer 144 is used for the microprocessor 120 to store the reply information generated.
  • the buffer is defined as being large enough to store all the data packets. In some cases, the buffer capacity may be smaller than that of the received data packets and thus the buffer may be full. A buffer is identified as being full when no available space is available in the buffer.
  • the WR buffer 142 or RD buffer 144 When the WR buffer 142 or RD buffer 144 is full, it may issue a signal (e.g. an interrupt signal) to notify the interface unit 130 or the microprocessor 120 to stop filling of data.
  • a signal e.g. an interrupt signal
  • the transmitting end i.e. the interface unit 130 or the microprocessor 120
  • the control signal or the notification signal respectively, to direct the corresponding receiving end (i.e. the microprocessor 120 or the interface unit 130 ) to read out the buffered data content and then resume the paused or interrupted data transfer once it is emptied so as to complete the data transfer.
  • the buffering unit 140 may comprise any storable elements capable of temporarily storing the received data packet, such as a first-in-first-out (FIFO) buffer, and the length (i.e. buffer capacity) and number of buffers used in the buffering unit 140 can be determined in advance based on system or user requirements.
  • FIFO first-in-first-out
  • the WR and RD buffers may be combined together into one single buffer so that the data contents acquired by the interface unit 130 and the reply information are both stored or collected at the same buffer for saving hardware costs.
  • FIG. 3 is a flowchart of a data transmission method for transmission from a host device to a display apparatus according to the invention.
  • step S 302 data packets from the host device is received one by one by the interface unit 130 via the connection interface 134 .
  • each data packet may comprise a portion of header data and a potion of data content.
  • step S 304 data content is acquired from each of the received data packets by the protocol converter 132 .
  • the acquired data content comprises necessary data for the microprocessor to decode it.
  • step S 306 each of the acquired data contents is collected or stored into the WR buffer 142 .
  • step S 308 it is determined whether data transfer has been completed. If the data transfer has not been completed (No in step S 308 ), the process repeats steps S 302 -S 306 for acquiring subsequent data contents. Thus, all of the data contents belonging to the request will be collected into the WR buffer 142 during data transfer. Contrarily, if the data transfer has been completed (Yes in step S 308 ), a control signal (e.g. an interrupt signal S 1 ) is sent from the interface unit 130 to the microprocessor 120 (step S 310 ).
  • a control signal e.g. an interrupt signal S 1
  • FIG. 4 is a flowchart of a data transmission method for transmission from a display apparatus to a host device according to the invention.
  • collected data contents are acquired from the WR buffer 142 (step S 404 ), decoded to generate a decoded result and performed at least one operation corresponding to the decoded result to generate a corresponding reply information by the microprocessor 120 (step S 406 ).
  • the microprocessor 120 may decode the request to recognize the meaning of that command and perform a corresponding operation to obtain the required settings data so as to generate a corresponding reply information with the required settings data to the interface unit 130 to respond to the host device 200 . Meanwhile, the microprocessor 120 may store a portion of the generated reply information during the decoding process or store all of the generated reply information after the decoding process is completed into the RD buffer 144 (step S 410 ).
  • a notification signal (e.g. an interrupt signal S 2 ) is sent by the microprocessor 120 to inform the interface unit 130 that the reply information is ready (step S 410 ).
  • the reply information is acquired from the RD buffer 144 , decoded and data packets with corresponding header data forming a predetermined data format (e.g. DDC/CI or I2C data packets) based on the decoded result by the protocol converter 132 of the interface unit 130 are generated.
  • the generated data packets are passed to the host device 200 using a predefined communication protocol (e.g. I2C communication protocol) via the communication line 300 (step S 412 ).
  • a predefined communication protocol e.g. I2C communication protocol
  • the invention may also be applied to any host device having more than one communication line connected to the display apparatus.
  • a destination address may be used to identify data transfer to be performed via which communication line.
  • the interface unit provides a number of connection interfaces, which is the same as that of the communication lines, to be able to receive requests from the host device in which each connection interface may have a corresponding unique address.
  • the protocol converter may acquire data contents including the destination address from the request and then the microprocessor may recognize which interface the data is coming from and send the reply information with a corresponding rely address. In other words, only the way the data content is collected is varied, however, the previously described method of the invention for data transmission between the host device and the display apparatus may be performed for transmission therebetween.
  • FIG. 5 shows another embodiment of a communication system 50 .
  • the communication system 50 is similar to the communication system 10 except that two communication lines 510 and 512 are used for connection between the display apparatus and the host device.
  • two connection interfaces IF 1 and IF 2 along with two communication paths 520 and 522 between the buffering units 540 and 542 and the microprocessor are inside the display apparatus so as to process the data transmitted from/to the communication lines 510 and 520 , respectively, for example, but not limited thereto.
  • each data path may be identified by using a unique address.
  • a data path from 510 , 520 to the microprocessor using the buffering unit 540 may be identified by using a first address as the destination address while a data path from 512 , 522 to microprocessor using the buffering unit 542 may be identified by using a second address as the destination address.
  • the data transmission methods shown in FIGS. 3 and 4 can be properly adjusted to be applied in the communication system 50 and details are omitted here for brevity.
  • every data packet forming a request will be received and buffered into an assigned buffer (e.g. FIFO) and appropriately decoded during a data transfer and thus saves processing time for the microprocessor to process the reception of all the data packets, providing better performance for a DDC/CI communication. Moreover, decoding or parsing of the DDC/CI commands is still performed by the microprocessor, allowing flexibility for implementation modifications if the related specifications is changed.
  • an assigned buffer e.g. FIFO

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Communication Control (AREA)
  • Two-Way Televisions, Distribution Of Moving Picture Or The Like (AREA)
US12/128,679 2008-05-29 2008-05-29 Data transmission method between a host device and a display apparatus Abandoned US20090300232A1 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
US12/128,679 US20090300232A1 (en) 2008-05-29 2008-05-29 Data transmission method between a host device and a display apparatus
TW097147082A TW200949550A (en) 2008-05-29 2008-12-04 Data transmission method between a host device and a display apparatus
CN2009101330065A CN101593506B (zh) 2008-05-29 2009-03-31 显示装置以及通讯系统及其数据传输方法

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US12/128,679 US20090300232A1 (en) 2008-05-29 2008-05-29 Data transmission method between a host device and a display apparatus

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Cited By (5)

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US20050128962A1 (en) * 2003-12-15 2005-06-16 Finisar Corporation Two-wire interface in which a master component monitors the data line during the preamble generation phase for synchronization with one or more slave components
US20050237991A1 (en) * 2004-03-05 2005-10-27 Dybsetter Gerald L Use of a first two-wire interface communication to support the construction of a second two-wire interface communication
US8766941B2 (en) 2011-07-28 2014-07-01 Wistron Corporation Display device with on-screen display menu function
US20150186240A1 (en) * 2014-01-02 2015-07-02 Advanced Micro Devices, Inc. Extensible i/o activity logs
US20170257273A1 (en) * 2016-03-03 2017-09-07 Parade Technologies, Ltd. Display Data Channel Snooping Scheme for Retimers

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US8924615B2 (en) * 2012-10-26 2014-12-30 Arm Limited Communication of message signalled interrupts
CN103488603B (zh) * 2013-09-24 2016-08-17 天津三星电子有限公司 数据交互传输方法、系统及显示器

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US20060095596A1 (en) * 2004-11-03 2006-05-04 Yung Lin C Solution for consumer electronics control
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US20060282707A1 (en) * 2005-06-09 2006-12-14 Intel Corporation Multiprocessor breakpoint

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CN100356418C (zh) * 2004-12-08 2007-12-19 南开大学 通用型平板显示控制器及其控制方法

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US20030005185A1 (en) * 2001-06-28 2003-01-02 Sony Corporation And Sony Electronics, Inc. System and method for efficiently performing data transfer operations
US20060095596A1 (en) * 2004-11-03 2006-05-04 Yung Lin C Solution for consumer electronics control
US20060212662A1 (en) * 2005-02-25 2006-09-21 Nec Electronics Corporation Data transfer control device, image processing device, and data transfer control method
US20060282707A1 (en) * 2005-06-09 2006-12-14 Intel Corporation Multiprocessor breakpoint

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050128962A1 (en) * 2003-12-15 2005-06-16 Finisar Corporation Two-wire interface in which a master component monitors the data line during the preamble generation phase for synchronization with one or more slave components
US8667194B2 (en) 2003-12-15 2014-03-04 Finisar Corporation Two-wire interface in which a master component monitors the data line during the preamble generation phase for synchronization with one or more slave components
US20050237991A1 (en) * 2004-03-05 2005-10-27 Dybsetter Gerald L Use of a first two-wire interface communication to support the construction of a second two-wire interface communication
US8225024B2 (en) * 2004-03-05 2012-07-17 Finisar Corporation Use of a first two-wire interface communication to support the construction of a second two-wire interface communication
US8766941B2 (en) 2011-07-28 2014-07-01 Wistron Corporation Display device with on-screen display menu function
US20150186240A1 (en) * 2014-01-02 2015-07-02 Advanced Micro Devices, Inc. Extensible i/o activity logs
US9092486B2 (en) * 2014-01-02 2015-07-28 Advanced Micro Devices, Inc. Extensible I/O activity logs
US20170257273A1 (en) * 2016-03-03 2017-09-07 Parade Technologies, Ltd. Display Data Channel Snooping Scheme for Retimers
US9935839B2 (en) * 2016-03-03 2018-04-03 Parade Technologies, Ltd. Display data channel snooping scheme for retimers

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CN101593506A (zh) 2009-12-02
TW200949550A (en) 2009-12-01
CN101593506B (zh) 2011-11-30

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