US20090250724A1 - Bipolar transistor and method of making such a transistor - Google Patents
Bipolar transistor and method of making such a transistor Download PDFInfo
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- US20090250724A1 US20090250724A1 US11/721,717 US72171705A US2009250724A1 US 20090250724 A1 US20090250724 A1 US 20090250724A1 US 72171705 A US72171705 A US 72171705A US 2009250724 A1 US2009250724 A1 US 2009250724A1
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- 238000004519 manufacturing process Methods 0.000 title claims description 7
- 229910052732 germanium Inorganic materials 0.000 claims abstract description 60
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims abstract description 60
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 35
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 35
- 239000010703 silicon Substances 0.000 claims abstract description 35
- 239000000758 substrate Substances 0.000 claims abstract description 26
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 9
- 229920005591 polysilicon Polymers 0.000 claims abstract description 8
- 239000002019 doping agent Substances 0.000 claims description 9
- 230000007423 decrease Effects 0.000 claims description 4
- 239000010410 layer Substances 0.000 description 23
- 238000000034 method Methods 0.000 description 17
- 239000013078 crystal Substances 0.000 description 5
- 238000009792 diffusion process Methods 0.000 description 5
- 230000015572 biosynthetic process Effects 0.000 description 4
- 230000008569 process Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 230000000873 masking effect Effects 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 239000004411 aluminium Substances 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 238000002347 injection Methods 0.000 description 2
- 239000007924 injection Substances 0.000 description 2
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 2
- 208000032750 Device leakage Diseases 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000011065 in-situ storage Methods 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 238000004151 rapid thermal annealing Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 239000007858 starting material Substances 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/73—Bipolar junction transistors
- H01L29/737—Hetero-junction transistors
- H01L29/7371—Vertical transistors
- H01L29/7378—Vertical transistors comprising lattice mismatched active layers, e.g. SiGe strained layer transistors
Definitions
- the present invention relates to a bipolar transistor and to a method of making such a transistor.
- Such techniques may be applied to bipolar power transistors, for example for high performance linear or switching applications. Examples of applications for such transistors include audio amplifiers, switching power supplies and linear radio frequency amplifiers.
- FIG. 1 of the accompanying drawings illustrates diagrammatically part of a known process of making a bipolar power transistor.
- the transistor is made on a heavily doped substrate 1 of n-type for an NPN transistor or of p-type for a PNP transistor.
- One or more epitaxial layers may be grown on the substrate. Typically one layer would be used for an epitaxial-base type while additional layers may be used to form a lightly doped collector region 2 before forming the base 3 .
- a plurality of epitaxial layers are grown on the substrate 1 to form a lightly doped collector 2 .
- An epitaxial layer is then grown on the collector to form a medium doped base 3 .
- a layer of the appropriate polarity is diffused or implanted and a masking and photolithographic process is used to etch away parts of the resulting layer to leave the emitter.
- an oxide layer is grown on the base and regions which are to be implanted so as to become the emitter are masked and etched.
- a second mask is then used to open regions for forming a base contact diffusion.
- a diffusion step is then performed to drive the emitter and base contact diffusions to the right depths and to tailor the collector and base profiles so as to improve second breakdown performance.
- U.S. Pat. No. 6,660,623 discloses a technique of this type in which the base additionally contains germanium.
- the concentration of germanium decreases so as to be zero or close to zero at the top of the base to allow the emitter region to be formed conventionally of silicon.
- Such grading relieves stress in the base caused by the different lattice sizes of silicon and germanium but limits the base width and the maximum achievable germanium concentration in the base.
- Transistors of this type including germanium in the base have advantages in that it is possible to provide high current gains in power devices. For example, current gains of five hundred may be achievable at collector currents of the order of four amps. Thus, such devices may be used in place of Darlington transistors and provide advantages such as low drive requirement, a single input diode, and good high frequency roll-off characteristics.
- a germanium crystal lattice is larger than a silicon crystal lattice, the presence of germanium in the base can generate a strain in the crystal. Such a strain can create stress lines which result in higher device leakage and lower current gains than would otherwise be expected.
- U.S. Pat. No. 5,440,152 discloses a “heterojunction” bipolar transistor of silicon type comprising first and second collector regions containing germanium, a base region containing germanium, and an emitter region made of single crystal silicon which may contain germanium.
- the concentration of germanium in the base region increases with depth towards the adjacent first collector region.
- the concentration of germanium in the first and second collector regions decreases with depth at first and second rates, respectively, where the second rate is smaller than the first rate.
- a bipolar transistor comprising: a silicon substrate of a first polarity; an epitaxial collector formed on the substrate and comprising silicon doped to have the first polarity, at least a portion at or adjacent the top of the collector containing germanium; an epitaxial base formed on the collector and comprising silicon doped to have a second polarity opposite the first polarity, at least a portion at or adjacent the bottom of the base containing germanium; and an emitter formed at the top of the base and comprising silicon doped to have the first polarity, characterised in that the emitter comprises polysilicon.
- the transistor may comprise a power transistor.
- the substrate may comprise silicon doped to a higher concentration than at least the top of the collector to have the first polarity.
- the concentration of dopant in the collector may reduce with distance from the substrate.
- the concentration of dopant at the bottom of the collector may be substantially to equal to that of the substrate.
- the collector may have a substantially constant concentration of X % by weight of germanium, where 0 ⁇ X ⁇ 100.
- concentration by weight of germanium in the collector may vary from substantially 0% at the bottom of the collector to X % at the top of the collector, where 0 ⁇ X ⁇ 100.
- the concentration of germanium at the top of the collector may be substantially equal to the concentration of germanium at the bottom of the base.
- the base may have a substantially constant concentration of germanium.
- the concentration of germanium in the base may decrease substantially monotonically from the bottom of the base to the top of the base.
- the concentration of germanium at the top of the base may be substantially 0%.
- a bipolar transistor comprising the steps of:
- bipolar transistor in which the problems associated with strain in the crystal can be substantially reduced or eliminated.
- a substantially higher concentration of germanium can be achieved than is possible with known techniques where there is no grading of germanium in the collector and the emitter is single-crystal silicon.
- doping levels and profiles can be varied so that the resulting transistor parameters can be selected for improved performance in a variety of different applications.
- FIG. 1 is a diagram illustrating a known bipolar power transistor manufacturing process
- FIG. 2 is a diagram illustrating a method constituting an embodiment of the invention for producing a bipolar power transistor also constituting an embodiment of the invention.
- FIGS. 3 a to 3 l is a more detailed diagram illustrating an example of a method constituting an embodiment of the invention.
- FIG. 2 illustrates an example of a method of making an NPN bipolar power transistor.
- PNP bipolar power transistors may also be made by such a method, for example by using opposite doping polarities.
- the method starts from the formation of a heavily doped n-type silicon substrate 1 .
- a collector 12 is epitaxially grown on the substrate 1 and contains a light doping of the same polarity (n-type) as the substrate 1 .
- the collector 12 may be grown as a single layer or as sequentially grown layers and is formed to within 10 microns of its target thickness. For example, for a 100 volt-rated transistor, the total thickness of the collector 12 may be 10 microns.
- the layer or a part of the layer forming the collector contains germanium whose concentration is graded, for example so as to be substantially zero at the bottom of the collector 12 and X % by weight at the top of the collector, where 0 ⁇ x ⁇ 100.
- the concentration by weight of germanium at the top of the collector 12 may be substantially equal to 15% for a typical bipolar transistor of this type.
- the germanium concentration and profile may be adjusted or varied in order to suit different applications of the resulting bipolar power transistor.
- a base 13 is epitaxially grown on the top of the collector 2 .
- the base is formed of silicon with a p-type dopant and with a relatively high percentage by weight of germanium.
- the base band-gap is narrower substantially in proportion to the germanium concentration. In the case of 15% by weight of germanium, a 60 mV reduction in band-gap may be achieved. This allows the current gain of the resulting transistor to be increased by a factor of the order of 10 for a given base doping.
- the germanium in the base 13 may be used to increase the base doping level and to increase the Early voltage, reduce the base resistance, and reduce the base width for higher switching speeds.
- the base may be more heavily doped than in the case of conventional silicon bipolar transistors which do not contain germanium.
- the germanium concentration is reduced to zero or close to zero at the top of the base 13 .
- An emitter region may therefore be formed of n-doped silicon but without germanium. Grading of the germanium concentrations in the collector 1 and the base 13 relieves stress in the layers.
- the emitter In order to form the emitter, another layer of n-type silicon is deposited on top of the base.
- the emitter is formed of polycrystalline silicon (polysilicon) grown with in-situ doping, so that the whole of the base 12 may contain a relatively high percentage of germanium throughout the whole layer.
- a short rapid thermal process may be used to complete the transistor structure. This process step minimises stress formation from lattice mismatch, which would be generated by a conventional emitter diffusion into a silicon layer.
- the concentration of germanium in the base 13 may be graded or may be substantially constant.
- the n-type dopant in the collector 12 may vary or may be substantially constant.
- the concentration may, for example, be graded from being substantially equal to the substrate concentration at the bottom of the collector to a low concentration at the top of the collector. In the case of constant or uniform concentration, the concentration may be same as or lower than that of the substrate 1 .
- the n-type dopant and germanium concentrations and/or grading may therefore, for example, be optimised for switching applications or linear applications of the resulting transistor.
- the germanium concentration in the base 13 may be substantially constant throughout the base or may be graded to zero.
- FIGS. 3 a to 3 l illustrate in more detail a particular example of a method of making an NPN bipolar power transistor.
- a PNP transistor may be made by the same method but with opposite polarity dopants and layers.
- the starting material is a substrate 1 comprising highly doped N-type silicon forming part of a silicon wafer ( FIG. 3 a ).
- Several devices may be made on the same wafer and the left end of the transistor is illustrated at 14 .
- a graded buffer layer which will form the collector 12 of the transistor is deposited on the substrate 1 by epitaxial growth.
- the collector 12 is of lightly doped N-type silicon containing germanium with a graded concentration.
- the concentration by weight of germanium is 0% at the bottom of the collector (adjacent the substrate 1 ) and increases monotonically to, for example, 25% at the top of the collector 12 .
- a second epitaxial layer for forming the base 13 of the transistor is deposited on top of the collector 12 ( FIG. 3 c ) and comprises silicon of medium doping level of P-type together with germanium.
- the concentration of germanium is substantially constant throughout the thickness of the base and is substantially equal to 25%, i.e. substantially the same as the germanium concentration at the top of the collector 12 .
- a silicon dioxide or other dielectric layer 15 is then grown or deposited on top of the base 13 as shown in FIG. 3 d.
- the upper surface is then masked and heavily doped P+ diffusions such as 16 are formed for providing contact areas ( FIG. 3 e ).
- the masking is removed and a further masking is provided and etched to reveal a window 17 for the formation of an emitter ( FIG. 3 f ).
- a polysilicon region of N-type is deposited on the top surface of the wafer and then etched to provide an emitter 18 as shown in FIG. 3 g . This is followed by a rapid thermal annealing process to establish the emitter/base junction of the transistor.
- the upper surface of the substrate is then again masked and the oxide layer 15 is etched to form an opening 19 ( FIG. 3 h ).
- the silicon underlying the opening 19 is then etched to form a wafer 20 as shown in FIG. 3 i for effectively isolating the transistor from the rest of the wafer.
- a further oxide layer 21 is deposited or grown on the upper surface of the wafer ( FIG. 3 j ) and is masked and etched to reveal base contact windows 22 and 23 and an emitter contact window 24 ( FIG. 3 k ).
- the upper surface of the wafer is then metalised, masked and etched to provide metal contacts, such as aluminium tracks 25 and 26 , for the base 13 and an aluminium track 27 for the emitter 18 ( FIG. 31 ). This completes the formation of the transistor structure, which may then be processed in any suitable way, for example, for separating and encapsulating the device.
- transistors with base widths from less than 1 micron to more than 10 microns in order to provide a range of operating collector voltages and characteristics.
- a base with a graded or varying concentration of germanium it is possible to provide a transistor with a highly linear collector current-to-gain characteristic by using a higher base doping concentration to generate a high internal voltage, thereby creating a potentially high current injection capability before high level injection effects impact on the characteristics.
- the structural parameters of the transistor may be selected in order to achieve a desirable combination of performance parameters. For example, a relatively wide base may be used in order to achieve a high current gain.
- a relatively narrow base with a higher concentration of doping may be used to increase the Early voltage and the high current roll-off point, thus increasing the gain linearity over a wide range of collector currents. Reducing the base width may be used to increase the frequency response of the transistor. Also, the base voltage distribution within the transistor may be improved.
Abstract
Description
- The present invention relates to a bipolar transistor and to a method of making such a transistor. Such techniques may be applied to bipolar power transistors, for example for high performance linear or switching applications. Examples of applications for such transistors include audio amplifiers, switching power supplies and linear radio frequency amplifiers.
-
FIG. 1 of the accompanying drawings illustrates diagrammatically part of a known process of making a bipolar power transistor. The transistor is made on a heavily dopedsubstrate 1 of n-type for an NPN transistor or of p-type for a PNP transistor. One or more epitaxial layers may be grown on the substrate. Typically one layer would be used for an epitaxial-base type while additional layers may be used to form a lightly dopedcollector region 2 before forming thebase 3. A plurality of epitaxial layers are grown on thesubstrate 1 to form a lightly dopedcollector 2. An epitaxial layer is then grown on the collector to form a mediumdoped base 3. - Various techniques are subsequently used in order to form an emitter. In one technique, a layer of the appropriate polarity is diffused or implanted and a masking and photolithographic process is used to etch away parts of the resulting layer to leave the emitter. In another known technique, an oxide layer is grown on the base and regions which are to be implanted so as to become the emitter are masked and etched. A second mask is then used to open regions for forming a base contact diffusion. A diffusion step is then performed to drive the emitter and base contact diffusions to the right depths and to tailor the collector and base profiles so as to improve second breakdown performance.
- U.S. Pat. No. 6,660,623 discloses a technique of this type in which the base additionally contains germanium. In this known technique, the concentration of germanium decreases so as to be zero or close to zero at the top of the base to allow the emitter region to be formed conventionally of silicon. Such grading relieves stress in the base caused by the different lattice sizes of silicon and germanium but limits the base width and the maximum achievable germanium concentration in the base.
- Transistors of this type including germanium in the base have advantages in that it is possible to provide high current gains in power devices. For example, current gains of five hundred may be achievable at collector currents of the order of four amps. Thus, such devices may be used in place of Darlington transistors and provide advantages such as low drive requirement, a single input diode, and good high frequency roll-off characteristics. However, as mentioned above, because a germanium crystal lattice is larger than a silicon crystal lattice, the presence of germanium in the base can generate a strain in the crystal. Such a strain can create stress lines which result in higher device leakage and lower current gains than would otherwise be expected.
- U.S. Pat. No. 5,440,152 discloses a “heterojunction” bipolar transistor of silicon type comprising first and second collector regions containing germanium, a base region containing germanium, and an emitter region made of single crystal silicon which may contain germanium. The concentration of germanium in the base region increases with depth towards the adjacent first collector region. The concentration of germanium in the first and second collector regions decreases with depth at first and second rates, respectively, where the second rate is smaller than the first rate.
- According to a first aspect of the invention, there is provided a bipolar transistor comprising: a silicon substrate of a first polarity; an epitaxial collector formed on the substrate and comprising silicon doped to have the first polarity, at least a portion at or adjacent the top of the collector containing germanium; an epitaxial base formed on the collector and comprising silicon doped to have a second polarity opposite the first polarity, at least a portion at or adjacent the bottom of the base containing germanium; and an emitter formed at the top of the base and comprising silicon doped to have the first polarity, characterised in that the emitter comprises polysilicon.
- The transistor may comprise a power transistor.
- The substrate may comprise silicon doped to a higher concentration than at least the top of the collector to have the first polarity. The concentration of dopant in the collector may reduce with distance from the substrate. The concentration of dopant at the bottom of the collector may be substantially to equal to that of the substrate.
- The collector may have a substantially constant concentration of X % by weight of germanium, where 0<X<100. As an alternative, the concentration by weight of germanium in the collector may vary from substantially 0% at the bottom of the collector to X % at the top of the collector, where 0<X<100.
- The concentration of germanium at the top of the collector may be substantially equal to the concentration of germanium at the bottom of the base.
- The base may have a substantially constant concentration of germanium. As an alternative, the concentration of germanium in the base may decrease substantially monotonically from the bottom of the base to the top of the base. The concentration of germanium at the top of the base may be substantially 0%.
- According to a second aspect of the invention, there is provided a method of making a bipolar transistor, comprising the steps of:
-
- forming on a silicon substrate of a first polarity an epitaxial collector comprising silicon doped to have the first polarity, at least a portion at or adjacent the top of the collector containing germanium;
- forming on the collector an epitaxial base comprising silicon doped to have a second polarity opposite the first polarity, at least a portion at or adjacent the bottom of the base containing germanium; and
- forming at the top of the base an emitter comprising polysilicon doped to have the first polarity.
- It is thus possible to provide a bipolar transistor in which the problems associated with strain in the crystal can be substantially reduced or eliminated. For example, it is possible to grow a silicon epitaxial base layer with a very high concentration of germanium on top of a collector layer so as to avoid or minimise crystal defects. A substantially higher concentration of germanium can be achieved than is possible with known techniques where there is no grading of germanium in the collector and the emitter is single-crystal silicon. Power transistors of improved performance as compared with known devices. Also, doping levels and profiles can be varied so that the resulting transistor parameters can be selected for improved performance in a variety of different applications.
- The invention will be further described, by way of example, with reference to the accompanying drawings, in which:
-
FIG. 1 is a diagram illustrating a known bipolar power transistor manufacturing process; -
FIG. 2 is a diagram illustrating a method constituting an embodiment of the invention for producing a bipolar power transistor also constituting an embodiment of the invention; and -
FIGS. 3 a to 3 l is a more detailed diagram illustrating an example of a method constituting an embodiment of the invention. -
FIG. 2 illustrates an example of a method of making an NPN bipolar power transistor. PNP bipolar power transistors may also be made by such a method, for example by using opposite doping polarities. As inFIG. 1 , the method starts from the formation of a heavily doped n-type silicon substrate 1. Acollector 12 is epitaxially grown on thesubstrate 1 and contains a light doping of the same polarity (n-type) as thesubstrate 1. Thecollector 12 may be grown as a single layer or as sequentially grown layers and is formed to within 10 microns of its target thickness. For example, for a 100 volt-rated transistor, the total thickness of thecollector 12 may be 10 microns. - In addition to the n-type dopant used to form the
collector 12, the layer or a part of the layer forming the collector contains germanium whose concentration is graded, for example so as to be substantially zero at the bottom of thecollector 12 and X % by weight at the top of the collector, where 0<x<100. For example, the concentration by weight of germanium at the top of thecollector 12 may be substantially equal to 15% for a typical bipolar transistor of this type. However, the germanium concentration and profile may be adjusted or varied in order to suit different applications of the resulting bipolar power transistor. - A
base 13 is epitaxially grown on the top of thecollector 2. The base is formed of silicon with a p-type dopant and with a relatively high percentage by weight of germanium. In particular, the base band-gap is narrower substantially in proportion to the germanium concentration. In the case of 15% by weight of germanium, a 60 mV reduction in band-gap may be achieved. This allows the current gain of the resulting transistor to be increased by a factor of the order of 10 for a given base doping. Alternatively, the germanium in thebase 13 may be used to increase the base doping level and to increase the Early voltage, reduce the base resistance, and reduce the base width for higher switching speeds. The base may be more heavily doped than in the case of conventional silicon bipolar transistors which do not contain germanium. - In practice, improvements to the current gain, Early voltage, base resistance and base thickness may be varied or selected so as to provide power transistors adapted to specific requirements or applications.
- During deposition of the
base 13, the germanium concentration is reduced to zero or close to zero at the top of thebase 13. An emitter region may therefore be formed of n-doped silicon but without germanium. Grading of the germanium concentrations in thecollector 1 and thebase 13 relieves stress in the layers. - In order to form the emitter, another layer of n-type silicon is deposited on top of the base. The emitter is formed of polycrystalline silicon (polysilicon) grown with in-situ doping, so that the whole of the base 12 may contain a relatively high percentage of germanium throughout the whole layer. A short rapid thermal process may be used to complete the transistor structure. This process step minimises stress formation from lattice mismatch, which would be generated by a conventional emitter diffusion into a silicon layer.
- Various modifications are possible. For example, as described above, the concentration of germanium in the
base 13 may be graded or may be substantially constant. Also, the n-type dopant in thecollector 12 may vary or may be substantially constant. The concentration may, for example, be graded from being substantially equal to the substrate concentration at the bottom of the collector to a low concentration at the top of the collector. In the case of constant or uniform concentration, the concentration may be same as or lower than that of thesubstrate 1. The n-type dopant and germanium concentrations and/or grading may therefore, for example, be optimised for switching applications or linear applications of the resulting transistor. - Also, as mentioned above, the germanium concentration in the
base 13 may be substantially constant throughout the base or may be graded to zero. -
FIGS. 3 a to 3 l illustrate in more detail a particular example of a method of making an NPN bipolar power transistor. A PNP transistor may be made by the same method but with opposite polarity dopants and layers. The starting material is asubstrate 1 comprising highly doped N-type silicon forming part of a silicon wafer (FIG. 3 a). Several devices may be made on the same wafer and the left end of the transistor is illustrated at 14. - In a first step (
FIG. 3 b), a graded buffer layer which will form thecollector 12 of the transistor is deposited on thesubstrate 1 by epitaxial growth. Thecollector 12 is of lightly doped N-type silicon containing germanium with a graded concentration. In particular, in this example, the concentration by weight of germanium is 0% at the bottom of the collector (adjacent the substrate 1) and increases monotonically to, for example, 25% at the top of thecollector 12. - A second epitaxial layer for forming the
base 13 of the transistor is deposited on top of the collector 12 (FIG. 3 c) and comprises silicon of medium doping level of P-type together with germanium. The concentration of germanium is substantially constant throughout the thickness of the base and is substantially equal to 25%, i.e. substantially the same as the germanium concentration at the top of thecollector 12. A silicon dioxide or otherdielectric layer 15 is then grown or deposited on top of the base 13 as shown inFIG. 3 d. - The upper surface is then masked and heavily doped P+ diffusions such as 16 are formed for providing contact areas (
FIG. 3 e). The masking is removed and a further masking is provided and etched to reveal awindow 17 for the formation of an emitter (FIG. 3 f). - A polysilicon region of N-type is deposited on the top surface of the wafer and then etched to provide an
emitter 18 as shown inFIG. 3 g. This is followed by a rapid thermal annealing process to establish the emitter/base junction of the transistor. The upper surface of the substrate is then again masked and theoxide layer 15 is etched to form an opening 19 (FIG. 3 h). The silicon underlying theopening 19 is then etched to form awafer 20 as shown inFIG. 3 i for effectively isolating the transistor from the rest of the wafer. - A
further oxide layer 21 is deposited or grown on the upper surface of the wafer (FIG. 3 j) and is masked and etched to revealbase contact windows FIG. 3 k). The upper surface of the wafer is then metalised, masked and etched to provide metal contacts, such as aluminium tracks 25 and 26, for thebase 13 and analuminium track 27 for the emitter 18 (FIG. 31 ). This completes the formation of the transistor structure, which may then be processed in any suitable way, for example, for separating and encapsulating the device. - It is thus possible to provide a range of transistors with base widths from less than 1 micron to more than 10 microns in order to provide a range of operating collector voltages and characteristics. For example, in the case of a base with a graded or varying concentration of germanium, it is possible to provide a transistor with a highly linear collector current-to-gain characteristic by using a higher base doping concentration to generate a high internal voltage, thereby creating a potentially high current injection capability before high level injection effects impact on the characteristics. However, the structural parameters of the transistor may be selected in order to achieve a desirable combination of performance parameters. For example, a relatively wide base may be used in order to achieve a high current gain. Conversely, a relatively narrow base with a higher concentration of doping may be used to increase the Early voltage and the high current roll-off point, thus increasing the gain linearity over a wide range of collector currents. Reducing the base width may be used to increase the frequency response of the transistor. Also, the base voltage distribution within the transistor may be improved.
Claims (13)
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GB0427363A GB2421354A (en) | 2004-12-15 | 2004-12-15 | Bipolar Transistor and Method of making such a transistor |
GB0427363.7 | 2004-12-15 | ||
PCT/GB2005/050250 WO2006064290A1 (en) | 2004-12-15 | 2005-12-14 | Bipolar transistor and method of making such a transistor |
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US20090250724A1 true US20090250724A1 (en) | 2009-10-08 |
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US11/721,717 Abandoned US20090250724A1 (en) | 2004-12-15 | 2005-12-14 | Bipolar transistor and method of making such a transistor |
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EP (1) | EP1831931A1 (en) |
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CN103208529A (en) * | 2012-01-11 | 2013-07-17 | 英飞凌科技股份有限公司 | Semiconductor diode and method for forming semiconductor diode |
US20200185513A1 (en) * | 2018-12-06 | 2020-06-11 | Nexperia B.V. | Semiconductor device and method of manufacture |
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CN102412282B (en) * | 2011-01-13 | 2014-05-21 | 上海华虹宏力半导体制造有限公司 | Base region structure of SiGe HBT |
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US5440152A (en) * | 1993-11-26 | 1995-08-08 | Nec Corporation | Heterojunction bipolar transistor having particular Ge distributions and gradients |
US20030098465A1 (en) * | 2001-11-29 | 2003-05-29 | Hitachi, Ltd. | Heterojunction bipolar transistor and method for production thereof |
US6660623B2 (en) * | 2000-05-26 | 2003-12-09 | Mitsubishi Heavy Industries, Ltd. | Semiconductor device and method of manufacturing the same |
US20040056274A1 (en) * | 2002-09-20 | 2004-03-25 | Fujitsu Limited | Semiconductor device and method for manufacturing the same |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0818829A1 (en) * | 1996-07-12 | 1998-01-14 | Hitachi, Ltd. | Bipolar transistor and method of fabricating it |
JP2002270817A (en) * | 2001-03-13 | 2002-09-20 | Nec Corp | Bipolar transistor |
-
2004
- 2004-12-15 GB GB0427363A patent/GB2421354A/en not_active Withdrawn
-
2005
- 2005-12-14 EP EP05818784A patent/EP1831931A1/en not_active Withdrawn
- 2005-12-14 WO PCT/GB2005/050250 patent/WO2006064290A1/en active Application Filing
- 2005-12-14 US US11/721,717 patent/US20090250724A1/en not_active Abandoned
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5440152A (en) * | 1993-11-26 | 1995-08-08 | Nec Corporation | Heterojunction bipolar transistor having particular Ge distributions and gradients |
US6660623B2 (en) * | 2000-05-26 | 2003-12-09 | Mitsubishi Heavy Industries, Ltd. | Semiconductor device and method of manufacturing the same |
US20030098465A1 (en) * | 2001-11-29 | 2003-05-29 | Hitachi, Ltd. | Heterojunction bipolar transistor and method for production thereof |
US20040056274A1 (en) * | 2002-09-20 | 2004-03-25 | Fujitsu Limited | Semiconductor device and method for manufacturing the same |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103208529A (en) * | 2012-01-11 | 2013-07-17 | 英飞凌科技股份有限公司 | Semiconductor diode and method for forming semiconductor diode |
US10164043B2 (en) * | 2012-01-11 | 2018-12-25 | Infineon Technologies Ag | Semiconductor diode and method for forming a semiconductor diode |
US20200185513A1 (en) * | 2018-12-06 | 2020-06-11 | Nexperia B.V. | Semiconductor device and method of manufacture |
Also Published As
Publication number | Publication date |
---|---|
EP1831931A1 (en) | 2007-09-12 |
GB0427363D0 (en) | 2005-01-19 |
WO2006064290A1 (en) | 2006-06-22 |
GB2421354A (en) | 2006-06-21 |
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