US20090239319A1 - Package for a light emitting diode and a process for fabricating the same - Google Patents
Package for a light emitting diode and a process for fabricating the same Download PDFInfo
- Publication number
- US20090239319A1 US20090239319A1 US12/385,728 US38572809A US2009239319A1 US 20090239319 A1 US20090239319 A1 US 20090239319A1 US 38572809 A US38572809 A US 38572809A US 2009239319 A1 US2009239319 A1 US 2009239319A1
- Authority
- US
- United States
- Prior art keywords
- terminal
- metal substrate
- recess
- fabricating
- package
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/483—Containers
- H01L33/486—Containers adapted for surface mounting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/52—Encapsulations
- H01L33/56—Materials, e.g. epoxy or silicone resin
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
Definitions
- the present invention generally relates to a package for a light emitting diode (referred to as an “LED” hereinafter), and more particular to an LED package provided with a recess and a process for fabricating such an LED package.
- LED light emitting diode
- a conventional package for an LED comprises a substrate 100 , an LED chip 103 , and a housing 104 .
- the substrate 100 has a first terminal 101 and a second terminal 102 .
- the LED chip 103 is mounted on a top surface of the first terminal 101 .
- the housing 104 caps the LED chip 103 and the substrate 100 .
- the chip 103 is electrically connected with the first terminal 101 and the second terminal 102 .
- another conventional package for an LED comprises a substrate 105 , a first terminal 106 , a second terminal 107 , an LED chip 108 , and a housing 109 .
- the LED chip 108 is mounted on a top surface of the first terminal 106 of the substrate 105 .
- the housing 109 caps the chip 108 and the substrate 105 .
- the chip 108 is electrically connected with the first terminal 106 and the second terminal 107 .
- LEDs have been widely applied to car braking lights, LCD panels, outdoor color advertising signs and traffic lights. To meet the demanding requirements from these and other applications, there is a great demand for the size of LED packages to be reduced. However, according to the prior art, the sizes of conventional packages for LEDs are not satisfying since the chips 103 and 108 are mounted on the top surfaces of the first terminals 101 and 106 of the substrates 100 and 105 , respectively.
- the inventor proposes the present invention to overcome the above problems based on his deliberate research and related principles.
- the object of the present invention is to provide a package for an LED and a process for fabricating such a package.
- a metal substrate formed with a recess is obtained by etching, and an LED chip is arranged in the recess of the metal substrate. Therefore, a smaller package for an LED becomes possible.
- the present invention provides a package for an LED, which comprises: a metal substrate having a first terminal and a second terminal, wherein the first terminal is formed with a recess; at least one light emitting diode chip arranged in the recess of the first terminal of the metal substrate, wherein the chip is electrically connected with the first terminal and the second terminal of the metal substrate; and an insulative housing capping the chip and the metal substrate.
- the present invention also provides a process for fabricating the above mentioned LED package, which comprises the following steps: providing a metal substrate; etching the metal substrate to form a first terminal, a second terminal and a trench between the first and the second terminals, wherein the first terminal is formed with a recess; arranging an LED chip in the recess, wherein the LED chip is electrically connected with the first and the second terminals; and filling a synthetic polymer into the trench and the recess to cover the LED chip.
- FIG. 1 is a cross-sectional view of a conventional package for an LED chip according to the prior art
- FIG. 2 is a cross-sectional view of a conventional package for an LED chip according to another prior art
- FIG. 3 is a cross-sectional view of a package for an LED chip according to the present invention.
- FIG. 4A is a top view showing an etched metal substrate (closed type) according to the present invention.
- FIG. 4B is a perspective view showing the etched metal substrate shown in FIG. 4A ;
- FIG. 5A is a top view showing an LED chip which is mounted on the metal substrate shown in FIG. 4A and bonded by a wire according to the present invention
- FIG. 5B is a perspective view of FIG. 5A ;
- FIG. 6A is a top view showing an LED chip which is capped with encapsulant according to the present invention.
- FIG. 7B is a perspective view showing the etched metal substrate shown in FIG. 7A ;
- FIG. 8A is a top view showing an LED chip mounted on the metal substrate shown in FIG. 7A and bonded by wires according to the present invention
- FIG. 9B is a cross-sectional view of FIG. 9A ;
- FIG. 9C is another cross-sectional view of FIG. 9A ;
- FIG. 10 is a flow chart showing a process for packaging an LED chip.
- a package for an LED chip comprises a metal substrate 1 , at least one LED chip 2 and an insulative housing 3 , according to the present invention.
- the metal substrate 1 has a first terminal 11 and a second terminal 12 .
- the first terminal 11 is formed with a recess 112 of any possible shape.
- the LED chip 2 is arranged in the recess 112 of the first terminal 11 and it has a first electrode 21 and a second electrode 22 .
- the first electrode 21 and the second electrode 22 may be arranged in a top and a bottom surfaces of the LED chip 2 , respectively. Alternatively, both the first electrode 21 and the second electrode 22 may be arranged in a top surface of the LED chip 2 .
- the first electrode 21 and the second electrode 22 are electrically connected with the first terminal 11 and the second terminal 12 of the metal substrate 1 .
- the insulative housing 3 caps the LED chip 2 and the metal substrate 1 , and it is substantially a light converging element.
- the metal substrate 1 has the first terminal 11 , the second terminal 12 , and the trench 13 .
- the first terminal 11 is formed with a recess 112 , and the recess 112 is closed on two inner surfaces thereof (such a recess is called an “open type”).
- the LED chip 2 is mounted in the recess 112 of the first terminal 11 and electrically connected with the first terminal 11 and the second terminal 12 of the metal substrate 1 . Furthermore, the first electrode 21 and the second electrode 22 are arranged on the top surface of the LED chip.
- the insulative housing 3 caps the chip 2 and the metal substrate 1 , and it is substantially a light converging element. Therefore, the whole package for the LED can converge light. Referring to FIG. 9A-9C , the insulative housing 3 caps the chip 2 and the metal substrate 1 , and it is substantially a light converging element. Therefore, the whole package for the LED can converge light. Referring to FIG.
- a process for fabricating the package for the LED comprises the following steps: 1) providing a metal substrate 1 (S 101 ), 2) electrograining the surface of the metal substrate 1 through a chemical or blasting process (S 102 ), 3) etching the metal substrate 1 to form a first terminal 11 , a second terminal 12 and a trench 13 between the first and the second terminals 11 , 12 , wherein the first terminal is formed with a recess 112 (S 103 ), 4) arranging an LED chip 2 in the recess 112 , wherein the LED chip 2 is electrically connected with the first and the second terminals 11 , 12 (S 104 ), and 5)filling a synthetic polymer into the trench 13 and the recess 112 to cover the LED chip (S 105 ), wherein the step of filling a synthetic polymer is a mold pressing process.
- the above process further comprises a step of capping the synthetic polymer with a light converging element.
- the material properties of the metal substrate 1 and the cost of the equipment required by the fabricating process is reduced. Furthermore, after the metal substrate 1 is covered with the synthetic polymer, its structure becomes stronger and it is more readily cut with less burrs. Meanwhile, the fabricating process does not conflict with and can even be incorporated into the prior fabricating process since none of the machines required by the prior art needs to be changed therefore.
- the metal substrate 1 is etched to be formed with the recess 112 for accommodating the LED chip 2 .
- the recess 112 can be either closed on the four, three or two inner surfaces thereof, and the recess 112 can be formed in any desired shape to reduce the size of the entire LED package.
Abstract
A package for an LED, comprises a metal substrate, at least one LED chip, and an insulative housing, wherein the metal substrate has a first terminal and a second terminal, and the first terminal is formed with a recess. The at least one LED chip is arranged in the recess of the first terminal of the metal substrate, wherein the chip is electrically connected with the first terminal and the second terminal of the metal substrate. Since the insulative housing caps the chip and the metal substrate, and the LED package can be reduced in size.
Description
- This application is a Divisional patent application of co-pending application Ser. No. 11/455,769, filed on 20 Jun. 2006. The entire disclosure of the prior application, Ser. No. 11/455,769, from which an oath or declaration is supplied, is considered a part of the disclosure of the accompanying Divisional application and is hereby incorporated by reference.
- 1. Field of the Invention
- The present invention generally relates to a package for a light emitting diode (referred to as an “LED” hereinafter), and more particular to an LED package provided with a recess and a process for fabricating such an LED package.
- 2. Description of Prior Art
- Referring to
FIG. 1 , a conventional package for an LED comprises asubstrate 100, anLED chip 103, and ahousing 104. Thesubstrate 100 has afirst terminal 101 and asecond terminal 102. TheLED chip 103 is mounted on a top surface of thefirst terminal 101. Thehousing 104 caps theLED chip 103 and thesubstrate 100. Thechip 103 is electrically connected with thefirst terminal 101 and thesecond terminal 102. - Referring to
FIG. 2 , another conventional package for an LED comprises asubstrate 105, afirst terminal 106, asecond terminal 107, anLED chip 108, and ahousing 109. TheLED chip 108 is mounted on a top surface of thefirst terminal 106 of thesubstrate 105. Thehousing 109 caps thechip 108 and thesubstrate 105. Thechip 108 is electrically connected with thefirst terminal 106 and thesecond terminal 107. - LEDs have been widely applied to car braking lights, LCD panels, outdoor color advertising signs and traffic lights. To meet the demanding requirements from these and other applications, there is a great demand for the size of LED packages to be reduced. However, according to the prior art, the sizes of conventional packages for LEDs are not satisfying since the
chips first terminals substrates - Therefore, in view of the above drawbacks existing in the conventional LED packages, the inventor proposes the present invention to overcome the above problems based on his deliberate research and related principles.
- The object of the present invention is to provide a package for an LED and a process for fabricating such a package. According to the present invention, a metal substrate formed with a recess is obtained by etching, and an LED chip is arranged in the recess of the metal substrate. Therefore, a smaller package for an LED becomes possible.
- In order to achieve the above object, the present invention provides a package for an LED, which comprises: a metal substrate having a first terminal and a second terminal, wherein the first terminal is formed with a recess; at least one light emitting diode chip arranged in the recess of the first terminal of the metal substrate, wherein the chip is electrically connected with the first terminal and the second terminal of the metal substrate; and an insulative housing capping the chip and the metal substrate.
- The present invention also provides a process for fabricating the above mentioned LED package, which comprises the following steps: providing a metal substrate; etching the metal substrate to form a first terminal, a second terminal and a trench between the first and the second terminals, wherein the first terminal is formed with a recess; arranging an LED chip in the recess, wherein the LED chip is electrically connected with the first and the second terminals; and filling a synthetic polymer into the trench and the recess to cover the LED chip.
- The characteristics and the technical contents of the present invention will be further understood in view of the detailed description and accompanying drawings. However, it should be noted that the drawings are illustrative but not used to limit the scope of the present invention. Wherein:
-
FIG. 1 is a cross-sectional view of a conventional package for an LED chip according to the prior art; -
FIG. 2 is a cross-sectional view of a conventional package for an LED chip according to another prior art; -
FIG. 3 is a cross-sectional view of a package for an LED chip according to the present invention; -
FIG. 4A is a top view showing an etched metal substrate (closed type) according to the present invention; -
FIG. 4B is a perspective view showing the etched metal substrate shown inFIG. 4A ; -
FIG. 5A is a top view showing an LED chip which is mounted on the metal substrate shown inFIG. 4A and bonded by a wire according to the present invention; -
FIG. 5B is a perspective view ofFIG. 5A ; -
FIG. 6A is a top view showing an LED chip which is capped with encapsulant according to the present invention; -
FIG. 6B is a cross-sectional view ofFIG. 6A ; -
FIG. 7A is a top view showing another etched metal substrate (open type) according to the present invention; -
FIG. 7B is a perspective view showing the etched metal substrate shown inFIG. 7A ; -
FIG. 8A is a top view showing an LED chip mounted on the metal substrate shown inFIG. 7A and bonded by wires according to the present invention; -
FIG. 8B is a perspective view ofFIG. 8A ; -
FIG. 9A is a top view showing the LED chip shown inFIG. 8A capped with encapsulant according to the present invention; -
FIG. 9B is a cross-sectional view ofFIG. 9A ; -
FIG. 9C is another cross-sectional view ofFIG. 9A ; and -
FIG. 10 is a flow chart showing a process for packaging an LED chip. - Referring to
FIG. 3 , a package for an LED chip comprises ametal substrate 1, at least oneLED chip 2 and aninsulative housing 3, according to the present invention. Themetal substrate 1 has afirst terminal 11 and asecond terminal 12. Thefirst terminal 11 is formed with arecess 112 of any possible shape. TheLED chip 2 is arranged in therecess 112 of thefirst terminal 11 and it has afirst electrode 21 and asecond electrode 22. Thefirst electrode 21 and thesecond electrode 22 may be arranged in a top and a bottom surfaces of theLED chip 2, respectively. Alternatively, both thefirst electrode 21 and thesecond electrode 22 may be arranged in a top surface of theLED chip 2. Thefirst electrode 21 and thesecond electrode 22 are electrically connected with thefirst terminal 11 and thesecond terminal 12 of themetal substrate 1. Theinsulative housing 3 caps theLED chip 2 and themetal substrate 1, and it is substantially a light converging element. - Referring to
FIGS. 4A and 4B , the etchedmetal substrate 1 has a closed configuration, according to the present invention. Themetal substrate 1 has afirst terminal 11, asecond terminal 12, and atrench 13 arranged between thefirst terminal 11 and thesecond terminal 12. Therecess 112 is closed on the four inner surfaces thereof (such a recess is called a “closed type”). -
FIGS. 5A and 5B are respectively a top view and a perspective view showing theLED chip 2 mounted on the metal substrate shown inFIG. 4A and bonded by a wire according to the present invention. TheLED chip 2 is arranged in therecess 112 of thefirst terminal 11, and it is electrically connected with thefirst terminal 11 and thesecond terminal 12 of themetal substrate 1. Referring toFIGS. 6A and 6B , the first and thesecond electrodes chip 2 are arranged in the top and bottom surfaces of thechip 2. Theinsulative housing 3 caps thechip 2 and thesubstrate 1 and it is substantially a light converging element. Therefore, the package for LED can converge light. - Referring to
FIGS. 7A and 7B , themetal substrate 1 has thefirst terminal 11, thesecond terminal 12, and thetrench 13. Thefirst terminal 11 is formed with arecess 112, and therecess 112 is closed on two inner surfaces thereof (such a recess is called an “open type”). - Referring to
FIGS. 8A and 8B , theLED chip 2 is mounted in therecess 112 of thefirst terminal 11 and electrically connected with thefirst terminal 11 and thesecond terminal 12 of themetal substrate 1. Furthermore, thefirst electrode 21 and thesecond electrode 22 are arranged on the top surface of the LED chip. Referring toFIG. 9A-9C , theinsulative housing 3 caps thechip 2 and themetal substrate 1, and it is substantially a light converging element. Therefore, the whole package for the LED can converge light. Referring toFIG. 10 , a process for fabricating the package for the LED comprises the following steps: 1) providing a metal substrate 1 (S101), 2) electrograining the surface of themetal substrate 1 through a chemical or blasting process (S102), 3) etching themetal substrate 1 to form afirst terminal 11, asecond terminal 12 and atrench 13 between the first and thesecond terminals LED chip 2 in therecess 112, wherein theLED chip 2 is electrically connected with the first and thesecond terminals 11, 12 (S104), and 5)filling a synthetic polymer into thetrench 13 and therecess 112 to cover the LED chip (S105), wherein the step of filling a synthetic polymer is a mold pressing process. The above process further comprises a step of capping the synthetic polymer with a light converging element. - When the
metal substrate 1 is in contact with the synthetic polymer, the material properties of themetal substrate 1 and the cost of the equipment required by the fabricating process is reduced. Furthermore, after themetal substrate 1 is covered with the synthetic polymer, its structure becomes stronger and it is more readily cut with less burrs. Meanwhile, the fabricating process does not conflict with and can even be incorporated into the prior fabricating process since none of the machines required by the prior art needs to be changed therefore. - According to the present invention, the
metal substrate 1 is etched to be formed with therecess 112 for accommodating theLED chip 2. Therecess 112 can be either closed on the four, three or two inner surfaces thereof, and therecess 112 can be formed in any desired shape to reduce the size of the entire LED package. - The present invention has the following advantages: 1) the
metal substrate 1 has good mechanical properties, 2) the metal substrate can be readily cut with less burrs, - 3) the cost of equipment required by the fabricating process can be reduced, 4) the fabricating process can be conducted together with the original one, 5) the package for the LED can be reduced in size, and 6) the package for the LED can converge light.
- Although the present invention has been described with reference to the foregoing preferred embodiments, it will be understood that the invention is not limited to the details thereof. Various equivalent variations and modifications can still be occurred to those skilled in this art in view of the teachings of the present invention. Thus, all such variations and equivalent modifications are also embraced within the scope of the invention as defined in the appended claims.
Claims (6)
1. A process for fabricating a light emitting diode package, the process comprising the following steps:
1) providing a metal substrate;
2) etching the metal substrate to form a first terminal, a second terminal, and a trench between the first and the second terminals, wherein the first terminal is formed with a recess; and
3) filling a synthetic polymer into the trench and the recess to cover the LED chip.
2. The process for fabricating a light emitting diode package according to claim 1 , further comprising a following step prior to the step of etching: electrograining the surface of the metal substrate, wherein the step of electrograining is obtained through a chemical process or a blasting process.
3. The process for fabricating a light emitting diode package according to claim 1 , wherein the recess of the first terminal is closed on four inner surfaces thereof.
4. The process for fabricating a light emitting diode package according to claim 1 , wherein the recess of the first terminal is closed on two inner surfaces thereof.
5. The process for fabricating a light emitting diode package according to claim 1 , wherein the step of filling a synthetic polymer is a mold pressing process.
6. The process for fabricating a light emitting diode package according to claim 1 , wherein the filling a synthetic polymer further comprises a step of capping the synthetic polymer with a light converging element.
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US12/385,728 US20090239319A1 (en) | 2006-06-20 | 2009-04-17 | Package for a light emitting diode and a process for fabricating the same |
US13/214,337 US8137999B2 (en) | 2006-06-20 | 2011-08-22 | Package for a light emitting diode and method for fabricating the same |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/455,769 US20070290220A1 (en) | 2006-06-20 | 2006-06-20 | Package for a light emitting diode and a process for fabricating the same |
US12/385,728 US20090239319A1 (en) | 2006-06-20 | 2009-04-17 | Package for a light emitting diode and a process for fabricating the same |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
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US11/455,769 Division US20070290220A1 (en) | 2006-06-20 | 2006-06-20 | Package for a light emitting diode and a process for fabricating the same |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
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US13/214,337 Continuation US8137999B2 (en) | 2006-06-20 | 2011-08-22 | Package for a light emitting diode and method for fabricating the same |
Publications (1)
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US20090239319A1 true US20090239319A1 (en) | 2009-09-24 |
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ID=38860668
Family Applications (3)
Application Number | Title | Priority Date | Filing Date |
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US11/455,769 Abandoned US20070290220A1 (en) | 2006-06-20 | 2006-06-20 | Package for a light emitting diode and a process for fabricating the same |
US12/385,728 Abandoned US20090239319A1 (en) | 2006-06-20 | 2009-04-17 | Package for a light emitting diode and a process for fabricating the same |
US13/214,337 Active US8137999B2 (en) | 2006-06-20 | 2011-08-22 | Package for a light emitting diode and method for fabricating the same |
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US11/455,769 Abandoned US20070290220A1 (en) | 2006-06-20 | 2006-06-20 | Package for a light emitting diode and a process for fabricating the same |
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US13/214,337 Active US8137999B2 (en) | 2006-06-20 | 2011-08-22 | Package for a light emitting diode and method for fabricating the same |
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US (3) | US20070290220A1 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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US20120248482A1 (en) * | 2011-04-02 | 2012-10-04 | Advanced Optoelectronic Technology, Inc. | Led package and method for manufacturing the same |
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CN101465395A (en) * | 2007-12-21 | 2009-06-24 | 富士迈半导体精密工业(上海)有限公司 | Led |
JP5464825B2 (en) * | 2008-07-23 | 2014-04-09 | ローム株式会社 | LED module |
KR100888236B1 (en) | 2008-11-18 | 2009-03-12 | 서울반도체 주식회사 | Light emitting device |
DE102010000892B4 (en) * | 2010-01-14 | 2019-01-03 | Robert Bosch Gmbh | Method for providing and connecting two contact regions of a semiconductor component or a substrate, and a substrate having two such connected contact regions |
CN103367619B (en) * | 2012-03-30 | 2015-12-02 | 光宝电子(广州)有限公司 | Metal standoff structure and light emitting diode construction |
US10177292B2 (en) | 2014-05-23 | 2019-01-08 | Everlight Electronics Co., Ltd. | Carrier, carrier leadframe, and light emitting device |
TWI553264B (en) | 2014-05-23 | 2016-10-11 | 億光電子工業股份有限公司 | Carrier leadframe and manufacturung method thereof and light emitting device and manufacturung method from said carrier leadframe |
CN106571383B (en) | 2015-10-08 | 2020-04-28 | 联华电子股份有限公司 | Semiconductor element and manufacturing method thereof |
KR20180046274A (en) * | 2016-10-27 | 2018-05-08 | 엘지이노텍 주식회사 | Semiconductor device package |
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TW594950B (en) * | 2003-03-18 | 2004-06-21 | United Epitaxy Co Ltd | Light emitting diode and package scheme and method thereof |
JP4359195B2 (en) * | 2004-06-11 | 2009-11-04 | 株式会社東芝 | Semiconductor light emitting device, manufacturing method thereof, and semiconductor light emitting unit |
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2006
- 2006-06-20 US US11/455,769 patent/US20070290220A1/en not_active Abandoned
-
2009
- 2009-04-17 US US12/385,728 patent/US20090239319A1/en not_active Abandoned
-
2011
- 2011-08-22 US US13/214,337 patent/US8137999B2/en active Active
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US20030075724A1 (en) * | 2001-10-19 | 2003-04-24 | Bily Wang | Wing-shaped surface mount package for light emitting diodes |
US20060054912A1 (en) * | 2001-12-07 | 2006-03-16 | Gen Murakami | Light-emitting unit and method for producing same as well as lead frame used for producing light-emitting unit |
US20060043407A1 (en) * | 2004-08-26 | 2006-03-02 | Kabushiki Kaisha Toshiba | Semiconductor light emitting apparatus |
US20060043401A1 (en) * | 2004-09-01 | 2006-03-02 | Samsung Electro-Mechanics Co., Ltd. | High power light emitting diode package |
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US20120248482A1 (en) * | 2011-04-02 | 2012-10-04 | Advanced Optoelectronic Technology, Inc. | Led package and method for manufacturing the same |
US8552462B2 (en) * | 2011-04-02 | 2013-10-08 | Advanced Optoelectric Technology, Inc. | LED package and method for manufacturing the same |
US20140004633A1 (en) * | 2011-04-02 | 2014-01-02 | Advanced Optoelectronic Technology, Inc. | Method for manufacturing led package |
US8900895B2 (en) * | 2011-04-02 | 2014-12-02 | Advanced Optoelectronic Technology, Inc. | Method for manufacturing LED package |
Also Published As
Publication number | Publication date |
---|---|
US20110300649A1 (en) | 2011-12-08 |
US20070290220A1 (en) | 2007-12-20 |
US8137999B2 (en) | 2012-03-20 |
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