US20090233449A1 - Etching chamber with subchamber - Google Patents
Etching chamber with subchamber Download PDFInfo
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- US20090233449A1 US20090233449A1 US11/816,760 US81676006A US2009233449A1 US 20090233449 A1 US20090233449 A1 US 20090233449A1 US 81676006 A US81676006 A US 81676006A US 2009233449 A1 US2009233449 A1 US 2009233449A1
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- sample
- chamber
- semiconductor wafer
- subchamber
- assembly
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/3065—Plasma etching; Reactive-ion etching
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67017—Apparatus for fluid treatment
- H01L21/67063—Apparatus for fluid treatment for etching
- H01L21/67069—Apparatus for fluid treatment for etching for drying etching
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67017—Apparatus for fluid treatment
- H01L21/67063—Apparatus for fluid treatment for etching
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
- H01L21/67739—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations into and out of processing chamber
- H01L21/67745—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations into and out of processing chamber characterized by movements or sequence of movements of transfer devices
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
- H01L21/67739—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations into and out of processing chamber
- H01L21/67751—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations into and out of processing chamber vertical transfer of a single workpiece
Abstract
Description
- Vapor etching of semiconductor materials and/or substrates is accomplished using gases, such as xenon difluoride. Specifically, in xenon difluoride etching, xenon difluoride gas reacts with solid materials, such as silicon and molybdenum, such that the materials are converted to a gas phase. The removal of these materials is known as etching.
- Some of the gases used to perform vapor etching, such as xenon difluoride, can be expensive, hence, waste of this etching gas should be minimized. However, standard production etching systems in the semiconductor industry are typically not optimized to maximize gas utilization. In particular, Modular Equipment Standards Committee (MESC) compatible chambers, which are those which are typically connected in a cluster arrangement around a central robot, inherently have large chamber volumes. This large chamber volume is a result primarily of a side port used to provide access for the wafer. In addition, many MESC compatible chambers can be used for processing of large diameter wafers, e.g., 200 mm diameter wafer, but can also be used to process smaller diameter wafers, e.g., 100 mm diameter wafers. When using the larger chamber to process a smaller wafer, which is a common occurrence in facilities where more than one wafer size is used, further waste of etching gas occurs.
- In addition, since MESC compatible chambers have a wafer loading port on one side, the chamber is inherently non-symmetric. Such asymmetry can lead to non-uniform etching of the wafer since the gas is not distributed axisymmetrically about the wafer.
- What is, therefore, needed is a chamber such as, without limitation, an MESC compatible etching chamber or other etching chamber with a port on the side for loading, which has a subchamber assembly inside that creates a reduced chamber volume, is desirably axisymmetric shaped, that maximizes utilization of the etching gas and improves wafer etch uniformity.
- The invention is a semiconductor wafer or sample etching system having a first chamber including a loading port for the passage of a semiconductor wafer or sample between an exterior and an interior of the first chamber having a first volume and a vacuum port in communication with the interior of the first chamber. A wafer or sample holder is disposed in the interior of the first chamber for supporting the semiconductor wafer or sample passed through the loading port. A subchamber assembly is disposed within the first chamber. The subchamber assembly is moveable between an open position, wherein the semiconductor wafer or sample passed through the loading port can be loaded on the sample holder, and a closed position, wherein the combination of the subchamber assembly and the first chamber form a second chamber defining a second, smaller volume that includes the sample holder and the vacuum port.
- The etching system can include means for lowering and lifting the semiconductor wafer or sample to and from the sample holder.
- The means for lowering and lifting can include means for supporting the semiconductor wafer or sample along an edge thereof during the lowering and lifting thereof, a pneumatic or hydraulic mechanism for lowering and lifting the semiconductor wafer or sample, and/or an electric actuator for lowering and lifting the semiconductor wafer or sample.
- The etching system can include an etching gas port in the subchamber assembly for the passage of etching gas into the second chamber and means for passing the etching gas to the etching gas port.
- Means can be provided for clamping or holding the semiconductor wafer or sample to the sample holder, especially when the subchamber assembly is in the closed position. Means can also be provided for introducing a gas between the semiconductor wafer or sample and the sample holder when the semiconductor wafer or sample is positioned on the sample holder.
- A first seal can be disposed between the subchamber assembly and the first chamber for avoiding the passage of gas therebetween when the subchamber assembly is in the closed position. An adaptor ring can be disposed between the subchamber assembly and the first chamber. A second seal can be disposed between the adaptor ring and the first chamber for avoiding the passage of gas therebetween when the subchamber assembly is in the closed position.
- The invention is also a method of etching a semiconductor wafer or sample comprising (a) causing a semiconductor wafer or sample to be placed on a sample holder in a first chamber; (b) enclosing the semiconductor wafer or sample on the sample holder within a second chamber inside the first chamber; (c) evacuating gas from the second chamber; and (d) introducing an etching gas into the second chamber but not into the first chamber.
- The method can also include clamping the semiconductor wafer or sample to the sample holder and/or introducing a thermally-conductive gas between the semiconductor wafer or sample and the sample holder.
- The first chamber can have a first volume and the second chamber can have a second, smaller volume that is coextensive with the first volume.
- Lastly, the invention is a semiconductor wafer or sample etching system that includes a first chamber, a sample holder in the first chamber, and a subchamber assembly inside the first chamber. The subchamber assembly can be moved between a first position that permits introduction or removal of a semiconductor wafer or sample onto or from the sample holder and second position, wherein the combination of the subchamber assembly and the first chamber define an enclosed second chamber inside the first chamber.
- Means can be provided for lowering and lifting the semiconductor wafer or sample to and from the sample holder. The means for lowering and lifting can include means for supporting the semiconductor wafer or sample along an edge thereof during the lowering and lifting thereof, a pneumatic or hydraulic mechanism for lowering and lifting the semiconductor wafer or sample semiconductor wafer or sample, and/or an electric actuator for lowering and lifting the semiconductor wafer or sample.
- Means can also be provided for passing etching gas into the second chamber, but not the first chamber.
- Means can also be provided for holding the semiconductor wafer or sample to the sample holder, especially when the subchamber assembly is in the closed position.
- Means can also be provided for introducing a gas between the semiconductor wafer or sample and the sample holder when the semiconductor wafer or sample is positioned on the sample holder.
- At least one seal can be disposed between the subchamber assembly and the first chamber for avoiding the passage of gas therebetween when the subchamber assembly is in the closed position. An adaptor ring can be disposed between the subchamber assembly and the first chamber, whereupon the subchamber assembly in the closed position contacts the adaptor ring which, in turn, contacts the first chamber.
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FIG. 1 is a cross-sectional perspective view of prior art MESC compatible chamber block and lid including therein a subchamber assembly in accordance with the present invention; -
FIG. 2 is a sectional view taken along line II-II inFIG. 1 ; -
FIG. 3 is a block diagram of a flow of etching gas through the subchamber assembly shown inFIG. 1 ; -
FIGS. 4-8 are cross-sectional views of the chamber block and subchamber assembly shown inFIG. 1 showing the progressive loading of a semiconductor wafer or sample on a sample holder thereof and the formation of a sealed chamber around the sample holder with the semiconductor wafer or sample loaded thereon; -
FIG. 9 is a cross-sectional perspective view of the semiconductor wafer or sample positioned on the sample holder of the sealed chamber shown inFIG. 8 including vertical and horizontal channels in fluid communication with a port of the subchamber assembly for the introducing of etchant gas into the sealed chamber; -
FIG. 10 is a cross-sectional perspective view of another embodiment of the chamber block including the subchamber assembly and an adaptor ring, with the subchamber assembly in the open position; -
FIG. 11 is a cross-sectional view of the chamber block and subchamber assembly shown inFIG. 10 , with the subchamber assembly in the closed position against the adaptor ring; -
FIG. 12 is a cross-sectional perspective view of the chamber block and subchamber assembly, wherein the wafer clamping tabs utilized to clamp the semiconductor wafer or sample to the sample holder shown inFIG. 8 are replaced with a weight and clamping fingers; -
FIG. 13 is a cross-sectional view of the chamber block and subchamber assembly shown inFIG. 12 , with the semiconductor wafer or sample positioned for loading onto the sample holder; and -
FIG. 14 is a cross-sectional perspective view of the chamber block and subchamber assembly ofFIGS. 12 and 13 , with the semiconductor wafer or sample positioned on the sample holder in the sealed chamber formed by the subchamber assembly in the closed position. - The present invention will be described with reference to the accompanying figures, where like reference numbers correspond to like elements.
- With reference to
FIG. 1 , a MESC compatible or other side-loaded etching chamber includes achamber block 103 and alid 102.Chamber block 103 includes asample loading port 108 and avacuum port 113 which can be coupled to a suitable source of vacuum, e.g.,vacuum pump 128 inFIG. 3 , which is operative for drawing a vacuum on an interior ofchamber block 103. The interior ofchamber block 103 defines a first volume. - Also shown are a
sample loading arm 100, with a semiconductor wafer orsample 101, asubchamber assembly 106 having agas inlet port 110 in a lid thereof, one or more optionalsample clamping tabs 107, a sample lifting means 105 and a subchamber seal 111. The illustration ofgas inlet port 110 in the lid ofsubchamber assembly 106 is not to be construed as limiting the invention. - A
lifting mechanism 112 is desirably coupled betweenchamber block 103 and a lifting/lowering means 114, shown inFIG. 4 , which is operative for raising and loweringsubchamber assembly 106, and any components attached thereto, vialifting mechanism 112. As shown best inFIGS. 2 and 9 ,lifting mechanism 112 desirably comprises a pair of rods coupled betweensubchamber assembly 106, desirably a lid ofsubchamber assembly 106, and lifting/lower means 114 via a pair of slide channels defined through a floor ofchamber block 103. A suitable gas tight seal (not shown) can be disposed between each rod and its corresponding slide channel to avoid the passage of gas thereby. The illustration oflifting mechanism 112 comprising a pair of rods slideable in slide channels, however, is not to be construed as limiting the invention since it is envisioned thatlifting mechanism 112 can be implemented in any manner deemed suitable and/or desirable by one of ordinary skill in the art. - In addition,
FIG. 1 also shows asample holder 104, such as, without limitation, a wafer chuck, desirably temperature controlled, with anoptional gas connection 109.Gas connection 109 is configured for introducing a thermal conduction gas, such as helium, betweensample 101 andsample holder 104 whensample 101 is positioned onsample holder 104 to improve thermal conduction therebetween. To avoid the escape of this thermal conduction gas from betweensample 101 positioned onsample holder 104, a flexible gas seal 117, shown in phantom inFIG. 1 , can be disposed betweensample 101 positioned onsample holder 104. - With reference to
FIG. 2 ,sample holder 104 includesnotches 116 defined therein and sample lifting means 105 includescorresponding tabs 115. When sample lifting means 105 is lowered towardsample holder 104 in the manner to be described hereinafter,tabs 115 defined onsample lifting means 105 are received innotches 116 defined in or throughsample holder 104.Tabs 115 provide wafer lift capability known as edge lift. - With reference to
FIG. 3 , etching gas flows from asource container 120, through agas control 122, e.g., a valve, a series of valves, a pressure controller, an intermediate expansion chamber of any of the types disclosed in U.S. Pat. No. 6,887,337 to Lebouitz et al., which is incorporated herein by reference, a flow controller, or any combination of these components, through subchamber assembly 106 (block 124), which, in combination withchamber block 103, can form a sealed chamber 130 (shown best inFIGS. 8 and 9 ), through avacuum controller 126, which may be a valve, a series of valves, a pressure controller, a flow controller or any combination of these components, and then through avacuum pump 128. - With reference to
FIGS. 4-8 , a sequence of loading, processing, and unloadingsample 101 will now be described. -
FIG. 4 showssubchamber assembly 106, sample lifting means 105, subchamber seal 111,wafer clamping tabs 107 andlifting mechanism 112 raised into a load or open position via lifting/lowering means 114, such as, without limitation, a suitable pneumatic or hydraulic mechanism or an electric actuator. In the illustrated embodiment, sample lifting means 105, subchamber assembly seal 111 andwafer clamping tabs 107 are coupled tosubchamber assembly 106 which, in turn, is coupled to liftingmechanism 112. However, this is not to be construed as limiting the invention since it is envisioned that sample lifting means 105 andwafer clamping tabs 107 can be coupled to liftingmechanism 112 in any suitable and/or desirable manner. Moreover, it is envisioned that subchamber assembly seal 111 can alternatively be located on the mating face of a floor ofchamber block 103 where the lower end ofsubchamber assembly 106 contacts to form the sealedchamber 130, shown best inFIGS. 8 and 9 . InFIG. 4 ,sample 101 is shown positioned between subchamber assembly seal 111 and sample lifting means 105 outside the periphery of subchamber assembly seal 111 bysample loading arm 100. - With reference to
FIG. 5 , at a suitable time,sample 101 is positioned beneath, desirably concentric, withsubchamber assembly 106 bysample loading arm 100. -
FIG. 6 showssample loading arm 100 in the same position as inFIG. 5 but withsubchamber assembly 106, sample lifting means 105, subchamber seal 111, andwafer clamping tabs 107 moved by lifting/lowering means 114 vialifting mechanism 112 in a vertical direction away fromsample holder 104, whereupontabs 115 of sample lifting means 105lift sample 101 off ofsample loading arm 100 via the edge ofsample 101. This lifting action is helpful in thatsample loading arm 100 does not need to have vertical motion capability. - With reference to
FIG. 7 , oncesample 101 has been lifted off ofsample loading arm 100 bytabs 115 ofwafer lift ring 105,wafer arm 100 is retracted fromchamber block 103. - With reference to
FIG. 8 , afterwafer arm 100 has been retracted fromchamber block 103,subchamber assembly 106, sample lifting means 105, subchamber seal 111,wafer clamping tabs 107 andlifting mechanism 112 are lowered by lifting/lowering means 114 whereuponsample 101 is deposited onsample holder 104 and sealedchamber 130 is formed having a second, smaller volume within the first volume defined bychamber block 103. Ordinarily,chamber block 103 includes a door (not shown) for closing and sealingloading port 108 aftersample 101 has been loaded ontosample holder 104. - During lowering of
subchamber assembly 106,tabs 115 are received innotches 116 andwafer clamping tabs 107, if present, press againstsample 101 to clamp it againstsample holder 104. This clamping improves the thermal contact betweensample 101 andsample holder 104 to aid controlling the temperature ofsample 101 during etching. In one non-limiting embodiment,sample clamping tabs 107 are flexible and have a spring memory in a vertical direction whereupon they can clampsample 101 to sampleholder 104 with spring force related to the diameter and thickness ofsample 101. However, this is not to be construed as limiting the invention. - Adding a thermally-conductive gas, such as helium, through
gas connection 109 whensample 101 is loaded onsample holder 104 can further improve thermal conduction betweensample 101 andsample holder 104. Clampingsample 101 to sampleholder 104 also avoids etching gas from reaching the rear ofsample 101. - Once sealed
chamber 130 has been formed, gas is evacuated from sealedchamber 130 by the operation ofvacuum pump 128 viavacuum port 113. Thereafter, etching ofsample 101 can proceed by flowing vapor etching gas throughport 110 into sealedchamber 130.FIG. 9 shows one non-limiting embodiment wherein etching gas flows through avertical channel 132 defined in a rod oflifting mechanism 112 in direct fluid communication with ahorizontal channel 134 in the lid ofsubchamber assembly 106 before exitingport 110. - Once
sample 101 has been etched by etching gas to a desired extent,sample 101 is removed from the etching chamber by reversing the procedures used to loadsample 101 onsample holder 104. - With reference to
FIG. 10 , whenchamber block 103 is designed to handlelarge wafers 101, it can be readily modified to accommodate smaller wafers. More specifically,FIG. 10 shows that a reduced volume subchamber assembly 106N is easily implemented maximizing the utilization of etching gas. This reduced volume subchamber assembly 106N includes appropriately sized components, such as, without limitation, sample lifting means 105, subchamber seal 111,wafer clamping tabs 107, andlifting mechanism 112. A reduced-sized sample holder 104′ can also be employed in combination with an optionaladaptor sealing ring 140 mounted on a floor ofchamber block 103 aroundsample holder 104′.Adaptor ring 140 includes around the base thereof aseal 141 configured to engage the floor ofchamber block 103 to form a seal betweenadaptor ring 140 and the floor ofchamber block 103 to avoid the passage of etching gas from sealedchamber 130. -
FIG. 11 shows a cross section of thechamber block 103 shown inFIG. 10 looking directly from the side withsubchamber assembly 106 in the closed position pressing subchamber seal 111 into contact with a top surface ofadaptor ring 140 and, thereby, pressingseal 141 into contact with the floor ofchamber block 103 to form seals therebetween that avoid the passage of etching gas from sealedchamber 130. -
FIGS. 12-14 show another means for clamping semiconductor wafer orsample 101 to sampleholder 104 by way of aweight 150.Weight 150 provides the necessary downward force to clampsample 101 to sampleholder 104 via clampingfingers 152 arranged around an inner periphery ofweight 150. An advantage of usingweight 150 for clamping is that the clamping force will be independent of wafer diameter, which is typically not the case when using a spring-based clamping design, e.g.,wafer clamping tabs 107. -
Weight 150 is able to move vertically inside of thesubchamber assembly 106 so that clampingfingers 152 can apply a downward force onsample 101. In this embodiment, vertical sliding motion betweenweight 150 andsubchamber assembly 106 is accomplished viaslides 154 which are distributed betweenweight 150 andsubchamber assembly 106 and which are accommodated bygrooves 158 insubchamber assembly 106. The downward motion ofweight 150 is restricted by a retainingring 156 which, thereby, enablesweight 150 to be raised and lowered from and tosample holder 104 in concert with the raising and lowering ofsubchamber assembly 106 by lifting/lowering means 114. As shown inFIG. 14 , whensubchamber assembly 103 andweight 150 are lowered towardsample 101 positioned onsample holder 104, slides 154 enablesubchamber assembly 103 to move subchamber seal 111 into contact with a floor ofchamber block 103 after clampingfingers 152 ofweight 150 have engaged a top surface ofsample 101, thereby clampingsample 101 to sampleholder 104. - The invention has been described with reference to the preferred embodiments. Obvious modifications and alterations will occur to others upon reading and understanding the preceding detailed description. For example, sample lifting means 105 can be replaced by other suitable means, such as so-called wafer lift pins 144, shown in phantom in
FIG. 13 , slidably received inchannels 146 formed insample holder 104 and coupled to lifting/lowering means 114. Under the control of lifting/lowering means 114, the vertical motion of these wafer lift pins 144, shown by two headed arrow 148 inFIG. 13 , can be controlled to raise andlower sample 101 away and towardsample holder 104 during loading and unloading ofsample 101 onsample holder 104. Alternatively, sample lifting means 105 can be replaced by a single, central pedestal or post (not shown) slidably received in a channel formed centrally insample holder 104 and having a diameter sufficient for supportingsample 101 during the raising and lowering thereof. Moreover, the description herein of clampingtabs 107 and clampingfingers 152 for clamping semiconductor wafer or sample to sampleholder 104 is not to be construed as limiting the invention since it is envisioned that any other suitable and/or desirable mechanical clamping means, such as a clamping ring, or electrostatic clamping means may also or alternatively be used for hold semiconductor wafer orsample 101 to sampleholder 104. It is intended that the invention be construed as including all such modifications and alterations insofar as they come within the scope of the appended claims or the equivalents thereof.
Claims (19)
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US11/816,760 US9576824B2 (en) | 2005-02-22 | 2006-02-22 | Etching chamber with subchamber |
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US65509405P | 2005-02-22 | 2005-02-22 | |
US11/816,760 US9576824B2 (en) | 2005-02-22 | 2006-02-22 | Etching chamber with subchamber |
PCT/US2006/006090 WO2006091588A2 (en) | 2005-02-22 | 2006-02-22 | Etching chamber with subchamber |
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CN113467199B (en) * | 2021-09-06 | 2021-11-12 | 宁波润华全芯微电子设备有限公司 | Device convenient to dismantle and capable of preventing wafer from being polluted by splashing liquid |
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Also Published As
Publication number | Publication date |
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KR20080007219A (en) | 2008-01-17 |
EP1855794B1 (en) | 2012-10-31 |
EP1855794A2 (en) | 2007-11-21 |
KR101213390B1 (en) | 2012-12-18 |
JP2008532287A (en) | 2008-08-14 |
US9576824B2 (en) | 2017-02-21 |
CN101128622A (en) | 2008-02-20 |
JP5531284B2 (en) | 2014-06-25 |
CN101128622B (en) | 2010-08-25 |
EP1855794A4 (en) | 2010-10-20 |
WO2006091588A2 (en) | 2006-08-31 |
WO2006091588A3 (en) | 2007-01-11 |
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