US20090051578A2 - Method and System for Correcting Switched Input A/D Converters - Google Patents
Method and System for Correcting Switched Input A/D Converters Download PDFInfo
- Publication number
- US20090051578A2 US20090051578A2 US11/903,259 US90325907A US2009051578A2 US 20090051578 A2 US20090051578 A2 US 20090051578A2 US 90325907 A US90325907 A US 90325907A US 2009051578 A2 US2009051578 A2 US 2009051578A2
- Authority
- US
- United States
- Prior art keywords
- signal
- circuit
- oversampled
- input
- signals
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/10—Calibration or testing
- H03M1/1009—Calibration
- H03M1/1033—Calibration over the full range of the converter, e.g. for correcting differential non-linearity
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
Definitions
- A/D (analog-to-digital) converters are circuits that convert continuous analog signals, for example an input analog voltage or current signal, into discrete digital signals.
- Switched input A/D converters typically include a switched input circuit that connects the A/D converter to an input power source (for example, a DC or AC voltage source), so that a DC supply voltage of selectable polarity can be provided to the A/D converter.
- a number of unwanted correlated signals are inherent in switched input A/D converters. Examples of these inherent unwanted responses include, but are not limited to, offset stability, gain stability, gain accuracy, offset drift and gain drift.
- Methods and systems are desired for correcting these unwanted correlated signals in switched input A/D converters, while maintaining an improved overall response.
- a system for correcting a switched input A/D converter circuit that performs a plurality of A/D conversions.
- the system includes an oversampling circuit, a switched input controller, separation circuitry, and a signal processing subsystem.
- the oversampling circuit is configured to convert one or more input analog signals into oversampled output signals.
- the switched input controller is configured to switch a separate calibration signal into the oversampling circuit, as a replacement for the input analog signal, for at least some of the A/D conversions.
- the separation circuitry is configured to separate the oversampled output signal from the calibration signal.
- the signal processing subsystem is configured to synchronously and separately process the oversampled output signal and the calibration signal so as to substantially reduce unwanted correlated response of the switched input A/D converter circuit.
- FIG. 1 is a schematic block diagram of a system 100 for correcting for unwanted correlated signals in switched input A/D converters, in accordance with one embodiment of the present disclosure.
- FIG. 2 is a schematic flow chart of a method of correcting for unwanted correlated signals in switched input A/D converters, in accordance with one embodiment of the present disclosure.
- FIG. 1 is a schematic block diagram of a system 100 for correcting for unwanted correlated signals in switched input A/D converters, in accordance with one embodiment of the present disclosure.
- the system 100 includes an oversampling circuit 110 , a switched input circuit 120 , a signal separation circuit 130 , and a signal processing subsystem 190 .
- the oversampling circuit 110 is configured to convert one or more input analog signals into oversampled output signals.
- the oversampling circuit 110 may be a conventional circuit samples the input signal and/or the calibration signal at a sampling rate that is much higher than the Nyquist frequency.
- the switched input circuit 120 is configured to switch, for at least some of the A/D conversions, a separate calibration signal into the oversampling circuit 110 , as a replacement for the input analog signal.
- the analog input signal is not switched to the converter by the switched input circuit 120 , but rather another different signal, namely the calibration signal, is switched to the A/D converter through the oversampling circuit 110 .
- the two different types of conversions mainly input and calibration, are then separated and synchronously manipulated, to reduced unwanted correlated inherent responses of the A/D converter.
- the signal separation circuit 130 may be configured to perform common filtering of the oversampled output signal and the oversampled calibration signal. After the common filtering process, the circuit sends the filtered and oversampled signals onto different portions of the signal processing subsystem 190 .
- the signal processing subsystem 190 is configured to synchronously and independently process the oversampled output signal and the oversampled calibration signal, so as to substantially reduce unwanted correlated response when A/D conversion is performed on the oversampled signals.
- the synchronous manipulation of the converted data may include one or more of: filtration, compensation, restoration, interpolation, and scaling. Examples of unwanted correlated signals or responses that are inherent in A/D conversion of switched input A/D converters include one or more of the following: offset stability; gain stability; gain accuracy; offset drift; and gain drift.
- the signal processing subsystem 190 includes a first processing circuit 150 and a second processing circuit 160 .
- the first processing circuit 150 is configured to filter and process the oversampled input signal.
- the second processing circuit 160 is configured to filter and process the oversampled calibration signal.
- the components of each of the first processing circuit 150 and the second processing circuit 160 may include, but are not limited to, one or more of the following: a filtration circuit; a compensation circuit; a restoration circuit; and interpolation circuit; and a scaling circuit. These circuits may perform these conventional processing steps on the oversampled analog signal and the oversampled calibration signal.
- the system 100 includes a converter 180 , which converts the separately processed input signal and calibration signal, to generate corrected digital data.
- FIG. 2 is a schematic flow chart of a method of correcting for unwanted correlated signals in switched input A/D converters, in accordance with one embodiment of the present disclosure.
- step 210 one or more input signals are send to the oversampling circuit, and the input signal is oversampled. For some of these oversampled conversions, the input signal is not switched to the converter. Instead, as shown in step 210 , another calibration signal is switched to the AD converter, and the calibration signal is oversampled.
- the two different types of conversions mainly input and calibration, are then separated and synchronously manipulated to reduce the unwanted correlated inherent responses of the AD converter mentioned above.
- the synchronous manipulation of the converted data includes signal processing steps such as filtration, compensation, restoration, interpolation and scaling.
- the oversampled input signal is processed by synchronous manipulation.
- the oversampled calibration signal is separately processed by such signal processing steps.
- step 260 the processed input signal and the processed calibration signal are converted, to generate corrected digital data.
- the methods and systems described in the present disclosure substantially reduce unwanted correlated signals inherent in the converter, while guaranteeing a fixed output code for the no signal input condition. In this way, the need for offset correction is substantially eliminated, in systems that need to know the offset level of the A/D converter. Also, this approach guarantees a fixed output code for the full signal input condition, thus eliminating the need for full scale correction in systems that need to know the full scale level of the converter.
Abstract
Description
- This application is based upon, and claims the benefit of priority under 35U.S.C. § 119(e), from U.S. Provisional Patent Application Ser. No. 60/846,380 (the “'380 provisional application”), filed Sep. 21, 2006, entitled “A Method for Calibrating or Correcting Switched Input A/D Converters to Reduce Unwanted Correlated Signals Inherent Within the A/D Converter.” The content of the '380 provisional application is incorporated herein by reference in its entirety as though fully set forth.
- A/D (analog-to-digital) converters are circuits that convert continuous analog signals, for example an input analog voltage or current signal, into discrete digital signals. Switched input A/D converters typically include a switched input circuit that connects the A/D converter to an input power source (for example, a DC or AC voltage source), so that a DC supply voltage of selectable polarity can be provided to the A/D converter.
- A number of unwanted correlated signals are inherent in switched input A/D converters. Examples of these inherent unwanted responses include, but are not limited to, offset stability, gain stability, gain accuracy, offset drift and gain drift.
- Methods and systems are desired for correcting these unwanted correlated signals in switched input A/D converters, while maintaining an improved overall response.
- A system is described for correcting a switched input A/D converter circuit that performs a plurality of A/D conversions. The system includes an oversampling circuit, a switched input controller, separation circuitry, and a signal processing subsystem. The oversampling circuit is configured to convert one or more input analog signals into oversampled output signals. The switched input controller is configured to switch a separate calibration signal into the oversampling circuit, as a replacement for the input analog signal, for at least some of the A/D conversions. The separation circuitry is configured to separate the oversampled output signal from the calibration signal. The signal processing subsystem is configured to synchronously and separately process the oversampled output signal and the calibration signal so as to substantially reduce unwanted correlated response of the switched input A/D converter circuit.
-
FIG. 1 is a schematic block diagram of asystem 100 for correcting for unwanted correlated signals in switched input A/D converters, in accordance with one embodiment of the present disclosure. -
FIG. 2 is a schematic flow chart of a method of correcting for unwanted correlated signals in switched input A/D converters, in accordance with one embodiment of the present disclosure. - In the present disclosure, methods and systems are described for correcting unwanted correlated signals, such as offset stability, gain stability, gain accuracy, offset drift, and gain drift, in switched input A/D converters.
-
FIG. 1 is a schematic block diagram of asystem 100 for correcting for unwanted correlated signals in switched input A/D converters, in accordance with one embodiment of the present disclosure. In overview, thesystem 100 includes anoversampling circuit 110, a switchedinput circuit 120, asignal separation circuit 130, and asignal processing subsystem 190. Theoversampling circuit 110 is configured to convert one or more input analog signals into oversampled output signals. Theoversampling circuit 110 may be a conventional circuit samples the input signal and/or the calibration signal at a sampling rate that is much higher than the Nyquist frequency. The switchedinput circuit 120 is configured to switch, for at least some of the A/D conversions, a separate calibration signal into theoversampling circuit 110, as a replacement for the input analog signal. In other words, for at least some of the oversampled conversions, the analog input signal is not switched to the converter by the switchedinput circuit 120, but rather another different signal, namely the calibration signal, is switched to the A/D converter through theoversampling circuit 110. - After the oversampling step, the two different types of conversions, mainly input and calibration, are then separated and synchronously manipulated, to reduced unwanted correlated inherent responses of the A/D converter.
- The
signal separation circuit 130 may be configured to perform common filtering of the oversampled output signal and the oversampled calibration signal. After the common filtering process, the circuit sends the filtered and oversampled signals onto different portions of thesignal processing subsystem 190. - The
signal processing subsystem 190 is configured to synchronously and independently process the oversampled output signal and the oversampled calibration signal, so as to substantially reduce unwanted correlated response when A/D conversion is performed on the oversampled signals. The synchronous manipulation of the converted data may include one or more of: filtration, compensation, restoration, interpolation, and scaling. Examples of unwanted correlated signals or responses that are inherent in A/D conversion of switched input A/D converters include one or more of the following: offset stability; gain stability; gain accuracy; offset drift; and gain drift. - The
signal processing subsystem 190 includes afirst processing circuit 150 and asecond processing circuit 160. Thefirst processing circuit 150 is configured to filter and process the oversampled input signal. Thesecond processing circuit 160 is configured to filter and process the oversampled calibration signal. The components of each of thefirst processing circuit 150 and thesecond processing circuit 160 may include, but are not limited to, one or more of the following: a filtration circuit; a compensation circuit; a restoration circuit; and interpolation circuit; and a scaling circuit. These circuits may perform these conventional processing steps on the oversampled analog signal and the oversampled calibration signal. - The
system 100 includes aconverter 180, which converts the separately processed input signal and calibration signal, to generate corrected digital data. -
FIG. 2 is a schematic flow chart of a method of correcting for unwanted correlated signals in switched input A/D converters, in accordance with one embodiment of the present disclosure. Instep 210, one or more input signals are send to the oversampling circuit, and the input signal is oversampled. For some of these oversampled conversions, the input signal is not switched to the converter. Instead, as shown instep 210, another calibration signal is switched to the AD converter, and the calibration signal is oversampled. - The two different types of conversions, mainly input and calibration, are then separated and synchronously manipulated to reduce the unwanted correlated inherent responses of the AD converter mentioned above. The synchronous manipulation of the converted data includes signal processing steps such as filtration, compensation, restoration, interpolation and scaling. In
step 240, the oversampled input signal is processed by synchronous manipulation. Instep 250, the oversampled calibration signal is separately processed by such signal processing steps. - Finally in
step 260, the processed input signal and the processed calibration signal are converted, to generate corrected digital data. - The methods and systems described in the present disclosure substantially reduce unwanted correlated signals inherent in the converter, while guaranteeing a fixed output code for the no signal input condition. In this way, the need for offset correction is substantially eliminated, in systems that need to know the offset level of the A/D converter. Also, this approach guarantees a fixed output code for the full signal input condition, thus eliminating the need for full scale correction in systems that need to know the full scale level of the converter.
- In sum, methods and systems have been described that correct for unwanted correlated signals that are inherent in the A/D conversions of switched input AD converters. One advantage of the approach described in the present disclosure is that a better overall response is obtained. Another advantage is that less silicon is required for the A/D converter, so that higher channel densities can be obtained for A/D chips. scale correction in systems that need to know the full scale level of the converter.
- While certain embodiments have been described of methods and systems for correction of unwanted signals in switched input A/D converters, it is to be understood that the concepts implicit in these embodiments may be used in other embodiments as well. The protection of this application is limited solely to the claims that now follow.
- In these claims, reference to an element in the singular is not intended to mean “one and only one” unless specifically so stated, but rather “one or more.” All structural and functional equivalents to the elements of the various embodiments described throughout this disclosure that are known or later come to be known to those of ordinary skill in the art are expressly incorporated herein by reference, and are intended to be encompassed by the claims. Moreover, nothing disclosed herein is intended to be dedicated to the public, regardless of whether such disclosure is explicitly recited in the claims. No claim element is to be construed under the provisions of 35 U.S.C. §112, sixth paragraph, unless the element is expressly recited using the phrase “means for” or, in the case of a method claim, the element is recited in the phrase “step for.”
Claims (14)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/903,259 US7573408B2 (en) | 2006-09-21 | 2007-09-21 | Method and system for correcting switched input A/D converters |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US84638006P | 2006-09-21 | 2006-09-21 | |
US11/903,259 US7573408B2 (en) | 2006-09-21 | 2007-09-21 | Method and system for correcting switched input A/D converters |
Publications (3)
Publication Number | Publication Date |
---|---|
US20080150781A1 US20080150781A1 (en) | 2008-06-26 |
US20090051578A2 true US20090051578A2 (en) | 2009-02-26 |
US7573408B2 US7573408B2 (en) | 2009-08-11 |
Family
ID=39542020
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US11/903,259 Expired - Fee Related US7573408B2 (en) | 2006-09-21 | 2007-09-21 | Method and system for correcting switched input A/D converters |
Country Status (1)
Country | Link |
---|---|
US (1) | US7573408B2 (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5698984A (en) * | 1996-01-30 | 1997-12-16 | Fluke Corporation | Adaptive digital filter for improved measurement accuracy in an electronic instrument |
US5818370A (en) * | 1991-11-08 | 1998-10-06 | Crystal Semiconductor Corporation | Integrated CODEC with a self-calibrating ADC and DAC |
-
2007
- 2007-09-21 US US11/903,259 patent/US7573408B2/en not_active Expired - Fee Related
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5818370A (en) * | 1991-11-08 | 1998-10-06 | Crystal Semiconductor Corporation | Integrated CODEC with a self-calibrating ADC and DAC |
US5698984A (en) * | 1996-01-30 | 1997-12-16 | Fluke Corporation | Adaptive digital filter for improved measurement accuracy in an electronic instrument |
Also Published As
Publication number | Publication date |
---|---|
US7573408B2 (en) | 2009-08-11 |
US20080150781A1 (en) | 2008-06-26 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US7916061B2 (en) | Apparatus and method for sigma-delta analog to digital conversion | |
US6985098B2 (en) | Analog front end circuit and method of compensating for DC offset in the analog front end circuit | |
EP0408287A2 (en) | Correction of systematic error in an oversampled analog-to-digital converter | |
KR101477853B1 (en) | Differential amplifying apparatus | |
US8526066B2 (en) | Analog processing circuit, analog integrated circuit device, image reading device, and image forming apparatus | |
US7164378B2 (en) | Analog-to-digital converter with reduced average input current and reduced average reference current | |
US7126508B2 (en) | Analog-to-digital conversion system, correction circuit, and correction method | |
WO2002069626A1 (en) | Image signal processing device of image sensor | |
WO2010033232A4 (en) | Unified architecture for folding adc | |
EP1182781A3 (en) | Multistage converter employing digital dither | |
KR20150113404A (en) | Analog-digital converting apparatus and cmos image sensor thtreof | |
US20130069808A1 (en) | Analog frontend for ccd/cis sensor | |
US7746171B2 (en) | Amplifier networks with controlled common-mode level and converter systems for use therewith | |
US7573408B2 (en) | Method and system for correcting switched input A/D converters | |
US20060055575A1 (en) | Analog-to-digital conversion arrangement, a method for analog-to-digital conversion and a signal processing system, in which the conversion arrangement is applied | |
JP2007194899A (en) | Video signal clamp circuit | |
KR101798385B1 (en) | Analog digital converter circuit for magnet power supply | |
JPS6313520A (en) | Analog-digital conversion circuit | |
EP1248458A3 (en) | System and method for correcting erroneous image signals from defective photosensitive pixels during analog-to-digital conversion | |
CN117200790B (en) | Spurious suppression method, device and system for interleaved sampling system | |
US11671107B2 (en) | Analog-to-digital converter and method thereof | |
US20210408986A1 (en) | Novel programmable chopping architecture to reduce offset in an analog front end | |
SU1027814A2 (en) | Analog-digital converter | |
JP2005173848A (en) | Analog output device and diagnostic method thereof | |
US6362758B1 (en) | Combined input circuit for analog to digital conversion |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AS | Assignment |
Owner name: ANALOGIC CORPORATION, MASSACHUSETTS Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:YILDIZ, YESNA OYKU;ABRAHAM, DOUGLAS;REEL/FRAME:020914/0120 Effective date: 20071205 |
|
FPAY | Fee payment |
Year of fee payment: 4 |
|
REMI | Maintenance fee reminder mailed | ||
LAPS | Lapse for failure to pay maintenance fees |
Free format text: PATENT EXPIRED FOR FAILURE TO PAY MAINTENANCE FEES (ORIGINAL EVENT CODE: EXP.) |
|
STCH | Information on status: patent discontinuation |
Free format text: PATENT EXPIRED DUE TO NONPAYMENT OF MAINTENANCE FEES UNDER 37 CFR 1.362 |
|
FP | Lapsed due to failure to pay maintenance fee |
Effective date: 20170811 |
|
AS | Assignment |
Owner name: MIDCAP FINANCIAL TRUST, MARYLAND Free format text: SECURITY INTEREST;ASSIGNORS:ANALOGIC CORPORATION;SOUND TECHNOLOGY, INC.;REEL/FRAME:046414/0277 Effective date: 20180622 |
|
AS | Assignment |
Owner name: ANALOGIC CORPORATION, MASSACHUSETTS Free format text: RELEASE BY SECURED PARTY;ASSIGNOR:MIDCAP FINANCIAL TRUST;REEL/FRAME:064917/0544 Effective date: 20230914 |