US20080235939A1 - Manufacturing Method For Micro-SD Flash Memory Card - Google Patents

Manufacturing Method For Micro-SD Flash Memory Card Download PDF

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Publication number
US20080235939A1
US20080235939A1 US12/033,851 US3385108A US2008235939A1 US 20080235939 A1 US20080235939 A1 US 20080235939A1 US 3385108 A US3385108 A US 3385108A US 2008235939 A1 US2008235939 A1 US 2008235939A1
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United States
Prior art keywords
pcb
die
panel
microsd
molded
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US12/033,851
Inventor
Siew S. Hiew
Charles C. Lee
Paul Hsueh
Abraham C. Ma
Ming-Shiang Shen
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Super Talent Electronics Inc
Original Assignee
Super Talent Electronics Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US09/366,976 external-priority patent/US6547130B1/en
Priority claimed from US09/478,720 external-priority patent/US7257714B1/en
Priority claimed from US10/707,277 external-priority patent/US7103684B2/en
Priority claimed from US10/913,868 external-priority patent/US7264992B2/en
Priority claimed from US11/309,594 external-priority patent/US7383362B2/en
Priority claimed from US11/773,830 external-priority patent/US7872871B2/en
Priority claimed from US12/025,706 external-priority patent/US7886108B2/en
Priority to US12/033,851 priority Critical patent/US20080235939A1/en
Application filed by Super Talent Electronics Inc filed Critical Super Talent Electronics Inc
Priority to US12/043,398 priority patent/US7649743B2/en
Assigned to SUPER TALENT ELECTRONICS, INC. reassignment SUPER TALENT ELECTRONICS, INC. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: SHEN, MING-SHIANG, HIEW, SIEW S., HSUEH, PAUL, LEE, CHARLES C., MA, ABRAHAM C.
Publication of US20080235939A1 publication Critical patent/US20080235939A1/en
Abandoned legal-status Critical Current

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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/28Applying non-metallic protective coatings
    • H05K3/284Applying non-metallic protective coatings for encapsulating mounted components
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/561Batch processing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0011Working of insulating substrates or insulating layers
    • H05K3/0044Mechanical working of the substrate, e.g. drilling or punching
    • H05K3/0052Depaneling, i.e. dividing a panel into circuit boards; Working of the edges of circuit boards
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93Batch processes
    • H01L2224/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01029Copper [Cu]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • H01L2924/1815Shape
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/117Pads along the edge of rigid circuit boards, e.g. for pluggable connectors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09145Edge details
    • H05K2201/09154Bevelled, chamferred or tapered edge
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007Types of components
    • H05K2201/10159Memory
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/02Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
    • H05K2203/0228Cutting, sawing, milling or shearing
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/07Treatments involving liquids, e.g. plating, rinsing
    • H05K2203/0736Methods for applying liquids, e.g. spraying
    • H05K2203/0746Local treatment using a fluid jet, e.g. for removing or cleaning material; Providing mechanical pressure using a fluid jet
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/13Moulding and encapsulation; Deposition techniques; Protective layers
    • H05K2203/1305Moulding and encapsulation
    • H05K2203/1316Moulded encapsulation of mounted components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/0011Working of insulating substrates or insulating layers
    • H05K3/0017Etching of the substrate by chemical or physical means
    • H05K3/0026Etching of the substrate by chemical or physical means by laser ablation
    • H05K3/0032Etching of the substrate by chemical or physical means by laser ablation of organic insulating material
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49126Assembling bases
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49128Assembling formed circuit to base
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913Assembling to base an electrical component, e.g., capacitor, etc.
    • Y10T29/49146Assembling to base an electrical component, e.g., capacitor, etc. with encapsulating, e.g., potting, etc.
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49147Assembling terminal to base
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49169Assembling electrical component directly to terminal or elongated conductor
    • Y10T29/49171Assembling electrical component directly to terminal or elongated conductor with encapsulating
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49789Obtaining plural product pieces from unitary workpiece
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49789Obtaining plural product pieces from unitary workpiece
    • Y10T29/49798Dividing sequentially from leading end, e.g., by cutting or breaking

Definitions

  • This invention relates to portable electronic devices, and more particularly to portable memory card devices such as those that utilize the Secure-Digital (SD) and Micro Secure-Digital (MicroSD) specifications.
  • SD Secure-Digital
  • MicroSD Micro Secure-Digital
  • a card-type electronic apparatus containing a memory device e.g., an electrically erasable programmable read-only memory (EEPROM) or “flash” memory chip
  • a memory card e.g., an electrically erasable programmable read-only memory (EEPROM) or “flash” memory chip
  • Typical memory cards include a printed circuit board assembly (PCBA) mounted or molded inside a protective housing or casing.
  • the PCBA typically includes a printed circuit substrate (referred to herein simply as a “substrate”) formed using known printed circuit board fabrication techniques, with the memory device and additional components (e.g., control circuitry, resistors, capacitors, inductors, etc.) formed on an upper surface of the substrate (i.e., inside the casing), and one or more rows of contact pads exposed on a lower surface of the substrate.
  • the contact pads are typically aligned in a width direction of the casing, and serve to electrically connect and transmit electrical signals between the memory chip/control circuitry and a card-hosting device (e.g., a computer circuit board or a digital camera).
  • a card-hosting device e.g., a computer circuit board or a digital camera.
  • portable memory cards include multi media cards (MMC cards), personal computer memory card international association (PCMCIA) cards.
  • MMC cards multi media cards
  • PCMCIA personal computer memory card international association
  • An exemplary MMC card form factor is 24 mm wide, 32 mm long, and 1.4 mm or 1.5 mm thick, and is substantially rectangular except for a chamfer formed in one corner, which defines the front end of the card that is inserted into a card-hosting device.
  • the card's contact pads are exposed on its lower surface of each card near the front end.
  • each MMC card must meet the specified 24 mm width and 1.4/1.5 mm thickness specifications in order to be usable in devices that support this MMC card type.
  • the card can either fail to make the necessary contact pad-to-card-hosting device connections, or fail to fit within the corresponding slot of the associated card-hosting device.
  • MicroSD is a format for removable flash memory cards that is used mainly in mobile telephones, handheld GPS devices, portable audio players, video game consoles and expandable USB flash memory drives. It is currently (2007) the smallest memory card available commercially, and is about a quarter the size of an SD card, and is currently available with memory capacities ranging from 64 MB to 6 GB (with 8 GB devices announced).
  • Present MicroSD manufacturing methods chip-on-board (COB) processes on a solid printed circuit board (PCB) panel on which a 5 ⁇ 3 array of MicroSD PCBs are printed.
  • COB chip-on-board
  • PCB solid printed circuit board
  • Conventional MicroSD production methods are similar to MMC production methods.
  • FIGS. 29(A) and 29(B) depict a conventional method for manufacturing a conventional micro-SD memory card 50 that meets required size specifications in which a pre-molded cover or housing 54 is adhesively attached to PCBA substrate 52 over the semiconductor components (which are disposed on the lower side of substrate 52 , and hence not shown in FIG. 29(A) .
  • FIGS. 30(A) and 30(B) show an alternative conventional microSD device 60 in which a PCBA substrate 62 is mounted inside a pre-molded two sided package including a base 64 defining a large enough cavity to hold the rectangular PCBA substrate 62 , and a cover 66 that is attached by gluing or other means over PCBA substrate 62 .
  • the outlines of the micro-SD housings 54 and 64 are pre-molded to meet the size and shape specifications.
  • the housings/covers is necessarily relatively thick, and therefore takes up a significant amount of the specified memory card thickness.
  • the choice of memory device and other components mounted used in these memory cards is limited to devices that are relatively thin.
  • the PCBA substrates must be sized to fit within the housings, whose external dimensions are fixed by specification, the size of the PCBA substrates is necessarily smaller than the total device area, which limits the chip “real estate” area that can be otherwise used to hold electronic components (e.g., a larger, and hence less expensive, memory chip).
  • the conventional covers e.g., cover 66 , FIG.
  • the conventional housings typically have an undesirable seam around their edges, and the surface on the package side is not smooth due to the thin wall and the glue impression that is created from the cavity and the micro-SD flash memory block.
  • the present invention is directed to a method for producing memory card (e.g., SD or MicroSD) devices in which a thermal plastic material is used to form a continuous molded layer on a surface of a PCB panel (substrate), and then the PCB panel material and molded thermal plastic material are singulated (i.e., cut and/or ground) along a peripheral edge such that peripheral edges of both the remaining PCB material and the remaining molded material have the same dimensions as that set forth by the target memory card specifications.
  • a thermal plastic material is used to form a continuous molded layer on a surface of a PCB panel (substrate)
  • the PCB panel material and molded thermal plastic material are singulated (i.e., cut and/or ground) along a peripheral edge such that peripheral edges of both the remaining PCB material and the remaining molded material have the same dimensions as that set forth by the target memory card specifications.
  • both the remaining PCB material and the remaining molded casing have a width of 11 mm, a length of 15 mm
  • the PCB surface area is significantly increased over conventional methods, where the PCB must be narrower than the memory card specification in order to fit inside a pre-molded housing.
  • Memory cards produced by this method thus exhibit increased card capacity and functionality due to the increased available PCB surface area for mounting integrated circuits and other components.
  • the molded casing provides a physically rigid memory card by filling gaps and spaces that are otherwise not filled when separate covers are used.
  • the molded casing enables the use of a wide range of memory devices by allowing the casing material formed over the memory device to be made extremely thin, or omitted entirely.
  • a method for producing Micro-SD devices includes forming a PCB panel including multiple PCB regions arranged in rows and columns, attaching at least one passive component and at least one integrated circuit to each said PCB regions, molding a thermal plastic material in a single, continuous layer over the passive component and integrated circuit, and then singulating the PCB panel and molded material using one of a laser cutter, a water jet knife or mechanical grinding method to form the individual MicroSD devices. Note that both the molded material and the PCB material are cut during the same cutting process, whereby the remaining PCB substrate has the same width and length as the overmolded plastic housing, and the entire peripheral edge of the PCB substrate is exposed.
  • Each micro-SD PCB substrate includes standard (plug) metal contacts that are formed on a first (e.g., upper) surface thereof, and all IC components (e.g., MicroSD controller chip, flash memory chip, etc.) are mounted on the opposite (e.g., lower) surface of the PCB substrate that is covered with the molded housing.
  • the molding process is performed by placing the PCB panel into a special plastic molding die such that the upper surface is pressed against a flat bottom surface of the die to prevent plastic formation on the standard metal contacts, and the plastic layer is then molded over the IC components (i.e., over the lower surface of the PCB).
  • an optional grinding step is used to generate a chamfer at the front edge of each molded MicroSD device.
  • passive components are mounted onto the PCB panel using one or more standard surface mount technology (SMT) techniques, and one or more integrated circuit (IC) die (e.g., a MicroSD controller IC die and a flash memory die) are mounted using chip-on-board (COB) techniques.
  • SMT standard surface mount technology
  • IC integrated circuit
  • COB chip-on-board
  • the SMT-packaged passive components e.g., capacitors and oscillators
  • the IC dies are secured onto the PCB using know die-bonding techniques, and then electrically connected to corresponding contact pads using, e.g., known wire bonding techniques.
  • the housing is formed over the passive components and IC dies using plastic molding techniques.
  • SMT and COB manufacturing techniques to produce MicroSD devices
  • the present invention provides an advantage over conventional manufacturing methods that utilize SMT techniques only in that overall manufacturing costs are reduced by utilizing unpackaged controllers and flash devices (i.e., by eliminating the cost associated with SMT-package normally provided on the controllers and flash devices).
  • the molded housing provides greater moisture and water resistance and higher impact force resistance than that achieved using conventional manufacturing methods. Therefore, the combined COB and SMT method according to the present invention provides a less expensive and higher quality (i.e., more reliable) memory product than that possible using conventional SMT-only manufacturing methods.
  • the present invention is also directed to a MicroSD device generated in accordance with the novel method that includes a PCB having components mounted thereon using the combined COB and SMT method, and a molded plastic case that covers only the upper surface of the PCBA, such that the side edges and the bottom surface of the PCB substrate are exposed, with one edge having a chamfered surface.
  • FIG. 1 is a perspective top view showing an exemplary MicroSD device according to an embodiment of the present invention
  • FIG. 2 is a cross sectional side view showing the exemplary MicroSD of FIG. 1 ;
  • FIG. 3 is a flow diagram showing a method for producing the MicroSD device of FIG. 1 according to another embodiment of the present invention.
  • FIGS. 4(A) and 4(B) are bottom and top views showing a PCB panel utilized in the method of FIG. 3 ;
  • FIG. 5 is a perspective view depicting a surface mount technology (SMT) process for mounting passive components on a PCB according to the method of FIG. 3 ;
  • SMT surface mount technology
  • FIG. 6 is a top view showing the PCB panel of FIG. 4(B) after the SMT process is completed;
  • FIG. 7 is a simplified perspective view showing a semiconductor wafer including integrated circuits (ICs) utilized in the method of FIG. 3 ;
  • ICs integrated circuits
  • FIGS. 8(A) , 8 (B) and 8 (C) are simplified cross-sectional side views depicting a process of grinding and dicing the wafer of FIG. 7 to produce IC dies;
  • FIG. 9 is a perspective view depicting a die bonding process utilized to mount the IC dies of FIG. 8(C) on a PCB according to the method of FIG. 3 ;
  • FIG. 10 is a top view showing the PCB panel of FIG. 6 after the die bonding process is completed;
  • FIG. 11 is a perspective view depicting a PCB of the PCB panel of FIG. 10 after a wire bonding process is performed to connect the IC dies of FIG. 8(C) to corresponding contact pads disposed on a PCB according to the method of FIG. 3 ;
  • FIG. 12 is a top view showing the PCB panel of FIG. 10 after the wire bonding process is completed;
  • FIG. 13 is a perspective view showing a lower molding die utilized in a molding process for forming a molded housing over the PCB panel of FIG. 4(B) according to the method of FIG. 3 ;
  • FIG. 14 is a top plan view showing an upper molding die that is used in conjunction with the lower molding die of FIG. 13 in the molding process according to the method of FIG. 3 ;
  • FIGS. 15 is a top plan depicting a first step of mounting the PCB panel of FIG. 12 into the lower molding die of FIG. 13 according to the method of FIG. 3 ;
  • FIGS. 16(A) , 16 (B) and 16 (C) are simplified cross-sectional side views depicting subsequent steps of assembling the molding die and injecting molten plastic according to the method of FIG. 3 ;
  • FIG. 17 is a perspective bottom view showing the PCB panel of FIG. 12 after the plastic molding process of FIGS. 16(A) to 16(C) is completed;
  • FIG. 18 is a top plan view showing the panel of FIG. 17 during a direct singulation process according to an embodiment of the present invention; removed using one of the laser cutter of FIG. 19 or the water jet knife of FIG. 20 ;
  • FIG. 19 is a simplified side view depicting the direct singulation process of FIG. 18 using a laser cutter according to a specific embodiment of the present invention.
  • FIG. 20 is a simplified side view depicting the direct singulation process of FIG. 18 using a water jet knife according to a specific embodiment of the present invention
  • FIG. 21 is a simplified side view depicting the PCB panel of FIG. 17 during an indirect singulation process in which the panel is separated into individual blocks, each block including one MicroSD device, according to another embodiment of the present invention
  • FIG. 22 is simplified top view depicting the individual blocks after completion of the separation process of FIG. 21 ;
  • FIG. 23 is a simplified side view depicting a grinding process during which the side edges of each block of FIG. 22 is trimmed according to another embodiment of the present invention.
  • FIG. 24 is simplified top view depicting the individual MicroSD devices after completion of the grinding process of FIG. 23 ;
  • FIGS. 25(A) , 25 (B) and 25 (C) are simplified cross-sectional side views depicting a grinding process for providing a chamfer on the MicroSDs according to the method of FIG. 3 ;
  • FIG. 26 is simplified top view showing process of marking the MicroSD devices according to the method of FIG. 3 ;
  • FIG. 27 is simplified cross-sectional side view showing a PCB panel including multi-stacked ICs according to an alternative embodiment of the present invention.
  • FIG. 28(A) , 28 (B) and 28 (C) are simplified perspective view showing various memory devices produced using the production method of the present invention.
  • FIGS. 29(A) and 29(B) are exploded perspective and assembled perspective views showing a conventional method for producing MicroSD devices.
  • FIGS. 30(A) and 30(B) are exploded perspective and assembled perspective views showing another conventional method for producing MicroSD devices.
  • the present invention relates to an improvement in manufacturing methods for MicroSD (and “normal” SD) devices, and to the improved MicroSD devices made by these methods.
  • the following description is presented to enable one of ordinary skill in the art to make and use the invention as provided in the context of a particular application and its requirements.
  • the terms “upper”, “upwards”, “lower”, and “downward” are intended to provide relative positions for purposes of description, and are not intended to designate an absolute frame of reference.
  • Various modifications to the preferred embodiment will be apparent to those with skill in the art, and the general principles defined herein may be applied to other embodiments. Therefore, the present invention is not intended to be limited to the particular embodiments shown and described, but is to be accorded the widest scope consistent with the principles and novel features herein disclosed.
  • FIGS. 1 and 2 are perspective and cross-sectional side views showing a MicroSD device 100 according to a first embodiment of the present invention.
  • MicroSD device 100 generally includes a printed circuit board assembly (PCBA) 110 and a plastic housing 150 that is molded onto PCBA 110 .
  • PCBA printed circuit board assembly
  • PCBA 110 includes a printed circuit board (PCB) substrate 111 , and IC dies 130 and 135 and one or more passive components 142 that are mounted on PCB substrate 111 .
  • PCB substrate 111 is a substantially flat substrate, and has opposing sides that are referred to below as upper (first) surface 112 and lower (second) surface 114 .
  • the four side edges of substrate 111 are referenced as 111 P- 1 to 111 P- 4 , and extend between upper surface 112 and lower surface 114 .
  • Formed on upper surface 112 are eight standardized (plug) metal contacts 120 that are shaped and arranged in a pattern established by the MicroSD specification.
  • PCB substrate 111 is formed in accordance with known PCB manufacturing techniques such that metal contacts 120 , IC dies 130 and 135 , and passive components 142 are electrically interconnected by a predefined network including conductive traces 131 and 136 and other conducting structures that are sandwiched between multiple layers of an insulating material (e.g., FR 4 or BT) and adhesive.
  • an insulating material e.g., FR 4 or BT
  • passive components are mounted onto lower surface 114 using one or more standard surface mount technology (SMT) techniques, and one or more integrated circuit (IC) die (e.g., control IC die 130 and flash memory die 135 ) are mounted using chip-on-board (COB) techniques.
  • SMT standard surface mount technology
  • IC integrated circuit
  • COB chip-on-board
  • the passive components such as capacitor 142
  • contact pads described below
  • solder reflow techniques solder reflow techniques.
  • each of the passive components is packaged in any of the multiple known (preferably lead-free) SMT packages (e.g., ball grid array (BGA) or thin small outline package (TSOP)).
  • BGA ball grid array
  • TSOP thin small outline package
  • IC dies 130 and 135 are unpackaged, semiconductor “chips” that are mounted onto surface 114 and electrically connected to corresponding contact pads using known COB techniques.
  • control IC die 130 is electrically connected to PCB substrate 111 by way of wire bonds 160 - 1 that are formed using known techniques.
  • flash memory IC die 135 is electrically connected to PCB substrate 111 by way of wire bonds 160 - 2 .
  • Passive components 142 , IC dies 130 and 135 and metal contacts 120 are operably interconnected by way of metal traces 131 and 136 that are formed on and in PCB substrate 111 using known techniques, a few of which being depicted in FIG. 1 in a simplified manner by short dashed lines.
  • Housing 150 comprises molded plastic arranged such that substantially all of the plastic used to form housing 150 is located level with or below (i.e., on one side of) lower surface 114 of PCB substrate 111 .
  • Housing 150 includes a peripheral surface extending perpendicular to PCB substrate 111 , and a lower surface 152 that extends parallel to PCB substrate 111 and coplanar with a side edge of PCB substrate 111 .
  • the portion of the peripheral surface disposed at the front end of MicroSD device 100 is referred to as front wall section 151 P- 1
  • the portion of peripheral surface located at the rear end of device 100 is rear wall section 151 P- 3
  • the opposing side portions of the peripheral surface are side wall sections 151 P- 2 and 151 P- 4 .
  • housing 150 includes a chamfer section 154 extending upward from front wall section 151 - 1 , and a raised, step-like “finger-nail catch” structure 156 extending downward from lower surface 152 adjacent to rear wall section 151 P- 3 .
  • a host system e.g., a multi-media mobile phone.
  • MicroSD device 100 is subjected to a singulation (i.e., cutting and/or grinding) process performed such that peripheral edges of both PCB substrate 111 and molded housing 150 have the same height, width and length dimensions as those set forth by MicroSD memory card specifications. That is, adjacent to metal contacts 120 , both PCB substrate 111 and molded housing 150 have a width W of 11 mm, which is measured between peripheral side edges 111 P- 2 and 111 P- 4 , and between side walls 151 P- 2 and 151 P- 4 . That is, peripheral side edge 111 P- 2 is substantially coplanar with side wall 151 P- 2 , and side edge 111 P- 4 is substantially coplanar with side wall 151 P- 4 .
  • a singulation i.e., cutting and/or grinding
  • both PCB substrate 111 and molded housing 150 have a length L of 15 mm, which is measured between peripheral front/rear edges 111 P- 1 and 111 P- 3 , and between end walls 151 P- 1 and 151 P- 4 .
  • the final length of substrate 111 may be slightly shorter than the predefined specified MicroSD length.
  • the combined thickness T of PCB substrate 111 and molded housing 150 adjacent contacts 120 is 0.7 mm, per MicroSD specifications.
  • MicroSD device 100 By producing MicroSD device 100 in this manner, the surface area of PCB substrate 111 is significantly increased over conventional methods, where the PCB must be narrower than the memory card specification in order to fit inside a pre-molded housing. MicroSD device 100 thus facilitates increased card capacity and functionality due to the increased area of PCB substrate 111 for mounting integrated circuits and other components.
  • molded housing (casing) 150 provides a physically rigid memory card structure by filling gaps and spaces that are otherwise not filled when separate covers are used.
  • molded housing 150 enables the use of a wide range of memory devices (ICs) by allowing the molded material formed over memory device 135 to be made extremely thin, or omitted entirely.
  • FIG. 3 is a flow diagram showing a method for producing MicroSD device 100 according to another embodiment of the present invention.
  • a PCB panel is generated using known techniques (block 210 ), passive components are produced/procured (block 212 ), and integrated circuit (IC) wafers are fabricated or procured block 214 ).
  • the passive components are mounted on the PCB panel using SMT techniques (block 220 ), and the IC dies are subject to a grind-back process (block 242 ) and dicing process (block 244 ) before being die bonded (block 246 ) and wire bonded (block 248 ) onto the PCB panel using known COB techniques.
  • Molten plastic is then used to form a molded thermal plastic layer over the passive components and the IC dies (block 250 ). Then PCB panel is then singulated (cut) in to separate MicroSD devices (block 260 ), and the individual MicroSD devices are subjected to a chamfer process (block 265 ). The MicroSD devices are then marked (block 270 ), and then the MicroSD devices are tested, packed and shipped (block 280 ) according to customary practices.
  • This method provides several advantages over conventional manufacturing methods that utilize SMT techniques only. First, by utilizing COB techniques to mount the MicroSD controller and flash memory, the large amount of space typically taken up by these devices is dramatically reduced, thereby facilitating significant miniaturization of the resulting MicroSD device footprint.
  • the die height is greatly reduced, thereby facilitating a stacked memory arrangement that a significant memory capacity increase over packaged flash memory arrangements.
  • the molded housing also provides greater moisture and water resistance and higher impact force resistance than that achieved using conventional manufacturing methods.
  • FIG. 3 The flow diagram of FIG. 3 will now be described in additional detail below with reference to FIGS. 4(A) to 20 .
  • the manufacturing method begins with filling a bill of materials including producing/procuring PCB panels (block 210 ), producing/procuring passive (discrete) components (block 212 ) such as resistors, capacitors, diodes, and oscillators that are packaged for SMT processing, and producing/procuring a supply of IC wafers (or individual IC dies, block 214 ).
  • producing/procuring PCB panels block 210
  • producing/procuring passive (discrete) components such as resistors, capacitors, diodes, and oscillators that are packaged for SMT processing
  • producing/procuring a supply of IC wafers or individual IC dies, block 214 .
  • FIGS. 4(A) and 4(B) are simplified top and bottom views, respectively, showing a PCB panel 300 (t 0 ) provided in block 210 of FIG. 3 according to a specific embodiment of the present invention.
  • the suffix “tx” is utilized herein to designated the state of the PCB panel during the manufacturing process, with “t 0 ” designating an initial state. Sequentially higher numbered prefixes (e.g., “t 1 ”, “t 2 ” and “t 3 ”) indicate that PCB panel 300 has undergone additional sequential production processes.
  • PCB panel 300 (t 0 ) includes a five-by-three matrix of PCB regions 311 that are surrounded by opposing end border structures 310 and side border structures 312 , which are integrally connected to form a square or rectangular frame of blank material around PCB regions 311 .
  • Each PCB region 311 (which is indicated by dashed lines for convenience and corresponds to substrate 111 ; see FIG. 1 ) has the features described above with reference to FIGS. 1 and 2 , and the additional features described below.
  • FIG. 4(A) shows lower surface 114 of each PCB region 311
  • FIG. 4(B) shows upper surface 112 of each PCB region 311 , which includes standard metal contacts 120 .
  • each PCB region 311 includes multiple contact pads 119 arranged in predetermined patterns for facilitating SMT and COB processes, as described below.
  • each PCB region 311 in each row is connected to either an end border structure 310 , a side region 312 or to an adjacent PCB region 311 by way of an intervening portion 315 of panel 300 .
  • PCB region 311 - 11 is connected to the left end region 310 , the upper side region 312 , and by intervening portion 315 - 11 to PCB region 311 - 12 .
  • cut lines 317 and 318 are scored or otherwise partially cut into one of side border structure 312 and/or central region of PCB panel 300 that are aligned with the front and rear edges of PCB regions 311 aligned in each row and column, respectively.
  • cut lines 317 and 318 may be omitted, or comprise surface markings that do not weaken the panel material.
  • border structures 310 and 312 are provided with positioning holes 319 to facilitate alignment between PCB panel 300 and the plastic molding die during molded housing formation, as described below.
  • FIG. 5 is a perspective view depicting a PCB region 311 - 11 of panel 300 (t 0 ) during a SMT process that is used to mount passive components on PCB region 311 - 11 according to block 220 of FIG. 3 .
  • PCB region 311 - 11 (which corresponds to PCB substrate 111 of FIG. 1 ) is shown separate from panel 300 (t 0 ) for illustrative purposes, and is actually integrally formed with the remainder of panel 300 (t 0 ) during the process steps described below preceding singulation.
  • solder paste (not shown) is printed on contact pads 119 - 1 , 119 - 2 and 119 - 3 , which in the present example corresponds to SMT components 142 , 144 and 146 , using custom made stencil that is tailored to the design and layout of PCB region 311 - 11 .
  • the panel is conveyed to a conventional pick-and-place machine that mounts SMT components 142 , 144 and 146 onto contact pads 119 - 1 , 119 - 2 and 119 - 3 , respectively, according to known techniques.
  • PCB panel 300 (t 0 ) is then passed through an IR-reflow oven set at the correct temperature profile. The solder of each pad on the PC board is fully melted during the peak temperature zone of the oven, and this melted solder connects all pins of the passive components to the finger pads of the PC board.
  • FIG. 6 shows the resulting sub-assembled PCB panel 300 (t 1 ), in which each PCB region 311 (e.g., PCB region 311 - 11 ) includes passive components 142 , 144 and 146 mounted thereon by the completed SMT process.
  • FIG. 7 is a simplified perspective view showing a semiconductor wafer 400 (t 0 ) procured or fabricated according to block 214 of FIG. 3 .
  • Wafer 400 (t 0 ) includes multiple ICs 430 that are formed in accordance with known photolithographic fabrication (e.g., CMOS) techniques on a semiconductor base 401 .
  • the corner partial dies 402 are inked out during die probe wafer testing, as are complete dies that fail electrical function or DC/AC parametric tests.
  • wafer 400 (t 1 ) includes ICs 430 that comprise MicroSD controller circuits.
  • a wafer (not shown) similar to wafer 400 (t 1 ) is produced/procured that includes flash memory circuits, and in an alterative embodiment, ICs 430 may include both MicroSD controller circuits and flash memory circuits. In each instance, these wafers are processed as described herein with reference to FIGS. 8(A) , 8 (B) and 8 (C).
  • base 401 is subjected to a grinding process in order to reduce the overall initial thickness TW1 of each IC 430 .
  • Wafer 400 (t 1 ) is first mount face down on sticky tape (i.e., such that base layer 401 (t 0 ) faces away from the tape), which is pre-taped on a metal or plastic ring frame (not shown).
  • the ring-frame/wafer assembly is then loaded onto a vacuum chuck (not shown) having a very level, flat surface, and has diameter larger than that of wafer 400 (t 0 ).
  • the base layer is then subjected to grinding until, as indicated in FIG.
  • wafer 400 (t 1 ) has a pre-programmed thickness TW2 that is less than initial thickness TW1 (shown in FIG. 8(A) ).
  • the wafer is cleaned using de-ionized (DI) water during the process, and wafer 400 (t 1 ) is subjected to a flush clean with more DI water at the end of mechanical grinding process, followed by spinning at high speed to air dry wafer 400 (t 1 ).
  • DI de-ionized
  • the wafer is diced (cut apart) along predefined border structures separating ICs 420 in order to produce IC dies 130 according to block 244 of FIG. 3 .
  • the sticky tape at the front side of wafer 400 (t 1 ) is removed, and wafer 400 (t 1 ) is mounted onto another ring frame having sticky tape provided thereon, this time with the backside of the newly grinded wafer contacting the tape.
  • the ring framed wafers are then loaded into a die saw machine.
  • the die saw machine is pre-programmed with the correct die size information, X-axis and Y-axis scribe lanes, width, wafer thickness and intended over cut depth.
  • a proper saw blade width is then selected based on the widths of the XY scribe lanes.
  • the cutting process begins dicing the first lane of the X-axis of the wafer. De-ionized wafer is flushing at the proper angle and pressure around the blade and wafer contact point to wash and sweep away the silicon saw dust while the saw is spinning and moving along the scribe lane. The sawing process will index to the second lane according to the die size and scribe width distance. After all the X-axis lanes have been completed sawing, the wafer chuck with rotate 90 degree to align the Y-axis scribe lanes to be cut. The cutting motion repeated until all the scribe lanes on the Y-axis have been completed.
  • FIG. 9 is a perspective view depicting a die bonding process utilized to mount the controller IC dies 130 of FIG. 8(C) and flash memory IC dies 135 on PCB region 311 - 11 of the PCB panel according to block 246 of FIG. 3 .
  • the die bonding process is performed on PCB panel 300 (t 1 ) (see FIG. 6 ), that is, after completion of the SMT process.
  • the die bonding process generally involves mounting controller IC dies 130 into lower surface region 114 A, which is bordered by contact pads 119 - 5 , and mounting flash IC dies 135 into lower surface region 114 B, which is disposed between rows of contact pads 119 - 6 .
  • an operator loads IC dies 130 and 135 onto a die bonder machine according to known techniques.
  • the operator also loads multiple PCB panels 300 (t 1 ) onto the magazine rack of the die bonder machine.
  • the die bonder machine picks the first PCB panel 300 (t 1 ) from the bottom stack of the magazine and transports the selected PCB panel from the conveyor track to the die bond (DB) epoxy dispensing target area.
  • the magazine lowers a notch automatically to get ready for the machine to pick up the second piece (the new bottom piece) in the next cycle of die bond operation.
  • the machine automatically dispenses DB epoxy, using pre-programmed write pattern and speed with the correct nozzle size, onto the target areas 114 A and 114 B of each of the PCB region 311 of PCB panel 300 (t 1 ).
  • the PCB panel is conveyed to a die bond (DB) target area.
  • the magazine is loading a second PCB panel to this vacant DB epoxy dispensing target area.
  • the pick up arm mechanism and collet picks up an IC die 130 and bonds it onto area 114 A, where epoxy has already dispensed for the bonding purpose, and this process is then performed to place IC die 135 into region 114 B.
  • the PCB panel is then conveyed to a snap cure region, where the PCB panel passes through a chamber having a heating element that radiates heat having a temperature that is suitable to thermally cure the epoxy.
  • FIG. 10 is a top view showing PCB panel 300 (t 2 ) after the die bonding process is completed and controller IC 130 and memory IC 135 are mounted onto each PCB (e.g., PCB region 311 - 11 ).
  • FIG. 11 is a perspective view depicting a wire bonding process utilized to connect the IC dies 130 and 135 to corresponding contact pads 119 - 5 and 119 - 6 of PCB region 311 - 11 , respectively, according to block 248 of FIG. 3 .
  • the wire bonding process proceeds as follows. Once a full magazine of PCB panels 300 (t 2 ) (see FIG. 10 ) has completed the die bonding operation, an operator transports the PCB panels 300 (t 2 ) to a nearby wire bonder (WB) machine, and loads the PCB panels 300 (t 2 ) onto the magazine input rack of the WB machine. The WB machine is pre-prepared with the correct program to process this specific MicroSD device.
  • the coordinates of all the ICs' pads 119 - 5 and 119 - 6 and PCB gold fingers were previously determined and programmed on the WB machine.
  • the operator commands the WB machine to use optical vision to recognize the location of the first wire bond pad 131 of the first controller die 130 of PCB region 311 - 11 on the panel.
  • a corresponding wire 160 - 1 is then formed between wire bond pad 131 and a corresponding contact pad 119 - 5 formed on PCB region 311 - 11 .
  • the WB machine can carry out the whole wire bonding process for the rest of controller die 130 , and then proceed to forming wire bonds 160 - 2 between corresponding wire bond pads (not shown) on memory die 135 and contact pads 119 - 6 to complete the wire bonding of memory die 135 .
  • the wire bonding process is repeated for each PCB region 311 of the panel.
  • the PCB panels may be returned to the WB machine to repeat wire bonding process for the second stack.
  • FIG. 12 is a top view showing PCB panel 300 (t 3 ) after the wire bonding process is completed.
  • FIG. 13 is a perspective top view showing a lower die 410 of a simplified top and enlarged partial top views depicting a lower (first) molding die including a shallow cavity 411 surrounded by a peripheral surface 412 that is shaped to receive PCB panel 300 (t 3 ) (see FIG. 12 ) in the manner described below.
  • lower die 410 includes three raised alignment poles 419 that are positioned to receive alignment holes 319 of PCB panel 300 (see FIG. 4(A) ). Alignment poles 419 have a height that is not greater than the thickness of PCB panel 300 .
  • FIG. 14 is a top view showing an upper molding die 420 that is used in conjunction with lower molding die 410 ( FIG. 13 ).
  • Upper molding die 420 includes a central depending region 421 surrounded by a peripheral raised surface 422 that are mounted over and pressed against cavity 411 and peripheral surface 412 of lower molding die 410 during the molding process.
  • Region 421 of upper molding die 420 defines a molding chamber region into which molten plastic is injected to form a molded layer over the surface of an inserted PCB panel.
  • Recessed regions 426 are provided upper molding die 420 that facilitate the formation of finger-nail catches 156 (see FIG. 1 ).
  • a run gate (channel) 429 is provided for each row of PCB regions that facilitates the injection of molten plastic into the region 421 .
  • FIG. 15 is a top plan view depicting mounting PCB panel 300 (t 3 ) into lower molding die 410 .
  • Each alignment pole 419 is received inside a corresponding alignment hole 319 of panel 300 (t 3 ), as shown in the top left corner of FIG. 15 .
  • FIGS. 16(A) , 16 (B) and 16 (C) are simplified cross-sectional side views depicting a molding process using molding dies 410 and 420 .
  • upper molding die 420 is positioned over and lowered onto lower molding die 410 until peripheral raised surface 422 presses against corresponding peripheral end/side portions 310 / 312 of PCB panel 300 (t 3 ) surrounding PCB regions 311 , thereby forming a substantially enclosed chamber 425 over all fifteen PCB regions 311 , as indicated in FIG. 16(B) .
  • a single run gate (channel) set 429 is provided for each row of PCB regions 311 that facilitates the injection of molten plastic into chamber 425 , as indicated in FIG. 16(C) , whereby single-piece molded layer 450 is formed on a central portion of lower surface 114 over all fifteen PCB regions 311 . From this point forward, the PCB panel is referred to as 300 (t 4 ).
  • FIG. 16(C) depicts the molding process. Transfer molding is prefer here due to the high accuracy of transfer molding tooling and low cycle time.
  • the molding material in the form of pellet is preheated and loaded into a pot or chamber (not shown).
  • a plunger (not shown) is then used to force the material from the pot through channel sets 429 (also known as a spruce and runner system) into the mold cavity 425 , causing the molten (e.g., plastic) material to form molded layer 450 that encapsulates all the IC chips and components, and to cover all the exposed areas of lower surface 114 .
  • PCB 300 (t 4 ) is pressed against lower mold 420 by peripheral raised surface 422 , no molding material is able to form on upper surface 112 .
  • the mold remains closed as the material is inserted and filled up all vacant areas of the mold die.
  • the walls of upper die 420 are heated to a temperature above the melting point of the mold material, which facilitates a faster flow of material.
  • the mold assembly remains closed until a curing reaction within the molding material is complete.
  • a cooling down cycle follows the injection process, and the molding materials start to solidify and harden. Ejector pins push PCB panel 300 (t 4 ) (shown in FIG. 16(C) and 17 ) from the mold machine once the molding material has hardened sufficiently.
  • FIG. 17 is a perspective bottom view showing PCB panel 300 (t 4 ) after the plastic molding process of FIGS. 16(A) to 16(C) is completed.
  • Panel 300 (t 4 ) includes molded layer 450 formed on lower surface 114 that covers all fifteen PCB regions 311 (which are generally indicated by dashed lines). Molded layer 450 has a substantially flat upper surface 458 , and fifteen raised, step-like “finger-nail catch” structures 156 disposed over PCB regions 311 .
  • a subsequent processing step involves singulating (separating) the over-molded PCB panel to form individual MicroSD devices by cutting said PCB panel and said molded layer using one of a laser cut, a water jet cut or a saw/mechanical grind process, thereby separating said PCB panel into a plurality of individual MicroSD devices.
  • singulation methods is described below with reference to FIGS. 18-23 . Those skilled in the art will recognize that other singulation methods may also be utilized without departing from the spirit and scope of the present invention.
  • FIG. 18 is a simplified top plan view depicting a direct singulation process in which MicroSD device 100 - 11 is removed from PCB panel 300 (t 4 ) is one cutting pass using a cutting tool 500 . That is, cutting tool 500 generates a beam or jet 505 that is directed along a peripheral edge of region 311 - 11 that passes through both PCB panel 300 (t 4 ) and the molding layer (which is disposed below panel 450 in FIG. 18 ), thereby separating PCB substrate 111 - 11 and a corresponding molded housing (not shown, but located on the opposite side of substrate 111 - 11 ) from region 311 - 11 (whereby region 311 - 11 becomes an open hole).
  • cutting tool 500 is implemented using a laser cutting tool and a water jet cutting tool, whereby MicroSD device 100 - 11 is detached and can be removed. After the fifteen MicroSD devices are removed, the remaining skeleton portion of PCB panel 300 (t 4 ) is recycled.
  • FIG. 19 is a simplified side view depicting PCB panel 300 (t 4 ) during singulation into individual MicroSD devices using a full laser cutting system 500 A according to a specific embodiment of the present invention.
  • a laser beam 505 A generated, for example, by a laser diode (not shown) disposed inside laser cutter 500 A, is directed onto upper surface 112 along the peripheral outline of each MicroSD device.
  • Laser beam 505 A passes entirely through both PCB panel 300 (t 4 ) and molded layer 450 , whereby each microSD device (e.g., device 100 - 11 ) becomes detached from PCB panel 300 (t 4 ) by way of a continuous channel 510 - 11 , and is separated as shown in FIG. 18 .
  • each microSD device (e.g., device 100 - 11 ) includes both a PCB substrate (e.g., substrate 111 - 11 ) and a molded housing (e.g., housing 150 - 11 ) that are disposed in the targeted region (e.g., region 311 - 11 ).
  • Laser cutters 500 A provide excellent cutting quality with cutting angle capability of less than 1 degree. Automatic cutting position alignment is achieved using a conventional vision system and associated control circuit (not shown). Once the starting position and the outline shape and dimensions are set, the laser system will cut out each micro-SD according to the pre-feed in dimensions specification. Laser cutting system 500 A can optimize the utilization of substrates of a panel by minimizing the wasted space between adjacent devices.
  • a suitable laser cutting system 500 A is produced by BE Semiconductor Industries N.V. (the Netherlands) under the model name Fico Bright Line.
  • FIG. 20 is a simplified side view depicting PCB panel 300 (t 4 ) during singulation into individual MicroSD devices using an abrasive water jet (AWJ) cutting system 500 B according to another specific embodiment of the present invention.
  • a head 501 includes separate channels for feeding water 502 and abrasive powder 503 into a mixing chamber 504 at a predetermined pressure that forces the mixture from head 501 in the form of a jet 505 B.
  • jet 505 B is directed onto upper surface 112 along the peripheral outline of each MicroSD device, and has sufficient force to pass entirely through both PCB panel 300 (t 4 ) and molded layer 450 , whereby each microSD device (e.g., device 100 - 11 ) becomes detached from PCB panel 300 (t 4 ) by way of a continuous channel 520 - 11 , and is separated as shown in FIG. 18 .
  • the abrasive/water mixture is then collected and recycled.
  • a suitable AWJ cutting system 500 B is produced by TOPS Co. Ltd. (Korea) under the model no/name SJA-0505.
  • FIGS. 21 to 24 depict yet another singulation process according to block 260 of FIG. 3 that is used to separate PCB panel 300 (t 4 ) into individual MicroSD devices.
  • PCB panel 300 (t 4 ) is loaded into a saw machine (not shown) that is pre-programmed with a singulation routine that includes predetermined cut locations defined by designated cut lines 317 .
  • a saw blade 530 is aligned to the first cut line (e.g., end cut line 317 - 1 ) as a starting point by the operator. The coordinates of the first position are stored in the memory of the saw machine.
  • FIG. 22 is a top view showing blocks 600 cut from panel 300 (t 4 ) using the sawing process of FIG. 21 , each block 600 including an individual MicroSD device (as indicated by the dashed outline). As indicated in FIG.
  • FIG. 24 is simplified top view depicting the individual MicroSD devices 100 after completion of the grinding process of FIG. 23 .
  • FIGS. 25(A) to 25(C) are simplified side views showing a chamfer process according to block 265 of FIG. 3 , which is performed as a final processing step to individual MicroSD devices 101 A that have been singulated from their PCB panel according to any of the above-mentioned singulation processes.
  • FIG. 25(A) shows a device 101 A positioned over a fixture 560 having a lower wall 561 and a front wall 562 that define a front corner opening 563 .
  • FIG. 25(B) when device 100 A is mounted onto fixture 560 , a front corner portion P of device 100 A extends through opening 563 .
  • a grinding wheel or belt 570 is then used to remove the front corner portion, thereby forming the desired chamfer surface 154 on MicroSD device 100 , which is shown in FIG. 25(C) .
  • FIG. 26 is a perspective bottom view showing a MicroSD device 100 after singulation and chamfering, and further showing a marking process in accordance with block 270 of the method of FIG. 3 .
  • the singulated and completed MicroSD devices 100 undergo a marking process in which a designated company's name/logo, speed value, density value, or other related information are printed on surface 152 of housing 150 .
  • After marking, MicroSD devices 100 are placed in the baking oven to cure the permanent ink.
  • a final procedure in the manufacturing method of the present invention involves testing, packing and shipping the individual MicroSD devices.
  • the marked MicroSD devices 100 shown in FIG. 26 are then subjected to visual inspection and electrical tests consistent with well established techniques. Visually or/and electrically test rejects are removed from the good population as defective rejects.
  • the good memory cards are then packed into custom made boxes which are specified by customers. The final packed products will ship out to customers following correct procedures with necessary documents.
  • FIG. 27 is a simplified side view showing a PCB substrate 300 B including multiple MicroSD devices 100 B according to an alternative embodiment of the present invention.
  • the present invention provides a further benefit of facilitating greatly expanded memory capacity without increasing the overall size of each MicroSD device 100 B, e.g., by facilitating a stacked-memory MicroSD device in which a first flash memory chip 135 B- 1 is mounted on the PCB and connected by first wire bonds, and a second flash memory chip 135 B- 2 is mounted on the first memory chip and connected by a second set of wire bonds to the PCB.
  • the present invention facilitates such a stacked memory arrangement that greatly increases memory capacity without increasing the footprint of MicroSD device 100 B.
  • FIGS. 28(A) to 28(C) show Secure Digital devices 100 C, 100 D and 100 E, which represent alternative memory card devices that may be produced in accordance with the methods of the present invention, each card having associated PCB substrates and associated molded housings that define height, width and length measurements established by SD specifications.

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  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

A method for fabricating MicroSD devices includes forming a PCB panel having multiple PCB regions arranged in parallel rows. Passive components are attached by conventional surface mount technology (SMT) techniques. IC chips, including a MicroSD controller chip and a flash memory chip, are attached to the PCB by wire bonding or other chip-on-board (COB) technique. A molded layer is then formed over the IC chips and passive components using a mold that prevents formation of plastic on the upper surface of each PCB. The panel is then singulated using one of a laser cutting method, an abrasive water jet cutting method, and a mechanical grinding method such that the resulting PCB substrate and plastic housing have the width, height and length specified by MicroSD specifications. A front edge chamfer process is then performed.

Description

    RELATED APPLICATIONS
  • This application is a continuation-in-part (CIP) of U.S. Patent application for “Manufacturing Method For Memory Card”, U.S. application Ser. No. 10/888,282, filed Jul. 8, 2004.
  • This application is a also a CIP of U.S. Patent application for “MOLDING METHODS TO MANUFACTURE SINGLE-CHIP CHIP-ON-BOARD USB DEVICE”, U.S. application Ser. No. 11/773,830, filed Jul. 5, 2007, which is a CIP of “Single-Chip Multi-Media Card/Secure Digital (MMC/SD) Controller Reading Power-On Boot Code from Integrated Flash Memory for User Storage”, U.S. application Ser. No. 11/309,594, filed Aug. 28, 2006, which is a CIP of “Single-Chip USB Controller Reading Power-On Boot Code from Integrated Flash Memory for User Storage”, U.S. application Ser. No. 10/707,277, filed Dec. 2, 2003, now U.S. Pat. No. 7,103,684.
  • This application is also a CIP of U.S. Patent application for “Removable Flash Integrated Memory Module Card and Method of Manufacture” U.S. application Ser. No. 10/913,868, filed Aug. 6, 2004.
  • This application is also a CIP of U.S. Patent application for “Electronic Data Storage Medium with Fingerprint Verification Capability”, U.S. application Ser. No. 11/624,667, filed Jan. 18, 2007, which is a divisional of U.S. Patent application for “Electronic Data Storage Medium with Fingerprint Verification Capability”, U.S. application Ser. No. 09/478,720 filed Jan. 6, 2000, now U.S. Pat. No. 7,257,714, which has been petitioned claiming benefit of Continuation-In-Process status of one of inventor's earlier U.S. Patent application for “INTEGRATED CIRCUIT CARD WITH FINGERPRINT VERIFICATION CAPABILITY”, U.S. application Ser. No. 09/366,976, filed Aug. 4, 1999, now issued as U.S. Pat. No. 6,547,130.
  • This application is also a CIP of U.S. Patent application for “Methods and systems of managing memory addresses in a large capacity multi-level cell (MLC) based flash memory device”, U.S. application Ser. No. 12/025,706, filed Feb. 4, 2008.
  • FIELD OF THE INVENTION
  • This invention relates to portable electronic devices, and more particularly to portable memory card devices such as those that utilize the Secure-Digital (SD) and Micro Secure-Digital (MicroSD) specifications.
  • BACKGROUND OF THE INVENTION
  • A card-type electronic apparatus containing a memory device (e.g., an electrically erasable programmable read-only memory (EEPROM) or “flash” memory chip) and other semiconductor components is referred to as a memory card. Typical memory cards include a printed circuit board assembly (PCBA) mounted or molded inside a protective housing or casing. The PCBA typically includes a printed circuit substrate (referred to herein simply as a “substrate”) formed using known printed circuit board fabrication techniques, with the memory device and additional components (e.g., control circuitry, resistors, capacitors, inductors, etc.) formed on an upper surface of the substrate (i.e., inside the casing), and one or more rows of contact pads exposed on a lower surface of the substrate. The contact pads are typically aligned in a width direction of the casing, and serve to electrically connect and transmit electrical signals between the memory chip/control circuitry and a card-hosting device (e.g., a computer circuit board or a digital camera). Examples of such portable memory cards include multi media cards (MMC cards), personal computer memory card international association (PCMCIA) cards. An exemplary MMC card form factor is 24 mm wide, 32 mm long, and 1.4 mm or 1.5 mm thick, and is substantially rectangular except for a chamfer formed in one corner, which defines the front end of the card that is inserted into a card-hosting device. The card's contact pads are exposed on its lower surface of each card near the front end. These and other similar card-like structures are collectively referred to herein as “memory module cards” or simply as “memory cards”.
  • An important aspect of most memory card structures is that they meet size specifications for a given memory card type. In particular, the size of the casing or housing, and more particularly the width and thickness (height) of the casing/housing, must be precisely formed so that the memory card can be received within a corresponding slot (or other docking structure) formed on an associated card-hosting device. For example, using the MMC card specifications mentioned above, each MMC card must meet the specified 24 mm width and 1.4/1.5 mm thickness specifications in order to be usable in devices that support this MMC card type. That is, if the width/thickness specifications of a memory card are too small or too large, then the card can either fail to make the necessary contact pad-to-card-hosting device connections, or fail to fit within the corresponding slot of the associated card-hosting device.
  • MicroSD is a format for removable flash memory cards that is used mainly in mobile telephones, handheld GPS devices, portable audio players, video game consoles and expandable USB flash memory drives. It is currently (2007) the smallest memory card available commercially, and is about a quarter the size of an SD card, and is currently available with memory capacities ranging from 64 MB to 6 GB (with 8 GB devices announced). Present MicroSD manufacturing methods chip-on-board (COB) processes on a solid printed circuit board (PCB) panel on which a 5×3 array of MicroSD PCBs are printed. Conventional MicroSD production methods are similar to MMC production methods.
  • FIGS. 29(A) and 29(B) depict a conventional method for manufacturing a conventional micro-SD memory card 50 that meets required size specifications in which a pre-molded cover or housing 54 is adhesively attached to PCBA substrate 52 over the semiconductor components (which are disposed on the lower side of substrate 52, and hence not shown in FIG. 29(A). FIGS. 30(A) and 30(B) show an alternative conventional microSD device 60 in which a PCBA substrate 62 is mounted inside a pre-molded two sided package including a base 64 defining a large enough cavity to hold the rectangular PCBA substrate 62, and a cover 66 that is attached by gluing or other means over PCBA substrate 62. The outlines of the micro-SD housings 54 and 64 are pre-molded to meet the size and shape specifications.
  • One shortcoming of the conventional manufacturing methods include that the housings/covers is necessarily relatively thick, and therefore takes up a significant amount of the specified memory card thickness. As a result, the choice of memory device and other components mounted used in these memory cards is limited to devices that are relatively thin. In addition, because the PCBA substrates must be sized to fit within the housings, whose external dimensions are fixed by specification, the size of the PCBA substrates is necessarily smaller than the total device area, which limits the chip “real estate” area that can be otherwise used to hold electronic components (e.g., a larger, and hence less expensive, memory chip). Further, because the conventional covers (e.g., cover 66, FIG. 30(A)) are fabricated separately and then attached to the substrate using an adhesive, the use of such separate covers increases production and assembly costs, and the covers can become detached from the substrate. Moreover, the conventional housings typically have an undesirable seam around their edges, and the surface on the package side is not smooth due to the thin wall and the glue impression that is created from the cavity and the micro-SD flash memory block.
  • What is needed is a method for producing memory cards that maximizes the usable PCB substrate area and avoids the problems mentioned above that are associated with conventional pre-molded housing techniques.
  • SUMMARY OF THE INVENTION
  • The present invention is directed to a method for producing memory card (e.g., SD or MicroSD) devices in which a thermal plastic material is used to form a continuous molded layer on a surface of a PCB panel (substrate), and then the PCB panel material and molded thermal plastic material are singulated (i.e., cut and/or ground) along a peripheral edge such that peripheral edges of both the remaining PCB material and the remaining molded material have the same dimensions as that set forth by the target memory card specifications. For example, when the method is used to produce MicroSD cards, both the remaining PCB material and the remaining molded casing have a width of 11 mm, a length of 15 mm, and PCB material and molded material have a combined height of 0.7 mm. By producing memory card devices in this manner, the PCB surface area is significantly increased over conventional methods, where the PCB must be narrower than the memory card specification in order to fit inside a pre-molded housing. Memory cards produced by this method thus exhibit increased card capacity and functionality due to the increased available PCB surface area for mounting integrated circuits and other components. In addition, the molded casing provides a physically rigid memory card by filling gaps and spaces that are otherwise not filled when separate covers are used. In addition, the molded casing enables the use of a wide range of memory devices by allowing the casing material formed over the memory device to be made extremely thin, or omitted entirely.
  • In accordance with an embodiment of the present invention, a method for producing Micro-SD devices includes forming a PCB panel including multiple PCB regions arranged in rows and columns, attaching at least one passive component and at least one integrated circuit to each said PCB regions, molding a thermal plastic material in a single, continuous layer over the passive component and integrated circuit, and then singulating the PCB panel and molded material using one of a laser cutter, a water jet knife or mechanical grinding method to form the individual MicroSD devices. Note that both the molded material and the PCB material are cut during the same cutting process, whereby the remaining PCB substrate has the same width and length as the overmolded plastic housing, and the entire peripheral edge of the PCB substrate is exposed. Each micro-SD PCB substrate includes standard (plug) metal contacts that are formed on a first (e.g., upper) surface thereof, and all IC components (e.g., MicroSD controller chip, flash memory chip, etc.) are mounted on the opposite (e.g., lower) surface of the PCB substrate that is covered with the molded housing. The molding process is performed by placing the PCB panel into a special plastic molding die such that the upper surface is pressed against a flat bottom surface of the die to prevent plastic formation on the standard metal contacts, and the plastic layer is then molded over the IC components (i.e., over the lower surface of the PCB). After the molding process and singulation processes, an optional grinding step is used to generate a chamfer at the front edge of each molded MicroSD device.
  • According to an aspect of the invention, passive components are mounted onto the PCB panel using one or more standard surface mount technology (SMT) techniques, and one or more integrated circuit (IC) die (e.g., a MicroSD controller IC die and a flash memory die) are mounted using chip-on-board (COB) techniques. During the SMT process, the SMT-packaged passive components (e.g., capacitors and oscillators) are mounted onto contact pads disposed on the PCB panel, and then known solder reflow techniques are utilized to connect leads of the passive components to the contact pads. During the subsequent COB process, the IC dies are secured onto the PCB using know die-bonding techniques, and then electrically connected to corresponding contact pads using, e.g., known wire bonding techniques. After the COB process is completed, the housing is formed over the passive components and IC dies using plastic molding techniques. By combining SMT and COB manufacturing techniques to produce MicroSD devices, the present invention provides an advantage over conventional manufacturing methods that utilize SMT techniques only in that overall manufacturing costs are reduced by utilizing unpackaged controllers and flash devices (i.e., by eliminating the cost associated with SMT-package normally provided on the controllers and flash devices). Moreover, the molded housing provides greater moisture and water resistance and higher impact force resistance than that achieved using conventional manufacturing methods. Therefore, the combined COB and SMT method according to the present invention provides a less expensive and higher quality (i.e., more reliable) memory product than that possible using conventional SMT-only manufacturing methods.
  • The present invention is also directed to a MicroSD device generated in accordance with the novel method that includes a PCB having components mounted thereon using the combined COB and SMT method, and a molded plastic case that covers only the upper surface of the PCBA, such that the side edges and the bottom surface of the PCB substrate are exposed, with one edge having a chamfered surface.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • These and other features, aspects and advantages of the present invention will become better understood with regard to the following description, appended claims, and accompanying drawings, where:
  • FIG. 1 is a perspective top view showing an exemplary MicroSD device according to an embodiment of the present invention;
  • FIG. 2 is a cross sectional side view showing the exemplary MicroSD of FIG. 1;
  • FIG. 3 is a flow diagram showing a method for producing the MicroSD device of FIG. 1 according to another embodiment of the present invention;
  • FIGS. 4(A) and 4(B) are bottom and top views showing a PCB panel utilized in the method of FIG. 3;
  • FIG. 5 is a perspective view depicting a surface mount technology (SMT) process for mounting passive components on a PCB according to the method of FIG. 3;
  • FIG. 6 is a top view showing the PCB panel of FIG. 4(B) after the SMT process is completed;
  • FIG. 7 is a simplified perspective view showing a semiconductor wafer including integrated circuits (ICs) utilized in the method of FIG. 3;
  • FIGS. 8(A), 8(B) and 8(C) are simplified cross-sectional side views depicting a process of grinding and dicing the wafer of FIG. 7 to produce IC dies;
  • FIG. 9 is a perspective view depicting a die bonding process utilized to mount the IC dies of FIG. 8(C) on a PCB according to the method of FIG. 3;
  • FIG. 10 is a top view showing the PCB panel of FIG. 6 after the die bonding process is completed;
  • FIG. 11 is a perspective view depicting a PCB of the PCB panel of FIG. 10 after a wire bonding process is performed to connect the IC dies of FIG. 8(C) to corresponding contact pads disposed on a PCB according to the method of FIG. 3;
  • FIG. 12 is a top view showing the PCB panel of FIG. 10 after the wire bonding process is completed;
  • FIG. 13 is a perspective view showing a lower molding die utilized in a molding process for forming a molded housing over the PCB panel of FIG. 4(B) according to the method of FIG. 3;
  • FIG. 14 is a top plan view showing an upper molding die that is used in conjunction with the lower molding die of FIG. 13 in the molding process according to the method of FIG. 3;
  • FIGS. 15 is a top plan depicting a first step of mounting the PCB panel of FIG. 12 into the lower molding die of FIG. 13 according to the method of FIG. 3;
  • FIGS. 16(A), 16(B) and 16(C) are simplified cross-sectional side views depicting subsequent steps of assembling the molding die and injecting molten plastic according to the method of FIG. 3;
  • FIG. 17 is a perspective bottom view showing the PCB panel of FIG. 12 after the plastic molding process of FIGS. 16(A) to 16(C) is completed;
  • FIG. 18 is a top plan view showing the panel of FIG. 17 during a direct singulation process according to an embodiment of the present invention; removed using one of the laser cutter of FIG. 19 or the water jet knife of FIG. 20;
  • FIG. 19 is a simplified side view depicting the direct singulation process of FIG. 18 using a laser cutter according to a specific embodiment of the present invention;
  • FIG. 20 is a simplified side view depicting the direct singulation process of FIG. 18 using a water jet knife according to a specific embodiment of the present invention;
  • FIG. 21 is a simplified side view depicting the PCB panel of FIG. 17 during an indirect singulation process in which the panel is separated into individual blocks, each block including one MicroSD device, according to another embodiment of the present invention;
  • FIG. 22 is simplified top view depicting the individual blocks after completion of the separation process of FIG. 21;
  • FIG. 23 is a simplified side view depicting a grinding process during which the side edges of each block of FIG. 22 is trimmed according to another embodiment of the present invention;
  • FIG. 24 is simplified top view depicting the individual MicroSD devices after completion of the grinding process of FIG. 23;
  • FIGS. 25(A), 25(B) and 25(C) are simplified cross-sectional side views depicting a grinding process for providing a chamfer on the MicroSDs according to the method of FIG. 3;
  • FIG. 26 is simplified top view showing process of marking the MicroSD devices according to the method of FIG. 3;
  • FIG. 27 is simplified cross-sectional side view showing a PCB panel including multi-stacked ICs according to an alternative embodiment of the present invention;
  • FIG. 28(A), 28(B) and 28(C) are simplified perspective view showing various memory devices produced using the production method of the present invention;
  • FIGS. 29(A) and 29(B) are exploded perspective and assembled perspective views showing a conventional method for producing MicroSD devices; and
  • FIGS. 30(A) and 30(B) are exploded perspective and assembled perspective views showing another conventional method for producing MicroSD devices.
  • DETAILED DESCRIPTION OF THE DRAWINGS
  • The present invention relates to an improvement in manufacturing methods for MicroSD (and “normal” SD) devices, and to the improved MicroSD devices made by these methods. The following description is presented to enable one of ordinary skill in the art to make and use the invention as provided in the context of a particular application and its requirements. As used herein, the terms “upper”, “upwards”, “lower”, and “downward” are intended to provide relative positions for purposes of description, and are not intended to designate an absolute frame of reference. Various modifications to the preferred embodiment will be apparent to those with skill in the art, and the general principles defined herein may be applied to other embodiments. Therefore, the present invention is not intended to be limited to the particular embodiments shown and described, but is to be accorded the widest scope consistent with the principles and novel features herein disclosed.
  • FIGS. 1 and 2 are perspective and cross-sectional side views showing a MicroSD device 100 according to a first embodiment of the present invention. MicroSD device 100 generally includes a printed circuit board assembly (PCBA) 110 and a plastic housing 150 that is molded onto PCBA 110.
  • Referring to the upper portion of FIG. 1, PCBA 110 includes a printed circuit board (PCB) substrate 111, and IC dies 130 and 135 and one or more passive components 142 that are mounted on PCB substrate 111. PCB substrate 111 is a substantially flat substrate, and has opposing sides that are referred to below as upper (first) surface 112 and lower (second) surface 114. The four side edges of substrate 111 are referenced as 111P-1 to 111P-4, and extend between upper surface 112 and lower surface 114. Formed on upper surface 112 are eight standardized (plug) metal contacts 120 that are shaped and arranged in a pattern established by the MicroSD specification. IC dies 130 and 135 and passive components 142 are mounted on lower surface 114. PCB substrate 111 is formed in accordance with known PCB manufacturing techniques such that metal contacts 120, IC dies 130 and 135, and passive components 142 are electrically interconnected by a predefined network including conductive traces 131 and 136 and other conducting structures that are sandwiched between multiple layers of an insulating material (e.g., FR4 or BT) and adhesive.
  • According to an aspect of the invention, passive components are mounted onto lower surface 114 using one or more standard surface mount technology (SMT) techniques, and one or more integrated circuit (IC) die (e.g., control IC die 130 and flash memory die 135) are mounted using chip-on-board (COB) techniques. As indicated in FIG. 2, during the SMT process, the passive components, such as capacitor 142, are mounted onto contact pads (described below) disposed on lower surface 114, and are then secured to the contact pads using known solder reflow techniques. To facilitate the SMT process, each of the passive components is packaged in any of the multiple known (preferably lead-free) SMT packages (e.g., ball grid array (BGA) or thin small outline package (TSOP)). In contrast, IC dies 130 and 135 are unpackaged, semiconductor “chips” that are mounted onto surface 114 and electrically connected to corresponding contact pads using known COB techniques. For example, as indicated in FIG. 2, control IC die 130 is electrically connected to PCB substrate 111 by way of wire bonds 160-1 that are formed using known techniques. Similarly, flash memory IC die 135 is electrically connected to PCB substrate 111 by way of wire bonds 160-2. Passive components 142, IC dies 130 and 135 and metal contacts 120 are operably interconnected by way of metal traces 131 and 136 that are formed on and in PCB substrate 111 using known techniques, a few of which being depicted in FIG. 1 in a simplified manner by short dashed lines.
  • Housing 150 comprises molded plastic arranged such that substantially all of the plastic used to form housing 150 is located level with or below (i.e., on one side of) lower surface 114 of PCB substrate 111. Housing 150 includes a peripheral surface extending perpendicular to PCB substrate 111, and a lower surface 152 that extends parallel to PCB substrate 111 and coplanar with a side edge of PCB substrate 111. For discussion purposes, the portion of the peripheral surface disposed at the front end of MicroSD device 100 is referred to as front wall section 151P-1, the portion of peripheral surface located at the rear end of device 100 is rear wall section 151P-3, and the opposing side portions of the peripheral surface are side wall sections 151P-2 and 151P-4. As shown is FIG. 2, housing 150 includes a chamfer section 154 extending upward from front wall section 151-1, and a raised, step-like “finger-nail catch” structure 156 extending downward from lower surface 152 adjacent to rear wall section 151P-3. These features are provided to facilitate reliable insertion and removal of MicroSD device 100 from a host system (e.g., a multi-media mobile phone).
  • According to another aspect of the invention, MicroSD device 100 is subjected to a singulation (i.e., cutting and/or grinding) process performed such that peripheral edges of both PCB substrate 111 and molded housing 150 have the same height, width and length dimensions as those set forth by MicroSD memory card specifications. That is, adjacent to metal contacts 120, both PCB substrate 111 and molded housing 150 have a width W of 11 mm, which is measured between peripheral side edges 111P-2 and 111P-4, and between side walls 151P-2 and 151P-4. That is, peripheral side edge 111P-2 is substantially coplanar with side wall 151P-2, and side edge 111P-4 is substantially coplanar with side wall 151P-4. Similarly, as set forth below, at the completion of the singulation process both PCB substrate 111 and molded housing 150 have a length L of 15 mm, which is measured between peripheral front/rear edges 111P-1 and 111P-3, and between end walls 151P-1 and 151P-4. Note that, as indicated in FIG. 2, due to the chamfering process (described below), the final length of substrate 111 may be slightly shorter than the predefined specified MicroSD length. Finally, the combined thickness T of PCB substrate 111 and molded housing 150 adjacent contacts 120 is 0.7 mm, per MicroSD specifications. By producing MicroSD device 100 in this manner, the surface area of PCB substrate 111 is significantly increased over conventional methods, where the PCB must be narrower than the memory card specification in order to fit inside a pre-molded housing. MicroSD device 100 thus facilitates increased card capacity and functionality due to the increased area of PCB substrate 111 for mounting integrated circuits and other components. In addition, molded housing (casing) 150 provides a physically rigid memory card structure by filling gaps and spaces that are otherwise not filled when separate covers are used. In addition, molded housing 150 enables the use of a wide range of memory devices (ICs) by allowing the molded material formed over memory device 135 to be made extremely thin, or omitted entirely.
  • FIG. 3 is a flow diagram showing a method for producing MicroSD device 100 according to another embodiment of the present invention. Summarizing the novel method, a PCB panel is generated using known techniques (block 210), passive components are produced/procured (block 212), and integrated circuit (IC) wafers are fabricated or procured block 214). The passive components are mounted on the PCB panel using SMT techniques (block 220), and the IC dies are subject to a grind-back process (block 242) and dicing process (block 244) before being die bonded (block 246) and wire bonded (block 248) onto the PCB panel using known COB techniques. Molten plastic is then used to form a molded thermal plastic layer over the passive components and the IC dies (block 250). Then PCB panel is then singulated (cut) in to separate MicroSD devices (block 260), and the individual MicroSD devices are subjected to a chamfer process (block 265). The MicroSD devices are then marked (block 270), and then the MicroSD devices are tested, packed and shipped (block 280) according to customary practices. This method provides several advantages over conventional manufacturing methods that utilize SMT techniques only. First, by utilizing COB techniques to mount the MicroSD controller and flash memory, the large amount of space typically taken up by these devices is dramatically reduced, thereby facilitating significant miniaturization of the resulting MicroSD device footprint. Second, by implementing the wafer grinding methods described below, the die height is greatly reduced, thereby facilitating a stacked memory arrangement that a significant memory capacity increase over packaged flash memory arrangements. The molded housing also provides greater moisture and water resistance and higher impact force resistance than that achieved using conventional manufacturing methods. In comparison to the standard MicroSD memory card manufacturing that used SMT process, it is cheaper to use the combined COB and SMT (plus molding) processes described herein because, in the SMT-only manufacturing process, the bill of materials such as Flash memory and the controller chip are also manufactured by COB process, so all the COB costs are already factored into the packaged memory chip and controller chip. Therefore, the combined COB and SMT method according to the present invention provides a less expensive and higher quality (i.e., more reliable) memory product with a smaller size than that possible using conventional SMT-only manufacturing methods.
  • The flow diagram of FIG. 3 will now be described in additional detail below with reference to FIGS. 4(A) to 20.
  • Referring to the upper portion of FIG. 3, the manufacturing method begins with filling a bill of materials including producing/procuring PCB panels (block 210), producing/procuring passive (discrete) components (block 212) such as resistors, capacitors, diodes, and oscillators that are packaged for SMT processing, and producing/procuring a supply of IC wafers (or individual IC dies, block 214).
  • FIGS. 4(A) and 4(B) are simplified top and bottom views, respectively, showing a PCB panel 300(t0) provided in block 210 of FIG. 3 according to a specific embodiment of the present invention. The suffix “tx” is utilized herein to designated the state of the PCB panel during the manufacturing process, with “t0” designating an initial state. Sequentially higher numbered prefixes (e.g., “t1”, “t2” and “t3”) indicate that PCB panel 300 has undergone additional sequential production processes.
  • As indicated in FIG. 4(A) and 4(B), PCB panel 300(t0) includes a five-by-three matrix of PCB regions 311 that are surrounded by opposing end border structures 310 and side border structures 312, which are integrally connected to form a square or rectangular frame of blank material around PCB regions 311. Each PCB region 311 (which is indicated by dashed lines for convenience and corresponds to substrate 111; see FIG. 1) has the features described above with reference to FIGS. 1 and 2, and the additional features described below. FIG. 4(A) shows lower surface 114 of each PCB region 311, and FIG. 4(B) shows upper surface 112 of each PCB region 311, which includes standard metal contacts 120. Note that lower surface 114 of each PCB region 311 (e.g., PCB region 311-11) includes multiple contact pads 119 arranged in predetermined patterns for facilitating SMT and COB processes, as described below. Referring to FIG. 4(A), each PCB region 311 in each row is connected to either an end border structure 310, a side region 312 or to an adjacent PCB region 311 by way of an intervening portion 315 of panel 300. For example, referring to the upper row of PCBs in FIG. 4(A), PCB region 311-11 is connected to the left end region 310, the upper side region 312, and by intervening portion 315-11 to PCB region 311-12.
  • As indicated in FIG. 4(B), in accordance with an aspect of the present invention, optional designated cut lines 317 and 318 are scored or otherwise partially cut into one of side border structure 312 and/or central region of PCB panel 300 that are aligned with the front and rear edges of PCB regions 311 aligned in each row and column, respectively. In an alternative embodiment, cut lines 317 and 318 may be omitted, or comprise surface markings that do not weaken the panel material.
  • In accordance with yet another aspect of the present invention, border structures 310 and 312 are provided with positioning holes 319 to facilitate alignment between PCB panel 300 and the plastic molding die during molded housing formation, as described below.
  • FIG. 5 is a perspective view depicting a PCB region 311-11 of panel 300(t0) during a SMT process that is used to mount passive components on PCB region 311-11 according to block 220 of FIG. 3. Note that PCB region 311-11 (which corresponds to PCB substrate 111 of FIG. 1) is shown separate from panel 300(t0) for illustrative purposes, and is actually integrally formed with the remainder of panel 300(t0) during the process steps described below preceding singulation. During the first stage of the SMT process, lead-free solder paste (not shown) is printed on contact pads 119-1, 119-2 and 119-3, which in the present example corresponds to SMT components 142, 144 and 146, using custom made stencil that is tailored to the design and layout of PCB region 311-11. After dispensing the solder paste, the panel is conveyed to a conventional pick-and-place machine that mounts SMT components 142, 144 and 146 onto contact pads 119-1, 119-2 and 119-3, respectively, according to known techniques. Upon completion of the pick-and-place component mounting process, PCB panel 300(t0) is then passed through an IR-reflow oven set at the correct temperature profile. The solder of each pad on the PC board is fully melted during the peak temperature zone of the oven, and this melted solder connects all pins of the passive components to the finger pads of the PC board. FIG. 6 shows the resulting sub-assembled PCB panel 300(t1), in which each PCB region 311 (e.g., PCB region 311-11) includes passive components 142, 144 and 146 mounted thereon by the completed SMT process.
  • FIG. 7 is a simplified perspective view showing a semiconductor wafer 400(t0) procured or fabricated according to block 214 of FIG. 3. Wafer 400(t0) includes multiple ICs 430 that are formed in accordance with known photolithographic fabrication (e.g., CMOS) techniques on a semiconductor base 401. The corner partial dies 402 are inked out during die probe wafer testing, as are complete dies that fail electrical function or DC/AC parametric tests. In the example described below, wafer 400(t1) includes ICs 430 that comprise MicroSD controller circuits. In a related procedure, a wafer (not shown) similar to wafer 400(t1) is produced/procured that includes flash memory circuits, and in an alterative embodiment, ICs 430 may include both MicroSD controller circuits and flash memory circuits. In each instance, these wafers are processed as described herein with reference to FIGS. 8(A), 8(B) and 8(C).
  • As indicated in FIGS. 8(A) and 8(B), during a wafer back grind process according to block 242 of FIG. 3, base 401 is subjected to a grinding process in order to reduce the overall initial thickness TW1 of each IC 430. Wafer 400(t1) is first mount face down on sticky tape (i.e., such that base layer 401(t0) faces away from the tape), which is pre-taped on a metal or plastic ring frame (not shown). The ring-frame/wafer assembly is then loaded onto a vacuum chuck (not shown) having a very level, flat surface, and has diameter larger than that of wafer 400(t0). The base layer is then subjected to grinding until, as indicated in FIG. 8(B), wafer 400(t1) has a pre-programmed thickness TW2 that is less than initial thickness TW1 (shown in FIG. 8(A)). The wafer is cleaned using de-ionized (DI) water during the process, and wafer 400(t1) is subjected to a flush clean with more DI water at the end of mechanical grinding process, followed by spinning at high speed to air dry wafer 400(t1).
  • Next, as shown in FIG. 8(C), the wafer is diced (cut apart) along predefined border structures separating ICs 420 in order to produce IC dies 130 according to block 244 of FIG. 3. After the back grind process has completed, the sticky tape at the front side of wafer 400(t1) is removed, and wafer 400(t1) is mounted onto another ring frame having sticky tape provided thereon, this time with the backside of the newly grinded wafer contacting the tape. The ring framed wafers are then loaded into a die saw machine. The die saw machine is pre-programmed with the correct die size information, X-axis and Y-axis scribe lanes, width, wafer thickness and intended over cut depth. A proper saw blade width is then selected based on the widths of the XY scribe lanes. The cutting process begins dicing the first lane of the X-axis of the wafer. De-ionized wafer is flushing at the proper angle and pressure around the blade and wafer contact point to wash and sweep away the silicon saw dust while the saw is spinning and moving along the scribe lane. The sawing process will index to the second lane according to the die size and scribe width distance. After all the X-axis lanes have been completed sawing, the wafer chuck with rotate 90 degree to align the Y-axis scribe lanes to be cut. The cutting motion repeated until all the scribe lanes on the Y-axis have been completed.
  • FIG. 9 is a perspective view depicting a die bonding process utilized to mount the controller IC dies 130 of FIG. 8(C) and flash memory IC dies 135 on PCB region 311-11 of the PCB panel according to block 246 of FIG. 3. The die bonding process is performed on PCB panel 300(t1) (see FIG. 6), that is, after completion of the SMT process. The die bonding process generally involves mounting controller IC dies 130 into lower surface region 114A, which is bordered by contact pads 119-5, and mounting flash IC dies 135 into lower surface region 114B, which is disposed between rows of contact pads 119-6. In one specific embodiment, an operator loads IC dies 130 and 135 onto a die bonder machine according to known techniques. The operator also loads multiple PCB panels 300(t1) onto the magazine rack of the die bonder machine. The die bonder machine picks the first PCB panel 300(t1) from the bottom stack of the magazine and transports the selected PCB panel from the conveyor track to the die bond (DB) epoxy dispensing target area. The magazine lowers a notch automatically to get ready for the machine to pick up the second piece (the new bottom piece) in the next cycle of die bond operation. At the die bond epoxy dispensing target area, the machine automatically dispenses DB epoxy, using pre-programmed write pattern and speed with the correct nozzle size, onto the target areas 114A and 114B of each of the PCB region 311 of PCB panel 300(t1). When all PCBs region 311 have completed this epoxy dispensing process, the PCB panel is conveyed to a die bond (DB) target area. Meanwhile, at the input stage, the magazine is loading a second PCB panel to this vacant DB epoxy dispensing target area. At the die bond target area, the pick up arm mechanism and collet (suction head with rectangular ring at the perimeter so that vacuum from the center can create a suction force) picks up an IC die 130 and bonds it onto area 114A, where epoxy has already dispensed for the bonding purpose, and this process is then performed to place IC die 135 into region 114B. Once all the PCB regions 311 on the PCB panel have completed die bonding process, the PCB panel is then conveyed to a snap cure region, where the PCB panel passes through a chamber having a heating element that radiates heat having a temperature that is suitable to thermally cure the epoxy. After curing, the PCB panel is conveyed into the empty slot of the magazine waiting at the output rack of the die bonding machine. The magazine moves up one slot after receiving a new panel to get ready for accepting the next panel in the second cycle of process. The die bonding machine will repeat these steps until all of the PCB panels in the input magazine are processed. This process step may repeat again for the same panel for stack die products that may require to stacks more than one layer of memory die. FIG. 10 is a top view showing PCB panel 300(t2) after the die bonding process is completed and controller IC 130 and memory IC 135 are mounted onto each PCB (e.g., PCB region 311-11).
  • FIG. 11 is a perspective view depicting a wire bonding process utilized to connect the IC dies 130 and 135 to corresponding contact pads 119-5 and 119-6 of PCB region 311-11, respectively, according to block 248 of FIG. 3. The wire bonding process proceeds as follows. Once a full magazine of PCB panels 300(t2) (see FIG. 10) has completed the die bonding operation, an operator transports the PCB panels 300(t2) to a nearby wire bonder (WB) machine, and loads the PCB panels 300(t2) onto the magazine input rack of the WB machine. The WB machine is pre-prepared with the correct program to process this specific MicroSD device. The coordinates of all the ICs' pads 119-5 and 119-6 and PCB gold fingers were previously determined and programmed on the WB machine. After the PCB panel with the attached dies 130 and 135 is loaded at the WB bonding area, the operator commands the WB machine to use optical vision to recognize the location of the first wire bond pad 131 of the first controller die 130 of PCB region 311-11 on the panel. A corresponding wire 160-1 is then formed between wire bond pad 131 and a corresponding contact pad 119-5 formed on PCB region 311-11. Once the first pin is set correctly and the first wire bond 160-1 is formed, the WB machine can carry out the whole wire bonding process for the rest of controller die 130, and then proceed to forming wire bonds 160-2 between corresponding wire bond pads (not shown) on memory die 135 and contact pads 119-6 to complete the wire bonding of memory die 135. Upon completing the wiring bonding process for PCB region 311-11, the wire bonding process is repeated for each PCB region 311 of the panel. For multiple flash layer stack dies, the PCB panels may be returned to the WB machine to repeat wire bonding process for the second stack. FIG. 12 is a top view showing PCB panel 300(t3) after the wire bonding process is completed.
  • FIG. 13 is a perspective top view showing a lower die 410 of a simplified top and enlarged partial top views depicting a lower (first) molding die including a shallow cavity 411 surrounded by a peripheral surface 412 that is shaped to receive PCB panel 300(t3) (see FIG. 12) in the manner described below. In addition, lower die 410 includes three raised alignment poles 419 that are positioned to receive alignment holes 319 of PCB panel 300 (see FIG. 4(A)). Alignment poles 419 have a height that is not greater than the thickness of PCB panel 300.
  • FIG. 14 is a top view showing an upper molding die 420 that is used in conjunction with lower molding die 410 (FIG. 13). Upper molding die 420 includes a central depending region 421 surrounded by a peripheral raised surface 422 that are mounted over and pressed against cavity 411 and peripheral surface 412 of lower molding die 410 during the molding process. Region 421 of upper molding die 420 defines a molding chamber region into which molten plastic is injected to form a molded layer over the surface of an inserted PCB panel. Recessed regions 426 are provided upper molding die 420 that facilitate the formation of finger-nail catches 156 (see FIG. 1). Note that a run gate (channel) 429 is provided for each row of PCB regions that facilitates the injection of molten plastic into the region 421.
  • FIG. 15 is a top plan view depicting mounting PCB panel 300(t3) into lower molding die 410. Each alignment pole 419 is received inside a corresponding alignment hole 319 of panel 300(t3), as shown in the top left corner of FIG. 15.
  • FIGS. 16(A), 16(B) and 16(C) are simplified cross-sectional side views depicting a molding process using molding dies 410 and 420. As indicated in FIG. 16(A) and 16(B), after panel 300(t3) is loaded into lower molding die 410, upper molding die 420 is positioned over and lowered onto lower molding die 410 until peripheral raised surface 422 presses against corresponding peripheral end/side portions 310/312 of PCB panel 300(t3) surrounding PCB regions 311, thereby forming a substantially enclosed chamber 425 over all fifteen PCB regions 311, as indicated in FIG. 16(B). Referring again to FIG. 16(B), in accordance with another aspect of the invention, a single run gate (channel) set 429 is provided for each row of PCB regions 311 that facilitates the injection of molten plastic into chamber 425, as indicated in FIG. 16(C), whereby single-piece molded layer 450 is formed on a central portion of lower surface 114 over all fifteen PCB regions 311. From this point forward, the PCB panel is referred to as 300(t4).
  • FIG. 16(C) depicts the molding process. Transfer molding is prefer here due to the high accuracy of transfer molding tooling and low cycle time. The molding material in the form of pellet is preheated and loaded into a pot or chamber (not shown). A plunger (not shown) is then used to force the material from the pot through channel sets 429 (also known as a spruce and runner system) into the mold cavity 425, causing the molten (e.g., plastic) material to form molded layer 450 that encapsulates all the IC chips and components, and to cover all the exposed areas of lower surface 114. Note that, because PCB 300(t4) is pressed against lower mold 420 by peripheral raised surface 422, no molding material is able to form on upper surface 112. The mold remains closed as the material is inserted and filled up all vacant areas of the mold die. During the process, the walls of upper die 420 are heated to a temperature above the melting point of the mold material, which facilitates a faster flow of material. The mold assembly remains closed until a curing reaction within the molding material is complete. A cooling down cycle follows the injection process, and the molding materials start to solidify and harden. Ejector pins push PCB panel 300(t4) (shown in FIG. 16(C) and 17) from the mold machine once the molding material has hardened sufficiently.
  • FIG. 17 is a perspective bottom view showing PCB panel 300(t4) after the plastic molding process of FIGS. 16(A) to 16(C) is completed. Panel 300(t4) includes molded layer 450 formed on lower surface 114 that covers all fifteen PCB regions 311 (which are generally indicated by dashed lines). Molded layer 450 has a substantially flat upper surface 458, and fifteen raised, step-like “finger-nail catch” structures 156 disposed over PCB regions 311.
  • Referring again to block 260 of FIG. 3, a subsequent processing step involves singulating (separating) the over-molded PCB panel to form individual MicroSD devices by cutting said PCB panel and said molded layer using one of a laser cut, a water jet cut or a saw/mechanical grind process, thereby separating said PCB panel into a plurality of individual MicroSD devices. Each of these singulation methods is described below with reference to FIGS. 18-23. Those skilled in the art will recognize that other singulation methods may also be utilized without departing from the spirit and scope of the present invention.
  • FIG. 18 is a simplified top plan view depicting a direct singulation process in which MicroSD device 100-11 is removed from PCB panel 300(t4) is one cutting pass using a cutting tool 500. That is, cutting tool 500 generates a beam or jet 505 that is directed along a peripheral edge of region 311-11 that passes through both PCB panel 300(t4) and the molding layer (which is disposed below panel 450 in FIG. 18), thereby separating PCB substrate 111-11 and a corresponding molded housing (not shown, but located on the opposite side of substrate 111-11) from region 311-11 (whereby region 311-11 becomes an open hole). In alternative embodiments described in additional detail below, cutting tool 500 is implemented using a laser cutting tool and a water jet cutting tool, whereby MicroSD device 100-11 is detached and can be removed. After the fifteen MicroSD devices are removed, the remaining skeleton portion of PCB panel 300(t4) is recycled.
  • FIG. 19 is a simplified side view depicting PCB panel 300(t4) during singulation into individual MicroSD devices using a full laser cutting system 500A according to a specific embodiment of the present invention. A laser beam 505A, generated, for example, by a laser diode (not shown) disposed inside laser cutter 500A, is directed onto upper surface 112 along the peripheral outline of each MicroSD device. Laser beam 505A passes entirely through both PCB panel 300(t4) and molded layer 450, whereby each microSD device (e.g., device 100-11) becomes detached from PCB panel 300(t4) by way of a continuous channel 510-11, and is separated as shown in FIG. 18. Note that each microSD device (e.g., device 100-11) includes both a PCB substrate (e.g., substrate 111-11) and a molded housing (e.g., housing 150-11) that are disposed in the targeted region (e.g., region 311-11). Laser cutters 500A provide excellent cutting quality with cutting angle capability of less than 1 degree. Automatic cutting position alignment is achieved using a conventional vision system and associated control circuit (not shown). Once the starting position and the outline shape and dimensions are set, the laser system will cut out each micro-SD according to the pre-feed in dimensions specification. Laser cutting system 500A can optimize the utilization of substrates of a panel by minimizing the wasted space between adjacent devices. A suitable laser cutting system 500A is produced by BE Semiconductor Industries N.V. (the Netherlands) under the model name Fico Bright Line.
  • FIG. 20 is a simplified side view depicting PCB panel 300(t4) during singulation into individual MicroSD devices using an abrasive water jet (AWJ) cutting system 500B according to another specific embodiment of the present invention. A head 501 includes separate channels for feeding water 502 and abrasive powder 503 into a mixing chamber 504 at a predetermined pressure that forces the mixture from head 501 in the form of a jet 505B. Similar to laser beam 505A, jet 505B is directed onto upper surface 112 along the peripheral outline of each MicroSD device, and has sufficient force to pass entirely through both PCB panel 300(t4) and molded layer 450, whereby each microSD device (e.g., device 100-11) becomes detached from PCB panel 300(t4) by way of a continuous channel 520-11, and is separated as shown in FIG. 18. The abrasive/water mixture is then collected and recycled. A suitable AWJ cutting system 500B is produced by TOPS Co. Ltd. (Korea) under the model no/name SJA-0505.
  • FIGS. 21 to 24 depict yet another singulation process according to block 260 of FIG. 3 that is used to separate PCB panel 300(t4) into individual MicroSD devices. Referring to FIG. 21, PCB panel 300(t4) is loaded into a saw machine (not shown) that is pre-programmed with a singulation routine that includes predetermined cut locations defined by designated cut lines 317. A saw blade 530 is aligned to the first cut line (e.g., end cut line 317-1) as a starting point by the operator. The coordinates of the first position are stored in the memory of the saw machine. The saw machine then automatically proceeds to cut up (singulate) panel 300(t4), for example, successively along cut lines 317, first in one direction (e.g., along vertical cut lines 317 in FIG. 21), and then in the orthogonal direction (e.g., along horizontal cut lines 317 in FIG. 21). FIG. 22 is a top view showing blocks 600 cut from panel 300(t4) using the sawing process of FIG. 21, each block 600 including an individual MicroSD device (as indicated by the dashed outline). As indicated in FIG. 23, a mechanical grinder 540 (shown in simplified form) is then utilized to remove excess PCB and molded plastic material disposed along the peripheral edge of each block 600, e.g., by passing grinder 540 along peripheral edges 111P-1 to 111P-4 as indicated. In one embodiment, a dimensionally accurate MicroSD device (not shown) is used as a reference to guide the grinding process for each block 600. FIG. 24 is simplified top view depicting the individual MicroSD devices 100 after completion of the grinding process of FIG. 23.
  • FIGS. 25(A) to 25(C) are simplified side views showing a chamfer process according to block 265 of FIG. 3, which is performed as a final processing step to individual MicroSD devices 101A that have been singulated from their PCB panel according to any of the above-mentioned singulation processes. FIG. 25(A) shows a device 101A positioned over a fixture 560 having a lower wall 561 and a front wall 562 that define a front corner opening 563. As indicated in FIG. 25(B), when device 100A is mounted onto fixture 560, a front corner portion P of device 100A extends through opening 563. A grinding wheel or belt 570 is then used to remove the front corner portion, thereby forming the desired chamfer surface 154 on MicroSD device 100, which is shown in FIG. 25(C).
  • FIG. 26 is a perspective bottom view showing a MicroSD device 100 after singulation and chamfering, and further showing a marking process in accordance with block 270 of the method of FIG. 3. The singulated and completed MicroSD devices 100 undergo a marking process in which a designated company's name/logo, speed value, density value, or other related information are printed on surface 152 of housing 150. After marking, MicroSD devices 100 are placed in the baking oven to cure the permanent ink.
  • Referring to block 280 located at the bottom of FIG. 3, a final procedure in the manufacturing method of the present invention involves testing, packing and shipping the individual MicroSD devices. The marked MicroSD devices 100 shown in FIG. 26 are then subjected to visual inspection and electrical tests consistent with well established techniques. Visually or/and electrically test rejects are removed from the good population as defective rejects. The good memory cards are then packed into custom made boxes which are specified by customers. The final packed products will ship out to customers following correct procedures with necessary documents.
  • FIG. 27 is a simplified side view showing a PCB substrate 300B including multiple MicroSD devices 100B according to an alternative embodiment of the present invention. As suggested in the above example, in addition to reducing overall manufacturing costs by utilizing unpackaged controller and flash memory dies (i.e., by eliminating the packaging costs associated with SMT-ready controller and flash memory devices), the present invention provides a further benefit of facilitating greatly expanded memory capacity without increasing the overall size of each MicroSD device 100B, e.g., by facilitating a stacked-memory MicroSD device in which a first flash memory chip 135B-1 is mounted on the PCB and connected by first wire bonds, and a second flash memory chip 135B-2 is mounted on the first memory chip and connected by a second set of wire bonds to the PCB. Because the IC die height (thickness) D is much smaller than the thickness of packaged flash memory devices, and because thickness T of each MicroSD device 100B is set by predetermined standards, the present invention facilitates such a stacked memory arrangement that greatly increases memory capacity without increasing the footprint of MicroSD device 100B.
  • Although the present invention has been described with respect to certain specific embodiments, it will be clear to those skilled in the art that the inventive features of the present invention are applicable to other embodiments as well, all of which are intended to fall within the scope of the present invention. For example, FIGS. 28(A) to 28(C) show Secure Digital devices 100C, 100D and 100E, which represent alternative memory card devices that may be produced in accordance with the methods of the present invention, each card having associated PCB substrates and associated molded housings that define height, width and length measurements established by SD specifications.

Claims (11)

1. A method for producing a plurality of memory card devices, having predefined width and height specifications, the method comprising:
producing a printed circuit board (PCB) panel including a plurality of PCB regions;
attaching at least one passive component and at least one integrated circuit to each said PCB region;
forming a single-piece molded layer on the second surface of the PCB panel such that said at least one passive component and said at least one IC die of each PCB region are covered by thermal set plastic, wherein a combined thickness of said PCB panel and said single-piece molded layer is equal to said height specification; and
singulating said PCB panel and molded layer by cutting said PCB panel and said molded layer such that the PCB panel is separated into said plurality of memory card devices, wherein each memory card device includes a printed circuit board having a width that is equal to said predefined width specification.
2. The method according to claim 1,
wherein producing said PCB panel comprises forming each said PCB region to include opposing first and second surfaces, a plurality of metal contacts disposed on the first surface, a plurality of first contact pads disposed on the second surface, a plurality of second contact pads disposed on the second surface, and a plurality of conductive traces formed on the PCB region such that each conductive trace is electrically connected to at least one of an associated metal contact, a first contact pad and a second contact pad; and
wherein attaching said at least one passive component and said at least one integrated circuit to each said PCB comprises:
attaching said at least one passive component to the first contact pads using a surface mount technique, and
attaching said at least one unpackaged integrated circuit (IC) die to the second contact pads using a chip-on-board technique.
3. The method of claim 2, wherein attaching said at least one passive component comprises:
printing a solder paste on said first contact pads;
mounting said at least one component on said first contact pads; and
reflowing the solder paste such that said at least one component is fixedly soldered to said first contact pads.
4. The method of claim 2, further comprising grinding a wafer including said at least one IC die such that a thickness of said wafer is reduced during said grinding, and then dicing said wafer to provide said at least one IC die.
5. The method of claim 4, wherein attaching at least one IC die comprises bonding a first IC die to the second surface of the PCB and wire bonding the first IC die to said second contact pad.
6. The method of claim 5, wherein attaching at least one IC die further comprises bonding a second IC die to the first IC die, and wire bonding wire bonding the second IC die to a third contact pad.
7. The method according to claim 1, wherein forming said single-piece molded layer comprises disposing said PCB panel into a first molding die, said first molding die comprises a plurality of alignment poles, and wherein disposing said PCB panel comprises operably engaging said alignment poles into corresponding alignment holes defined in said PCB panel.
8. The method according to claim 1, wherein singulating said PCB panel after forming said single-piece molded layer comprises cutting said PCB panel and said molded layer using one of a laser cutter, a water jet cutter, and a saw, whereby a PCB substrate is separated from said PCB panel, and a molded is separated from said molded layer.
9. The method according to claim 7, further comprising mechanically grinding a peripheral edge of each of said plurality of memory card devices.
10. The method according to claim 1, wherein said memory card devices comprise MicroSD devices, and wherein singulating comprising forming a peripheral edge of said PC substrate and peripheral walls of said molded housing such that both said peripheral edge and said peripheral walls define a width of 11 mm, and a combined thickness of said substrate and said molded housing is in the range of 0.7 mm to 1.0 mm.
11. A MicroSD device comprising:
a printed circuit board assembly (PCBA) including:
a printed circuit board (PCB) having opposing first and second surfaces, and a peripheral edge extending between the first and second surfaces,
a plurality of metal contacts disposed on the first surface of the PCB,
at least one passive component mounted on the second surface of the PCB,
at least one unpackaged integrated circuit (IC) die mounted on the second surface of the PCB, and a plurality of conductive traces formed on the PCB such that each conductive trace is electrically connected to at least one of an associated metal contact, said at least one IC die and said at least one passive component; and
a single-piece molded housing formed on the second surface of the PCBA such that said at least one passive component and said at least one IC die are covered by said molded housing, and such that substantially all of the peripheral edge of the PCB is exposed,
wherein said peripheral edge of said PCB and peripheral walls of said molded housing are formed such that both said peripheral edge and said peripheral walls define a nominal width of approximately 11 mm, and a combined thickness of said PCB and said molded housing is in the range of 0.7 to 1.0 mm.
US12/033,851 1999-08-04 2008-02-19 Manufacturing Method For Micro-SD Flash Memory Card Abandoned US20080235939A1 (en)

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US12/033,851 US20080235939A1 (en) 1999-08-04 2008-02-19 Manufacturing Method For Micro-SD Flash Memory Card
US12/043,398 US7649743B2 (en) 1999-08-04 2008-03-06 Open-frame solid-state drive housing with intrinsic grounding to protect exposed chips

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US09/366,976 US6547130B1 (en) 1999-06-03 1999-08-04 Integrated circuit card with fingerprint verification capability
US09/478,720 US7257714B1 (en) 1999-10-19 2000-01-06 Electronic data storage medium with fingerprint verification capability
US10/707,277 US7103684B2 (en) 2003-12-02 2003-12-02 Single-chip USB controller reading power-on boot code from integrated flash memory for user storage
US10/888,282 US7941916B1 (en) 2004-07-08 2004-07-08 Manufacturing method for memory card
US10/913,868 US7264992B2 (en) 2004-08-06 2004-08-06 Removable flash integrated memory module card and method of manufacture
US11/309,594 US7383362B2 (en) 2003-12-02 2006-08-28 Single-chip multi-media card/secure digital (MMC/SD) controller reading power-on boot code from integrated flash memory for user storage
US11/624,667 US20070130436A1 (en) 1999-10-19 2007-01-18 Electronic Data Storage Medium With Fingerprint Verification Capability
US11/773,830 US7872871B2 (en) 2000-01-06 2007-07-05 Molding methods to manufacture single-chip chip-on-board USB device
US12/025,706 US7886108B2 (en) 2000-01-06 2008-02-04 Methods and systems of managing memory addresses in a large capacity multi-level cell (MLC) based flash memory device
US12/033,851 US20080235939A1 (en) 1999-08-04 2008-02-19 Manufacturing Method For Micro-SD Flash Memory Card

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US10/888,282 Continuation US7941916B1 (en) 1999-08-04 2004-07-08 Manufacturing method for memory card
US11/683,292 Continuation-In-Part US7576990B2 (en) 1999-08-04 2007-03-07 Thin hard drive with 2-piece-casing and ground pin standoff to reduce ESD damage to stacked PCBA's
US12/035,318 Continuation-In-Part US20090212972A1 (en) 1999-08-04 2008-02-21 Method for Protecting Deployed Assets in a Cooperative System

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US10/803,597 Continuation-In-Part US7457897B1 (en) 1999-08-04 2004-03-17 PCI express-compatible controller and interface for flash memory
US12/035,318 Continuation-In-Part US20090212972A1 (en) 1999-08-04 2008-02-21 Method for Protecting Deployed Assets in a Cooperative System

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US12/033,851 Abandoned US20080235939A1 (en) 1999-08-04 2008-02-19 Manufacturing Method For Micro-SD Flash Memory Card

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