US20080093609A1 - Silicon Nitride Layer for Light Emitting Device, Light Emitting Device Using the Same, and Method of Forming Silicon Nitride Layer for Light Emitting Device - Google Patents
Silicon Nitride Layer for Light Emitting Device, Light Emitting Device Using the Same, and Method of Forming Silicon Nitride Layer for Light Emitting Device Download PDFInfo
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- US20080093609A1 US20080093609A1 US11/577,333 US57733305A US2008093609A1 US 20080093609 A1 US20080093609 A1 US 20080093609A1 US 57733305 A US57733305 A US 57733305A US 2008093609 A1 US2008093609 A1 US 2008093609A1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/34—Materials of the light emitting region containing only elements of group IV of the periodic system
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
- C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
- C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
- C23C16/34—Nitrides
- C23C16/345—Silicon nitride
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/08—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a plurality of light emitting regions, e.g. laterally discontinuous light emitting layer or photoluminescent region integrated within the semiconductor body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/16—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular crystal structure or orientation, e.g. polycrystalline, amorphous or porous
- H01L33/18—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular crystal structure or orientation, e.g. polycrystalline, amorphous or porous within the light emitting region
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S977/00—Nanotechnology
- Y10S977/70—Nanostructure
- Y10S977/773—Nanoparticle, i.e. structure having three dimensions of 100 nm or less
Definitions
- the present invention relates to a silicon nitride layer for a light emitting device, light emitting device using the same, and method of forming the silicon nitride layer for the light emitting device, and more specifically, to a silicon nitride layer for a light emitting device, which includes a silicon nitride matrix and silicon nanocrystals formed in the silicon nitride matrix.
- the quantum confinement effect involves forming fine crystalline or amorphous silicon structures having a size of several nm or less (e.g., quantum wells, quantum wires, and quantum dots) using a matrix or barrier formed of a material that has a larger energy gap than bulk silicon.
- the quantum dot nanostructures exhibit a particularly high quantum yield.
- the present invention is directed to a silicon nitride layer for a light emitting device, which is obtained in relatively simple manners. For example, silicon nanocrystals are directly grown during formation of the silicon nitride layer.
- the present invention is directed to a method of directly forming good, uniform silicon nanocrystals at a low temperature.
- One aspect of the present invention is to provide a silicon nitride layer for a light emitting device, which includes a silicon nitride matrix; and silicon nanocrystals formed in the silicon nitride matrix.
- a silicon nanocrystal structure generically refers to a quantum dot nanostructure in which nano-sized crystalline silicon particles are scattered in a matrix.
- the silicon nanocrystal structure has a spherical shape but not limited thereto.
- the silicon nanocrystals In order to apply the silicon nanocrystal structure to the light emitting device, the silicon nanocrystals have a diameter of about 2 to 7 nm and a density of 10 11 to 10 13 /cm 2 .
- the thickness of the silicon nitride layer including quantum dot nanostructures may be changed according to the type of device or desired emission extent but may be about 3 to 100 nm.
- Another aspect of the present invention is to provide a method of forming a silicon nitride layer for a light emitting device.
- the method includes loading a substrate for forming the silicon nitride layer into a chamber of a layer forming system; and growing a silicon nitride matrix and simultaneously forming silicon nanocrystals in the silicon nitride matrix using a silicon source gas and a nitrogen source gas.
- the layer forming system should not be construed as limited to the embodiments set forth herein and refers to any system used for forming a layer as known in the art.
- the layer forming system refers to a system that makes use of a chemical vapor deposition (CVD) process, a molecular beam epitaxy (MBE) process, or an ion implantation process.
- CVD chemical vapor deposition
- MBE molecular beam epitaxy
- ion implantation process ion implantation
- the MBE process employs a lump of solid silicon as a silicon source for silicon nitride
- the ion implantation process employs proton or electron silicon particles as the silicon source
- the CVD process employs a silicon source gas, such as SiCl 4 , SiHCl 3 , SiH 2 Cl 2 , SiH 4 , and Si 2 H 6 as the silicon source.
- the CVD process may be, but not limited to, an atmospheric pressure CVD (APCVD) process, a low-pressure CVD (LPCVD) process, a plasma enhanced CVD (PECVD) process, a metal organic CVD (MOCVD) process, or a thermal CVD process.
- APCVD atmospheric pressure CVD
- LPCVD low-pressure CVD
- PECVD plasma enhanced CVD
- MOCVD metal organic CVD
- the CVD process is a PECVD process, which is in common use during manufacture of silicon devices.
- silane gas may be used as a silicon source for silicon nitride
- a gas containing nitrogen atoms for example, nitrogen gas or ammonia gas, may be mainly used as a nitrogen source for the silicon nitride.
- the silicon source gas and the nitrogen source gas may be supplied to the layer forming system in a ratio of 1:1000 to 1:4000 so that the silicon nitride layer for the light emitting device can be grown at a growth rate of 1.3 to 1.8 nm/min.
- the silicon source gas and ammonia gas may be supplied to a thin-film growth system in a ratio of 1:1 to 1:5 so that the silicon nitride layer for the light emitting device can be grown at a growth rate of 5 to 10 nm/min.
- An MBE process uses solid silicon, an ion implantation process uses Si particles, and a CVD or PECVD process uses SiCl 4 , SiHCl 3 , SiH 2 Cl 2 , SiH 4 , or Si 2 H 6 as a silicon source. Meanwhile, it is desirable to use a source gas containing H that forms silicon crystals.
- Another aspect of the present invention is to provide a silicon light emitting device, which is manufactured using a silicon nitride layer including a silicon nitride matrix and silicon nanocrystals formed in the silicon nitride matrix. Meanwhile, during the formation of silicon nitride, an emission wavelength can be appropriately controlled to a desired wavelength according to the flow rates of a silicon source (e.g., silane) and a nitrogen source (e.g., nitrogen or ammonia).
- the silicon light emitting device may be, for example, a p-type semiconductor/insulator/n-type semiconductor (PIN) structure, a metal/insulator/semiconductor (MIS) structure, or a conductive polymer/insulator/semiconductor junction structure.
- the insulator refers to a silicon nitride layer according to the present invention.
- FIG. 1 is a cross-sectional view illustrating a process of forming a silicon nitride layer for a light emitting device according to an exemplary embodiment of the present invention
- FIG. 2 is a graph showing emission spectrums with respect to the flow rates of silane (SiH 4 ) gas and nitrogen (N 2 ) gas of an example of the silicon nitride layer of FIG. 1 , which has silicon nanocrystal structures;
- FIG. 3 is transmission electron microscopy (TEM) pictures of an example of the silicon nitride layer of FIG. 1 , which has silicon nanocrystal structures;
- FIG. 4 is a graph showing photoluminescence (PL) peak energies with respect to various sizes of silicon nanocrystals that are obtained by the method of FIG. 1 ;
- FIG. 5 is a graph showing PL spectrums that are obtained from silicon nanocrystals with various sizes at a room temperature.
- FIG. 6 is a cross-sectional view of a silicon light emitting device according to another exemplary embodiment of the present invention.
- FIG. 1 is a cross-sectional view illustrating a process of forming a silicon nitride layer for a light emitting device according to an exemplary embodiment of the present invention.
- a silicon nitride matrix 20 is formed on a substrate 10 , and silicon nanocrystals 30 are formed in the silicon nitride matrix 20 .
- the substrate 10 may be, but not limited thereto, a semiconductor substrate such as a silicon (Si) substrate and a germanium (Ge) substrate, a compound semiconductor substrate such as a SiGe substrate, a SiC substrate, a GaAs substrate, and an InGaAs substrate, or an insulating substrate such as a glass substrate, a sapphire substrate, a quartz substrate, and a resin substrate.
- a silicon nitride layer is formed on a silicon substrate, the silicon substrate has better lattice match. Meanwhile, good lattice match can also be obtained when an additional silicon layer is formed on a substrate other than a silicon substrate and a silicon nitride layer is formed thereon. Nevertheless, use of a silicon substrate can reduce the cost of production.
- silicon nanocrystals which are scattered in a silicon nitride matrix, were grown on a p-type (100) silicon substrate using a PECVD process.
- silane gas which is diluted with Ar gas at 10%, and nitrogen gas having a degree of purity of 99.999% were supplied to a top surface of the p-type silicon substrate.
- the silicon nanocrystals were grown under a pressure of 0.5 torr and at a constant plasma power of 5 W. The growth temperature was changed from 100 ? to 300 ? and the flow rates of silane gas and nitrogen gas were controlled from 4 to 12 sccm and from 500 to 1500 sccm, respectively.
- the silicon nanocrystals were grown at a growth rate of 1.3 to 1.8 nm/min according to the flow rates of silane gas and nitrogen gas.
- the resultant silicon nanocrystals could obtain high luminous efficiency. Also, by varying the size of silicon nanocrystals with the flow rates of silane gas and nitrogen gas, it is possible to tune the color of light emitted by the silicon nanocrystals.
- a high-temperature annealing process should be necessarily undergone for a long time.
- silicon nitride layer is being grown, silicon nanocrystals can be directly formed. Therefore, problems caused by the high-temperature annealing process can be solved and process time can be shortened, thus resulting in formation of good, uniform silicon nanocrystal structure.
- a silicon nitride layer including silicon nanocrystal structure should be grown at a low growth rate.
- a silicon source such as silane gas
- a silicon source such as silane gas
- nitrogen gas may be injected into a reaction system at a relatively low flow rate of about 1 to 50 sccm when it is diluted in inert gas at 0 to 50%, and nitrogen gas may be injected at a flow rate of 500 sccm or higher.
- the silicon nitride layer may be grown at a temperature of about 100° C. to 300° C.
- the concentration of reaction groups generated by plasma is reduced, thus the growth rate of the silicon nitride layer should be controlled to 1.3 to 1.8 nm/min.
- the ammonia gas when used as a nitrogen source, the ammonia gas is separated easier than nitrogen gas from reaction groups under the same low plasma power, so that growth rate becomes faster.
- the silicon nitride layer including silicon nanocrystal structure is grown three to five times faster than when the nitrogen gas is used.
- silicon nanocrystals should be formed without injecting any oxygen gas or oxide. If any oxygen gas or oxide is injected, oxygen-associated defects may be caused, compounds may provoke emission, or the oxygen gas or oxide may be an obstacle to emission. Accordingly, any possible injection of oxide should be cut off in order to obtain only desired emission.
- FIG. 2 is a graph showing emission spectrums with respect to the flow rates of silane (SiH 4 ) gas and nitrogen (N 2 ) gas of a silicon nitride layer having silicon nanocrystal structure, which is grown at a temperature of 250 ? according to the present embodiment.
- a reduction in the flow rate of silane gas or an increase in the flow rate of the nitrogen gas leads to a reduction in the size of silicon nanocrystals. Accordingly, the silicon nanocrystals can emit short-wavelength light in a blue region owing to a quantum confinement effect.
- FIG. 3 is transmission electron microscopy (TEM) pictures of an example of the silicon nitride layer of FIG. 1 , which has silicon nanocrystal structure.
- the pictures are a TEM picture and a picture of a transmission electron diffraction pattern, which clearly show crystallinity of silicon nanocrystals.
- the high-resolution TEM was JEOL Electron Microscopy 2010 that operates at 200 kV.
- Silicon nanocrystals had an average size of about 4.6 nm and were scattered at a density of about 6.0 ⁇ 10 11 /cm 2 . From the inserted high-resolution TEM picture, it can be seen that silicon nanocrystals were clearly distinguished from a silicon nitride matrix. From the picture of the transmission electron diffraction pattern, the silicon nanocrystals were more clearly distinguished from the silicon nitride matrix. Accordingly, it can be observed that the silicon nitride layer according to the present embodiment has silicon nanocrystals grown in the silicon nitride matrix.
- FIG. 4 is a graph showing PL peak energies with respect to various sizes of silicon nanocrystals that are obtained by the method of FIG. 1 .
- FIG. 4 shows a blue shift in PL peak energy with a reduction in the size of nanocrystals.
- E bulk denotes bulk crystal silicon bandgap
- d denotes dot size
- C denotes a confinement parameter
- the fitting confinement parameter of 11.8 is much higher than that (2.4) of amorphous silicon quantum dots.
- a confinement parameter obtained by theoretical calculation is variable depending on a calculation method and ranges from about 7 to 13.
- fitting parameters coincide with effective mass approximation. Accordingly, PL results, along with high-resolution transmission microscope measurements, demonstrate a quantum confinement effect that arises in silicon nanocrystals.
- FIG. 5 is a graph showing PL spectrums that are obtained from silicon nanocrystals with various sizes at a room temperature.
- PL emission can be tuned in the wavelength range of 410 to 910 nm by controlling the size of silicon nanocrystals.
- emission color can be changed by controlling the size of silicon nanocrystals.
- the sizes of silicon nanocrystals corresponding to emission colors red (R), green (G), and blue (B) are 4.6, 3.1, and 2.7 nm, respectively. It is assumed that an increase in the flow rate of nitrogen gas or a reduction in the flow rate of silane gas leads to a rise in the number of dangling bonds of silicon atoms, thus resulting in an increase in nucleation sites.
- silicon clusters are changed to silicon nanocrystals due to hydrogen radical diffusion through amorphous silicon nano-clusters that are hydrogenated at a substrate temperature of 250° C.
- growth rate ⁇ 1.7 nm/min
- the growth rate >2.3 nm/min
- the transition to silicon nanocrystals may be made due to hydrogen diffusion after the amorphous silicon quantum dots are formed.
- FIG. 6 is a cross sectional view of a silicon light emitting device according to another exemplary embodiment of the present invention.
- a silicon emission layer 110 is formed on a predetermined region of a substrate 100 , a p-type electrode 120 is formed on another predetermined region of the substrate 100 where the silicon emission layer 110 is not formed.
- the substrate 100 is a p-type silicon substrate.
- the silicon emission layer 110 may be formed using the above-described silicon nitride layer for the light emitting device according to the first embodiment and includes a silicon nitride matrix and silicon nanocrystals formed in the silicon nitride matrix.
- an n-type electrode 140 is formed on a predetermined region of the silicon emission layer 110 .
- An n-type doping process may be performed using, for example, a P-based dopant, and a p-type doping process may be performed using, for example, a B-based dopant.
- the p-type electrode 130 and the n-type electrode 140 may be formed of Ni/Au and Ti/Al, respectively.
- the p-type electrode 130 and the n-type electrode 140 may exchange positions.
- a p-type semiconductor/insulator/n-type semiconductor (PIN) structure is illustrated as an example of a silicon light emitting device.
- the silicon light emitting device includes the silicon light emitting layer, it may have other various structures.
- the silicon light emitting device according to the present invention can have a wide variety of structures including a silicon nitride layer containing silicon nanocrystal structure and are not restricted to the above-described structure.
- the silicon light emitting device of the present invention can have a metal/insulator/semiconductor (MIS) structure or a conductive polymer/insulator/semiconductor junction structure.
- MIS metal/insulator/semiconductor
- the insulator refers to a silicon nitride layer according to the present invention.
- a silicon light emitting device including a silicon nitride layer according to the present invention can be manufactured without making any change to conventional silicon semiconductor techniques. Also, the silicon light emitting device of the present invention can obtain good luminous efficiency and emit light not only in the visible region including the short-wavelength blue/violet region but also in the near infrared region.
- the present invention does not make use of a conventional long-time high-temperature annealing process to form nanocrystals, but silicon nanocrystals are directly formed during growth of a silicon nitride layer. Therefore, problems caused by the high-temperature annealing process can be solved and process time can be shortened, thus resulting in formation of good, uniform silicon nanocrystals.
- the light emitting device including the silicon nitride layer according to the present invention employs a silicon nitride matrix that facilitates injection of carriers, there is a better chance of application of the light emitting device.
Abstract
Provided are a silicon nitride layer for a light emitting device, light emitting device using the same, and method of forming the silicon nitride layer for the light emitting device. The silicon nitride layer of the light emitting device includes a silicon nitride matrix and silicon nanocrystals formed in the silicon nitride matrix. A light emitting device manufactured by the silicon nitride layer has a good luminous efficiency and emits light in the visible region including the short-wavelength blue/violet region and the near infrared region.
Description
- 1. Field of the Invention
- The present invention relates to a silicon nitride layer for a light emitting device, light emitting device using the same, and method of forming the silicon nitride layer for the light emitting device, and more specifically, to a silicon nitride layer for a light emitting device, which includes a silicon nitride matrix and silicon nanocrystals formed in the silicon nitride matrix.
- 2. Description of Related Art
- In order to obtain a light emitting effect using silicon as an indirect bandgap semiconductor, it is necessary to provoke a quantum confinement effect due to fine structures (Refer to Light Emission in Silicon: From Physics to Devices, edited by D. J. Lockwood (Academic Press, San Diego, 1998), Chap. 1).
- The quantum confinement effect involves forming fine crystalline or amorphous silicon structures having a size of several nm or less (e.g., quantum wells, quantum wires, and quantum dots) using a matrix or barrier formed of a material that has a larger energy gap than bulk silicon. In this case, as the fine structures become smaller, the wavelength of light they emit becomes shorter. Among the examples of the fine structures, the quantum dot nanostructures exhibit a particularly high quantum yield.
- In recent years, research for applications of silicon fine structures formed in a silicon oxide matrix to a silicon light emitting device has progressed (Refer to N. Lalic and J. Linnros, J. Lumin. 80, 263 (1999), S.-H. Choi and R. G. Elliman, Appl. Phys. Lett. 75, 968 (1999)). However, the silicon fine structures were obtained by annealing Si-rich silicon oxide at a high temperature of about 1100 ? or higher for about 30 minutes to 2 hours.
- The above-described method involves additional processes and takes much time. Also, problems caused by the high-temperature annealing process remain unsolved. For these reasons, it is difficult to directly apply conventional semiconductor processes to the method.
- Moreover, in manufacturing a light emitting device using silicon oxide, it is required to form a matrix or barrier to a very small thickness because of a high application voltage.
- The present invention is directed to a silicon nitride layer for a light emitting device, which is obtained in relatively simple manners. For example, silicon nanocrystals are directly grown during formation of the silicon nitride layer.
- Also, the present invention is directed to a method of directly forming good, uniform silicon nanocrystals at a low temperature.
- One aspect of the present invention is to provide a silicon nitride layer for a light emitting device, which includes a silicon nitride matrix; and silicon nanocrystals formed in the silicon nitride matrix.
- Here, a silicon nanocrystal structure generically refers to a quantum dot nanostructure in which nano-sized crystalline silicon particles are scattered in a matrix.
- Typically, the silicon nanocrystal structure has a spherical shape but not limited thereto.
- In order to apply the silicon nanocrystal structure to the light emitting device, the silicon nanocrystals have a diameter of about 2 to 7 nm and a density of 1011 to 1013/cm2.
- In the present invention, the thickness of the silicon nitride layer including quantum dot nanostructures may be changed according to the type of device or desired emission extent but may be about 3 to 100 nm.
- Another aspect of the present invention is to provide a method of forming a silicon nitride layer for a light emitting device. The method includes loading a substrate for forming the silicon nitride layer into a chamber of a layer forming system; and growing a silicon nitride matrix and simultaneously forming silicon nanocrystals in the silicon nitride matrix using a silicon source gas and a nitrogen source gas.
- Here, the layer forming system should not be construed as limited to the embodiments set forth herein and refers to any system used for forming a layer as known in the art. Preferably, the layer forming system refers to a system that makes use of a chemical vapor deposition (CVD) process, a molecular beam epitaxy (MBE) process, or an ion implantation process. The MBE process employs a lump of solid silicon as a silicon source for silicon nitride, the ion implantation process employs proton or electron silicon particles as the silicon source, and the CVD process employs a silicon source gas, such as SiCl4, SiHCl3, SiH2Cl2, SiH4, and Si2H6 as the silicon source. In this case, the CVD process may be, but not limited to, an atmospheric pressure CVD (APCVD) process, a low-pressure CVD (LPCVD) process, a plasma enhanced CVD (PECVD) process, a metal organic CVD (MOCVD) process, or a thermal CVD process. Preferably, the CVD process is a PECVD process, which is in common use during manufacture of silicon devices.
- Meanwhile, silane gas may be used as a silicon source for silicon nitride, and a gas containing nitrogen atoms, for example, nitrogen gas or ammonia gas, may be mainly used as a nitrogen source for the silicon nitride.
- The silicon source gas and the nitrogen source gas may be supplied to the layer forming system in a ratio of 1:1000 to 1:4000 so that the silicon nitride layer for the light emitting device can be grown at a growth rate of 1.3 to 1.8 nm/min. Preferably, the silicon source gas and ammonia gas may be supplied to a thin-film growth system in a ratio of 1:1 to 1:5 so that the silicon nitride layer for the light emitting device can be grown at a growth rate of 5 to 10 nm/min.
- An MBE process uses solid silicon, an ion implantation process uses Si particles, and a CVD or PECVD process uses SiCl4, SiHCl3, SiH2Cl2, SiH4, or Si2H6 as a silicon source. Meanwhile, it is desirable to use a source gas containing H that forms silicon crystals.
- Another aspect of the present invention is to provide a silicon light emitting device, which is manufactured using a silicon nitride layer including a silicon nitride matrix and silicon nanocrystals formed in the silicon nitride matrix. Meanwhile, during the formation of silicon nitride, an emission wavelength can be appropriately controlled to a desired wavelength according to the flow rates of a silicon source (e.g., silane) and a nitrogen source (e.g., nitrogen or ammonia). The silicon light emitting device may be, for example, a p-type semiconductor/insulator/n-type semiconductor (PIN) structure, a metal/insulator/semiconductor (MIS) structure, or a conductive polymer/insulator/semiconductor junction structure. In this case, the insulator refers to a silicon nitride layer according to the present invention.
- The above and other features and advantages of the present invention will become more apparent to those of ordinary skill in the art by describing in detail exemplary embodiments thereof with reference to the attached drawings in which:
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FIG. 1 is a cross-sectional view illustrating a process of forming a silicon nitride layer for a light emitting device according to an exemplary embodiment of the present invention; -
FIG. 2 is a graph showing emission spectrums with respect to the flow rates of silane (SiH4) gas and nitrogen (N2) gas of an example of the silicon nitride layer ofFIG. 1 , which has silicon nanocrystal structures; -
FIG. 3 is transmission electron microscopy (TEM) pictures of an example of the silicon nitride layer ofFIG. 1 , which has silicon nanocrystal structures; -
FIG. 4 is a graph showing photoluminescence (PL) peak energies with respect to various sizes of silicon nanocrystals that are obtained by the method ofFIG. 1 ; -
FIG. 5 is a graph showing PL spectrums that are obtained from silicon nanocrystals with various sizes at a room temperature; and -
FIG. 6 is a cross-sectional view of a silicon light emitting device according to another exemplary embodiment of the present invention. - The present invention will now be described more fully hereinafter with reference to the accompanying drawings, in which exemplary embodiments of the invention are shown. This invention may, however, be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure is thorough and complete and fully conveys the scope of the invention to those skilled in the art.
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FIG. 1 is a cross-sectional view illustrating a process of forming a silicon nitride layer for a light emitting device according to an exemplary embodiment of the present invention. - Referring to
FIG. 1 , asilicon nitride matrix 20 is formed on asubstrate 10, andsilicon nanocrystals 30 are formed in thesilicon nitride matrix 20. - The
substrate 10 may be, but not limited thereto, a semiconductor substrate such as a silicon (Si) substrate and a germanium (Ge) substrate, a compound semiconductor substrate such as a SiGe substrate, a SiC substrate, a GaAs substrate, and an InGaAs substrate, or an insulating substrate such as a glass substrate, a sapphire substrate, a quartz substrate, and a resin substrate. However, when a silicon nitride layer is formed on a silicon substrate, the silicon substrate has better lattice match. Meanwhile, good lattice match can also be obtained when an additional silicon layer is formed on a substrate other than a silicon substrate and a silicon nitride layer is formed thereon. Nevertheless, use of a silicon substrate can reduce the cost of production. - In the present embodiment, silicon nanocrystals, which are scattered in a silicon nitride matrix, were grown on a p-type (100) silicon substrate using a PECVD process. In this case, silane gas, which is diluted with Ar gas at 10%, and nitrogen gas having a degree of purity of 99.999% were supplied to a top surface of the p-type silicon substrate. Also, the silicon nanocrystals were grown under a pressure of 0.5 torr and at a constant plasma power of 5 W. The growth temperature was changed from 100 ? to 300 ? and the flow rates of silane gas and nitrogen gas were controlled from 4 to 12 sccm and from 500 to 1500 sccm, respectively. The silicon nanocrystals were grown at a growth rate of 1.3 to 1.8 nm/min according to the flow rates of silane gas and nitrogen gas.
- Even though the above-described manufacturing process was not followed by a post-processing process, such as an annealing process, the resultant silicon nanocrystals could obtain high luminous efficiency. Also, by varying the size of silicon nanocrystals with the flow rates of silane gas and nitrogen gas, it is possible to tune the color of light emitted by the silicon nanocrystals.
- When a silicon oxide layer is used for silicon nanocrystals, a high-temperature annealing process should be necessarily undergone for a long time. However, according to the present embodiment, while the silicon nitride layer is being grown, silicon nanocrystals can be directly formed. Therefore, problems caused by the high-temperature annealing process can be solved and process time can be shortened, thus resulting in formation of good, uniform silicon nanocrystal structure.
- In forming silicon nanocrystal structure in a silicon nitride matrix according to the present embodiment, the following matters should be importantly considered.
- First, a silicon nitride layer including silicon nanocrystal structure should be grown at a low growth rate. When the growth rate is too high, nanocrystals are not formed so that a silicon nitride thin layer generally becomes amorphous. As a result, a proper emission material cannot be obtained. Accordingly, in order to make the growth rate slow, a silicon source, such as silane gas, may be injected into a reaction system at a relatively low flow rate of about 1 to 50 sccm when it is diluted in inert gas at 0 to 50%, and nitrogen gas may be injected at a flow rate of 500 sccm or higher. Also, the silicon nitride layer may be grown at a temperature of about 100° C. to 300° C. In addition, by lowering a plasma power to 5 W or less, the concentration of reaction groups generated by plasma is reduced, thus the growth rate of the silicon nitride layer should be controlled to 1.3 to 1.8 nm/min.
- Second, when ammonia gas is used as a nitrogen source, the ammonia gas is separated easier than nitrogen gas from reaction groups under the same low plasma power, so that growth rate becomes faster. In this case, the silicon nitride layer including silicon nanocrystal structure is grown three to five times faster than when the nitrogen gas is used.
- Third, silicon nanocrystals should be formed without injecting any oxygen gas or oxide. If any oxygen gas or oxide is injected, oxygen-associated defects may be caused, compounds may provoke emission, or the oxygen gas or oxide may be an obstacle to emission. Accordingly, any possible injection of oxide should be cut off in order to obtain only desired emission.
-
FIG. 2 is a graph showing emission spectrums with respect to the flow rates of silane (SiH4) gas and nitrogen (N2) gas of a silicon nitride layer having silicon nanocrystal structure, which is grown at a temperature of 250 ? according to the present embodiment. - Referring to
FIG. 2 , a reduction in the flow rate of silane gas or an increase in the flow rate of the nitrogen gas leads to a reduction in the size of silicon nanocrystals. Accordingly, the silicon nanocrystals can emit short-wavelength light in a blue region owing to a quantum confinement effect. -
FIG. 3 is transmission electron microscopy (TEM) pictures of an example of the silicon nitride layer ofFIG. 1 , which has silicon nanocrystal structure. The pictures are a TEM picture and a picture of a transmission electron diffraction pattern, which clearly show crystallinity of silicon nanocrystals. The high-resolution TEM was JEOL Electron Microscopy 2010 that operates at 200 kV. - Silicon nanocrystals had an average size of about 4.6 nm and were scattered at a density of about 6.0×1011/cm2. From the inserted high-resolution TEM picture, it can be seen that silicon nanocrystals were clearly distinguished from a silicon nitride matrix. From the picture of the transmission electron diffraction pattern, the silicon nanocrystals were more clearly distinguished from the silicon nitride matrix. Accordingly, it can be observed that the silicon nitride layer according to the present embodiment has silicon nanocrystals grown in the silicon nitride matrix.
- Meanwhile, as quantum structures are reduced, the bandgap of a material increases owing to a quantum confinement effect. This quantum confinement effect leads to a blue shift in an emission spectrum. In order to demonstrate the quantum confinement effect, the photoluminescence (PL) of silicon nanocrystals having various dot-sizes was measured. The PL peak energies with respect to various sizes of silicon nanocrystals, which were measured using a high-resolution transmission microscope, are illustrated in
FIG. 4 .FIG. 4 is a graph showing PL peak energies with respect to various sizes of silicon nanocrystals that are obtained by the method ofFIG. 1 . InFIG. 4 , a solid line was calculated in the effective-mass theory of silicon nanocrystals due to 3-dimensional confinement, and a dotted line was calculated in the effective-mass theory of amorphous silicon quantum dot structures (Refer to N.-M. Park, C.-J. Choi, T. Y. Seong, and S.-J. Park, Phys. Rev. Lett. 86, 1355 (2001)). - When the size of crystals is reduced from 6.1 nm to 2.6 nm, PL peak energy is shifted from 1.46 eV (850 nm) to 3.02 eV (410 nm), that is, shifted to a higher wavelength.
FIG. 4 shows a blue shift in PL peak energy with a reduction in the size of nanocrystals. - Supposing that there is a finite potential barrier, the silicon energy gap E of 3-dimensionally confined silicon nanocrystals can be expressed by the effective mass theory as follows:
E(eV)=−E bulk +C/d 2 - wherein Ebulk denotes bulk crystal silicon bandgap, d denotes dot size, and C denotes a confinement parameter.
- For data shown in
FIG. 4 , the most appropriate fitting equation is E(eV)=1.16+11.8/d2, wherein the fitted bulk bandgap of 1.16 consists with a known value of bulk crystal silicon bandgap and differs greatly from a bandgap value (1.5 to 1.6 eV) of amorphous silicon. This result demonstrates that silicon nano-clusters have crystal structures. The fitting confinement parameter of 11.8 is much higher than that (2.4) of amorphous silicon quantum dots. As described above, a confinement parameter obtained by theoretical calculation is variable depending on a calculation method and ranges from about 7 to 13. Here, fitting parameters coincide with effective mass approximation. Accordingly, PL results, along with high-resolution transmission microscope measurements, demonstrate a quantum confinement effect that arises in silicon nanocrystals. -
FIG. 5 is a graph showing PL spectrums that are obtained from silicon nanocrystals with various sizes at a room temperature. PL emission can be tuned in the wavelength range of 410 to 910 nm by controlling the size of silicon nanocrystals. As a result, emission color can be changed by controlling the size of silicon nanocrystals. For example, the sizes of silicon nanocrystals corresponding to emission colors red (R), green (G), and blue (B) are 4.6, 3.1, and 2.7 nm, respectively. It is assumed that an increase in the flow rate of nitrogen gas or a reduction in the flow rate of silane gas leads to a rise in the number of dangling bonds of silicon atoms, thus resulting in an increase in nucleation sites. Accordingly, as the total number of silicon dangling bonds increases, the number of silicon clusters increases, thus the size of silicon clusters decreases. If growth rate is low enough to make the transition from an amorphous phase to a crystalline phase, silicon clusters are changed to silicon nanocrystals due to hydrogen radical diffusion through amorphous silicon nano-clusters that are hydrogenated at a substrate temperature of 250° C. In this case, growth rate (<1.7 nm/min) is sufficiently lower than the growth rate (>2.3 nm/min) of amorphous silicon quantum dots. Therefore, the transition to silicon nanocrystals may be made due to hydrogen diffusion after the amorphous silicon quantum dots are formed. -
FIG. 6 is a cross sectional view of a silicon light emitting device according to another exemplary embodiment of the present invention. - Referring to
FIG. 6 , asilicon emission layer 110 is formed on a predetermined region of asubstrate 100, a p-type electrode 120 is formed on another predetermined region of thesubstrate 100 where thesilicon emission layer 110 is not formed. Preferably, thesubstrate 100 is a p-type silicon substrate. - The
silicon emission layer 110 may be formed using the above-described silicon nitride layer for the light emitting device according to the first embodiment and includes a silicon nitride matrix and silicon nanocrystals formed in the silicon nitride matrix. - Meanwhile, an n-type electrode 140 is formed on a predetermined region of the
silicon emission layer 110. An n-type doping process may be performed using, for example, a P-based dopant, and a p-type doping process may be performed using, for example, a B-based dopant. - Also, the p-
type electrode 130 and the n-type electrode 140 may be formed of Ni/Au and Ti/Al, respectively. The p-type electrode 130 and the n-type electrode 140 may exchange positions. - In the present embodiment, a p-type semiconductor/insulator/n-type semiconductor (PIN) structure is illustrated as an example of a silicon light emitting device. However, as long as the silicon light emitting device includes the silicon light emitting layer, it may have other various structures. In other words, it can be understood that the silicon light emitting device according to the present invention can have a wide variety of structures including a silicon nitride layer containing silicon nanocrystal structure and are not restricted to the above-described structure. In addition to the PIN structure, the silicon light emitting device of the present invention can have a metal/insulator/semiconductor (MIS) structure or a conductive polymer/insulator/semiconductor junction structure. Here, the insulator refers to a silicon nitride layer according to the present invention.
- As described above, a silicon light emitting device including a silicon nitride layer according to the present invention can be manufactured without making any change to conventional silicon semiconductor techniques. Also, the silicon light emitting device of the present invention can obtain good luminous efficiency and emit light not only in the visible region including the short-wavelength blue/violet region but also in the near infrared region.
- Furthermore, the present invention does not make use of a conventional long-time high-temperature annealing process to form nanocrystals, but silicon nanocrystals are directly formed during growth of a silicon nitride layer. Therefore, problems caused by the high-temperature annealing process can be solved and process time can be shortened, thus resulting in formation of good, uniform silicon nanocrystals.
- In addition, because the light emitting device including the silicon nitride layer according to the present invention employs a silicon nitride matrix that facilitates injection of carriers, there is a better chance of application of the light emitting device.
- In the drawings and specification, there have been disclosed typical preferred embodiments of the invention and, although specific terms are employed, they are used in a generic and descriptive sense only and not for purposes of limitation. As for the scope of the invention, it is to be set forth in the following claims. Therefore, it will be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from the spirit and scope of the present invention as defined by the following claims.
Claims (13)
1. A silicon nitride layer for a light emitting device comprising:
a silicon nitride matrix; and
silicon nanocrystals formed in the silicon nitride matrix.
2. The silicon nitride layer according to claim 1 , wherein the silicon nanocrystal has a diameter of about 2 to 7 nm and a density of 1011 to 1013/cm2.
3. The silicon nitride layer according to claim 1 , wherein the silicon nitride layer has a thickness of about 3 to 100 nm.
4. A silicon light emitting device comprising:
an emission layer formed of a silicon nitride layer,
wherein the silicon nitride layer includes a silicon nitride matrix and silicon nanocrystals formed in the silicon nitride matrix.
5. The silicon light emitting device according to claim 4 , wherein the silicon nanocrystal has a diameter of about 2 to 7 nm and a density of 1011 to 1013/cm2.
6. The silicon light emitting device according to claim 4 , wherein the silicon nitride layer has a thickness of about 3 to 100 nm.
7. A method of forming a silicon nitride layer for a light emitting device, the method comprising:
loading a substrate into a chamber of a thin-film growth system; and
growing a silicon nitride matrix and simultaneously forming silicon nanocrystals in the silicon nitride matrix using a silicon source gas and a nitrogen source gas.
8. The method according to claim 7 , wherein the silicon nitride layer for the light emitting device is grown at a growth rate of 1.3 to 1.8 nm/min by supplying the silicon source gas and the nitrogen source gas to the chamber in a ratio of 1:1000 to 1:4000.
9. The method according to claim 7 , wherein the silicon nitride layer for the light emitting device is grown on the substrate at a growth rate of 5 to 10 nm/min by supplying the silicon source gas and an ammonia source gas to the chamber in a ratio of 1:1 to 1:5.
10. The method according to claim 7 , wherein silane gas is used as the silicon source gas, and one of nitrogen gas and ammonia gas is used as the nitrogen source gas.
11. The method according to claim 7 , wherein the silicon nitride layer is formed by a chemical vapor deposition (CVD) process, a molecular beam epitaxy (MBE) process, or an ion implantation process.
12. The method according to claim 7 , wherein the silicon nitride layer is formed by a plasma enhanced chemical vapor deposition (PECVD) process.
13. The method according to claim 7 , wherein the silicon source gas is diluted with an inert gas at less than 50%.
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US8093604B2 (en) * | 2005-12-28 | 2012-01-10 | Group Iv Semiconductor, Inc. | Engineered structure for solid-state light emitters |
KR100723882B1 (en) * | 2006-06-15 | 2007-05-31 | 한국전자통신연구원 | Method for fabricating silicon nanowire using silicon nanodot thin film |
JP5343419B2 (en) * | 2008-06-27 | 2013-11-13 | 住友電気工業株式会社 | Deposition method |
KR101069539B1 (en) | 2009-08-28 | 2011-10-05 | 서울시립대학교 산학협력단 | Light emitting device and method of manufacturing the same |
WO2011106860A1 (en) | 2010-03-01 | 2011-09-09 | Group Iv Semiconductor, Inc. | Deposition of thin film dielectrics and light emitting nano-layer structures |
KR102265690B1 (en) * | 2015-02-06 | 2021-06-17 | 한국전자통신연구원 | Silicon nanocrystal light emitting diode and fabricating method of the same |
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