US20080022525A1 - Inkjet printhead and method of manufacturing the same - Google Patents
Inkjet printhead and method of manufacturing the same Download PDFInfo
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- US20080022525A1 US20080022525A1 US11/905,016 US90501607A US2008022525A1 US 20080022525 A1 US20080022525 A1 US 20080022525A1 US 90501607 A US90501607 A US 90501607A US 2008022525 A1 US2008022525 A1 US 2008022525A1
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- 239000004065 semiconductor Substances 0.000 claims abstract description 5
- 239000010410 layer Substances 0.000 claims description 140
- 239000011229 interlayer Substances 0.000 claims description 55
- 238000000034 method Methods 0.000 claims description 23
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- 229910052681 coesite Inorganic materials 0.000 claims description 6
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- 235000012239 silicon dioxide Nutrition 0.000 claims description 6
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- 229910052796 boron Inorganic materials 0.000 claims description 3
- BHEPBYXIRTUNPN-UHFFFAOYSA-N hydridophosphorus(.) (triplet) Chemical compound [PH] BHEPBYXIRTUNPN-UHFFFAOYSA-N 0.000 claims description 3
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Images
Classifications
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- A—HUMAN NECESSITIES
- A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
- A61H—PHYSICAL THERAPY APPARATUS, e.g. DEVICES FOR LOCATING OR STIMULATING REFLEX POINTS IN THE BODY; ARTIFICIAL RESPIRATION; MASSAGE; BATHING DEVICES FOR SPECIAL THERAPEUTIC OR HYGIENIC PURPOSES OR SPECIFIC PARTS OF THE BODY
- A61H39/00—Devices for locating or stimulating specific reflex points of the body for physical therapy, e.g. acupuncture
- A61H39/04—Devices for pressing such points, e.g. Shiatsu or Acupressure
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B41—PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
- B41J—TYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
- B41J2/00—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
- B41J2/005—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by bringing liquid or particles selectively into contact with a printing material
- B41J2/01—Ink jet
- B41J2/135—Nozzles
- B41J2/14—Structure thereof only for on-demand ink jet heads
- B41J2/14016—Structure of bubble jet print heads
- B41J2/14088—Structure of heating means
- B41J2/14112—Resistive element
- B41J2/14129—Layer structure
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B41—PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
- B41J—TYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
- B41J2/00—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
- B41J2/005—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by bringing liquid or particles selectively into contact with a printing material
- B41J2/01—Ink jet
- B41J2/135—Nozzles
- B41J2/14—Structure thereof only for on-demand ink jet heads
- B41J2/14016—Structure of bubble jet print heads
- B41J2/14072—Electrical connections, e.g. details on electrodes, connecting the chip to the outside...
-
- A—HUMAN NECESSITIES
- A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
- A61H—PHYSICAL THERAPY APPARATUS, e.g. DEVICES FOR LOCATING OR STIMULATING REFLEX POINTS IN THE BODY; ARTIFICIAL RESPIRATION; MASSAGE; BATHING DEVICES FOR SPECIAL THERAPEUTIC OR HYGIENIC PURPOSES OR SPECIFIC PARTS OF THE BODY
- A61H2201/00—Characteristics of apparatus not provided for in the preceding codes
- A61H2201/01—Constructive details
- A61H2201/0157—Constructive details portable
-
- A—HUMAN NECESSITIES
- A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
- A61H—PHYSICAL THERAPY APPARATUS, e.g. DEVICES FOR LOCATING OR STIMULATING REFLEX POINTS IN THE BODY; ARTIFICIAL RESPIRATION; MASSAGE; BATHING DEVICES FOR SPECIAL THERAPEUTIC OR HYGIENIC PURPOSES OR SPECIFIC PARTS OF THE BODY
- A61H2201/00—Characteristics of apparatus not provided for in the preceding codes
- A61H2201/16—Physical interface with patient
- A61H2201/1683—Surface of interface
- A61H2201/169—Physical characteristics of the surface, e.g. material, relief, texture or indicia
- A61H2201/1695—Enhanced pressure effect, e.g. substantially sharp projections, needles or pyramids
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B41—PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
- B41J—TYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
- B41J2202/00—Embodiments of or processes related to ink-jet or thermal heads
- B41J2202/01—Embodiments of or processes related to ink-jet heads
- B41J2202/13—Heads having an integrated circuit
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49401—Fluid pattern dispersing device making, e.g., ink jet
Definitions
- the present invention relates to an inkjet printhead and a method of manufacturing the same. More particularly, the present invention relates to an inkjet printhead and a method of manufacturing the same by which a size of a chip of a printhead can be minimized and a transmission speed of a circuit signal can be increased.
- An inkjet printhead is a device that ejects fine droplets of an ink having predetermined colors onto desired positions of a recording medium in order to print an image.
- Inkjet printheads can be classified into two types according to an ink droplet ejecting mechanism.
- One of the types is a thermally driven inkjet printhead that generates bubbles in the ink using a thermal source and ejects ink droplets when the bubbles expand.
- the other type is a piezoelectrically driven inkjet printhead that utilizes the deformation of a piezoelectric material to eject ink droplets.
- the ink droplet ejecting mechanism of the thermally driven inkjet printhead will now be described in detail.
- a pulse of electric current flows through a heater formed of a resistive heating material
- the heater generates heat which instantaneously raises the temperature of ink adjacent to the heater up to 300° C. Accordingly, the ink boils and generates bubbles which expand to press the ink filling an ink chamber.
- Ink adjacent to a nozzle is ejected from the ink chamber through the nozzle as a droplet.
- the thermally driven inkjet printhead can be divided into a top-shooting type, a side-shooting type, and a back-shooting type according to the direction of growth of the bubble and the direction of ejection of the ink droplet.
- the top-shooting type of printhead the direction of growth of the bubble and the direction of ejection of the ink droplet are the same.
- the side-shooting type of printhead the direction of growth of the bubble and the direction of ejection of the ink droplet are perpendicular to each other.
- the back-shooting type of printhead the direction of growth of the bubble and the direction of ejection of the ink droplet are opposite to each other.
- the thermally driven inkjet printhead should satisfy the following conditions.
- DPI dots per inch
- FIG. 1 is a plan view showing a conventional thermally driven inkjet printhead
- FIG. 2 shows a driving circuit of the printhead.
- the thermally driven inkjet printhead includes a plurality of heaters 60 for heating ink to generate bubbles, a heater driving circuit 41 that drives the heaters 60 , a digital logic circuit 31 for addressing the heaters 60 , and connection pads 15 .
- the heater driving circuit 41 includes a plurality of power field effect transistors (FETs) 40 formed to correspond to each of the heaters 60 , and interconnecting layers that are electrically connected to the power FETs 40 .
- the digital logic circuit 31 includes a plurality of complementary metal-oxide semiconductor (CMOS) FETs and interconnecting layers connected to the CMOS FETs.
- CMOS complementary metal-oxide semiconductor
- the heaters 60 are arranged in a center portion of the printhead in two rows, the heater driving circuit 41 is disposed around the heaters 60 , and address lines 35 that supply signals to gates of the power FETs 40 are formed at an outer portion of the heater driving circuit 41 .
- the digital logic circuit 31 is disposed near the connection pads 15 .
- FIG. 3 shows a vertical structure of the conventional thermally driven inkjet printhead.
- MOS FETs 30 and 40 that address the heaters 60 for heating the ink and apply electric current to the heaters 60 are formed on a substrate 10 .
- the MOS FETs 30 and 40 include a CMOS FET 30 for forming the digital logic circuit 31 (see FIG. 1 ) and a power FET 40 for forming the heater driving circuit 41 (see FIG. 1 ).
- the CMOS FET 30 includes a P-channel MOS (PMOS) FET 30 a and an N-channel MOS (NMOS) FET 30 b
- the power FET 40 preferably includes an N-MOS FET.
- reference numeral 20 denotes a field oxide film
- 21 denotes a gate oxide film
- 23 denotes a gate.
- first interconnecting layer 51 and a second interconnecting layer 53 which are made of a metal having a high ejection conductivity, are sequentially stacked on the upper portion of the MOS FETs 30 and 40 , thereby forming the digital logic circuit 31 and the heater driving circuit 41 .
- the first interconnecting layer 51 is connected to source and drain regions of the FET through a contact hole 27
- the second interconnecting layer 53 is electrically connected to the first interconnecting layer 51 through a via hole (not shown).
- references numerals 22 and 24 respectively denote first and second inter-layer dielectrics.
- the heater 60 for heating the ink is formed between the second interconnecting layer 53 and the second inter-layer dielectric 24 on the upper portion of the power FET 40 , and a passivation layer 28 is formed on the heater 60 and the second interconnecting layer 53 .
- the passivation layer 28 insulates the heater 60 from the ink, and prevents the heater 60 from being corroded by the ink.
- a chamber layer 70 that defines an ink chamber 75 which is filled with the ink, and a nozzle layer 80 , on which a nozzle 85 for ejecting the ink is formed, are sequentially formed on the passivation layer 28 .
- the two interconnecting layers 51 and 53 are sequentially stacked on the upper portion of the MOS FET 30 and 40 to form the digital logic circuit 31 and the heater driving circuit 41 .
- the address line 35 that is an output line of the digital logic circuit 31 is located at an outer portion of the heater driving circuit 41 . Consequently, the printhead chip is quite large and expensive to manufacture. In addition, it is difficult to arrange additional wires. Moreover, since the lengths of the wires increase, the circuit signal transmission speed is lowered.
- the present invention provides an inkjet printhead and a method of manufacturing the same, by which a printhead chip size can be minimized and a circuit signal transmission speed can be increased using three metal interconnecting layers.
- an inkjet printhead including a substrate.
- the substrate comprises a plurality of heaters formed on an upper portion of the substrate for heating ink to generate bubbles, a plurality of metal-oxide semiconductor (MOS) field effect transistors (FETs) formed on the substrate to address the heaters and apply electric current to the heaters, a first interconnecting layer, a second interconnecting layer, and a third interconnecting layer that are sequentially formed on the MOS FETs and are electrically connected to each other to apply signals to the MOS FETs, a chamber layer that defines an ink chamber, which is filled with the ink that will be ejected, on an upper portion of the heaters, and a nozzle layer having a nozzle, through which the ink is ejected, on an upper portion of the chamber layer.
- MOS metal-oxide semiconductor
- the heaters may be formed on a lower surface of the third interconnecting layer, that is, a top interconnecting layer.
- First, second, and third interlayer dielectrics may be formed between the MOS FETs, and the first, the second, and the third interconnecting layers.
- the first, second, and third interlayer dielectrics may comprise SiO2 or boron phosphorous silicate glass.
- the heaters may be formed between the third interconnecting layer and the third interlayer dielectric.
- the heaters may comprise TaAl, TaN, or TiN.
- a passivation layer may be formed on upper surfaces of the heaters and the third interconnecting layer, and the passivation layer may comprise SiN.
- An anti-cavitation layer may be formed on an upper surface of the passivation layer, on which the ink chamber is located, and the anti-cavitation layer may comprise Ta, Ti, or TiN.
- a method of manufacturing an inkjet printhead comprises forming a plurality of MOS FETs on a surface of a substrate; forming first, second, and third interconnecting layers for applying signals to the MOS FETs, and heaters that are driven by the MOS FETs; forming a chamber layer that defines an ink chamber, which is filled with ink that will be ejected, on an upper portion of the heaters; and forming a nozzle layer having a nozzle, through which the ink is ejected, on an upper portion of the chamber layer.
- the first, second, and third interconnecting layers may be sequentially formed on the MOS FETs, and the heaters are formed on a lower surface of the third interconnecting layer.
- the second step of forming further comprises forming a first interlayer dielectric on the MOS FETs, and forming the first interconnecting layer on the first interlayer dielectric, forming a second interlayer dielectric on the first interconnecting layer, and forming the second interconnecting layer on the second interlayer dielectric, forming a third interlayer dielectric on the second interconnecting layer, and forming the heaters on the third interlayer dielectric, and forming the third interconnecting layer on the heaters.
- the first, second, and third interlayer dielectrics may comprise SiO2 or boron phosphorous silicate glass.
- Forming the first interconnecting layer comprises forming a contact hole, which exposes a source and a drain of the MOS FETs, in the first interlayer dielectric, and depositing a metal material on an upper surface of the first interlayer dielectric so as to fill the contact hole, and patterning the deposited material.
- the forming the second interconnecting layer comprises forming a first via hole, which exposes a part of the first interconnecting layer, in the second interlayer dielectric, and depositing a metal material on an upper surface of the second interlayer dielectric so as to fill the first via hole, and patterning the deposited material.
- the forming the heaters comprises forming a second via hole, which exposes a part of the second interconnecting layer, in the third interlayer dielectric, and depositing a resistive heating material on the third interlayer dielectric and the exposed surface of the second interconnecting layer, and patterning the deposited material.
- the resistive heating material comprises TaAl, TaN, or TiN.
- Forming the third interconnecting layer comprises depositing a metal material on the upper surface of the heaters and patterning the deposited material.
- the method further comprises forming a passivation layer on the upper portion of the third interconnecting layer and the heaters, and the passivation layer comprises SiN.
- the method further comprises forming an anti-cavitation layer on an upper surface of the passivation layer, on which the ink chamber is located, and the anti-cavitation layer comprises Ta, Ti, or TiN.
- FIG. 1 is a schematic plan view showing a conventional thermally driven inkjet printhead
- FIG. 2 is a diagram of a driving circuit in the thermally driven inkjet printhead of FIG. 1 ;
- FIG. 3 is a cross-sectional view showing a vertical structure of the inkjet printhead of FIG. 1 ;
- FIG. 4 is a schematic plan view showing an inkjet printhead according to an embodiment of the present invention.
- FIG. 5 is a cross-sectional view showing a vertical structure of the inkjet printhead according to an embodiment of the present invention.
- FIGS. 6A through 6J are views illustrating a method of manufacturing the inkjet printhead according to an embodiment of the present invention.
- FIG. 4 is a schematic plan view showing an inkjet printhead according to an embodiment of the present invention.
- heaters 160 for heating ink to generate bubbles are disposed at a center portion of the inkjet printhead in two rows, and a heater driving circuit 141 for driving the heaters 160 is disposed around the heaters 160 .
- the heater driving circuit 141 includes a plurality of power field effect transistors (FETs) 140 corresponding to each of the heaters 160 and interconnecting layers that are electrically connected to the power FETs 140 .
- Address lines 135 for supplying signals to the gates of the power FETs 140 are disposed on an upper portion of the power FETs 140 . This structure can be realized by using three metal interconnecting layers, as will be described later.
- a digital logic circuit 131 for addressing the heaters 160 is disposed near connection pads 115 .
- the digital logic circuit 131 includes a plurality of complementary metal-oxide semiconductor (CMOS) FETs and interconnecting layers that are electrically connected to the CMOS FETs.
- CMOS complementary metal-oxide semiconductor
- FIG. 5 shows a vertical structure of the inkjet printhead according to an embodiment of the present invention.
- the inkjet printhead includes a substrate 110 , the heaters 160 for heating the ink to generate bubbles, MOS FETs 130 and 140 for addressing the heaters 160 and applying electric current to the heaters 160 , first, second, and third interconnecting layers 151 , 153 , and 155 for applying signals to the MOS FETs 130 and 140 , a chamber layer 170 disposed on an upper portion of the heater 160 for defining an ink chamber 175 , and a nozzle layer 180 disposed on an upper portion of the chamber layer 170 for ejecting ink through a nozzle 185 formed therein.
- a plurality of MOS FETs 130 and 140 are formed on the substrate 110 in order to address the heaters 160 and apply electric current to the heaters 160 .
- the MOS FETs 130 and 140 include a CMOS FET 130 for forming the digital logic circuit 131 (see FIG. 4 ), and a power FET 140 for forming the heater driving circuit 141 (see FIG. 4 ).
- the CMOS FET 130 includes a P-channel MOS (PMOS) FET 130 a and an N-channel MOS (NMOS) FET 130 b
- the power FET 140 includes the NMOS FET.
- reference numeral 120 denotes a field oxide film
- 121 denotes a gate oxide film
- 123 denotes a gate.
- first, second, and third interconnecting layers 151 , 153 , and 155 which are made of a metal having good electrical conductivity, are sequentially stacked to form the digital logic circuit 131 and the heater driving circuit 141 .
- the first, second, and third interconnecting layers 151 , 153 , and 155 are electrically connected to each other to apply the signals to the MOS FETs 130 and 140 . Therefore, the digital logic circuit 131 can be highly integrated by forming the first, second, and third interconnecting layers 151 , 153 , and 155 on the upper portion of the MOS FETs 130 and 140 .
- the third interconnecting layer 155 formed on the upper portion of the power FET 140 is used as the address line 135 that supplies the signals to the gate 123 of the power FET 140 , the size of the printhead chip can be minimized.
- a first interlayer dielectric 122 , a second interlayer dielectric 124 , and a third interlayer dielectric 126 are formed between the MOS FETs 130 and 140 , and the first, second, and third interconnecting layers 151 , 153 , and 155 .
- the interlayer dielectrics 122 , 124 , and 126 can comprise SiO2 or boron phosphorus silicate glass (BPSG).
- BPSG boron phosphorus silicate glass
- a contact hole 127 is formed in the first interlayer dielectric 122 so that the first interconnecting layer 151 can be connected to sources and drains of the MOS FETs 130 and 140 .
- a first via hole (not shown) is formed in the second interlayer dielectric 124 so that the second interconnecting layer 153 can be electrically connected to the first interconnecting layer 151
- a second via hole 137 is formed in the third interlayer dielectric 126 so that the third interconnecting layer 155 can be electrically connected to the second interconnecting layer 153 .
- the heaters 160 for heating the ink to generate bubbles are formed between the third interconnecting layer 155 and the third interlayer dielectric 126 on the upper portion of the power FET 140 .
- the heaters 160 comprise TaAl, TaN, or TiN.
- a passivation layer 128 is formed on the upper portion of the heater 160 and the third interconnecting layer 155 .
- the passivation layer 128 which may comprise SiN, insulates the heater 160 from the ink, and protects the heater 160 from corrosion due to the ink.
- An anti-cavitation layer 129 is formed on an upper portion of the passivation layer 128 , on which the ink chamber 175 is located.
- the anti-cavitation layer 129 protects the heater 160 from shock generated when bubbles burst, and preferably the anti-cavitation layer 129 comprises a material having high chemical and abrasion resistance.
- the anti-cavitation layer 129 can comprise Ta, or Ti and TiN.
- the plurality of MOS FETs 130 and 140 are formed on the substrate 110 for addressing the heaters 160 and applying electric current to the heaters 160 .
- the gate oxide film 121 and the field oxide film 120 are formed on the substrate 110 , then the gate 123 is formed on the gate oxide film 121 and sources and drains are formed on active areas of both sides of the gate 123 to complete the MOS FETs 130 and 140 .
- the MOS FETs 130 and 140 are the CMOS FET 130 for addressing the heaters 160 and the power FET 140 for driving the heaters 160 .
- the CMOS FET 130 includes the PMOS FET 130 a and the NMOS FET 130 b
- the power FET 140 includes the NMOS FET.
- the first interlayer dielectric 122 , the first interconnecting layer 151 , and the second interlayer dielectric 124 are sequentially formed on the MOS FETs 130 and 140 .
- the contact hole 127 is formed in the first interlayer dielectric 122 through the photolithography process and the etching process to open the source and the drain of the MOS FETs 130 and 140 .
- the metal material having a high electric conductivity is deposited on the first interlayer dielectric 122 so as to fill the contact hole 127 , and the deposited material is patterned to form the first interconnecting layer 151 .
- the second interlayer dielectric 124 is formed on the first interconnecting layer 151 .
- the first and the second interlayer dielectrics 120 and 122 can comprise SiO2 or BPSG.
- the second interconnecting layer 153 is formed on the second interlayer dielectric 122 . That is, the first via hole (not shown) that exposes a part of the first interconnecting layer 151 is formed in the second interlayer dielectric 122 through the photolithography process and the etching process. Next, the metal material having a high electric conductivity is deposited on the second interlayer dielectric so that the first via hole scan be filled, and the deposited layer is patterned to form the second interconnecting layer 153 .
- the third interlayer dielectric 126 is formed on the second interconnecting layer 153 , and the second via hole 137 that exposes a part of the second interconnecting layer 153 is formed in the third interlayer dielectric 126 through the photolithography process and the etching process.
- the third interlayer dielectric 126 may comprise SiO2 or BPSG.
- a resistive heating material is deposited on the surface of the third interlayer dielectric 126 and the surface of the second interconnecting layer 153 , which is exposed by the second via hole 137 , and the deposited material is patterned to form the heaters 160 .
- the resistive heating material comprises TaAl, TaN, or TiN.
- the third interconnecting layer 155 is formed on the third interlayer dielectric 126 and the heaters 160 .
- the third interconnecting layer 155 is formed by depositing a metal material having a high electric conductivity on the upper portion of the third interlayer dielectric 126 and the heaters 160 so that the second via hole 137 is filled with the material, and patterning the deposited material. Accordingly, operations of forming the digital logic circuit 1314 ), the heater driving circuit 141 , and the heaters 160 , are complete.
- a passivation layer 128 is formed on the third interconnecting layer 155 and the heaters 160 .
- the passivation layer 128 can be formed by depositing SiN on the third interconnecting layer 155 and the heaters 160 .
- the passivation layer 128 insulates the heaters 160 from the ink, and prevents the heaters 160 from being corroded by the ink.
- the anti-cavitation layer 129 is formed on the passivation layer 129 , in which the ink chamber 175 (see FIG. 61 ) is located.
- the anti-cavitation layer 129 can be formed by depositing Ta or successively depositing Ti and TiN on the passivation layer 128 , and patterning the deposited layers.
- the anti-cavitation layer 129 is formed to protect the heaters 160 from shock generated when the bubbles burst.
- the digital logic circuit and the heater driving circuit are formed using three metal interconnecting layers, thus the size of the printhead chip can be minimized. In addition, since the lengths of the wires are reduced, the circuit signal transmission speed can be improved.
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Abstract
An inkjet printhead and a method of manufacturing the same are provided. The inkjet printhead includes a substrate; a plurality of heaters formed on an upper portion of the substrate for heating ink for generating bubbles; a plurality of metal-oxide semiconductor (MOS) field effect transistors (FETs) formed on the substrate for addressing the heaters and applying electric current to the heaters; first, second, and third interconnecting layers that are sequentially formed on the MOS FETs and electrically connected to each other for applying signals to the MOS FETs; a chamber layer for defining an ink chamber, which is filled with ink for ejection, on an upper portion of the heaters; and a nozzle layer having a nozzle, through which the ink is ejected, on an upper portion of the chamber layer.
Description
- This is a divisional application of application Ser. No. 10/994,477, filed Nov. 23, 2004, which claims the benefit under 35 U.S.C. § 119(a) of Korean Patent Application No. 2004-5635, filed on Jan. 29, 2004, in the Korean Intellectual Property Office, the entire contents of which are incorporated herein by reference.
- 1. Field of the Invention
- The present invention relates to an inkjet printhead and a method of manufacturing the same. More particularly, the present invention relates to an inkjet printhead and a method of manufacturing the same by which a size of a chip of a printhead can be minimized and a transmission speed of a circuit signal can be increased.
- 2. Description of the Related Art
- An inkjet printhead is a device that ejects fine droplets of an ink having predetermined colors onto desired positions of a recording medium in order to print an image. Inkjet printheads can be classified into two types according to an ink droplet ejecting mechanism. One of the types is a thermally driven inkjet printhead that generates bubbles in the ink using a thermal source and ejects ink droplets when the bubbles expand. The other type is a piezoelectrically driven inkjet printhead that utilizes the deformation of a piezoelectric material to eject ink droplets.
- The ink droplet ejecting mechanism of the thermally driven inkjet printhead will now be described in detail. When a pulse of electric current flows through a heater formed of a resistive heating material, the heater generates heat which instantaneously raises the temperature of ink adjacent to the heater up to 300° C. Accordingly, the ink boils and generates bubbles which expand to press the ink filling an ink chamber. Ink adjacent to a nozzle is ejected from the ink chamber through the nozzle as a droplet.
- In addition, the thermally driven inkjet printhead can be divided into a top-shooting type, a side-shooting type, and a back-shooting type according to the direction of growth of the bubble and the direction of ejection of the ink droplet. In the top-shooting type of printhead, the direction of growth of the bubble and the direction of ejection of the ink droplet are the same. In the side-shooting type of printhead, the direction of growth of the bubble and the direction of ejection of the ink droplet are perpendicular to each other. In the back-shooting type of printhead, the direction of growth of the bubble and the direction of ejection of the ink droplet are opposite to each other.
- The thermally driven inkjet printhead should satisfy the following conditions. First, the inkjet printhead should be manufactured by simple processes at low cost, and should be able to be mass-produced. Second, in order to obtain a high definition image, cross talk between adjacent nozzles should be restrained, and an interval between adjacent nozzles should be formed as narrowly as possible. That is, a plurality of nozzles should be arranged very densely in order to increase a value of dots per inch (DPI). Third, in order to perform a high-speed printing operation, an operation of refilling the ink chamber with ink after an ejection should be performed within a short period. This amounts to a requirement that cooling of the heated ink and the heater be performed rapidly, in order to increase the driving frequency.
- Recently, an inkjet printhead having hundreds of nozzles with reduced sizes has been developed for obtaining a clear image quality and high-speed printing.
-
FIG. 1 is a plan view showing a conventional thermally driven inkjet printhead, andFIG. 2 shows a driving circuit of the printhead. - Referring to
FIGS. 1 and 2 , the thermally driven inkjet printhead includes a plurality ofheaters 60 for heating ink to generate bubbles, aheater driving circuit 41 that drives theheaters 60, adigital logic circuit 31 for addressing theheaters 60, andconnection pads 15. Here, theheater driving circuit 41 includes a plurality of power field effect transistors (FETs) 40 formed to correspond to each of theheaters 60, and interconnecting layers that are electrically connected to thepower FETs 40. Thedigital logic circuit 31 includes a plurality of complementary metal-oxide semiconductor (CMOS) FETs and interconnecting layers connected to the CMOS FETs. - The
heaters 60 are arranged in a center portion of the printhead in two rows, theheater driving circuit 41 is disposed around theheaters 60, andaddress lines 35 that supply signals to gates of thepower FETs 40 are formed at an outer portion of theheater driving circuit 41. Thedigital logic circuit 31 is disposed near theconnection pads 15. -
FIG. 3 shows a vertical structure of the conventional thermally driven inkjet printhead. - Referring to
FIG. 3 ,MOS FETs heaters 60 for heating the ink and apply electric current to theheaters 60 are formed on asubstrate 10. The MOSFETs CMOS FET 30 for forming the digital logic circuit 31 (seeFIG. 1 ) and apower FET 40 for forming the heater driving circuit 41 (seeFIG. 1 ). Here, the CMOS FET 30 includes a P-channel MOS (PMOS)FET 30 a and an N-channel MOS (NMOS)FET 30 b, and thepower FET 40 preferably includes an N-MOS FET. In the drawings,reference numeral 20 denotes a field oxide film, 21 denotes a gate oxide film, and 23 denotes a gate. - In addition, a first interconnecting
layer 51 and asecond interconnecting layer 53, which are made of a metal having a high ejection conductivity, are sequentially stacked on the upper portion of theMOS FETs digital logic circuit 31 and theheater driving circuit 41. Here, the first interconnectinglayer 51 is connected to source and drain regions of the FET through a contact hole 27, and thesecond interconnecting layer 53 is electrically connected to the first interconnectinglayer 51 through a via hole (not shown). In the drawings,references numerals - The
heater 60 for heating the ink is formed between the second interconnectinglayer 53 and the second inter-layer dielectric 24 on the upper portion of thepower FET 40, and apassivation layer 28 is formed on theheater 60 and thesecond interconnecting layer 53. Thepassivation layer 28 insulates theheater 60 from the ink, and prevents theheater 60 from being corroded by the ink. Achamber layer 70 that defines anink chamber 75, which is filled with the ink, and anozzle layer 80, on which anozzle 85 for ejecting the ink is formed, are sequentially formed on thepassivation layer 28. - As described above, in the conventional thermally driven inkjet printhead, the two interconnecting
layers MOS FET digital logic circuit 31 and theheater driving circuit 41. And, theaddress line 35 that is an output line of thedigital logic circuit 31 is located at an outer portion of theheater driving circuit 41. Consequently, the printhead chip is quite large and expensive to manufacture. In addition, it is difficult to arrange additional wires. Moreover, since the lengths of the wires increase, the circuit signal transmission speed is lowered. - The present invention provides an inkjet printhead and a method of manufacturing the same, by which a printhead chip size can be minimized and a circuit signal transmission speed can be increased using three metal interconnecting layers.
- According to an aspect of the present invention, an inkjet printhead including a substrate is provided. The substrate comprises a plurality of heaters formed on an upper portion of the substrate for heating ink to generate bubbles, a plurality of metal-oxide semiconductor (MOS) field effect transistors (FETs) formed on the substrate to address the heaters and apply electric current to the heaters, a first interconnecting layer, a second interconnecting layer, and a third interconnecting layer that are sequentially formed on the MOS FETs and are electrically connected to each other to apply signals to the MOS FETs, a chamber layer that defines an ink chamber, which is filled with the ink that will be ejected, on an upper portion of the heaters, and a nozzle layer having a nozzle, through which the ink is ejected, on an upper portion of the chamber layer.
- The heaters may be formed on a lower surface of the third interconnecting layer, that is, a top interconnecting layer.
- First, second, and third interlayer dielectrics may be formed between the MOS FETs, and the first, the second, and the third interconnecting layers. The first, second, and third interlayer dielectrics may comprise SiO2 or boron phosphorous silicate glass. Here, the heaters may be formed between the third interconnecting layer and the third interlayer dielectric.
- The heaters may comprise TaAl, TaN, or TiN.
- A passivation layer may be formed on upper surfaces of the heaters and the third interconnecting layer, and the passivation layer may comprise SiN.
- An anti-cavitation layer may be formed on an upper surface of the passivation layer, on which the ink chamber is located, and the anti-cavitation layer may comprise Ta, Ti, or TiN.
- According to another aspect of the present invention, a method of manufacturing an inkjet printhead is provided. The method comprises forming a plurality of MOS FETs on a surface of a substrate; forming first, second, and third interconnecting layers for applying signals to the MOS FETs, and heaters that are driven by the MOS FETs; forming a chamber layer that defines an ink chamber, which is filled with ink that will be ejected, on an upper portion of the heaters; and forming a nozzle layer having a nozzle, through which the ink is ejected, on an upper portion of the chamber layer.
- In the second step of forming, the first, second, and third interconnecting layers may be sequentially formed on the MOS FETs, and the heaters are formed on a lower surface of the third interconnecting layer.
- The second step of forming further comprises forming a first interlayer dielectric on the MOS FETs, and forming the first interconnecting layer on the first interlayer dielectric, forming a second interlayer dielectric on the first interconnecting layer, and forming the second interconnecting layer on the second interlayer dielectric, forming a third interlayer dielectric on the second interconnecting layer, and forming the heaters on the third interlayer dielectric, and forming the third interconnecting layer on the heaters.
- The first, second, and third interlayer dielectrics may comprise SiO2 or boron phosphorous silicate glass.
- Forming the first interconnecting layer comprises forming a contact hole, which exposes a source and a drain of the MOS FETs, in the first interlayer dielectric, and depositing a metal material on an upper surface of the first interlayer dielectric so as to fill the contact hole, and patterning the deposited material.
- The forming the second interconnecting layer comprises forming a first via hole, which exposes a part of the first interconnecting layer, in the second interlayer dielectric, and depositing a metal material on an upper surface of the second interlayer dielectric so as to fill the first via hole, and patterning the deposited material.
- The forming the heaters comprises forming a second via hole, which exposes a part of the second interconnecting layer, in the third interlayer dielectric, and depositing a resistive heating material on the third interlayer dielectric and the exposed surface of the second interconnecting layer, and patterning the deposited material.
- The resistive heating material comprises TaAl, TaN, or TiN.
- Forming the third interconnecting layer comprises depositing a metal material on the upper surface of the heaters and patterning the deposited material.
- The method further comprises forming a passivation layer on the upper portion of the third interconnecting layer and the heaters, and the passivation layer comprises SiN.
- The method further comprises forming an anti-cavitation layer on an upper surface of the passivation layer, on which the ink chamber is located, and the anti-cavitation layer comprises Ta, Ti, or TiN.
- The above and other features and advantages of the present invention will become more apparent by describing in detail exemplary embodiments thereof with reference to the accompanying drawings in which:
-
FIG. 1 is a schematic plan view showing a conventional thermally driven inkjet printhead; -
FIG. 2 is a diagram of a driving circuit in the thermally driven inkjet printhead ofFIG. 1 ; -
FIG. 3 is a cross-sectional view showing a vertical structure of the inkjet printhead ofFIG. 1 ; -
FIG. 4 is a schematic plan view showing an inkjet printhead according to an embodiment of the present invention; -
FIG. 5 is a cross-sectional view showing a vertical structure of the inkjet printhead according to an embodiment of the present invention; and -
FIGS. 6A through 6J are views illustrating a method of manufacturing the inkjet printhead according to an embodiment of the present invention. - Throughout the drawings, it should be noted that the same or similar elements are denoted by like reference numerals.
- The present invention will now be described more fully with reference to the accompanying drawings, in which exemplary embodiments of the invention are shown. The invention may, however, be embodied in many different forms and should not be construed as being limited to the embodiments set forth herein. In the drawings, the thicknesses of layers and regions may be exaggerated for clarity, and whenever the same element reappears in a subsequent drawing, it is denoted by the same reference numeral. Also, when a layer is said to be on a substrate or on another layer, the layer may be directly on the substrate or the other layer, or one or more other layers may be interposed therebetween.
-
FIG. 4 is a schematic plan view showing an inkjet printhead according to an embodiment of the present invention. - Referring to
FIG. 4 ,heaters 160 for heating ink to generate bubbles are disposed at a center portion of the inkjet printhead in two rows, and aheater driving circuit 141 for driving theheaters 160 is disposed around theheaters 160. Theheater driving circuit 141 includes a plurality of power field effect transistors (FETs) 140 corresponding to each of theheaters 160 and interconnecting layers that are electrically connected to thepower FETs 140.Address lines 135 for supplying signals to the gates of thepower FETs 140 are disposed on an upper portion of thepower FETs 140. This structure can be realized by using three metal interconnecting layers, as will be described later. In addition, adigital logic circuit 131 for addressing theheaters 160 is disposed nearconnection pads 115. Thedigital logic circuit 131 includes a plurality of complementary metal-oxide semiconductor (CMOS) FETs and interconnecting layers that are electrically connected to the CMOS FETs. -
FIG. 5 shows a vertical structure of the inkjet printhead according to an embodiment of the present invention. - Referring to
FIG. 5 , the inkjet printhead according to an embodiment of the present invention includes asubstrate 110, theheaters 160 for heating the ink to generate bubbles,MOS FETs heaters 160 and applying electric current to theheaters 160, first, second, and third interconnectinglayers MOS FETs chamber layer 170 disposed on an upper portion of theheater 160 for defining anink chamber 175, and anozzle layer 180 disposed on an upper portion of thechamber layer 170 for ejecting ink through anozzle 185 formed therein. - A plurality of
MOS FETs substrate 110 in order to address theheaters 160 and apply electric current to theheaters 160. TheMOS FETs CMOS FET 130 for forming the digital logic circuit 131 (seeFIG. 4 ), and apower FET 140 for forming the heater driving circuit 141 (seeFIG. 4 ). Here, theCMOS FET 130 includes a P-channel MOS (PMOS)FET 130 a and an N-channel MOS (NMOS)FET 130 b, and thepower FET 140 includes the NMOS FET. In the drawings,reference numeral 120 denotes a field oxide film, 121 denotes a gate oxide film, and 123 denotes a gate. - On an upper portion of the plurality of
MOS FETs layers digital logic circuit 131 and theheater driving circuit 141. Here, the first, second, and third interconnectinglayers MOS FETs digital logic circuit 131 can be highly integrated by forming the first, second, and third interconnectinglayers MOS FETs third interconnecting layer 155 formed on the upper portion of thepower FET 140 is used as theaddress line 135 that supplies the signals to thegate 123 of thepower FET 140, the size of the printhead chip can be minimized. - A
first interlayer dielectric 122, asecond interlayer dielectric 124, and athird interlayer dielectric 126 are formed between theMOS FETs layers interlayer dielectrics contact hole 127 is formed in thefirst interlayer dielectric 122 so that thefirst interconnecting layer 151 can be connected to sources and drains of theMOS FETs second interlayer dielectric 124 so that thesecond interconnecting layer 153 can be electrically connected to thefirst interconnecting layer 151, and a second viahole 137 is formed in thethird interlayer dielectric 126 so that thethird interconnecting layer 155 can be electrically connected to thesecond interconnecting layer 153. - The
heaters 160 for heating the ink to generate bubbles are formed between thethird interconnecting layer 155 and thethird interlayer dielectric 126 on the upper portion of thepower FET 140. Preferably theheaters 160 comprise TaAl, TaN, or TiN. - In addition, a
passivation layer 128 is formed on the upper portion of theheater 160 and thethird interconnecting layer 155. Thepassivation layer 128, which may comprise SiN, insulates theheater 160 from the ink, and protects theheater 160 from corrosion due to the ink. - An
anti-cavitation layer 129 is formed on an upper portion of thepassivation layer 128, on which theink chamber 175 is located. Theanti-cavitation layer 129 protects theheater 160 from shock generated when bubbles burst, and preferably theanti-cavitation layer 129 comprises a material having high chemical and abrasion resistance. Theanti-cavitation layer 129 can comprise Ta, or Ti and TiN. - Hereinafter, a method of manufacturing the inkjet printhead according to an embodiment of the present invention will be described with reference to
FIGS. 6A through 6J . - As shown in
FIG. 6A , the plurality ofMOS FETs substrate 110 for addressing theheaters 160 and applying electric current to theheaters 160. Specifically, thegate oxide film 121 and thefield oxide film 120 are formed on thesubstrate 110, then thegate 123 is formed on thegate oxide film 121 and sources and drains are formed on active areas of both sides of thegate 123 to complete theMOS FETs MOS FETs CMOS FET 130 for addressing theheaters 160 and thepower FET 140 for driving theheaters 160. TheCMOS FET 130 includes thePMOS FET 130 a and theNMOS FET 130 b, and thepower FET 140 includes the NMOS FET. - Next, as shown in
FIG. 6B , thefirst interlayer dielectric 122, thefirst interconnecting layer 151, and thesecond interlayer dielectric 124 are sequentially formed on theMOS FETs first interlayer dielectric 122 on theMOS FETs contact hole 127 is formed in thefirst interlayer dielectric 122 through the photolithography process and the etching process to open the source and the drain of theMOS FETs first interlayer dielectric 122 so as to fill thecontact hole 127, and the deposited material is patterned to form thefirst interconnecting layer 151. Next, thesecond interlayer dielectric 124 is formed on thefirst interconnecting layer 151. Here, the first and thesecond interlayer dielectrics - Referring to
FIG. 6C , thesecond interconnecting layer 153 is formed on thesecond interlayer dielectric 122. That is, the first via hole (not shown) that exposes a part of thefirst interconnecting layer 151 is formed in thesecond interlayer dielectric 122 through the photolithography process and the etching process. Next, the metal material having a high electric conductivity is deposited on the second interlayer dielectric so that the first via hole scan be filled, and the deposited layer is patterned to form thesecond interconnecting layer 153. - Then, as shown in
FIG. 6D , thethird interlayer dielectric 126 is formed on thesecond interconnecting layer 153, and the second viahole 137 that exposes a part of thesecond interconnecting layer 153 is formed in thethird interlayer dielectric 126 through the photolithography process and the etching process. Here, thethird interlayer dielectric 126 may comprise SiO2 or BPSG. - Referring to
FIG. 6E , a resistive heating material is deposited on the surface of thethird interlayer dielectric 126 and the surface of thesecond interconnecting layer 153, which is exposed by the second viahole 137, and the deposited material is patterned to form theheaters 160. Preferably, the resistive heating material comprises TaAl, TaN, or TiN. - Next, as shown in
FIG. 6F , thethird interconnecting layer 155 is formed on thethird interlayer dielectric 126 and theheaters 160. Thethird interconnecting layer 155 is formed by depositing a metal material having a high electric conductivity on the upper portion of thethird interlayer dielectric 126 and theheaters 160 so that the second viahole 137 is filled with the material, and patterning the deposited material. Accordingly, operations of forming the digital logic circuit 1314), theheater driving circuit 141, and theheaters 160, are complete. - Referring to
FIG. 6G , apassivation layer 128 is formed on thethird interconnecting layer 155 and theheaters 160. Thepassivation layer 128 can be formed by depositing SiN on thethird interconnecting layer 155 and theheaters 160. Thepassivation layer 128 insulates theheaters 160 from the ink, and prevents theheaters 160 from being corroded by the ink. - Next, as shown in
FIG. 6H , theanti-cavitation layer 129 is formed on thepassivation layer 129, in which the ink chamber 175 (seeFIG. 61 ) is located. Theanti-cavitation layer 129 can be formed by depositing Ta or successively depositing Ti and TiN on thepassivation layer 128, and patterning the deposited layers. Theanti-cavitation layer 129 is formed to protect theheaters 160 from shock generated when the bubbles burst. - Then, as shown in
FIG. 61 , achamber layer 170 that defines theink chamber 175, which is filled with ink, is formed on thepassivation layer 128, on which theanti-cavitation layer 129 is formed. In addition, anozzle layer 180 including thenozzle 185, through which the ink is ejected, is formed on thechamber layer 170, as shown inFIG. 6J . - As previously described, according to an embodiments of the present invention, the digital logic circuit and the heater driving circuit are formed using three metal interconnecting layers, thus the size of the printhead chip can be minimized. In addition, since the lengths of the wires are reduced, the circuit signal transmission speed can be improved.
- While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it should be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from the spirit and scope of the present invention as defined by the following claims.
Claims (14)
1. A method of manufacturing an inkjet printhead, comprising:
forming a plurality of metal-oxide semiconductor (MOS) field effect transistors (FETs) on a surface of a substrate;
forming first, second, and third interconnecting layers for applying signals to the MOS FETs, and heaters that are driven by the MOS FETs;
forming a chamber layer for defining an ink chamber, which is filled with ink for ejection, on an upper portion of the heaters; and
forming a nozzle layer having a nozzle, through which the ink is ejected, on an upper portion of the chamber layer.
2. The method of claim 1 , wherein in the second step of forming, the first, second, and third interconnecting layers are sequentially formed on the MOS FETs, and the heaters are formed on a lower surface of the third interconnecting layer.
3. The method of claim 1 , wherein the second step of forming further comprises:
forming a first interlayer dielectric on the MOS FETs, and forming the first interconnecting layer on the first interlayer dielectric;
forming a second interlayer dielectric on the first interconnecting layer, and forming the second interconnecting layer on the second interlayer dielectric;
forming a third interlayer dielectric on the second interconnecting layer, and forming the heaters on the third interlayer dielectric; and
forming the third interconnecting layer on the heaters.
4. The method of claim 3 , wherein the first, second, and third interlayer dielectrics comprise SiO2 or boron phosphorous silicate glass.
5. The method of claim 3 , wherein forming the first interconnecting layer comprises:
forming a contact hole, which exposes a source and a drain of the MOS FETs, in the first interlayer dielectric; and
depositing a metal material on an upper surface of the first interlayer dielectric so as to fill the contact hole, and patterning the deposited material.
6. The method of claim 3 , wherein forming the second interconnecting layer comprises:
forming a first via hole, which exposes a portion of the first interconnecting layer, in the second interlayer dielectric; and
depositing a metal material on an upper surface of the second interlayer dielectric so as to fill the first via hole, and patterning the deposited material.
7. The method of claim 3 , wherein forming the heaters comprises:
forming a second via hole, which exposes a portion of the second interconnecting layer, in the third interlayer dielectric; and
depositing a resistive heating material on the third interlayer dielectric and the exposed surface of the second interconnecting layer, and patterning the deposited material.
8. The method of claim 7 , wherein the resistive heating material comprises TaAl, TaN, or TiN.
9. The method of claim 3 , wherein forming the third interconnecting layer includes depositing a metal material on the upper surface of the heaters and patterning the deposited material.
10. The method of claim 1 , further comprising forming a passivation layer on the upper portion of the third interconnecting layer and the heaters.
11. The method of claim 10 , wherein the passivation layer comprises SiN.
12. The method of claim 10 , further comprising forming an anti-cavitation layer on an upper surface of the passivation layer, on which the ink chamber is located.
13. The method of claim 12 , wherein the anti-cavitation layer comprises Ta.
14. The method of claim 12 , wherein the anti-cavitation layer comprises Ti and TiN.
Priority Applications (1)
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US11/905,016 US20080022525A1 (en) | 2004-01-29 | 2007-09-27 | Inkjet printhead and method of manufacturing the same |
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KR1020040005635A KR100553914B1 (en) | 2004-01-29 | 2004-01-29 | Inkjet printhead and method for manufacturing the same |
KR2004-5635 | 2004-01-29 | ||
US10/994,477 US7293857B2 (en) | 2004-01-29 | 2004-11-23 | Inkjet printhead and method of manufacturing the same |
US11/905,016 US20080022525A1 (en) | 2004-01-29 | 2007-09-27 | Inkjet printhead and method of manufacturing the same |
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US11/905,016 Abandoned US20080022525A1 (en) | 2004-01-29 | 2007-09-27 | Inkjet printhead and method of manufacturing the same |
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US20070296767A1 (en) * | 2006-06-27 | 2007-12-27 | Anderson Frank E | Micro-Fluid Ejection Devices with a Polymeric Layer Having an Embedded Conductive Material |
JP5197178B2 (en) * | 2007-06-27 | 2013-05-15 | キヤノン株式会社 | Inkjet recording head substrate and inkjet recording head |
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JP6598658B2 (en) * | 2015-01-27 | 2019-10-30 | キヤノン株式会社 | Element substrate for liquid discharge head and liquid discharge head |
JP2018065377A (en) * | 2016-10-18 | 2018-04-26 | キヤノン株式会社 | Recording element substrate, recording head, and recording device |
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JP6929150B2 (en) * | 2017-06-30 | 2021-09-01 | キヤノン株式会社 | Semiconductor device, its manufacturing method, liquid discharge head and liquid discharge device |
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- 2005-01-28 JP JP2005021666A patent/JP2005212483A/en active Pending
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Also Published As
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US7293857B2 (en) | 2007-11-13 |
KR20050078260A (en) | 2005-08-05 |
US20050168534A1 (en) | 2005-08-04 |
KR100553914B1 (en) | 2006-02-24 |
JP2005212483A (en) | 2005-08-11 |
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Date | Code | Title | Description |
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STCB | Information on status: application discontinuation |
Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION |
|
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Owner name: S-PRINTING SOLUTION CO., LTD., KOREA, REPUBLIC OF Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:SAMSUNG ELECTRONICS CO., LTD;REEL/FRAME:041852/0125 Effective date: 20161104 |