US20080012640A1 - Unilateralized amplifier - Google Patents
Unilateralized amplifier Download PDFInfo
- Publication number
- US20080012640A1 US20080012640A1 US11/582,917 US58291706A US2008012640A1 US 20080012640 A1 US20080012640 A1 US 20080012640A1 US 58291706 A US58291706 A US 58291706A US 2008012640 A1 US2008012640 A1 US 2008012640A1
- Authority
- US
- United States
- Prior art keywords
- output
- conductor
- input
- signal
- capacitance
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
- H03F3/45179—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using MOSFET transistors as the active amplifying circuit
- H03F3/45183—Long tailed pairs
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/08—Modifications of amplifiers to reduce detrimental influences of internal impedances of amplifying elements
- H03F1/083—Modifications of amplifiers to reduce detrimental influences of internal impedances of amplifying elements in transistor amplifiers
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/08—Modifications of amplifiers to reduce detrimental influences of internal impedances of amplifying elements
- H03F1/083—Modifications of amplifiers to reduce detrimental influences of internal impedances of amplifying elements in transistor amplifiers
- H03F1/086—Modifications of amplifiers to reduce detrimental influences of internal impedances of amplifying elements in transistor amplifiers with FET's
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
- H03F3/4508—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using bipolar transistors as the active amplifying circuit
- H03F3/45085—Long tailed pairs
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45479—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection
- H03F3/45484—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection in differential amplifiers with bipolar transistors as the active amplifying circuit
- H03F3/45596—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection in differential amplifiers with bipolar transistors as the active amplifying circuit by offset reduction
- H03F3/45618—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection in differential amplifiers with bipolar transistors as the active amplifying circuit by offset reduction by using balancing means
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45479—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection
- H03F3/45632—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection in differential amplifiers with FET transistors as the active amplifying circuit
- H03F3/45744—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection in differential amplifiers with FET transistors as the active amplifying circuit by offset reduction
- H03F3/45766—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection in differential amplifiers with FET transistors as the active amplifying circuit by offset reduction by using balancing means
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
- H03F2203/45—Indexing scheme relating to differential amplifiers
- H03F2203/45318—Indexing scheme relating to differential amplifiers the AAC comprising a cross coupling circuit, e.g. two extra transistors cross coupled
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
- H03F2203/45—Indexing scheme relating to differential amplifiers
- H03F2203/45481—Indexing scheme relating to differential amplifiers the CSC comprising only a direct connection to the supply voltage, no other components being present
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
- H03F2203/45—Indexing scheme relating to differential amplifiers
- H03F2203/45512—Indexing scheme relating to differential amplifiers the FBC comprising one or more capacitors, not being switched capacitors, and being coupled between the LC and the IC
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
- H03F2203/45—Indexing scheme relating to differential amplifiers
- H03F2203/45538—Indexing scheme relating to differential amplifiers the IC comprising balancing means, e.g. trimming means
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
- H03F2203/45—Indexing scheme relating to differential amplifiers
- H03F2203/45544—Indexing scheme relating to differential amplifiers the IC comprising one or more capacitors, e.g. coupling capacitors
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
- H03F2203/45—Indexing scheme relating to differential amplifiers
- H03F2203/45546—Indexing scheme relating to differential amplifiers the IC comprising one or more capacitors feedback coupled to the IC
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
- H03F2203/45—Indexing scheme relating to differential amplifiers
- H03F2203/45624—Indexing scheme relating to differential amplifiers the LC comprising balancing means, e.g. trimming means
Definitions
- the present invention relates to integrated circuits and, more particularly, to an integrated circuit based amplifier with improved frequency response.
- Integrated circuits comprise an arrangement of passive and active circuit elements, such as transistors, resistors and capacitors that are fabricated on a substrate or wafer.
- ICs are fabricated by a process of successively depositing layers of semi-conductive, conductive or insulating materials on the substrate and selectively etching portions of the deposited material. Deposition of a semi-conducting, conducting or insulating layer is followed by deposition of a layer of photosensitive material. The photosensitive material is exposed to light, through a precisely aligned mask, causing portions of the material to be chemically altered. Portions of the exposed photosensitive material are removed producing a photoresist layer with a pattern corresponding to the mask.
- a chemical etchant applied to the surface, selectively removes the underlying layer of conductive, semi-conductive or insulating material except in those areas which are protected by the remaining photoresist.
- the remaining portions of the semi-conductor, conductor or insulator comprise a layer of one or more of the stratified, passive or active elements of the integrated circuit.
- the photoresist layer is removed from the exposed surface of the wafer and the process is repeated until all of the strata of the circuit's elements have been laid down.
- ICs are economically attractive because large numbers of often complex circuits, such as microprocessors, can be inexpensively fabricated on the surface of a single wafer or substrate. Following fabrication the individual circuits are separated from each other and packaged as individual devices. However, as a consequence of the fabrication process and the resulting structure of the elements of the integrated circuit, the performance of ICs can vary substantially with the signal frequency. Electrical interconnections exist between many of the parts of the individual circuit elements and between parts of the circuit elements and the substrate on which the circuits elements are fabricated. These interconnections or parasitics are commonly capacitive and/or inductive in nature and produce impedances that are variable with frequency.
- the terminals of transistors fabricated on semi-conductive substrates or wafers are typically capacitively interconnected, through the substrate, to the ground plane.
- Many integrated circuits utilize single ended or ground referenced signaling that is referenced a ground plane at the lower surface of the substrate on which the active and passive devices of the circuit are fabricated. As a result of the frequency dependent effects of these parasitic interconnections, the ground potential and the true nature of ground referenced signals becomes uncertain at higher frequencies.
- a differential gain cell or amplifier 20 is a balanced device comprising two nominally identical circuit halves 20 A, 20 B.
- the transistors 22 of the differential gain cell are biased with a DC potential provided, for examples by a current source 24 or a ground potential, and stimulated with a differential mode signal, comprising even (S i +1 ) and odd (S i ⁇ 1 ) mode components of equal amplitude and opposite phase, a virtual ground is established at the symmetrical axis 26 of the two circuit halves.
- the potential at the operating frequency does not change with time regardless of the amplitude of the stimulating signal.
- the quality of the virtual ground of a balanced device is independent of the physical ground path and, therefore, balanced or differential circuits can tolerate poor RF grounding better than circuits operated with single ended signals.
- the two waveforms of the differential output signal (S o +1 and S o ⁇ 1 ) are mutual references providing faster and more certain transitions from one binary value to the other for digital devices and enabling operation with a reduced voltage swing for the signal.
- balanced or differential circuits have good immunity to noise, including noise at even-harmonic frequencies, because noise from external sources, such as adjacent conductors, tends to couple, electrically and electromagnetically, in the common mode and cancel in the differential mode and because signals that are of opposite phase at the fundamental frequency are in phase at the even harmonics.
- a differential gain cell such as the differential gain cell 20
- Parasitic capacitance (C gd ) 40 between the gate 32 and the drain 32 a result of diffusion of the drain dopant under the oxide of the gate, is inherent and typical of MOS transistors.
- the transistor's gain As a result of the transistor's gain, a change in the gate voltage produces an even larger change in the voltage at the transistor's drain.
- the application of differing voltages at the terminals of the parasitic gate-to-drain capacitor (C gd ) causes the capacitor to behave as a much larger capacitance magnifying its effect on the amplifier's output, a phenomenon known as the Miller effect.
- the performance of the differential amplifier is effected by parasitic capacitance (C ds ) 42 between the sources 32 and drains 34 and parasitic capacitance (C gg ) 44 between the gates and between the sources (C ss ) 46 of the transistors resulting from the closely spaced arrangement of conductors and insulators making up the amplifier's integrated circuit.
- the impedance of the differential gain cell varies substantially with frequency, producing non-linearity and instability in the operation of the differential gain cell or amplifier and other devices that incorporate the differential gain cell.
- FIG. 1 is a schematic illustration of a differential amplifier.
- FIG. 2 is a schematic illustration of a Gilbert cell.
- FIG. 3 is a schematic illustration of a unilateralized differential amplifier comprising metal oxide semiconductors.
- FIG. 4 is a schematic illustration of a unilateralized differential amplifier comprising bipolar junction transistors.
- a differential gain cell or amplifier 20 is a common elemental device of balanced or differential circuitry.
- a Gilbert cell mixer 60 enabling frequency multiplication, comprises a plurality of differential gain cells 62 .
- a differential gain cell 20 comprises two nominally identical circuit halves 20 A, 20 B.
- a DC potential from, for example, a DC current source 24
- a differential mode signal comprising even and odd mode components of equal amplitude and opposite phase (S i +1 and S i ⁇ 1 ) 30 , 32
- a virtual ground is established at the symmetrical axis 26 of the two circuit halves.
- the potential at the operating frequency does not change with time regardless of the amplitude of the stimulating signal.
- the quality of the virtual ground of a balanced device is independent of the physical ground path and, therefore, balanced or differential circuits can tolerate poor RF grounding better than circuits operated with single ended (ground referenced) signals.
- Differential devices can also typically operate with lower signal power and at higher data rates than single ended devices and have good immunity to noise, including noise at even-harmonic frequencies, from external sources such as adjacent conductors.
- Integrated circuits are fabricated by depositing layers of conductive, semi-conductive and insulating materials on a semi-conductive substrate and inherent frequency dependent connections commonly exist between various elements of the circuit components and between the various elements of the circuit components and the substrate on which the circuit's components are fabricated.
- One such inherent frequency dependent connection comprises a capacitive connection of the gates and drains of MOS transistors and the bases and collectors of bipolar junction (BJT) transistors.
- BJT bipolar junction
- an intrinsic parasitic capacitance (C gd ) 42 interconnects the gate and the drain of a typical MOS transistor because the drain dopant diffuses under the oxide comprising the transistor's gate.
- the impedance of the interconnection of the gate and the drain of the transistor and, therefore, the input impedance of the differential gain cell changes.
- any change in voltage at the gate of the transistor is amplified at the drain of the transistor causing the parasitic capacitance (C gd ) to appear to be a much larger capacitor; a phenomenon known as the Miller effect.
- parasitic capacitance (C ds ) 42 connects the source terminals to the drain terminals of MOS transistors (collector and emitters of BJTs); parasitic capacitance C gg 44 connects the gate terminals of the two transistors, the input terminals of the amplifier; and C dd 46 connects the drain terminals of the transistors, the amplifier's outputs.
- the inventors recognized that the respective input signals and the respective output signals of the differential amplifier comprise mirror image signal components of substantially equal amplitude and opposite phase.
- the inventors concluded that the effect of the parasitic capacitance connecting the terminals of the transistors of a differential amplifier could be substantially reduced or eliminated by connecting each conductor of an amplifier input signal component to the respective conductor of the output signal component of opposite phase.
- a unilateralized amplifier 50 comprises a differential gain cell including matched transistors 20 A and 20 B.
- the source terminals 34 of the transistors are interconnected and connected to a source of DC bias 80 , for examples, a ground potential or a DC current source.
- the gate terminals 30 of the respective transistors are arranged to conduct a differential input signal comprising the component signal, S i +1 , 60 and its complementary differential input signal component, S i ⁇ 1 , 62 .
- the components of the differential input signal are mirror image, modulated signals of substantially equal amplitude and opposite phase, that is, the phase angle of one component of the input signal is shifted 180° relative to the phase angle of the second component.
- the components of the differential output signal, S o +1 , 64 and S o ⁇ 1 , 66 , conducted by the drain terminals 32 of the respective transistors, are respectively in phase with the input signal to the transistor and, therefore, opposite in phase to each other and, since the transistors are matched, have substantially equally amplitude.
- the gates and drains of the two transistors comprise, respectively, the input terminals and the output terminals of the amplifier. Due the gain (A) of the transistor, a change in voltage (dV) at the gate of a transistor is amplified at the drain (A*dV) causing the opposing sides of the parasitic capacitance to experience differing voltage.
- the parasitic capacitance (C gd ) has the effect of a larger capacitor causing the input impedance of the differential amplifier to vary substantially with frequency and producing substantial frequency dependent variability in the output signal of the amplifier.
- parasitic capacitance (C ds ) 42 , 43 connects the respective sources and drains of the two transistors, producing a frequency variable conductive path between the amplifier's outputs and the conductor through which the transistors are biased.
- parasitic capacitance (C gg ) 44 connects the gate terminals, the amplifier's inputs; and parasitic capacitance, C dd , 46 connects drain terminals of the transistors, the differential amplifier's outputs.
- compensating capacitors 52 and 54 are connected from the gate of each transistor, for example the gate of transistor 20 A, to the drain of the second transistor of the differential gain cell, for example the drain of transistor 20 B, connecting each conductor of an input signal component to the respective conductor of the output signal component of opposite phase.
- the change in voltage at the drain of a transistor due to the parasitic capacitance is offset by the voltage at the respective compensating capacitor 52 , 54 and the input impedance of the test structure remains more constant with frequency.
- the Miller effect produces substantial variability in the output of the amplifier and can be countered with compensating capacitors having capacitances substantially equal to the parasitic input to output (source to drain) capacitance (C gd ).
- the effects of input signal frequency on amplifier output can be further reduced by providing compensating capacitance substantially equaling the capacitance of the parasitic input to output (source to drain) capacitance (C gd ) and the capacitance, C ds , C gg or C dd , of one more of the parasitic interconnections of the terminals of the transistors.
- the compensating capacitors preferably have values equal to the combined parasitic capacitances, C gd , C ds , C gg and C dd to offset the Miller effect and the effects of the parasitic capacitances connecting the terminals of the transistors of the differential amplifier.
- the capacitance of the compensating capacitors may be adjustable. Adjustment may be accomplished mechanically or electronically, through a varactor or otherwise, or by trimming a fixed capacitor in the integrated circuit.
- the unilateralized differential amplifier 90 comprises a pair of bipolar junction (BJT) transistors 92 A, 92 B having the emitters 94 connected together and interconnected to a source of DC bias 100 .
- Bipolar junction transistors also inherently include capacitive interconnections between the terminals of the transistor.
- Parasitic capacitance (C bc ) 102 , 103 interconnects the base of each transistor and its respective collector, the inputs and outputs of the differential amplifier.
- the base to collector capacitance has the effect of a larger capacitor because of the Miller effect.
- Additional parasitic capacitances (C ce ) 104 , 105 interconnect each collector and the respective emitter, the output of the amplifier and the amplifier's bias terminal; interconnect the conductors of the amplifier's input signal components (C bb ) 106 and the conductors of the amplifier's output signals (C ee ) 108 .
- Compensating capacitors 110 , 112 connect each input of the amplifier to the amplifier output that conducts the output signal component having the opposite phase of the respective input to reduce the effect of input signal frequency on the performance of the amplifier.
- the compensating capacitors have a capacitance substantially equal to the capacitances of one or more of the parasitic interconnections of the terminals of the differential gain cell
- the linearity and stability of a differential amplifier is improved by interconnecting each input of the amplifier to the respective output conducting the output signal of opposite phase with compensating capacitors having a capacitance substantially equal to the parasitic capacitances of the transistors of the amplifier.
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/582,917 US20080012640A1 (en) | 2006-07-14 | 2006-10-17 | Unilateralized amplifier |
PCT/US2007/016055 WO2008008528A2 (fr) | 2006-07-14 | 2007-07-13 | Amplificateur unilatéralisé |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US83087706P | 2006-07-14 | 2006-07-14 | |
US11/582,917 US20080012640A1 (en) | 2006-07-14 | 2006-10-17 | Unilateralized amplifier |
Publications (1)
Publication Number | Publication Date |
---|---|
US20080012640A1 true US20080012640A1 (en) | 2008-01-17 |
Family
ID=38923954
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US11/582,917 Abandoned US20080012640A1 (en) | 2006-07-14 | 2006-10-17 | Unilateralized amplifier |
Country Status (2)
Country | Link |
---|---|
US (1) | US20080012640A1 (fr) |
WO (1) | WO2008008528A2 (fr) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20080217519A1 (en) * | 2007-02-27 | 2008-09-11 | Masahiro Yokomichi | Photoelectric conversion device |
CN110073614A (zh) * | 2016-08-30 | 2019-07-30 | Macom技术解决方案控股公司 | 具有分布式架构的驱动器 |
WO2023062291A1 (fr) * | 2021-10-14 | 2023-04-20 | Stmicroelectronics Sa | Calibration de phase par amplificateur neutrodyne avec des varactors |
Families Citing this family (55)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10693415B2 (en) | 2007-12-05 | 2020-06-23 | Solaredge Technologies Ltd. | Testing of a photovoltaic panel |
US11881814B2 (en) | 2005-12-05 | 2024-01-23 | Solaredge Technologies Ltd. | Testing of a photovoltaic panel |
US11569659B2 (en) | 2006-12-06 | 2023-01-31 | Solaredge Technologies Ltd. | Distributed power harvesting systems using DC power sources |
US8963369B2 (en) | 2007-12-04 | 2015-02-24 | Solaredge Technologies Ltd. | Distributed power harvesting systems using DC power sources |
US11296650B2 (en) | 2006-12-06 | 2022-04-05 | Solaredge Technologies Ltd. | System and method for protection during inverter shutdown in distributed power installations |
US8618692B2 (en) | 2007-12-04 | 2013-12-31 | Solaredge Technologies Ltd. | Distributed power system using direct current power sources |
US11888387B2 (en) | 2006-12-06 | 2024-01-30 | Solaredge Technologies Ltd. | Safety mechanisms, wake up and shutdown methods in distributed power installations |
US9130401B2 (en) | 2006-12-06 | 2015-09-08 | Solaredge Technologies Ltd. | Distributed power harvesting systems using DC power sources |
US8319471B2 (en) | 2006-12-06 | 2012-11-27 | Solaredge, Ltd. | Battery power delivery module |
US8319483B2 (en) | 2007-08-06 | 2012-11-27 | Solaredge Technologies Ltd. | Digital average input current control in power converter |
US9088178B2 (en) | 2006-12-06 | 2015-07-21 | Solaredge Technologies Ltd | Distributed power harvesting systems using DC power sources |
US11309832B2 (en) | 2006-12-06 | 2022-04-19 | Solaredge Technologies Ltd. | Distributed power harvesting systems using DC power sources |
US8947194B2 (en) | 2009-05-26 | 2015-02-03 | Solaredge Technologies Ltd. | Theft detection and prevention in a power generation system |
US8384243B2 (en) | 2007-12-04 | 2013-02-26 | Solaredge Technologies Ltd. | Distributed power harvesting systems using DC power sources |
US11855231B2 (en) | 2006-12-06 | 2023-12-26 | Solaredge Technologies Ltd. | Distributed power harvesting systems using DC power sources |
US8816535B2 (en) | 2007-10-10 | 2014-08-26 | Solaredge Technologies, Ltd. | System and method for protection during inverter shutdown in distributed power installations |
US11728768B2 (en) | 2006-12-06 | 2023-08-15 | Solaredge Technologies Ltd. | Pairing of components in a direct current distributed power generation system |
US8013472B2 (en) | 2006-12-06 | 2011-09-06 | Solaredge, Ltd. | Method for distributed power harvesting using DC power sources |
US9112379B2 (en) | 2006-12-06 | 2015-08-18 | Solaredge Technologies Ltd. | Pairing of components in a direct current distributed power generation system |
US8473250B2 (en) | 2006-12-06 | 2013-06-25 | Solaredge, Ltd. | Monitoring of distributed power harvesting systems using DC power sources |
US11687112B2 (en) | 2006-12-06 | 2023-06-27 | Solaredge Technologies Ltd. | Distributed power harvesting systems using DC power sources |
US11735910B2 (en) | 2006-12-06 | 2023-08-22 | Solaredge Technologies Ltd. | Distributed power system using direct current power sources |
EP2232690B1 (fr) | 2007-12-05 | 2016-08-31 | Solaredge Technologies Ltd. | Onduleurs connectés en parallèle |
CN101933209B (zh) | 2007-12-05 | 2015-10-21 | 太阳能安吉有限公司 | 分布式电力装置中的安全机构、醒来和关闭方法 |
US8049523B2 (en) | 2007-12-05 | 2011-11-01 | Solaredge Technologies Ltd. | Current sensing on a MOSFET |
US9291696B2 (en) | 2007-12-05 | 2016-03-22 | Solaredge Technologies Ltd. | Photovoltaic system power tracking method |
US11264947B2 (en) | 2007-12-05 | 2022-03-01 | Solaredge Technologies Ltd. | Testing of a photovoltaic panel |
WO2009118682A2 (fr) | 2008-03-24 | 2009-10-01 | Solaredge Technolgies Ltd. | Commutation sous intensité nulle |
WO2009136358A1 (fr) | 2008-05-05 | 2009-11-12 | Solaredge Technologies Ltd. | Circuit combinateur de puissance de courant continu |
US8710699B2 (en) | 2009-12-01 | 2014-04-29 | Solaredge Technologies Ltd. | Dual use photovoltaic system |
US8766696B2 (en) | 2010-01-27 | 2014-07-01 | Solaredge Technologies Ltd. | Fast voltage level shifter circuit |
GB2485527B (en) | 2010-11-09 | 2012-12-19 | Solaredge Technologies Ltd | Arc detection and prevention in a power generation system |
US10673222B2 (en) | 2010-11-09 | 2020-06-02 | Solaredge Technologies Ltd. | Arc detection and prevention in a power generation system |
US10230310B2 (en) | 2016-04-05 | 2019-03-12 | Solaredge Technologies Ltd | Safety switch for photovoltaic systems |
US10673229B2 (en) | 2010-11-09 | 2020-06-02 | Solaredge Technologies Ltd. | Arc detection and prevention in a power generation system |
GB2486408A (en) | 2010-12-09 | 2012-06-20 | Solaredge Technologies Ltd | Disconnection of a string carrying direct current |
GB2483317B (en) | 2011-01-12 | 2012-08-22 | Solaredge Technologies Ltd | Serially connected inverters |
US8570005B2 (en) | 2011-09-12 | 2013-10-29 | Solaredge Technologies Ltd. | Direct current link circuit |
GB2498365A (en) | 2012-01-11 | 2013-07-17 | Solaredge Technologies Ltd | Photovoltaic module |
GB2498790A (en) | 2012-01-30 | 2013-07-31 | Solaredge Technologies Ltd | Maximising power in a photovoltaic distributed power system |
US9853565B2 (en) | 2012-01-30 | 2017-12-26 | Solaredge Technologies Ltd. | Maximized power in a photovoltaic distributed power system |
GB2498791A (en) | 2012-01-30 | 2013-07-31 | Solaredge Technologies Ltd | Photovoltaic panel circuitry |
GB2499991A (en) | 2012-03-05 | 2013-09-11 | Solaredge Technologies Ltd | DC link circuit for photovoltaic array |
EP3499695A1 (fr) | 2012-05-25 | 2019-06-19 | Solaredge Technologies Ltd. | Circuit pour sources interconnectées de courant continu |
US10115841B2 (en) | 2012-06-04 | 2018-10-30 | Solaredge Technologies Ltd. | Integrated photovoltaic panel circuitry |
US9548619B2 (en) | 2013-03-14 | 2017-01-17 | Solaredge Technologies Ltd. | Method and apparatus for storing and depleting energy |
US9941813B2 (en) | 2013-03-14 | 2018-04-10 | Solaredge Technologies Ltd. | High frequency multi-level inverter |
EP3506370B1 (fr) | 2013-03-15 | 2023-12-20 | Solaredge Technologies Ltd. | Mécanisme de dérivation |
US9318974B2 (en) | 2014-03-26 | 2016-04-19 | Solaredge Technologies Ltd. | Multi-level inverter with flying capacitor topology |
US11081608B2 (en) | 2016-03-03 | 2021-08-03 | Solaredge Technologies Ltd. | Apparatus and method for determining an order of power devices in power generation systems |
CN107153212B (zh) | 2016-03-03 | 2023-07-28 | 太阳能安吉科技有限公司 | 用于映射发电设施的方法 |
US10599113B2 (en) | 2016-03-03 | 2020-03-24 | Solaredge Technologies Ltd. | Apparatus and method for determining an order of power devices in power generation systems |
US11018623B2 (en) | 2016-04-05 | 2021-05-25 | Solaredge Technologies Ltd. | Safety switch for photovoltaic systems |
US11177663B2 (en) | 2016-04-05 | 2021-11-16 | Solaredge Technologies Ltd. | Chain of power devices |
US11969335B2 (en) | 2020-04-28 | 2024-04-30 | Cook Medical Technologies Llc | Woven graft having a taper with a re-engaged warp end |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6624699B2 (en) * | 2001-10-25 | 2003-09-23 | Broadcom Corporation | Current-controlled CMOS wideband data amplifier circuits |
US6737920B2 (en) * | 2002-05-03 | 2004-05-18 | Atheros Communications, Inc. | Variable gain amplifier |
US7180370B2 (en) * | 2004-09-01 | 2007-02-20 | Micron Technology, Inc. | CMOS amplifiers with frequency compensating capacitors |
US20070046376A1 (en) * | 2003-03-28 | 2007-03-01 | Koninklijke Philips Electronics N.V. | Neutralization of feedback capacitance in amplifiers |
-
2006
- 2006-10-17 US US11/582,917 patent/US20080012640A1/en not_active Abandoned
-
2007
- 2007-07-13 WO PCT/US2007/016055 patent/WO2008008528A2/fr active Application Filing
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6624699B2 (en) * | 2001-10-25 | 2003-09-23 | Broadcom Corporation | Current-controlled CMOS wideband data amplifier circuits |
US6737920B2 (en) * | 2002-05-03 | 2004-05-18 | Atheros Communications, Inc. | Variable gain amplifier |
US20070046376A1 (en) * | 2003-03-28 | 2007-03-01 | Koninklijke Philips Electronics N.V. | Neutralization of feedback capacitance in amplifiers |
US7180370B2 (en) * | 2004-09-01 | 2007-02-20 | Micron Technology, Inc. | CMOS amplifiers with frequency compensating capacitors |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20080217519A1 (en) * | 2007-02-27 | 2008-09-11 | Masahiro Yokomichi | Photoelectric conversion device |
CN110073614A (zh) * | 2016-08-30 | 2019-07-30 | Macom技术解决方案控股公司 | 具有分布式架构的驱动器 |
EP3507924A4 (fr) * | 2016-08-30 | 2020-04-08 | MACOM Technology Solutions Holdings, Inc. | Pilote à architecture distribuée |
WO2023062291A1 (fr) * | 2021-10-14 | 2023-04-20 | Stmicroelectronics Sa | Calibration de phase par amplificateur neutrodyne avec des varactors |
Also Published As
Publication number | Publication date |
---|---|
WO2008008528A2 (fr) | 2008-01-17 |
WO2008008528A3 (fr) | 2008-12-18 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US20080012640A1 (en) | Unilateralized amplifier | |
JP4024572B2 (ja) | インタディジタルキャパシタを有するデバイス | |
US9653410B1 (en) | Transistor with shield structure, packaged device, and method of manufacture | |
US8120408B1 (en) | Voltage controlled oscillator delay cell and method | |
CN1671040B (zh) | 低噪声运算放大器 | |
US6255852B1 (en) | Current mode signal interconnects and CMOS amplifier | |
JP5004393B2 (ja) | 高シートmos抵抗器の方法および装置 | |
Maundy et al. | A new design topology for low-voltage CMOS current feedback amplifiers | |
Preisler et al. | A millimeter-wave capable SiGe BiCMOS process with 270GHz FMAX HBTs designed for high volume manufacturing | |
US7102200B2 (en) | On-die termination resistor with analog compensation | |
US10147686B1 (en) | Transistor with shield structure, packaged device, and method of manufacture | |
Chen et al. | DVCC-based first-order filter with grounded capacitor | |
JPH11163642A (ja) | 半導体装置およびそれを用いた高周波回路 | |
JPH07307624A (ja) | 低電圧高速動作のcmos演算増幅器 | |
WO2020203182A1 (fr) | Circuit distribué | |
JP2002009589A (ja) | インピーダンス変換回路 | |
US5420524A (en) | Differential gain stage for use in a standard bipolar ECL process | |
US7302249B1 (en) | High dynamic range mixer apparatus and balun therefor | |
US4786880A (en) | Filter arrangement | |
Chaichana et al. | Current-mode MISO filter using CCCDTAs and grounded capacitors | |
US20230282644A1 (en) | Layout design for rf circuit | |
US7132727B2 (en) | Layout technique for C3MOS inductive broadbanding | |
KR100492280B1 (ko) | 표준 3중 웰 씨모스 공정에서 구현된 수직형 바이폴라정션 트랜지스터를 전류 소오스로 사용하는 회로 | |
US6690231B1 (en) | Gain stage that minimizes the miller effect | |
DEMİREL et al. | A Low-Power 30MHz, 6th Order Bandpass Differential Gm-C Filter on Chip Utilizing Floating Current Source |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AS | Assignment |
Owner name: CASCADE MICROTECH, INC., OREGON Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:CAMPBELL, RICHARD;REEL/FRAME:018434/0731 Effective date: 20061003 |
|
STCB | Information on status: application discontinuation |
Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION |