US20070296087A1 - Semiconductor device and method for manufacturing semiconductor device - Google Patents
Semiconductor device and method for manufacturing semiconductor device Download PDFInfo
- Publication number
- US20070296087A1 US20070296087A1 US11/839,712 US83971207A US2007296087A1 US 20070296087 A1 US20070296087 A1 US 20070296087A1 US 83971207 A US83971207 A US 83971207A US 2007296087 A1 US2007296087 A1 US 2007296087A1
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- semiconductor chip
- chip
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 154
- 238000000034 method Methods 0.000 title claims description 13
- 238000004519 manufacturing process Methods 0.000 title claims description 9
- 239000000758 substrate Substances 0.000 claims abstract description 33
- 239000004020 conductor Substances 0.000 claims description 21
- 125000006850 spacer group Chemical group 0.000 claims description 5
- 238000004806 packaging method and process Methods 0.000 description 10
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- 230000003287 optical effect Effects 0.000 description 3
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- 239000003990 capacitor Substances 0.000 description 2
- 239000000919 ceramic Substances 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
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- 239000004760 aramid Substances 0.000 description 1
- 229920003235 aromatic polyamide Polymers 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
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- 229920000647 polyepoxide Polymers 0.000 description 1
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- 238000004544 sputter deposition Methods 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
- 229910000859 α-Fe Inorganic materials 0.000 description 1
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Definitions
- the present invention relates to a semiconductor device which is particularly preferably applied to a three-dimensional integrated configuration.
- a method for forming a conductor film on a rear surface of a second semiconductor chip mounted on a first semiconductor chip in order to restrain interference between the stacked semiconductor chips caused by noise is disclosed in an example of related art.
- Japanese Patent No. 3,681,690 is the example of related art.
- the interference occurs between the stacked semiconductor chips caused by noise, disadvantageously leading to reduced reliability of the semiconductor device.
- the conductor film needs to be formed on the rear surface of the second semiconductor chip mounted on the first semiconductor chip, disadvantageously leading to a complicated manufacturing process of the second semiconductor chip.
- the invention is intended to provide a semiconductor device in which chips can be stacked while suppressing the interference between the chips caused by noise, and a method for manufacturing the same.
- a semiconductor device includes a first semiconductor chip that is face-down mounted on a substrate, a second semiconductor chip that is face-up mounted on the first semiconductor chip, and an electromagnetic shielding plate that is interposed between the first semiconductor chip and the second semiconductor chip.
- the second semiconductor chip is stacked on the first semiconductor chip, it may be possible to suppress the interference between the first and second semiconductor chips caused by noise, without the complicated manufacturing process of the first and second semiconductor chips. Therefore, the cost may be prevented from increasing and packaging density of the semiconductor chip may be improved.
- a semiconductor device includes a first semiconductor chip that is face-down mounted on a substrate, a second semiconductor chip that is face-up mounted on the first semiconductor chip, and a dummy chip that is interposed between the first semiconductor chip and the second semiconductor chip and having a conductor film formed on an upper or lower surface if the dummy chip.
- the dummy chip is interposed between the first semiconductor chip and the second semiconductor chip, suppressed may be the interference between the first and second semiconductor chips caused by noise.
- the packaging density of the semiconductor chip may be improved without leading to the complicated manufacturing process of the first and second semiconductor chips.
- a semiconductor device includes a first semiconductor chip that is face-down mounted on a substrate, a second semiconductor chip that is face-up mounted on the first semiconductor chip, and an electronic component that is arranged below the second semiconductor chip and mounted on the substrate.
- the second semiconductor chip and the electronic component may be arranged above the substrate to as to overlap each other, restraining increase of the packaging area.
- a semiconductor device includes a first semiconductor chip that is face-down mounted on a substrate, a second semiconductor chip that is face-up mounted on the first semiconductor chip, an electronic component that is arranged below the second semiconductor chip and mounted on the substrate, and a spacer that is interposed between the first semiconductor chip and the second semiconductor chip, the spacer separating the second semiconductor chip from the electronic component.
- the second semiconductor chip and the electronic component may be arranged above the substrate to as to overlap each other, restraining increase of the packaging area.
- the second semiconductor chip preferably be larger than the first semiconductor chip.
- the electronic component may be arranged below the second semiconductor chip while not contacting with the first semiconductor chip disposed beneath the second semiconductor chip.
- the packaging area may be increased.
- the first semiconductor chip may have an analog IC and the second semiconductor chip may have a digital IC.
- a method for manufacturing a semiconductor device includes face-down mounting a first semiconductor chip on a substrate, disposing on the first semiconductor chip a dummy chip having a conductor film formed on an upper or lower surface of the dummy chip, and face-up mounting a second semiconductor chip on the dummy chip.
- the dummy chip since the dummy chip is mounted between the first semiconductor chip and the second semiconductor chip, it may be possible to suppress the interference between the first and second semiconductor chips caused by noise. Thus, the cost may be prevented from increasing, improving the packaging density of the semiconductor chip.
- FIGS. 1 (A) and 1 (B) show a schematic configuration of an embodiment of the present invention.
- FIG. 1 (A) is a plan view of a schematic configuration of the semiconductor device of the embodiment of the invention.
- FIG. 1 (B) is a sectional view taken along line A-A′ in FIG. 1 (A).
- a carrier substrate 1 has a land 2 formed on a rear surface thereof.
- the land 2 is formed thereon with a protruding electrode 3 .
- the carrier substrate 1 has a surface thereof provided with a terminal electrode 4 coupled to a protruding electrode 5 , a terminal electrode 15 connected with the bonding wire 13 , and terminal electrodes 16 and 18 coupled respectively to electronic components 17 and 19 .
- the carrier substrate 1 used can be a double-sided substrate, multilayer wiring substrate, build-up substrate, tape substrate or film substrate, for example.
- the carrier substrate 1 uses as materials a polyamide resin, glass epoxy resin, BT resin, aramid/epoxy composites or ceramic.
- the protruding electrode 3 includes an Au bump, Cu bump and Ni bump coated with a solder or the like, or solder ball.
- the protruding electrode 5 is formed on a semiconductor chip 6 .
- a conductor film 9 is formed on an upper surface of a dummy chip 8 .
- An electrode pad 12 is formed on a semiconductor chip 11 .
- the semiconductor chip 6 can have an analog IC mounted thereon, and the semiconductor chip 11 can have a digital IC mounted thereon.
- the dummy chip 8 can be formed of a bare chip composed of a semiconductor such as Si.
- the conductor film 9 can be made of a metal film such as Al and Cu, for example. A thickness of the conductor film 9 may be around 10000A.
- the conductor film 9 and the dummy chip 8 can be made as follows. First, a wafer composed of a semiconductor such as Si is prepared. The wafer may have such a size as to form a plurality of the dummy chips 8 . Next, formed on one surface of the wafer entirely is a metal film such as Al and Cu, as the conductor film 9 , by use of a sputtering method, chemical vapor deposition (CVD) method, and plating method.
- CVD chemical vapor deposition
- the wafer on which the conductor film 9 is made is cut into individual pieces of a size used as the dummy chip 8 .
- the conductor film 9 and the dummy chip 8 are made. It should be noted that before the wafer is cut into individual pieces, a rear surface of the wafer (the surface of the wafer remote from that on which the conductor film 9 is formed) may be entirely provided with an adhesive layer 7 and then the wafer is cut into the individuals.
- an electromagnetic shielding plate such as a metal plate or ferrite plate may be used instead of the dummy chip 8 provided with the conductor film 9 .
- the semiconductor chip 6 is face-up mounted on the carrier substrate 1 with the protruding electrode 5 therebetween.
- the protruding electrode 5 is coupled to the terminal electrode 4 .
- used may be, for example, a metal connection such as solder connection and alloy connection, as well as a pressure welding connection such as anisotropic conductive film (ACF) connection, nonconductive film (NCF) connection, anisotropic conductive paste (ACP) connection, and nonconductive paste (NCP) connection.
- ACF anisotropic conductive film
- NCF nonconductive film
- ACP anisotropic conductive paste
- NCP nonconductive paste
- the dummy chip 8 On the semiconductor chip 6 disposed is the dummy chip 8 having on the upper surface thereof the conductor film 9 formed with the adhesive layer 7 interposed between the semiconductor chip and the dummy chip.
- the adhesive layer 7 and the dummy chip 8 may have the same size when viewed from the top. In other words, a configuration may be such that side surfaces of the adhesive layer 7 and the dummy chip 8 are identical.
- the semiconductor chip 11 On the conductor film 9 , face-up mounted is the semiconductor chip 11 with an adhesive layer 10 therebetween.
- the adhesive layer 10 and the semiconductor chip 11 may have the same size when viewed from the top. In other words, a configuration may be such that side surfaces of the adhesive layer 10 and the semiconductor chip 10 are identical.
- the semiconductor chip 11 is provided with the electrode pad 12 bonded to the terminal electrode 15 with the bonding wire 13 , and is coupled to the carrier substrate 1 via the bonding wire 13 .
- the electronic component 17 is mounted on the carrier substrate 1 with the terminal electrode 16 therebetween alongside the semiconductor chip 11 .
- the electronic component 19 is mounted on the carrier substrate 1 with the terminal electrode 18 therebetween below the semiconductor chip 11 . It should be noted that the electronic component 19 includes a resistor, capacitor, coil, and connector.
- the semiconductor chip 11 coupled with the bonding wire 13 , and the electronic components 17 and 19 are sealed in a sealing resin 20 .
- the semiconductor chip 11 is disposed on the semiconductor chip 6 , it is possible to restrain the interference between the semiconductor chips 6 and 11 caused by noise with no conductive layer formed on the rear surfaces of the semiconductor chips 6 and 11 . As a result, the packaging density of the semiconductor chips 6 and 11 can be improved without requiring a complicated manufacturing process of the semiconductor chips 6 and 11 .
- the semiconductor chips 6 and 11 , and the dummy chip 8 are configured such that the sizes thereof are increased in the order of the semiconductor chip 6 , the dummy chip 8 , the semiconductor chip 11 . That is, the configuration is preferably such that the dummy chip 8 is larger than the semiconductor chip 6 , and the semiconductor chip 11 is larger than the dummy chip 8 . This enables the electronic component 19 to be arranged below the semiconductor chip 11 without contacting with the semiconductor chip 6 and the dummy chip 8 disposed beneath the semiconductor chip 11 , thus, suppressing the packaging area from increasing. A thickness of the dummy chip 8 can be set such that the electronic component 19 dose not contact with the semiconductor chip 11 .
- the thickness of the dummy chip 8 and the conductor film 9 may be set such that the upper surface of the conductor film 9 (the surface of the conductor film 9 opposite to the surface of the conductor film facing the dummy chip 8 ) is higher than the upper surface of the electronic component 19 (the surface of the electronic component 19 opposite to the surface of the electronic component 19 facing the carrier substrate 1 ).
- This enables the electronic component 19 to be prevented from contacting with the semiconductor chip 11 , and the dummy chip 8 to be used as a spacer. Therefore, the complicated manufacturing process can be suppressed and the electronic component 19 can be disposed below the semiconductor chip 11 .
- the carrier substrate 1 mounting thereon the semiconductor chips 6 and 11 can be applied to an electronic apparatus such as a liquid crystal display, mobile phone, handheld terminal, video camera, digital camera, mini disc (MD) player, IC card, and IC tag. Therefore, the electronic apparatus can be reduced in size and weight, and improved in reliability.
- an electronic apparatus such as a liquid crystal display, mobile phone, handheld terminal, video camera, digital camera, mini disc (MD) player, IC card, and IC tag. Therefore, the electronic apparatus can be reduced in size and weight, and improved in reliability.
- the method for mounting the semiconductor chip is described as an example.
- the invention is not necessarily limited to the mounting method of the semiconductor chip, and may be applied to a method for mounting a resistor, capacitor and connector, as well as a method for mounting a ceramic element such as a surface acoustic wave (SAW) element, an optical element such as an optical modulator and optical switch, and various sensors such as a magnetic sensor and biosensor,
- a ceramic element such as a surface acoustic wave (SAW) element
- an optical element such as an optical modulator and optical switch
- sensors such as a magnetic sensor and biosensor
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Health & Medical Sciences (AREA)
- Electromagnetism (AREA)
- Toxicology (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
A semiconductor device includes a first semiconductor chip face-down mounted on a substrate, a second semiconductor chip face-up mounted on the first semiconductor chip, and an electromagnetic shielding plate interposed between the first semiconductor chip and the second semiconductor chip.
Description
- 1. Technical Field
- The present invention relates to a semiconductor device which is particularly preferably applied to a three-dimensional integrated configuration.
- 2. Related Art
- There has been a method in which a face-up mounted semiconductor chip is stacked on a face-down mounted semiconductor chip in a semiconductor device of related art in order to achieve high density packaging of the semiconductor chip.
- For example, disclosed in an example of related art is a method for forming a conductor film on a rear surface of a second semiconductor chip mounted on a first semiconductor chip in order to restrain interference between the stacked semiconductor chips caused by noise.
- Japanese Patent No. 3,681,690 is the example of related art.
- However, in a stacked structure of the semiconductor chips of related art, the interference occurs between the stacked semiconductor chips caused by noise, disadvantageously leading to reduced reliability of the semiconductor device. Further, in the method disclosed in the example of related art, the conductor film needs to be formed on the rear surface of the second semiconductor chip mounted on the first semiconductor chip, disadvantageously leading to a complicated manufacturing process of the second semiconductor chip.
- The invention is intended to provide a semiconductor device in which chips can be stacked while suppressing the interference between the chips caused by noise, and a method for manufacturing the same.
- According to a first aspect of the invention, a semiconductor device includes a first semiconductor chip that is face-down mounted on a substrate, a second semiconductor chip that is face-up mounted on the first semiconductor chip, and an electromagnetic shielding plate that is interposed between the first semiconductor chip and the second semiconductor chip.
- In this case, even if the second semiconductor chip is stacked on the first semiconductor chip, it may be possible to suppress the interference between the first and second semiconductor chips caused by noise, without the complicated manufacturing process of the first and second semiconductor chips. Therefore, the cost may be prevented from increasing and packaging density of the semiconductor chip may be improved.
- According to a second aspect of the invention, a semiconductor device includes a first semiconductor chip that is face-down mounted on a substrate, a second semiconductor chip that is face-up mounted on the first semiconductor chip, and a dummy chip that is interposed between the first semiconductor chip and the second semiconductor chip and having a conductor film formed on an upper or lower surface if the dummy chip.
- In this case, since the dummy chip is interposed between the first semiconductor chip and the second semiconductor chip, suppressed may be the interference between the first and second semiconductor chips caused by noise. Thus, the packaging density of the semiconductor chip may be improved without leading to the complicated manufacturing process of the first and second semiconductor chips.
- According to a third aspect of the invention, a semiconductor device includes a first semiconductor chip that is face-down mounted on a substrate, a second semiconductor chip that is face-up mounted on the first semiconductor chip, and an electronic component that is arranged below the second semiconductor chip and mounted on the substrate.
- In this case, even if the second semiconductor chip is stacked on the first semiconductor chip, the second semiconductor chip and the electronic component may be arranged above the substrate to as to overlap each other, restraining increase of the packaging area.
- According to a fourth aspect of the invention, a semiconductor device includes a first semiconductor chip that is face-down mounted on a substrate, a second semiconductor chip that is face-up mounted on the first semiconductor chip, an electronic component that is arranged below the second semiconductor chip and mounted on the substrate, and a spacer that is interposed between the first semiconductor chip and the second semiconductor chip, the spacer separating the second semiconductor chip from the electronic component.
- In this case, even if the second semiconductor chip is stacked on the first semiconductor chip, the second semiconductor chip and the electronic component may be arranged above the substrate to as to overlap each other, restraining increase of the packaging area.
- In the semiconductor device of the aspects of the invention, the second semiconductor chip preferably be larger than the first semiconductor chip.
- In this case, the electronic component may be arranged below the second semiconductor chip while not contacting with the first semiconductor chip disposed beneath the second semiconductor chip. Thus, the packaging area may be increased.
- In the semiconductor device of the aspects of the invention, the first semiconductor chip may have an analog IC and the second semiconductor chip may have a digital IC.
- In this case, even if the analog IC and the digital IC are stacked on the same substrate, it may be possible suppress the interference between the analog IC and the digital IC caused by noise. This may suppress increase of the packaging area and reduce characteristic deterioration of the analog IC and the digital IC.
- According to a fifth aspect of the invention, a method for manufacturing a semiconductor device includes face-down mounting a first semiconductor chip on a substrate, disposing on the first semiconductor chip a dummy chip having a conductor film formed on an upper or lower surface of the dummy chip, and face-up mounting a second semiconductor chip on the dummy chip.
- In this case, since the dummy chip is mounted between the first semiconductor chip and the second semiconductor chip, it may be possible to suppress the interference between the first and second semiconductor chips caused by noise. Thus, the cost may be prevented from increasing, improving the packaging density of the semiconductor chip.
- The invention will be described with reference to the accompanying drawings, wherein like numbers reference like elements.
- FIGS. 1(A) and 1(B) show a schematic configuration of an embodiment of the present invention.
- Hereinafter, description will be given of a semiconductor device according to an embodiment of the invention with reference to the drawings.
-
FIG. 1 (A) is a plan view of a schematic configuration of the semiconductor device of the embodiment of the invention.FIG. 1 (B) is a sectional view taken along line A-A′ inFIG. 1 (A). - Referring to FIGS. 1(A) and 1(B), a
carrier substrate 1 has aland 2 formed on a rear surface thereof. Theland 2 is formed thereon with a protrudingelectrode 3. Thecarrier substrate 1 has a surface thereof provided with aterminal electrode 4 coupled to a protrudingelectrode 5, aterminal electrode 15 connected with thebonding wire 13, andterminal electrodes electronic components carrier substrate 1, used can be a double-sided substrate, multilayer wiring substrate, build-up substrate, tape substrate or film substrate, for example. Thecarrier substrate 1 uses as materials a polyamide resin, glass epoxy resin, BT resin, aramid/epoxy composites or ceramic. Theprotruding electrode 3 includes an Au bump, Cu bump and Ni bump coated with a solder or the like, or solder ball. - The protruding
electrode 5 is formed on asemiconductor chip 6. Aconductor film 9 is formed on an upper surface of adummy chip 8. Anelectrode pad 12 is formed on asemiconductor chip 11. Thesemiconductor chip 6 can have an analog IC mounted thereon, and thesemiconductor chip 11 can have a digital IC mounted thereon. - The
dummy chip 8 can be formed of a bare chip composed of a semiconductor such as Si. Theconductor film 9 can be made of a metal film such as Al and Cu, for example. A thickness of theconductor film 9 may be around 10000A. At this time, theconductor film 9 and thedummy chip 8 can be made as follows. First, a wafer composed of a semiconductor such as Si is prepared. The wafer may have such a size as to form a plurality of thedummy chips 8. Next, formed on one surface of the wafer entirely is a metal film such as Al and Cu, as theconductor film 9, by use of a sputtering method, chemical vapor deposition (CVD) method, and plating method. Finally, the wafer on which theconductor film 9 is made is cut into individual pieces of a size used as thedummy chip 8. Thus, theconductor film 9 and thedummy chip 8 are made. It should be noted that before the wafer is cut into individual pieces, a rear surface of the wafer (the surface of the wafer remote from that on which theconductor film 9 is formed) may be entirely provided with anadhesive layer 7 and then the wafer is cut into the individuals. - Alternatively, an electromagnetic shielding plate such as a metal plate or ferrite plate may be used instead of the
dummy chip 8 provided with theconductor film 9. - The
semiconductor chip 6 is face-up mounted on thecarrier substrate 1 with the protrudingelectrode 5 therebetween. The protrudingelectrode 5 is coupled to theterminal electrode 4. In a case of coupling the protrudingelectrode 5 and theterminal electrode 4, used may be, for example, a metal connection such as solder connection and alloy connection, as well as a pressure welding connection such as anisotropic conductive film (ACF) connection, nonconductive film (NCF) connection, anisotropic conductive paste (ACP) connection, and nonconductive paste (NCP) connection. - On the
semiconductor chip 6 disposed is thedummy chip 8 having on the upper surface thereof theconductor film 9 formed with theadhesive layer 7 interposed between the semiconductor chip and the dummy chip. Theadhesive layer 7 and thedummy chip 8 may have the same size when viewed from the top. In other words, a configuration may be such that side surfaces of theadhesive layer 7 and thedummy chip 8 are identical. - On the
conductor film 9, face-up mounted is thesemiconductor chip 11 with anadhesive layer 10 therebetween. Theadhesive layer 10 and thesemiconductor chip 11 may have the same size when viewed from the top. In other words, a configuration may be such that side surfaces of theadhesive layer 10 and thesemiconductor chip 10 are identical. - The
semiconductor chip 11 is provided with theelectrode pad 12 bonded to theterminal electrode 15 with thebonding wire 13, and is coupled to thecarrier substrate 1 via thebonding wire 13. Theelectronic component 17 is mounted on thecarrier substrate 1 with theterminal electrode 16 therebetween alongside thesemiconductor chip 11. Theelectronic component 19 is mounted on thecarrier substrate 1 with theterminal electrode 18 therebetween below thesemiconductor chip 11. It should be noted that theelectronic component 19 includes a resistor, capacitor, coil, and connector. Thesemiconductor chip 11 coupled with thebonding wire 13, and theelectronic components resin 20. - With this configuration, in the case that the
semiconductor chip 11 is disposed on thesemiconductor chip 6, it is possible to restrain the interference between thesemiconductor chips semiconductor chips semiconductor chips semiconductor chips - It is preferable the
semiconductor chips dummy chip 8 are configured such that the sizes thereof are increased in the order of thesemiconductor chip 6, thedummy chip 8, thesemiconductor chip 11. That is, the configuration is preferably such that thedummy chip 8 is larger than thesemiconductor chip 6, and thesemiconductor chip 11 is larger than thedummy chip 8. This enables theelectronic component 19 to be arranged below thesemiconductor chip 11 without contacting with thesemiconductor chip 6 and thedummy chip 8 disposed beneath thesemiconductor chip 11, thus, suppressing the packaging area from increasing. A thickness of thedummy chip 8 can be set such that theelectronic component 19 dose not contact with thesemiconductor chip 11. Specifically, the thickness of thedummy chip 8 and theconductor film 9 may be set such that the upper surface of the conductor film 9 (the surface of theconductor film 9 opposite to the surface of the conductor film facing the dummy chip 8) is higher than the upper surface of the electronic component 19 (the surface of theelectronic component 19 opposite to the surface of theelectronic component 19 facing the carrier substrate 1). This enables theelectronic component 19 to be prevented from contacting with thesemiconductor chip 11, and thedummy chip 8 to be used as a spacer. Therefore, the complicated manufacturing process can be suppressed and theelectronic component 19 can be disposed below thesemiconductor chip 11. - The
carrier substrate 1 mounting thereon thesemiconductor chips - In the above-described embodiment, the method for mounting the semiconductor chip is described as an example. However, the invention is not necessarily limited to the mounting method of the semiconductor chip, and may be applied to a method for mounting a resistor, capacitor and connector, as well as a method for mounting a ceramic element such as a surface acoustic wave (SAW) element, an optical element such as an optical modulator and optical switch, and various sensors such as a magnetic sensor and biosensor,
Claims (7)
1. A semiconductor device, comprising:
a first semiconductor chip that is face-down mounted on a substrate;
a second semiconductor chip that is face-up mounted on the first semiconductor chip; and
an electromagnetic shielding plate interposed between the first semiconductor chip and the second semiconductor chip.
2. A semiconductor device, comprising:
a first semiconductor chip that is face-down mounted on a substrate;
a second semiconductor chip that is face-up mounted on the first semiconductor chip; and
a dummy chip that is interposed between the first semiconductor chip and the second semiconductor chip, and having a conductor film formed on an upper or lower surface of the dummy chip.
3. A semiconductor device, comprising:
a first semiconductor chip that is face-down mounted on a substrate;
a second semiconductor chip face-up that is mounted on the first semiconductor chip; and
an electronic component that is arranged below the second semiconductor chip and mounted on the substrate.
4. A semiconductor device, comprising:
a first semiconductor chip face-down that is mounted on a substrate;
a second semiconductor chip face-up that is mounted on the first semiconductor chip;
an electronic component that is arranged below the second semiconductor chip and mounted on the substrate; and
a spacer that is interposed between the first semiconductor chip and the second semiconductor chip, the spacer separating the second semiconductor chip from the electronic component.
5. The semiconductor device according to claim 1 , wherein the second semiconductor chip is larger than the first semiconductor chip.
6. The semiconductor device according to claim 1 , wherein the first semiconductor chip has an analog IC and the second semiconductor chip has a digital IC.
7. A method for manufacturing a semiconductor device, comprising:
face-down mounting a first semiconductor chip on a substrate;
disposing on the first semiconductor chip a dummy chip having a conductor film formed on an upper or lower surface of the dummy chip; and
face-up mounting a second semiconductor chip on the dummy chip.
Priority Applications (1)
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US12/782,749 US8749041B2 (en) | 2006-02-21 | 2010-05-19 | Thee-dimensional integrated semiconductor device and method for manufacturing same |
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JP2006043270A JP4876618B2 (en) | 2006-02-21 | 2006-02-21 | Semiconductor device and manufacturing method of semiconductor device |
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US12/782,749 Expired - Fee Related US8749041B2 (en) | 2006-02-21 | 2010-05-19 | Thee-dimensional integrated semiconductor device and method for manufacturing same |
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EP3772099A1 (en) * | 2019-08-01 | 2021-02-03 | MediaTek Inc. | Semiconductor package with emi shielding structure |
US11355450B2 (en) | 2019-08-01 | 2022-06-07 | Mediatek Inc. | Semiconductor package with EMI shielding structure |
US11869849B2 (en) | 2019-08-01 | 2024-01-09 | Mediatek Inc. | Semiconductor package with EMI shielding structure |
WO2023018548A1 (en) * | 2021-08-12 | 2023-02-16 | Marvell Asia Pte, Ltd. | Semiconductor device package with semiconductive thermal pedestal |
US12021003B2 (en) | 2021-08-12 | 2024-06-25 | Marvell Asia Pte, Ltd. | Semiconductor device package with semiconductive thermal pedestal |
Also Published As
Publication number | Publication date |
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JP2007227414A (en) | 2007-09-06 |
US8749041B2 (en) | 2014-06-10 |
JP4876618B2 (en) | 2012-02-15 |
US20100230827A1 (en) | 2010-09-16 |
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