US20070176708A1 - Narrow impedance conversion device - Google Patents

Narrow impedance conversion device Download PDF

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Publication number
US20070176708A1
US20070176708A1 US11/500,943 US50094306A US2007176708A1 US 20070176708 A1 US20070176708 A1 US 20070176708A1 US 50094306 A US50094306 A US 50094306A US 2007176708 A1 US2007176708 A1 US 2007176708A1
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conductor
conductors
conversion device
impedance
impedance conversion
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US7446625B2 (en
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Kanji Otsuka
Tamotsu Usami
Yutaka Akiyama
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Toshiba Corp
Kyocera Corp
Fujitsu Semiconductor Ltd
Renesas Electronics Corp
Lapis Semiconductor Co Ltd
Fujifilm Business Innovation Corp
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Renesas Technology Corp
Toshiba Corp
Kyocera Corp
Fuji Xerox Co Ltd
Fujitsu Ltd
Oki Electric Industry Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01PWAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P3/00Waveguides; Transmission lines of the waveguide type
    • H01P3/02Waveguides; Transmission lines of the waveguide type with two longitudinal conductors
    • H01P3/08Microstrips; Strip lines
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01PWAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P5/00Coupling devices of the waveguide type
    • H01P5/02Coupling devices of the waveguide type with invariable factor of coupling
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01PWAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P1/00Auxiliary devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01PWAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P3/00Waveguides; Transmission lines of the waveguide type

Definitions

  • the present invention relates to an impedance conversion device, and in particular to an impedance conversion device that can be inserted into a stacked pair line.
  • An object of the present invention is to provide an impedance conversion device that is narrow enough for insertion into a stacked pair line.
  • the invented impedance conversion device comprises first, second, third, and fourth conductors, each having a first end and a second end.
  • the conductors are arranged so that the first and second conductors form a first transmission line having a first characteristic impedance, the first and third conductors form a second transmission line having a second characteristic impedance different from the first characteristic impedance, the second and fourth conductors form a third transmission line having the second characteristic impedance, and the third and fourth conductors form a fourth transmission line having the first characteristic impedance.
  • a first resistor having a resistance equal to the first characteristic impedance is connected between the second ends of the second and fourth conductors, which are mutually proximate.
  • a second resistor having a resistance equal to the second characteristic impedance is connected between the first ends of the third and fourth conductors, which are mutually proximate.
  • the four conductors transmit a signal that is input at the first ends of the first and second conductors and output at the second ends of the first and third conductors.
  • the fourth conductor preferably has a length not exceeding one-fourth of the fundamental wavelength of the transmitted signal.
  • the impedance of the transmitted signal is converted efficiently, and the dimensions of the impedance conversion device in the directions orthogonal to the longitudinal direction of the conductors are comparatively small, permitting the impedance converting device to be formed in a confined space and in particular to be inserted into a stacked pair line.
  • Use of this impedance conversion device can contribute to a reduction in the size of microelectronic parts.
  • FIG. 1 is a perspective view of an impedance conversion device embodying the present invention
  • FIG. 2 is a top plan view of the impedance conversion device in FIG. 1 ;
  • FIG. 3 is a bottom plan view of the impedance conversion device in FIG. 1 ;
  • FIG. 4 is a side elevation view of the impedance conversion device in FIG. 1 ;
  • FIG. 5 is a sectional view through line V-V in FIGS. 2-4 ;
  • FIG. 6 is a sectional view through line VI-VI in FIGS. 2-4 ;
  • FIG. 7 is a sectional view through line VII-VII in FIGS. 2-4 ;
  • FIG. 8 is a top plan view of a structure used in time-domain reflectometry
  • FIG. 9 is a bottom plan view of the structure in FIG. 8 ;
  • FIG. 10 depicts a time-domain reflectometer, and a coaxial cable and probes connected thereto;
  • FIG. 11 shows exemplary waveforms obtained by time-domain reflectometry using the structure in FIGS. 8 and 9 ;
  • FIG. 12 schematically depicts the impedance conversion device in FIG. 1 with a direct current source connected on its input side and a load resistor connected on its output side;
  • FIG. 13 schematically depicts the impedance conversion device in FIG. 1 with a pulse generator connected on its input side, a load resistor connected on its output side, and an oscilloscope connected to measure the voltage on the output side;
  • FIG. 14 is a top plan view of an impedance conversion device used in time-domain reflectometry
  • FIG. 15 is a bottom plan view of an impedance conversion device used in time-domain reflectometry
  • FIG. 16 shows exemplary waveforms obtained with the measurement setup shown in FIG. 13 ;
  • FIG. 17 shows exemplary waveforms obtained with the measurement setup shown in FIG. 13 with the output side left electrically open;
  • FIG. 18 shows exemplary waveforms obtained with the measurement setup shown in FIG. 13 with the central part of the conductor lengthened
  • FIG. 19 is a top plan view of another structure used in time-domain reflectometry.
  • FIG. 20 is a bottom plan view of the structure in FIG. 19 ;
  • FIG. 21 shows an exemplary waveform obtained by time-domain reflectometry using the structure in FIGS. 19 and 20 ;
  • FIG. 22 is a perspective view illustrating crosstalk between mutually adjacent conductors
  • FIG. 23 is a sectional view illustrating crosstalk between mutually adjacent conductors
  • FIG. 24 is a sectional view illustrating another embodiment of the invention.
  • the impedance conversion device comprises first, second, third, and fourth strip-like conductors 11 , 12 , 13 , 14 , first and second resistors 15 , 16 , and a dielectric sheet 17 .
  • the first to fourth conductors 11 , 12 , 13 , 14 extend in mutually parallel straight lines.
  • the dielectric sheet 17 has a first surface or upper surface 17 a (uppermost in FIGS. 1 and 4 - 7 ) and a second surface or lower surface 17 b .
  • the first and third conductors 11 , 13 are disposed side by side on the upper surface 17 a of the dielectric sheet 17 , spaced apart from each other in a direction orthogonal to their lengths and parallel to the upper surface 17 a and lower surface 17 b of the dielectric sheet 17 .
  • the second and fourth conductors 12 , 14 are similarly disposed side by side on the lower surface 17 b of the dielectric sheet 17 .
  • the first conductor 11 and the second conductor 12 are disposed on opposite sides of the dielectric sheet 17 , facing each other in a direction orthogonal to the upper surface 17 a and lower surface 17 b of the dielectric sheet 17 .
  • the third conductor 13 and the fourth conductor 14 are similarly disposed on opposite sides of the dielectric sheet 17 , facing each other.
  • the impedance conversion device 1 has an input part or region 1 a , a central part or region 1 b , and an output part or region 1 c .
  • the input region 1 a is the region near the input end id of the impedance conversion device 1 ; the output region 1 c is the region near the output end 1 e of the impedance conversion device 1 .
  • the central region 1 b is the region between the input region 1 a and the output region 1 c .
  • the input region 1 a , the central region 1 b , and the output region 1 c are mutually contiguous.
  • the first conductor 11 extends across the input region 1 a , the central region 1 b , and the output region 1 c of the impedance conversion device 1 ; the first conductor 11 has an input part 11 a , a central part 11 b , and an output part 11 c disposed in the input region 1 a , the central region 1 b , and the output region 1 c , respectively.
  • the second conductor 12 extends across the input region 1 a and the central region 1 b of the impedance conversion device 1 , and has an input part 12 a and a central part 12 b disposed in the input region 1 a and the central region 1 b , respectively.
  • the third conductor 13 extends across the central region 1 b and the output region 1 c of the impedance conversion device 1 , and has a central part 13 b and an output part 13 c disposed in the central region 1 b and the output region 1 c , respectively.
  • the fourth conductor 14 extends only across the central region 1 b , and has a central part 14 b disposed in the central region 1 b.
  • the first conductor 11 and second conductor 12 form a transmission line having a first characteristic impedance z 1 .
  • the second conductor 12 and fourth conductor 14 form a transmission line having a second characteristic impedance z 2 different from the first characteristic impedance z 1 .
  • the first conductor 11 and the third conductor 13 form a transmission line having the second characteristic impedance z 2 .
  • the third conductor 13 and the fourth conductor 14 form a transmission line having the first characteristic impedance z 1 .
  • the first conductor 11 is disposed so that one end (the input end) 11 d is at the input end 1 d of the impedance conversion device 1 , and the other end (the output end) 11 e is at the output end of the impedance conversion device 1 .
  • the second conductor 12 is disposed so that one end (the input end) 12 d is at the input end 1 d of the impedance conversion device 1 , and the other end (the output end) 12 e is at the boundary 1 g between the central region 1 b and the output region 1 c of the impedance conversion device 1 .
  • the third conductor 13 is disposed so that one end (the input end) 13 d is at the boundary 1 f between the input region 1 a and the central region 1 b of the impedance conversion device 1 , and the other end (the output end) 13 e is at the output end 1 e of the impedance conversion device 1 .
  • the fourth conductor 14 is disposed so that one end (the input end) 14 d is at the boundary 1 f between the input region 1 a and the central region 1 b of the impedance conversion device 1 , and the other end (the output end) is at the boundary 1 g between the central region 1 b and the output region 1 c of the impedance conversion device 1 .
  • the output end 12 e of the second conductor 12 and the output end 14 e of the fourth conductor 14 are both disposed on the lower surface 17 b of the dielectric sheet 17 and are mutually proximate.
  • the input end 13 d of the third conductor 13 and the input end 14 d of the fourth conductor 14 are disposed on the lower surface 17 b and the upper surface 17 a of the dielectric sheet 17 , respectively, and are mutually proximate.
  • a first resistor 15 is mounted on the lower surface 17 b of the dielectric sheet 17 .
  • the first resistor 15 interconnects the output end 12 e of the second conductor 12 and the output end 14 e of the fourth conductor 14 , and has a resistance R 1 equal to the first characteristic impedance z 1 .
  • a second resistor 16 is formed so that it extends through the dielectric sheet 17 .
  • the second resistor 16 interconnects the input end 13 d of the third conductor 13 and the input end 14 d of the fourth conductor 14 , and has a resistance R 2 equal to the second characteristic impedance z 2 .
  • the value (the absolute value) of the first characteristic impedance z 1 is, for example, fifty ohms (50 ⁇ ), and the value (the absolute value) of the second characteristic impedance z 2 is, for example, 82 ⁇ .
  • the first to fourth conductors 11 to 14 have identical cross-sectional configurations, for example, a thickness (the vertical dimension in FIGS. 5-7 ) of 40 micrometers, and a width (the horizontal dimension in FIGS. 5-7 ) of 0.8 millimeters. (The dimensions in the drawings are not shown proportional to the actual dimensions.)
  • the dielectric sheet 17 has a thickness of 170 micrometers; the distance between the first conductor 11 and the second conductor 12 and the distance between the third conductor 13 and the fourth conductor 14 are equal to the thickness of the dielectric sheet 17 .
  • the distance between the first conductor 11 and the third conductor 13 and the distance between the second conductor 12 and the fourth conductor 14 are identically 100 micrometers (0.1 millimeters).
  • the first to fourth conductors parallel each other in the central region 1 b , which therefore may be referred to as the ‘quadri-parallel’ part below.
  • the input region 1 a and the output region 1 c may be referred to as ‘duo-parallel’ parts, as only the first and second conductors 11 and 12 are parallel in the input region 1 a , and only the first and third conductors 11 and 13 are parallel in the output region 1 c.
  • the length of the central region 1 b of the impedance conversion device that is, the length of conductor 14 (the length in the longitudinal direction in which conductors 11 to 14 extend) preferably does not exceed one-fourth of the fundamental wavelength of the signal that is transmitted, and is preferably at least ten times as long as the larger of the two distances that separate the first conductor 11 from the second conductor 12 and the first conductor 11 from the third conductor 13 . More specifically, the length is preferably longer than 1/64 of the fundamental wavelength of the transmitted signal.
  • the impedance conversion device 1 When the impedance conversion device 1 is configured as above, its input impedance Zin is equal to the first characteristic impedance z 1 (50 ⁇ ) and its output impedance Zout is equal to the second characteristic impedance z 2 (82 ⁇ ). Impedance conversion therefore takes place. This was confirmed by using TDR (time domain reflectometry) to measure the impedance of the transmission lines.
  • TDR time domain reflectometry
  • TDR is carried out by transmitting a pulsed signal and observing the reflection of the pulse from the circuit under test; TDR detects changes in impedance along the transmission path of the signal.
  • FIGS. 8 and 9 are a top plan view and a bottom plan view of a structure used for time-domain reflectometry, corresponding respectively to FIGS. 2 and 3 .
  • the structure is similar to the impedance conversion device 1 shown in FIGS. 1-7 ; a dielectric sheet 117 (corresponding to the dielectric sheet 17 in FIG. 1 ) has a first conductor 111 and a third conductor 113 mounted on its upper surface 117 a , and a second conductor 112 and a fourth conductor 114 mounted on its lower surface 117 b .
  • the first to fourth conductors 111 to 114 correspond to the first to fourth conductors 11 to 14 in FIGS. 1-7 , with the same thickness and width as the first to fourth conductors.
  • the first conductor 111 and the second conductor 112 face each other across the dielectric sheet 117 ; the third conductor 113 and the fourth conductor 114 face each other across the dielectric sheet 117 .
  • Strip-like leads 121 to 124 formed of the same material as the conductors are mounted at the ends 111 h to 114 h of the first to fourth conductors 111 to 114 (the left ends in FIGS. 8 and 9 ); connecting pads 131 to 134 are mounted at the ends of the leads 121 to 124 .
  • the length LL of the leads 121 to 124 is twelve millimeters.
  • the TDR apparatus 51 had a coaxial cable 52 terminating in probes 53 a and 53 b for launching signal pulses and receiving reflected waves; the probes 53 a and 53 b were placed in contact with the conductors forming the transmission line so that signals could be input and their reflections received.
  • connecting pads 131 and 132 of conductor 111 and conductor 112 were contacted by probes 53 a and 53 b ;
  • connecting pads 133 and 134 of conductor 113 and conductor 114 were contacted by probes 53 a and 53 b .
  • FIG. 11 Exemplary waveforms that appeared on the display of the TDR apparatus 51 are shown in FIG. 11 .
  • curves B 5 a , B 5 b , B 5 c , and B 5 d indicate the waveforms obtained when conductor 111 and conductor 112 , conductor 113 and conductor 114 , conductor 111 and conductor 113 , and conductor 112 and conductor 114 , respectively, were contacted by probes 53 a and 53 b ; the zero levels of different waveforms are mutually offset for visibility.
  • the leftmost regions RXa to RXd of these curves indicate the impedance of the coaxial cable 52 (50 ⁇ ); the regions adjacent to regions RXa to RXd on the right correspond to the sections in which probes 53 a and 53 b make contact with connecting pads 131 to 134 or the ends 111 i to 114 i of conductors 111 to 114 ; the central regions RPa to RPd indicate the impedance of conductors 111 to 114 (the impedance of the transmission line comprising conductors 111 and 112 , the transmission line comprising conductors 113 and 114 , the transmission line comprising conductors 111 and 113 , and the transmission line comprising conductors 112 and 114 ); and the rightmost regions ROa to ROd indicate the impedance at the electrically open ends.
  • Regions RLa and RLb of curves B 5 a and B 5 b which are between the central regions RPa and RPb and the regions RCa to RCd corresponding to the contact sections of probes 53 a and 53 b , indicate the impedance of the leads 121 to 124 ; regions RLc and RLd of curves B 5 c and B 5 d , which are between the central regions RPc and RPd and the regions ROc and ROd corresponding to the electrically open ends, indicate the impedance of the leads 121 to 124 .
  • Table 1 The values shown in Table 1 can be read from the measured waveforms as the impedance of each pair of conductors.
  • the impedance conversion efficiency and waveform distortion of the novel impedance conversion device 1 were studied under various conditions.
  • a load resistor 18 with a value equal to the second characteristic impedance z 2 (82 ⁇ ) was connected between the output ends of the impedance conversion device 1 , that is, between the output ends 11 e and 13 e of conductors 11 and 13 , as shown in FIG. 12 .
  • conductors 11 to 14 are shown as coplanar to simplify the depiction of their electrical connection relationships and the depiction of resistors 15 and 16 is also simplified.
  • V out V in ⁇ R 2/(2 ⁇ R 2+ R 1+ R in) ⁇
  • Rin is the internal resistance of the direct current source 60 .
  • V out V in ⁇ R 2/(2 ⁇ R 2+2 ⁇ R 1) ⁇ (1)
  • the experimental impedance conversion device 1 shown in FIGS. 14 and 15 was used in this measurement.
  • the experimental device 1 shown in FIGS. 14 and 15 is substantially the same as the impedance conversion device 1 shown in FIGS. 1-7 , but has leads 121 and 122 disposed at the input ends 11 d and 12 d of conductors 11 and 12 and connecting pads 131 and 132 disposed at the ends of leads 121 and 122 , similar to the structure shown in FIGS. 8 and 9 .
  • the dielectric sheet 17 extends farther than in FIGS. 1-7 .
  • the probes 63 a and 63 b of the pulse generator 61 were placed in contact with the connecting pads 131 and 132 on the input side.
  • An oscilloscope 65 having high-impedance differential probes 66 a and 66 b was used. The measured waveforms are shown in FIG. 16 .
  • curves B 6 a , B 6 b , B 6 c , B 6 d , and B 6 e indicate waveforms obtained when the amplitude of the supplied pulses was 500 mV and the frequency of the pulse train was 100 MHz, 500 MHz, 1 GHz, 2 GHz, and 3 GHz, respectively.
  • the wave height values and rise times (the time required for the voltage level to increase from 20 percent to 80 percent of the wave height) determined from the measured waveforms are shown in Table 2.
  • the measured wave height was 255.1 mV.
  • FIG. 18 shows the measured waveforms for another experimental device in which the central part had a length of twenty millimeters.
  • waveforms B 8 a , B 8 b , B 8 c , B 8 d , and B 8 e were obtained with pulse train frequencies of 100 MHz, 500 MHz, 12 GHz, 2 GHz, and 3 GHz, respectively.
  • the wave height values determined from the measured waveforms are shown in Table 4.
  • FIG. 18 and Table 4 show a decrease in voltage and an increase in waveform distortion. The reason is thought to be the long distance between boundaries 1 f and 1 g , which causes a relatively long elapse of time from reflection at one boundary to reflection at the other boundary, leading to multiple reflections that distort the waveforms.
  • the characteristic impedance of the duo-parallel parts 1 a and 1 c and the characteristic impedance of the quadri-parallel part 1 b are slightly different. Multiple reflections therefore occur.
  • the quadri-parallel part should have a length not exceeding one-fourth of the fundamental wavelength of the signal that is transmitted. If the specific inductive capacity of the transmission line is four, then the electromagnetic wave speed is 1.5 ⁇ 10 8 m/s, and if the frequency of the pulse train supplied from the pulse generator 61 is 3 GHz, it follows that the wavelength is 50 millimeters, one-fourth of which is 12.5 millimeters.
  • the length of the quadri-parallel part 1 b need only be sufficient for electromagnetic waves to reshape the electromagnetic space between the parallel conductors. Interference between the conductors is caused by the spreading of the electromagnetic waves in a direction orthogonal to their direction of propagation, and the spreading speed is the same as the speed with which the electromagnetic waves propagate along the transmission line.
  • Reshaping of the electromagnetic space is possible if an electromagnetic wave can travel back and forth between the conductors about five times; the length corresponding to the delay time is a length ten times as long as the larger of the two distances separating the conductors (the larger of the distance (170 micrometers) between the first conductor 11 and the second conductor 12 and the distance (100 micrometers or 0.1 millimeter) between the first conductor 11 and the third conductor 13 ).
  • the larger of the two distances between the conductors is 170 micrometers, ten times that length is 1.7 millimeters; the quadri-parallel structure is effective if its length is equal to or greater than this value.
  • FIGS. 19 and 20 show the structure used in this time-domain reflectometry experiment.
  • the structure shown in FIGS. 8 and 9 was further modified by removing the parts near the ends 113 i and 114 i of the third conductor 113 and the fourth conductor 114 .
  • the length LS of the removed parts was 25 millimeters; the section with the removed parts constituted the duo-parallel part.
  • Connecting pads 131 and 132 of the first conductor 111 and the second conductor 112 of this structure were contacted by probes 53 a and 53 b of the TDR apparatus 51 .
  • the measured waveforms are shown in FIG. 21 .
  • the longitudinal axis in FIG. 21 is enlarged compared to that in FIG. 11 .
  • region RXa corresponds to a section of the coaxial cable 52
  • region RCa corresponds to leads 121 and 122
  • region RPa 1 corresponds to the quadri-parallel part (length LD)
  • region RPa 2 corresponds to the duo-parallel part (length LS)
  • region ROa corresponds to the electrically open ends.
  • the impedance of the quadri-parallel part (length LD) shown in FIG. 21 is 48 ⁇ , and the impedance of the right-side region RPa 22 (excluding the region RPa 21 adjacent to the region RPa 1 corresponding to the quadri-parallel part) of the duo-parallel part (length LS) is 51.2 ⁇ ; reflection occurs due to this difference.
  • the upper limit described above on the length of the quadri-parallel part 1 b is set in order to prevent reflection from occurring repeatedly and leading to multiple reflections.
  • the characteristic impedance changes gradually in the region RPa 21 adjacent to the region RPa 1 corresponding to the quadri-parallel part.
  • This part corresponds to 125 picoseconds of time, which is the sum of the slump due to the rise time of the step waveform of the TDR apparatus 51 (35 picoseconds, the same as the slump at the contact section RCa and the electrically open end ROa) and the time taken to detect the change; these factors cannot be separated accurately, but the physical phenomena that operate during detection are similar to the reshaping of the electromagnetic space described above.
  • the pulse energy input to one of the parallel conductors 11 to 14 causes various combinations of interference on adjacent conductors; the optimal state is ultimately the one in which inverted waveform energy is induced in the proximate conductors by electromagnetic interference as shown in FIG. 23 , with the crosstalk energy corresponding to the electromagnetic dispersion energy. This is in forward waves. Though backward waves are also induced, they are omitted here.
  • the input induces vertical coupling (coupling between the vertically adjacent conductors 11 and 12 in FIG. 1 ), and so the upper-left conductor becomes the output of the adjacent vertical coupling. With horizontal coupling (coupling between the horizontally adjacent conductors in FIG.
  • the conductors are disposed on the upper surface and lower surface of the dielectric sheet in FIGS. 1-7 , a structure in which conductors 11 to 14 are all embedded in a dielectric material 21 as shown in FIG. 24 (a sectional view similar to FIG. 6 ) is also possible.
  • the first to fourth conductors 11 to 14 may be formed in the same way as two pairs of stacked pair conductors are formed.
  • the first to third conductors 11 to 13 have input parts 11 a and 12 a and output parts 11 c and 13 c as well as central parts 11 b , 12 b , and 13 b , but the impedance conversion device may comprise only the central parts; the input parts 11 a and 12 a and output parts 11 c and 13 c may be omitted.
  • first to fourth conductors 11 to 14 extend in straight lines in the above embodiment, they may be curved.
  • the cross-sectional shapes and dimensions of the first to fourth conductors 11 to 14 need not all be the same; some may differ from the others.

Abstract

An impedance conversion device has four conductors arranged so that the first and second conductors form a transmission line having a first characteristic impedance, the third and fourth conductors form a transmission line having the first characteristic impedance, the first and third conductors form a transmission line having a second characteristic impedance, and the second and fourth conductors form a third transmission line having the second characteristic impedance. The second and fourth conductors are interconnected at proximate ends through a resistance equal to the first characteristic impedance. The third and fourth conductors are interconnected at proximate ends through a resistance equal to the second characteristic impedance. The lateral dimensions of the impedance conversion device are small enough to permit insertion in a stacked pair line.

Description

    BACKGROUND OF THE INVENTION
  • 1. Field of the Invention
  • The present invention relates to an impedance conversion device, and in particular to an impedance conversion device that can be inserted into a stacked pair line.
  • 2. Description of the Related Art
  • An example of a conventional impedance conversion device that can be inserted in a transmission line is given in Japanese Patent Application Publication No. 10-224123. The disclosed device is designed for insertion into a microstrip line, however, and is too wide in the direction orthogonal to the line for insertion into a stacked pair line.
  • SUMMARY OF THE INVENTION
  • An object of the present invention is to provide an impedance conversion device that is narrow enough for insertion into a stacked pair line.
  • The invented impedance conversion device comprises first, second, third, and fourth conductors, each having a first end and a second end. The conductors are arranged so that the first and second conductors form a first transmission line having a first characteristic impedance, the first and third conductors form a second transmission line having a second characteristic impedance different from the first characteristic impedance, the second and fourth conductors form a third transmission line having the second characteristic impedance, and the third and fourth conductors form a fourth transmission line having the first characteristic impedance.
  • A first resistor having a resistance equal to the first characteristic impedance is connected between the second ends of the second and fourth conductors, which are mutually proximate. A second resistor having a resistance equal to the second characteristic impedance is connected between the first ends of the third and fourth conductors, which are mutually proximate.
  • The four conductors transmit a signal that is input at the first ends of the first and second conductors and output at the second ends of the first and third conductors. The fourth conductor preferably has a length not exceeding one-fourth of the fundamental wavelength of the transmitted signal.
  • The impedance of the transmitted signal is converted efficiently, and the dimensions of the impedance conversion device in the directions orthogonal to the longitudinal direction of the conductors are comparatively small, permitting the impedance converting device to be formed in a confined space and in particular to be inserted into a stacked pair line. Use of this impedance conversion device can contribute to a reduction in the size of microelectronic parts.
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • In the attached drawings:
  • FIG. 1 is a perspective view of an impedance conversion device embodying the present invention;
  • FIG. 2 is a top plan view of the impedance conversion device in FIG. 1;
  • FIG. 3 is a bottom plan view of the impedance conversion device in FIG. 1;
  • FIG. 4 is a side elevation view of the impedance conversion device in FIG. 1;
  • FIG. 5 is a sectional view through line V-V in FIGS. 2-4;
  • FIG. 6 is a sectional view through line VI-VI in FIGS. 2-4;
  • FIG. 7 is a sectional view through line VII-VII in FIGS. 2-4;
  • FIG. 8 is a top plan view of a structure used in time-domain reflectometry;
  • FIG. 9 is a bottom plan view of the structure in FIG. 8;
  • FIG. 10 depicts a time-domain reflectometer, and a coaxial cable and probes connected thereto;
  • FIG. 11 shows exemplary waveforms obtained by time-domain reflectometry using the structure in FIGS. 8 and 9;
  • FIG. 12 schematically depicts the impedance conversion device in FIG. 1 with a direct current source connected on its input side and a load resistor connected on its output side;
  • FIG. 13 schematically depicts the impedance conversion device in FIG. 1 with a pulse generator connected on its input side, a load resistor connected on its output side, and an oscilloscope connected to measure the voltage on the output side;
  • FIG. 14 is a top plan view of an impedance conversion device used in time-domain reflectometry;
  • FIG. 15 is a bottom plan view of an impedance conversion device used in time-domain reflectometry;
  • FIG. 16 shows exemplary waveforms obtained with the measurement setup shown in FIG. 13;
  • FIG. 17 shows exemplary waveforms obtained with the measurement setup shown in FIG. 13 with the output side left electrically open;
  • FIG. 18 shows exemplary waveforms obtained with the measurement setup shown in FIG. 13 with the central part of the conductor lengthened;
  • FIG. 19 is a top plan view of another structure used in time-domain reflectometry;
  • FIG. 20 is a bottom plan view of the structure in FIG. 19;
  • FIG. 21 shows an exemplary waveform obtained by time-domain reflectometry using the structure in FIGS. 19 and 20;
  • FIG. 22 is a perspective view illustrating crosstalk between mutually adjacent conductors;
  • FIG. 23 is a sectional view illustrating crosstalk between mutually adjacent conductors;
  • FIG. 24 is a sectional view illustrating another embodiment of the invention.
  • DETAILED DESCRIPTION OF THE INVENTION
  • An impedance conversion device embodying the invention will now be described with reference to the attached drawings, in which like elements are indicated by like reference characters.
  • As shown in FIGS. 1-7, the impedance conversion device comprises first, second, third, and fourth strip- like conductors 11, 12, 13, 14, first and second resistors 15, 16, and a dielectric sheet 17. The first to fourth conductors 11, 12, 13, 14 extend in mutually parallel straight lines.
  • The dielectric sheet 17 has a first surface or upper surface 17 a (uppermost in FIGS. 1 and 4-7) and a second surface or lower surface 17 b. The first and third conductors 11, 13 are disposed side by side on the upper surface 17 a of the dielectric sheet 17, spaced apart from each other in a direction orthogonal to their lengths and parallel to the upper surface 17 a and lower surface 17 b of the dielectric sheet 17. The second and fourth conductors 12, 14 are similarly disposed side by side on the lower surface 17 b of the dielectric sheet 17.
  • The first conductor 11 and the second conductor 12 are disposed on opposite sides of the dielectric sheet 17, facing each other in a direction orthogonal to the upper surface 17 a and lower surface 17 b of the dielectric sheet 17. The third conductor 13 and the fourth conductor 14 are similarly disposed on opposite sides of the dielectric sheet 17, facing each other.
  • As shown in FIGS. 2-4, the impedance conversion device 1 has an input part or region 1 a, a central part or region 1 b, and an output part or region 1 c. The input region 1 a is the region near the input end id of the impedance conversion device 1; the output region 1 c is the region near the output end 1 e of the impedance conversion device 1. The central region 1 b is the region between the input region 1 a and the output region 1 c. The input region 1 a, the central region 1 b, and the output region 1 c are mutually contiguous.
  • The first conductor 11 extends across the input region 1 a, the central region 1 b, and the output region 1 c of the impedance conversion device 1; the first conductor 11 has an input part 11 a, a central part 11 b, and an output part 11 c disposed in the input region 1 a, the central region 1 b, and the output region 1 c, respectively.
  • The second conductor 12 extends across the input region 1 a and the central region 1 b of the impedance conversion device 1, and has an input part 12 a and a central part 12 b disposed in the input region 1 a and the central region 1 b, respectively.
  • The third conductor 13 extends across the central region 1 b and the output region 1 c of the impedance conversion device 1, and has a central part 13 b and an output part 13 c disposed in the central region 1 b and the output region 1 c, respectively.
  • The fourth conductor 14 extends only across the central region 1 b, and has a central part 14 b disposed in the central region 1 b.
  • The first conductor 11 and second conductor 12 form a transmission line having a first characteristic impedance z1.
  • The second conductor 12 and fourth conductor 14 form a transmission line having a second characteristic impedance z2 different from the first characteristic impedance z1.
  • The first conductor 11 and the third conductor 13 form a transmission line having the second characteristic impedance z2.
  • The third conductor 13 and the fourth conductor 14 form a transmission line having the first characteristic impedance z1.
  • The first conductor 11 is disposed so that one end (the input end) 11 d is at the input end 1 d of the impedance conversion device 1, and the other end (the output end) 11 e is at the output end of the impedance conversion device 1.
  • The second conductor 12 is disposed so that one end (the input end) 12 d is at the input end 1 d of the impedance conversion device 1, and the other end (the output end) 12 e is at the boundary 1 g between the central region 1 b and the output region 1 c of the impedance conversion device 1.
  • The third conductor 13 is disposed so that one end (the input end) 13 d is at the boundary 1 f between the input region 1 a and the central region 1 b of the impedance conversion device 1, and the other end (the output end) 13 e is at the output end 1 e of the impedance conversion device 1.
  • The fourth conductor 14 is disposed so that one end (the input end) 14 d is at the boundary 1 f between the input region 1 a and the central region 1 b of the impedance conversion device 1, and the other end (the output end) is at the boundary 1 g between the central region 1 b and the output region 1 c of the impedance conversion device 1.
  • The output end 12 e of the second conductor 12 and the output end 14 e of the fourth conductor 14 are both disposed on the lower surface 17 b of the dielectric sheet 17 and are mutually proximate. The input end 13 d of the third conductor 13 and the input end 14 d of the fourth conductor 14 are disposed on the lower surface 17 b and the upper surface 17 a of the dielectric sheet 17, respectively, and are mutually proximate.
  • A first resistor 15 is mounted on the lower surface 17 b of the dielectric sheet 17. The first resistor 15 interconnects the output end 12 e of the second conductor 12 and the output end 14 e of the fourth conductor 14, and has a resistance R1 equal to the first characteristic impedance z1.
  • A second resistor 16 is formed so that it extends through the dielectric sheet 17. The second resistor 16 interconnects the input end 13 d of the third conductor 13 and the input end 14 d of the fourth conductor 14, and has a resistance R2 equal to the second characteristic impedance z2.
  • The value (the absolute value) of the first characteristic impedance z1 is, for example, fifty ohms (50Ω), and the value (the absolute value) of the second characteristic impedance z2 is, for example, 82Ω.
  • The first to fourth conductors 11 to 14 have identical cross-sectional configurations, for example, a thickness (the vertical dimension in FIGS. 5-7) of 40 micrometers, and a width (the horizontal dimension in FIGS. 5-7) of 0.8 millimeters. (The dimensions in the drawings are not shown proportional to the actual dimensions.)
  • The dielectric sheet 17 has a thickness of 170 micrometers; the distance between the first conductor 11 and the second conductor 12 and the distance between the third conductor 13 and the fourth conductor 14 are equal to the thickness of the dielectric sheet 17.
  • The distance between the first conductor 11 and the third conductor 13 and the distance between the second conductor 12 and the fourth conductor 14 are identically 100 micrometers (0.1 millimeters).
  • The first to fourth conductors parallel each other in the central region 1 b, which therefore may be referred to as the ‘quadri-parallel’ part below. In contrast, the input region 1 a and the output region 1 c may be referred to as ‘duo-parallel’ parts, as only the first and second conductors 11 and 12 are parallel in the input region 1 a, and only the first and third conductors 11 and 13 are parallel in the output region 1 c.
  • The length of the central region 1 b of the impedance conversion device, that is, the length of conductor 14 (the length in the longitudinal direction in which conductors 11 to 14 extend) preferably does not exceed one-fourth of the fundamental wavelength of the signal that is transmitted, and is preferably at least ten times as long as the larger of the two distances that separate the first conductor 11 from the second conductor 12 and the first conductor 11 from the third conductor 13. More specifically, the length is preferably longer than 1/64 of the fundamental wavelength of the transmitted signal.
  • When the impedance conversion device 1 is configured as above, its input impedance Zin is equal to the first characteristic impedance z1 (50Ω) and its output impedance Zout is equal to the second characteristic impedance z2 (82Ω). Impedance conversion therefore takes place. This was confirmed by using TDR (time domain reflectometry) to measure the impedance of the transmission lines.
  • TDR is carried out by transmitting a pulsed signal and observing the reflection of the pulse from the circuit under test; TDR detects changes in impedance along the transmission path of the signal.
  • FIGS. 8 and 9 are a top plan view and a bottom plan view of a structure used for time-domain reflectometry, corresponding respectively to FIGS. 2 and 3. The structure is similar to the impedance conversion device 1 shown in FIGS. 1-7; a dielectric sheet 117 (corresponding to the dielectric sheet 17 in FIG. 1) has a first conductor 111 and a third conductor 113 mounted on its upper surface 117 a, and a second conductor 112 and a fourth conductor 114 mounted on its lower surface 117 b. The first to fourth conductors 111 to 114 correspond to the first to fourth conductors 11 to 14 in FIGS. 1-7, with the same thickness and width as the first to fourth conductors. The first conductor 111 and the second conductor 112 face each other across the dielectric sheet 117; the third conductor 113 and the fourth conductor 114 face each other across the dielectric sheet 117. Resistors 15 and 16 are not yet connected; the first to fourth conductors 111 to 114 are of equal length (LT=80 millimeters).
  • Strip-like leads 121 to 124 formed of the same material as the conductors are mounted at the ends 111 h to 114 h of the first to fourth conductors 111 to 114 (the left ends in FIGS. 8 and 9); connecting pads 131 to 134 are mounted at the ends of the leads 121 to 124. The length LL of the leads 121 to 124 is twelve millimeters.
  • Measurements were made of the impedance of each of the transmission lines formed by conductor 111 and conductor 112, conductor 112 and conductor 114, conductor 113 and conductor 114, and conductor 111 and conductor 113. As shown in FIG. 10, the TDR apparatus 51 had a coaxial cable 52 terminating in probes 53 a and 53 b for launching signal pulses and receiving reflected waves; the probes 53 a and 53 b were placed in contact with the conductors forming the transmission line so that signals could be input and their reflections received.
  • Specifically, to measure the impedance of the transmission line formed by conductor 111 and conductor 112, connecting pads 131 and 132 of conductor 111 and conductor 112 were contacted by probes 53 a and 53 b; to measure the impedance of the transmission line formed by conductor 113 and conductor 114, connecting pads 133 and 134 of conductor 113 and conductor 114 were contacted by probes 53 a and 53 b. To measure the impedance of the transmission line formed by conductor 111 and conductor 113, the other ends 111 i and 113 i of conductor 111 and conductor 113 were contacted by probes 53 a and 53 b; and to measure the impedance of the transmission line formed by conductor 112 and conductor 114, the other ends 112 i and 114 i of conductor 112 and conductor 114 were contacted by probes 53 a and 53 b.
  • Exemplary waveforms that appeared on the display of the TDR apparatus 51 are shown in FIG. 11. In FIG. 11, curves B5 a, B5 b, B5 c, and B5 d indicate the waveforms obtained when conductor 111 and conductor 112, conductor 113 and conductor 114, conductor 111 and conductor 113, and conductor 112 and conductor 114, respectively, were contacted by probes 53 a and 53 b; the zero levels of different waveforms are mutually offset for visibility.
  • The leftmost regions RXa to RXd of these curves indicate the impedance of the coaxial cable 52 (50Ω); the regions adjacent to regions RXa to RXd on the right correspond to the sections in which probes 53 a and 53 b make contact with connecting pads 131 to 134 or the ends 111 i to 114 i of conductors 111 to 114; the central regions RPa to RPd indicate the impedance of conductors 111 to 114 (the impedance of the transmission line comprising conductors 111 and 112, the transmission line comprising conductors 113 and 114, the transmission line comprising conductors 111 and 113, and the transmission line comprising conductors 112 and 114); and the rightmost regions ROa to ROd indicate the impedance at the electrically open ends. Regions RLa and RLb of curves B5 a and B5 b, which are between the central regions RPa and RPb and the regions RCa to RCd corresponding to the contact sections of probes 53 a and 53 b, indicate the impedance of the leads 121 to 124; regions RLc and RLd of curves B5 c and B5 d, which are between the central regions RPc and RPd and the regions ROc and ROd corresponding to the electrically open ends, indicate the impedance of the leads 121 to 124.
  • The values shown in Table 1 can be read from the measured waveforms as the impedance of each pair of conductors.
  • TABLE 1
    Conductor Pair Impedance
    111, 112 49.0 Ω
    113, 114 49.1 Ω
    111, 113 82.0 Ω
    112, 114 77.6 Ω
  • The impedance conversion efficiency and waveform distortion of the novel impedance conversion device 1 were studied under various conditions.
  • In the first case studied, a load resistor 18 with a value equal to the second characteristic impedance z2 (82Ω) was connected between the output ends of the impedance conversion device 1, that is, between the output ends 11 e and 13 e of conductors 11 and 13, as shown in FIG. 12. In FIG. 12, conductors 11 to 14 are shown as coplanar to simplify the depiction of their electrical connection relationships and the depiction of resistors 15 and 16 is also simplified.
  • When a direct current voltage Vin is supplied from a direct current source 60 to the input end of the impedance conversion device 1 in FIGS. 1-7, that is, the input ends 11 d and 12 d of conductors 11 and 12, as shown in FIG. 12, (electromagnetic coupling among conductors 11 to 14 may be ignored in this case), the voltage Vout that appears across the output ends 11 e and 13 e is given by the following equation:

  • Vout=Vin×{R2/(2×R2+R1+Rin)}
  • where Rin is the internal resistance of the direct current source 60.
  • The internal resistance Rin is generally made equal to the input impedance R1; when Rin=R1, the above equation becomes:

  • Vout=Vin×{R2/(2×R2+2×R1)}  (1)
  • If R1=50Ω and R2=82Ω, then:
  • Vout = Vin × { 82 / ( 2 × 50 + 2 × 82 ) } = Vin × ( 82 / 264 ) ( 2 )
  • If the value of Vin is five hundred millivolts (500 mV), then:

  • Vout=500×82/264=155 mV  (3)
  • Next, the voltage that appeared at the output end when a voltage pulse train was applied from a pulse generator 61 to the input end of the impedance conversion device 1 in FIGS. 1-7, as shown in FIG. 13, was observed using an oscilloscope 65. In FIG. 13, conductors 11 to 14 are shown as being coplanar and resistors 15 and 16 are depicted in the same simplified way as in FIG. 12.
  • The experimental impedance conversion device 1 shown in FIGS. 14 and 15 was used in this measurement. The experimental device 1 shown in FIGS. 14 and 15 is substantially the same as the impedance conversion device 1 shown in FIGS. 1-7, but has leads 121 and 122 disposed at the input ends 11 d and 12 d of conductors 11 and 12 and connecting pads 131 and 132 disposed at the ends of leads 121 and 122, similar to the structure shown in FIGS. 8 and 9. The dielectric sheet 17 extends farther than in FIGS. 1-7.
  • Measurements were made by connecting resistors 15 and 16 as shown in FIG. 13, in the same way as described with reference to FIGS. 1-7; a load resistor 18 having a resistance (RL) equal to the second characteristic impedance z2 (82Ω) was connected across the output ends (load ends) 11 e and 13 e of conductors 11 and 13. The central parts 11 b, 12 b, 13 b, 14 b of conductors 11, 12, 13, 14 had a length of two millimeters (2 mm).
  • A pulse generator 61 having an internal resistance Rin equal to the first impedance z1 (50Ω) and was used. The probes 63 a and 63 b of the pulse generator 61 were placed in contact with the connecting pads 131 and 132 on the input side. An oscilloscope 65 having high-impedance differential probes 66 a and 66 b was used. The measured waveforms are shown in FIG. 16.
  • In FIG. 16, curves B6 a, B6 b, B6 c, B6 d, and B6 e indicate waveforms obtained when the amplitude of the supplied pulses was 500 mV and the frequency of the pulse train was 100 MHz, 500 MHz, 1 GHz, 2 GHz, and 3 GHz, respectively.
  • The wave height values and rise times (the time required for the voltage level to increase from 20 percent to 80 percent of the wave height) determined from the measured waveforms are shown in Table 2.
  • TABLE 2
    Input frequency Wave height (mV) Rise time (ps)
    500 MHz 255.1 67.3
     1 GHz 222.2 53.1
     2 GHz 255.1 66.5
     3 GHz 259.2 59.5
  • The difference between the wave height values obtained experimentally and the value obtained from equation (3) (the value of the output voltage when direct current is applied) is due to electromagnetic coupling in the transmission line.
  • For example, when the frequency is 500 MHz, the measured wave height was 255.1 mV. The difference between this value and the value obtained from equation (3) (255.1 mV−155 mV=100.1 mV) represents a voltage component induced by electromagnetic coupling, and indicates that impedance conversion has been carried out effectively.
  • Next, similar measurements were made with the output ends of the impedance conversion device 1, more specifically the output ends 11 e and 13 e of conductors 11 and 13, left electrically open. The measurement conditions were the same as described above, except that to leave output ends 11 e and 13 e electrically open, the load resistor 18 was omitted. The measured waveforms are shown in FIG. 17. The wave height values determined from the measured waveforms are shown in Table 3.
  • TABLE 3
    Input frequency Wave height (mV)
    100 MHz 880
    500 MHz 880.1
     1 GHz 537.9
     2 GHz 391.2
     3 GHz 619.3
  • As shown in FIG. 17 and Table 3, the voltage level becomes higher when output ends 11 e and 13 e are left electrically open. Even when the output ends are left electrically open so that the circuit has no direct current connection, adequate energy is transmitted to the output ends of conductors 11 and 13. When there is no direct current connection, although energy is transmitted only by electromagnetic coupling, total reflection takes place at the load ends 11 e and 13 e, so twice as much voltage is obtained, and the apparent loss of energy due to impedance conversion is virtually nil.
  • When the output ends 11 e and 13 e of the impedance conversion device 1 are connected to a CMOS circuit gate, they are in nearly the same state as when left electrically open, so presumably the results will be nearly the same as shown in FIG. 17 and Table 3.
  • Though the resistor 16 (R2=50Ω) connected between conductors 13 and 14 causes mismatch reflection, and reflection this has a frequency dependence, if there were no mismatch, the waveforms should be smooth. The reason for the mismatch will be explained later with reference to FIG. 21.
  • In the above examples (FIGS. 16 and 17), the central part had a length of two millimeters; FIG. 18 shows the measured waveforms for another experimental device in which the central part had a length of twenty millimeters. In FIG. 18, waveforms B8 a, B8 b, B8 c, B8 d, and B8 e were obtained with pulse train frequencies of 100 MHz, 500 MHz, 12 GHz, 2 GHz, and 3 GHz, respectively. The wave height values determined from the measured waveforms are shown in Table 4.
  • TABLE 4
    Input frequency Wave height (mV)
    500 MHz 311.0
     1 GHz 244.8
     2 GHz 397.0
     3 GHz 251.4
  • FIG. 18 and Table 4 show a decrease in voltage and an increase in waveform distortion. The reason is thought to be the long distance between boundaries 1 f and 1 g, which causes a relatively long elapse of time from reflection at one boundary to reflection at the other boundary, leading to multiple reflections that distort the waveforms.
  • As described above, the characteristic impedance of the duo- parallel parts 1 a and 1 c and the characteristic impedance of the quadri-parallel part 1 b are slightly different. Multiple reflections therefore occur. In order to avoid multiple reflection resonance, the quadri-parallel part should have a length not exceeding one-fourth of the fundamental wavelength of the signal that is transmitted. If the specific inductive capacity of the transmission line is four, then the electromagnetic wave speed is 1.5×108 m/s, and if the frequency of the pulse train supplied from the pulse generator 61 is 3 GHz, it follows that the wavelength is 50 millimeters, one-fourth of which is 12.5 millimeters.
  • The length of the quadri-parallel part 1 b need only be sufficient for electromagnetic waves to reshape the electromagnetic space between the parallel conductors. Interference between the conductors is caused by the spreading of the electromagnetic waves in a direction orthogonal to their direction of propagation, and the spreading speed is the same as the speed with which the electromagnetic waves propagate along the transmission line. Reshaping of the electromagnetic space is possible if an electromagnetic wave can travel back and forth between the conductors about five times; the length corresponding to the delay time is a length ten times as long as the larger of the two distances separating the conductors (the larger of the distance (170 micrometers) between the first conductor 11 and the second conductor 12 and the distance (100 micrometers or 0.1 millimeter) between the first conductor 11 and the third conductor 13). Thus, if the larger of the two distances between the conductors is 170 micrometers, ten times that length is 1.7 millimeters; the quadri-parallel structure is effective if its length is equal to or greater than this value.
  • The characteristic impedance of the quadri-parallel part 1 b and the characteristic impedance of the duo- parallel part 1 a and 1 c were confirmed to be different using time-domain reflectometry. FIGS. 19 and 20 show the structure used in this time-domain reflectometry experiment. The structure shown in FIGS. 8 and 9 was further modified by removing the parts near the ends 113 i and 114 i of the third conductor 113 and the fourth conductor 114. The length LS of the removed parts was 25 millimeters; the section with the removed parts constituted the duo-parallel part. The remaining section (the section with no parts removed), which had a length LD of 55 millimeters, constituted the quadri-parallel part. Connecting pads 131 and 132 of the first conductor 111 and the second conductor 112 of this structure were contacted by probes 53 a and 53 b of the TDR apparatus 51. The measured waveforms are shown in FIG. 21. The longitudinal axis in FIG. 21 is enlarged compared to that in FIG. 11.
  • In FIG. 21, region RXa corresponds to a section of the coaxial cable 52, region RCa corresponds to leads 121 and 122, region RPa1 corresponds to the quadri-parallel part (length LD), region RPa2 corresponds to the duo-parallel part (length LS), and region ROa corresponds to the electrically open ends.
  • The impedance of the quadri-parallel part (length LD) shown in FIG. 21 is 48Ω, and the impedance of the right-side region RPa22 (excluding the region RPa21 adjacent to the region RPa1 corresponding to the quadri-parallel part) of the duo-parallel part (length LS) is 51.2Ω; reflection occurs due to this difference. The upper limit described above on the length of the quadri-parallel part 1 b is set in order to prevent reflection from occurring repeatedly and leading to multiple reflections.
  • In the region RPa2 corresponding to the duo-parallel part, the characteristic impedance changes gradually in the region RPa21 adjacent to the region RPa1 corresponding to the quadri-parallel part. This part corresponds to 125 picoseconds of time, which is the sum of the slump due to the rise time of the step waveform of the TDR apparatus 51 (35 picoseconds, the same as the slump at the contact section RCa and the electrically open end ROa) and the time taken to detect the change; these factors cannot be separated accurately, but the physical phenomena that operate during detection are similar to the reshaping of the electromagnetic space described above.
  • Next, electromagnetic coupling between the conductors, in other words, crosstalk, will be described with reference to FIGS. 22 and 23.
  • As shown in FIG. 22, the pulse energy input to one of the parallel conductors 11 to 14 causes various combinations of interference on adjacent conductors; the optimal state is ultimately the one in which inverted waveform energy is induced in the proximate conductors by electromagnetic interference as shown in FIG. 23, with the crosstalk energy corresponding to the electromagnetic dispersion energy. This is in forward waves. Though backward waves are also induced, they are omitted here. The input induces vertical coupling (coupling between the vertically adjacent conductors 11 and 12 in FIG. 1), and so the upper-left conductor becomes the output of the adjacent vertical coupling. With horizontal coupling (coupling between the horizontally adjacent conductors in FIG. 1), however, the energy becomes the sum of the original energy on one side and the energy of the far end composite wave (upper right); a voltage of 250 mV was obtained experimentally, which is larger than the divided direct current voltage of 155 mV. The difference represents an improvement in the efficiency of impedance conversion. This energy state between parallel conductors is achieved if a relationship corresponding to the one shown in FIGS. 22 and 23 is formed for even an instant (the time during which interference occurs at the speed of light); the minimum length is thus the length described above.
  • Though the conductors are disposed on the upper surface and lower surface of the dielectric sheet in FIGS. 1-7, a structure in which conductors 11 to 14 are all embedded in a dielectric material 21 as shown in FIG. 24 (a sectional view similar to FIG. 6) is also possible. The first to fourth conductors 11 to 14 may be formed in the same way as two pairs of stacked pair conductors are formed.
  • In the above embodiment, the first to third conductors 11 to 13 have input parts 11 a and 12 a and output parts 11 c and 13 c as well as central parts 11 b, 12 b, and 13 b, but the impedance conversion device may comprise only the central parts; the input parts 11 a and 12 a and output parts 11 c and 13 c may be omitted.
  • Although the first to fourth conductors 11 to 14 extend in straight lines in the above embodiment, they may be curved. The cross-sectional shapes and dimensions of the first to fourth conductors 11 to 14 need not all be the same; some may differ from the others.
  • Those skilled in the art will recognize that further variations are possible within the scope of the invention, which is defined in the appended claims.

Claims (11)

1. An impedance conversion device comprising:
a first conductor having a first end and a second end;
a second conductor having a first end and a second end, disposed relative to the first conductor so that the first conductor and the second conductor form a first transmission line having a first characteristic impedance;
a third conductor having a first end and a second end, disposed relative to the first conductor so that the first conductor and the third conductor form a second transmission line having a second characteristic impedance different from the first characteristic impedance;
a fourth conductor having a first end and a second end, disposed relative to the second conductor so that the second conductor and the fourth conductor form a third transmission line having the second characteristic impedance, and disposed relative to the third conductor so that the third conductor and the fourth conductor form a fourth transmission line having the first characteristic impedance;
a first resistor having a resistance equal to the first characteristic impedance, having a first end connected to the second end of the second conductor and a second end connected to the second end of the fourth conductor; and
a second resistor having a resistance equal to the second characteristic impedance, having a first end connected to the first end of the third conductor and a second end connected to the first end of the fourth conductor; wherein
the second ends of the second and fourth conductors are mutually proximate; and
the first ends of the third and fourth conductors are mutually proximate.
2. The impedance conversion device of claim 1, wherein:
the first conductor has an input part, a central part, and an output part;
the second conductor forms said first transmission line with the input part and the central part of the first conductor;
the third conductor forms said second transmission line with the central part and the output part of the first conductor; and
the fourth conductor forms said third transmission line with a part of the second conductor facing the central part of the first conductor, and forms said fourth transmission line with a part of the third conductor facing the central part of the first conductor.
3. The impedance conversion device of claim 2, wherein the first, second, third, and fourth conductors are mutually parallel.
4. The impedance conversion device of claim 2, wherein the input part, the central part, and the output part of the first conductor are mutually contiguous.
5. The impedance conversion device of claim 1, wherein:
the first conductor and the second conductor are mutually spaced apart in a first direction;
the third conductor and the second conductor are mutually spaced apart in the first direction;
the first conductor and the third conductor are mutually spaced apart in a second direction orthogonal to the first direction; and
the second conductor and the fourth conductor are mutually spaced apart in the second direction.
6. The impedance conversion device of claim 5, wherein each one of the first, second, third, and fourth conductors has a rectangular cross section with a first side extending in the first direction and a second side extending in the second direction.
7. The impedance conversion device of claim 1, wherein the first and second conductors are mutually separated by a first distance, the first and third conductors are mutually separated by a second distance, and the fourth conductor is at least ten times as long as the first distance and at least ten times as long as the second distance.
8. The impedance conversion device of claim 7, wherein the first, second, third, and fourth conductors transmit a signal having a fundamental wavelength, and the fourth conductor has a length not exceeding one-fourth of said fundamental wavelength.
9. The impedance conversion device of claim 1, wherein the first, second, third, and fourth conductors transmit a signal having a fundamental wavelength, and the fourth conductor has a length not exceeding one-fourth of said fundamental wavelength.
10. The impedance conversion device of claim 1, further comprising a dielectric member having two major surfaces, the first and third conductors being disposed on one of said major surfaces, the second and fourth conductors being disposed on another one of said major surfaces.
11. The impedance conversion device of claim 1, further comprising a dielectric member within which the first, second, third, and fourth conductors are embedded.
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4383227A (en) * 1978-11-03 1983-05-10 U.S. Philips Corporation Suspended microstrip circuit for the propagation of an odd-wave mode
US5523622A (en) * 1992-11-24 1996-06-04 Hitachi, Ltd. Semiconductor integrated device having parallel signal lines
US5812034A (en) * 1994-10-17 1998-09-22 Advantest Corporation Waveguide mode-strip line mode converter utilizing fin-line antennas of one wavelength or less
US6023209A (en) * 1996-07-05 2000-02-08 Endgate Corporation Coplanar microwave circuit having suppression of undesired modes

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3990024A (en) 1975-01-06 1976-11-02 Xerox Corporation Microstrip/stripline impedance transformer
JPH10224123A (en) 1997-02-06 1998-08-21 Nec Corp Impedance converter
JP2000349514A (en) * 1999-06-01 2000-12-15 Matsushita Electric Ind Co Ltd Matching circuit for transistor and high frequency power amplifier
SE513470C2 (en) * 1999-07-08 2000-09-18 Ericsson Telefon Ab L M Balunkrets
JP2005051496A (en) * 2003-07-28 2005-02-24 Kanji Otsuka Signal transmission system and signal transmission line
JP4511294B2 (en) * 2004-09-22 2010-07-28 京セラ株式会社 Wiring board
JP4820985B2 (en) * 2005-08-30 2011-11-24 国立大学法人東京工業大学 Differential parallel track

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4383227A (en) * 1978-11-03 1983-05-10 U.S. Philips Corporation Suspended microstrip circuit for the propagation of an odd-wave mode
US5523622A (en) * 1992-11-24 1996-06-04 Hitachi, Ltd. Semiconductor integrated device having parallel signal lines
US5812034A (en) * 1994-10-17 1998-09-22 Advantest Corporation Waveguide mode-strip line mode converter utilizing fin-line antennas of one wavelength or less
US6023209A (en) * 1996-07-05 2000-02-08 Endgate Corporation Coplanar microwave circuit having suppression of undesired modes

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10164809B2 (en) 2010-12-30 2018-12-25 Kandou Labs, S.A. Circuits for efficient detection of vector signaling codes for chip-to-chip communication
US10574370B2 (en) 2010-12-30 2020-02-25 Kandou Labs, S.A. Methods and systems for skew tolerance in and advanced detectors for vector signaling codes for chip-to-chip communication
US10560293B2 (en) 2010-12-30 2020-02-11 Kandou Labs, S.A. Circuits for efficient detection of vector signaling codes for chip-to-chip communication
US9709430B2 (en) * 2012-09-25 2017-07-18 Vega Grieshaber Kg Coaxial probe comprising terminating resistor
US20140084944A1 (en) * 2012-09-25 2014-03-27 Vega Grieshaber Kg Coaxial probe comprising terminating resistor
US9069910B2 (en) * 2012-12-28 2015-06-30 Intel Corporation Mechanism for facilitating dynamic cancellation of signal crosstalk in differential input/output channels
US20140189190A1 (en) * 2012-12-28 2014-07-03 Zhichao Zhang Mechanism for facilitating dynamic cancellation of signal crosstalk in differential input/output channels
US10404500B2 (en) 2014-06-25 2019-09-03 Kandou Labs, S.A. Multilevel driver for high speed chip-to-chip communications
US11183982B2 (en) 2016-01-25 2021-11-23 Kandou Labs, S.A. Voltage sampler driver with enhanced high-frequency gain
US10498305B2 (en) 2016-01-25 2019-12-03 Kandou Labs, S.A. Voltage sampler driver with enhanced high-frequency gain
US10673608B2 (en) 2016-04-22 2020-06-02 Kandou Labs, S.A. Sampler with low input kickback
US10242749B2 (en) 2016-04-22 2019-03-26 Kandou Labs, S.A. Calibration apparatus and method for sampler with adjustable high frequency gain
US10284362B2 (en) 2016-04-22 2019-05-07 Kandou Labs, S.A. Sampler with low input kickback
US10679716B2 (en) 2016-04-22 2020-06-09 Kandou Labs, S.A. Calibration apparatus and method for sampler with adjustable high frequency gain
US10153591B2 (en) * 2016-04-28 2018-12-11 Kandou Labs, S.A. Skew-resistant multi-wire channel
US10573998B2 (en) 2016-04-28 2020-02-25 Kandou Labs, S.A. Skew-resistant multi-wire channel
US20170317449A1 (en) * 2016-04-28 2017-11-02 Kandou Labs, S.A. Skew-resistant multi-wire channel
US10608847B2 (en) 2016-10-24 2020-03-31 Kandou Labs, S.A. Multi-stage sampler with increased gain
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CN100555742C (en) 2009-10-28
TWI318807B (en) 2009-12-21

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