US20070068846A1 - Wafer packing - Google Patents
Wafer packing Download PDFInfo
- Publication number
- US20070068846A1 US20070068846A1 US11/162,950 US16295005A US2007068846A1 US 20070068846 A1 US20070068846 A1 US 20070068846A1 US 16295005 A US16295005 A US 16295005A US 2007068846 A1 US2007068846 A1 US 2007068846A1
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- US
- United States
- Prior art keywords
- wafer
- hollow support
- wafers
- packing
- support pads
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/673—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere using specially adapted carriers or holders; Fixing the workpieces on such carriers or holders
- H01L21/6735—Closed carriers
- H01L21/67383—Closed carriers characterised by substrate supports
Definitions
- the invention relates to wafer packing, and more particularly, to wafer packing that avoids wafer pollution and saves space.
- the manufacturing of semiconductor wafers includes many complex processes. Processes for forming transistors or other devices on semiconductor wafers and processes for packaging wafers are usually undertaken by different manufacturers, or performed in different factories. When a wafer manufacturer ships the wafers to a packager, the wafers are stored in cartons or wafer transfer apparatuses, for delivery to the packager.
- FIG. 1 is schematic diagram of wafer packing according to prior art.
- a wafer packing 10 includes a cassette 12 for depositing a plurality of wafers 14 , and utilizes a interleaf 16 between adjacent wafers 14 for separating the wafers 14 .
- the function of the interleaf 16 is to prevent damage to the wafers 14 from other wafers 14 touching them, rubbing, shaking, and crashing during shipment.
- the prior art uses a plurality of sponges 18 put on a bottom 20 and under a lid 22 of the cassette 12 , for protecting the wafers 14 from touching the cassette 12 .
- the sponge 18 is set on the bottom 22 of the cassette 12 , and then the interleafs 16 and the wafers 14 are alternately stacked onto the sponge 18 .
- Another interleaf 16 is put on each wafer 14 and another wafer 14 is put on each interleaf 16 .
- the cassette 12 has about ten of the wafers 14
- another interleaf 16 and sponge 18 are put on the top wafer 14 and then the cover 22 is affixed on the sponge 18 , meaning a batch of wafers are securely loaded into the packing 10 .
- a quantity of wafer packing 10 is stored in a carton of one of various sizes.
- the interleaf 16 directly contacts a surface of the wafer 14 , so the surface of the wafer 14 may become polluted and scraped. Therefore, another method of wafer packing has been developed.
- FIG. 2 is schematic diagram of wafer packing according to another prior art.
- U.S. Pat. No. 6,581,264 issued to Ohori et al. discloses a wafer packing of a front opening shipping box (FOSB).
- the FOSB wafer packing 30 comprises a cassette 32 having a plurality of support grooves 36 , and each support groove 36 forms a groove (not shown) to hold a wafer.
- the wafers 34 are put in the grove for separating and fixing each wafer 36 in place.
- the cassette 32 also comprises many additional structures that are not illustrated.
- the FOSB wafer packing 30 was developed, but utilizing FOSB wafer packing 30 to pack 12 inch wafers for shipment is disadvantageous to costs. Due to the structure of the support grooves 36 and the cassette 32 , a volume of a batch of wafer packing 30 is very huge, and the number of wafer packings 30 in a carton is decreased so that the shipping cost is increased. Therefore, for solving problems with pollution and volume, a factory developed another form of wafer packing.
- FIG. 3 is schematic diagram of wafer packing 50 according to another prior art.
- US Patent Application Publication 2004/0149623 discloses a wafer packing 50 .
- the wafer packing 50 includes a cassette 52 , and a sponge 58 , wafers 54 , and pads 56 for separating wafers 54 and are put into the cassette 52 in a manner similar to that used putting the wafers 14 and the interleafs 16 into the cassette 12 in FIG. 1 .
- the structure of the pad 56 includes a top surface 60 , a first recessed portion 62 , and a second recessed portion 64 .
- the top surface 60 and the first recessed portion 62 form a ladder-like structure for fixing the wafer and preventing the wafer 54 from sliding.
- the second recessed portion 64 is for depositing solders 66 or other devices of the wafer 54 .
- the depth of the second recessed portion 64 is greater than or equal to the height of the solders 66 of the wafer 54 .
- the pad 56 needs the ladder structure of the top surface 60 and the first recessed portion 62 to fix the wafers 54 in place, and needs the second recessed portion 64 to deposit the solders 66 of the wafer 54 . If the wafer 54 is not fixed to the first recessed portion 62 and the second recessed portion 64 , the wafer 54 may break. Therefore, this prior art wafer packing 50 utilizes the pad 56 to prevent damage to the solders 66 of a bottom of the wafers 54 and others devices, but the first recessed portion 62 of the pad 56 might lock the wafers 54 while the wafers 54 is took out.
- the present invention provides a wafer packing.
- the wafer packing includes a box, at least two sponges, at least two hollow support pads, and a plurality of wafers.
- the sponges are deposited on a bottom and under a lid of the box, the hollow support pads are deposited on and between the sponges, and each wafer is deposited on and between two adjacent hollow support pads that contact a non-complete wafer area of each wafer edge.
- the present invention utilizes hollow support pads inserted between each wafer in the wafer packing, in order to separate stacked wafers.
- the present invention can avoid the pollution and scraping of the wafers from the wafers touching with interleafs, and decreases the volume of wafer packing, reducing shipping costs. Furthermore, the present invention can prevent the damage from shaking of the wafers during shipment.
- FIG. 1 to FIG. 3 are schematic diagrams of a wafer packing according to prior art.
- FIG. 4 is a schematic diagram of a wafer packing according to the present invention.
- FIG. 5 to FIG. 10 are schematic diagram of the hollow support pad according present invention.
- FIG. 4 is a schematic diagram of a wafer packing 70 according to the present invention.
- the wafer packing 70 includes a cassette 72 , at least two sponges 78 , and a plurality of hollow support pads 76 for depositing a plurality of wafers 74 .
- at least one of the sponges 78 is put on a bottom of the cassette 72
- at least one hollow support pad 76 and a wafer 74 are alternately put on the sponges 78 .
- Other hollow support pads 76 and other wafers 74 are continuously and repeatedly stacked in alternation on the bottom wafer 74 until the cassette is filled with 25 wafers 74 , although this quantity is not limiting as other quantities are equally possible.
- a lid 82 of the cassette 72 covers and completes the batch of wafer packing 70 .
- a quantity of wafer packings 70 is stored in a carton (not shown) for shipment.
- the hollow support pads 76 touch a non-complete wafer area of the wafers 74 , so the complete wafer area of the wafers 74 cannot be polluted and/or scrapped by touching the hollow support pads 76 .
- FIG. 5 through FIG. 10 are schematic diagrams of the hollow support pad 76 according present invention.
- the hollow support pads 76 can be many structures, such as a rounded pad like an O-ring, a C-shape pad, near rounded pad, and at least two arc pads.
- the hollow support pad 76 is rounded pad, and an internal periphery ( FIG. 5 ) or external periphery ( FIG. 6 ) of the rounded hollow support pad 76 can be toothlike in shape, can have two toothlike peripheries ( FIG. 7 ), or two smooth peripheries.
- FIG. 5 an internal periphery
- FIG. 6 external periphery of the rounded hollow support pad 76
- the hollow support pad 76 can be a C-shape pad with an angle 94 of the C-shape hollow support pad 76 greater than 180 degrees.
- the shape of the support pad should supports the wafer uniformly, but the structure of the support pad is not limited to the above-mentioned shape.
- the materials of the hollow support pads 76 can be plastic, an electrical conductor, or magnetic materials, having a width ((external diameter of the pad—internal diameter of the pad) divided by 2) greater than 3 mm, and a thickness greater than 1 mm.
- the hollow support pad 76 can be two or three pieces of arc magnetic materials.
- the hollow support pad 76 can be a mixture of the above-mentioned structures, but the above-mentioned structures do not limit the shape of the hollow support pad 76 .
- the hollow support pad 76 can be a rounded or tube-like pad, but the rounded pad has at least one raised portion touching the non-complete wafer area of the wafer 74 .
- the present invention utilizes the hollow support pads 76 to separate wafers 74 .
- the complete wafer area of wafers 74 does not touch the hollow support pads 76 , so the surface of the wafers 74 does not get polluted and scraped by touching the hollow support pads 76 .
- the present invention wafer packing 70 stacks the wafers 74 , and uses the cassette 72 to fix and prevent movement of the wafers 74 , so the diameter of the hollow support pads 76 is the same size as the wafers 74 . Therefore, we can use the original cassette 72 , without a need to change the width or height of the cassette.
- the present invention can effectively decrease the volume of wafer packing 70 by holding more wafers 74 in a single cassette while not decreasing the quantity of wafer packings 70 in a carton, and therefore decreases shipping costs.
- the present invention utilizes hollow support pads in the wafer packing and can be applied to ship 12 ′′ wafers and thin wafers. Not only can the present invention avoid the polluting and scraping of the wafer from the wafer touching an interleaf, but it also decreases the volume problem of the FOSB wafer packing when the hollow support pads separate the wafers. In addition, the pads of prior art cannot solve the volume, pollution, and abrasion problems at which the present invention is directed. The present invention can eliminate the above-mentioned problems, and further decrease shipping costs.
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Packaging Frangible Articles (AREA)
- Buffer Packaging (AREA)
Abstract
The present invention provides a wafer packing. The wafer packing includes a box, at least two sponges, at least two hollow support pads, and a plurality of wafers. The sponges are put on a bottom and under a lid of the box, the hollow support pads are put between sponges, and each wafer is put between adjacent hollow support pads touching a non-complete wafer area of each wafer.
Description
- 1. Field of the Invention
- The invention relates to wafer packing, and more particularly, to wafer packing that avoids wafer pollution and saves space.
- 2. Description of the Prior Art
- The manufacturing of semiconductor wafers includes many complex processes. Processes for forming transistors or other devices on semiconductor wafers and processes for packaging wafers are usually undertaken by different manufacturers, or performed in different factories. When a wafer manufacturer ships the wafers to a packager, the wafers are stored in cartons or wafer transfer apparatuses, for delivery to the packager.
- Please refer to
FIG. 1 that is schematic diagram of wafer packing according to prior art. Awafer packing 10 includes acassette 12 for depositing a plurality ofwafers 14, and utilizes ainterleaf 16 betweenadjacent wafers 14 for separating thewafers 14. The function of theinterleaf 16 is to prevent damage to thewafers 14 fromother wafers 14 touching them, rubbing, shaking, and crashing during shipment. Furthermore, the prior art uses a plurality ofsponges 18 put on abottom 20 and under alid 22 of thecassette 12, for protecting thewafers 14 from touching thecassette 12. Generally, first, thesponge 18 is set on thebottom 22 of thecassette 12, and then theinterleafs 16 and thewafers 14 are alternately stacked onto thesponge 18. Anotherinterleaf 16 is put on eachwafer 14 and anotherwafer 14 is put on eachinterleaf 16. When thecassette 12 has about ten of thewafers 14, anotherinterleaf 16 andsponge 18 are put on thetop wafer 14 and then thecover 22 is affixed on thesponge 18, meaning a batch of wafers are securely loaded into thepacking 10. Finally, a quantity ofwafer packing 10 is stored in a carton of one of various sizes. However, theinterleaf 16 directly contacts a surface of thewafer 14, so the surface of thewafer 14 may become polluted and scraped. Therefore, another method of wafer packing has been developed. - Please refer to
FIG. 2 that is schematic diagram of wafer packing according to another prior art. As shown inFIG. 2 , U.S. Pat. No. 6,581,264 issued to Ohori et al. discloses a wafer packing of a front opening shipping box (FOSB). The FOSBwafer packing 30 comprises acassette 32 having a plurality ofsupport grooves 36, and eachsupport groove 36 forms a groove (not shown) to hold a wafer. The wafers 34 are put in the grove for separating and fixing eachwafer 36 in place. Thecassette 32 also comprises many additional structures that are not illustrated. As above-mentioned, in order to avoid interleafs polluting wafers, the FOSBwafer packing 30 was developed, but utilizing FOSB wafer packing 30 to pack 12 inch wafers for shipment is disadvantageous to costs. Due to the structure of thesupport grooves 36 and thecassette 32, a volume of a batch ofwafer packing 30 is very huge, and the number ofwafer packings 30 in a carton is decreased so that the shipping cost is increased. Therefore, for solving problems with pollution and volume, a factory developed another form of wafer packing. - Please refer to
FIG. 3 that is schematic diagram ofwafer packing 50 according to another prior art. As shown inFIG. 3 , US Patent Application Publication 2004/0149623 discloses a wafer packing 50. Thewafer packing 50 includes acassette 52, and asponge 58,wafers 54, andpads 56 for separatingwafers 54 and are put into thecassette 52 in a manner similar to that used putting thewafers 14 and theinterleafs 16 into thecassette 12 inFIG. 1 . Moreover, the structure of thepad 56 includes atop surface 60, a first recessedportion 62, and a second recessedportion 64. When thewafer 54 is put on the firstrecessed portion 62 of thepad 62, thetop surface 60 and the first recessedportion 62 form a ladder-like structure for fixing the wafer and preventing thewafer 54 from sliding. The second recessedportion 64 is for depositingsolders 66 or other devices of thewafer 54. The depth of the second recessedportion 64 is greater than or equal to the height of thesolders 66 of thewafer 54. Although thesolder 66 or others devices of thewafer 54 are detached from thepad 56, a top surface of thewafers 54 still touches thepad 56. In addition, thepad 56 needs the ladder structure of thetop surface 60 and the first recessedportion 62 to fix thewafers 54 in place, and needs the second recessedportion 64 to deposit thesolders 66 of thewafer 54. If thewafer 54 is not fixed to the firstrecessed portion 62 and the secondrecessed portion 64, thewafer 54 may break. Therefore, this prior art wafer packing 50 utilizes thepad 56 to prevent damage to thesolders 66 of a bottom of thewafers 54 and others devices, but the first recessedportion 62 of thepad 56 might lock thewafers 54 while thewafers 54 is took out. - It is therefore a primary objective of the claimed invention to provide a wafer packing to solve the above-mentioned problems.
- According to the claimed invention, the present invention provides a wafer packing. The wafer packing includes a box, at least two sponges, at least two hollow support pads, and a plurality of wafers. The sponges are deposited on a bottom and under a lid of the box, the hollow support pads are deposited on and between the sponges, and each wafer is deposited on and between two adjacent hollow support pads that contact a non-complete wafer area of each wafer edge.
- The present invention utilizes hollow support pads inserted between each wafer in the wafer packing, in order to separate stacked wafers. The present invention can avoid the pollution and scraping of the wafers from the wafers touching with interleafs, and decreases the volume of wafer packing, reducing shipping costs. Furthermore, the present invention can prevent the damage from shaking of the wafers during shipment.
- These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings.
-
FIG. 1 toFIG. 3 are schematic diagrams of a wafer packing according to prior art. -
FIG. 4 is a schematic diagram of a wafer packing according to the present invention. -
FIG. 5 toFIG. 10 are schematic diagram of the hollow support pad according present invention. - Please refer to
FIG. 4 that is a schematic diagram of awafer packing 70 according to the present invention. Thewafer packing 70 includes acassette 72, at least twosponges 78, and a plurality ofhollow support pads 76 for depositing a plurality ofwafers 74. First, at least one of thesponges 78 is put on a bottom of thecassette 72, and at least onehollow support pad 76 and awafer 74 are alternately put on thesponges 78. Otherhollow support pads 76 andother wafers 74 are continuously and repeatedly stacked in alternation on thebottom wafer 74 until the cassette is filled with 25wafers 74, although this quantity is not limiting as other quantities are equally possible. Then, alid 82 of thecassette 72 covers and completes the batch of wafer packing 70. A quantity ofwafer packings 70 is stored in a carton (not shown) for shipment. In addition, thehollow support pads 76 touch a non-complete wafer area of thewafers 74, so the complete wafer area of thewafers 74 cannot be polluted and/or scrapped by touching thehollow support pads 76. - Also, please refer to
FIG. 5 throughFIG. 10 , which are schematic diagrams of thehollow support pad 76 according present invention. Thehollow support pads 76 can be many structures, such as a rounded pad like an O-ring, a C-shape pad, near rounded pad, and at least two arc pads. As shown inFIG. 5 toFIG. 7 , thehollow support pad 76 is rounded pad, and an internal periphery (FIG. 5 ) or external periphery (FIG. 6 ) of the roundedhollow support pad 76 can be toothlike in shape, can have two toothlike peripheries (FIG. 7 ), or two smooth peripheries. As shown inFIG. 8 , thehollow support pad 76 can be a C-shape pad with anangle 94 of the C-shapehollow support pad 76 greater than 180 degrees. The shape of the support pad should supports the wafer uniformly, but the structure of the support pad is not limited to the above-mentioned shape. - The materials of the
hollow support pads 76 can be plastic, an electrical conductor, or magnetic materials, having a width ((external diameter of the pad—internal diameter of the pad) divided by 2) greater than 3 mm, and a thickness greater than 1 mm. Besides, as shown inFIG. 9 andFIG. 10 , thehollow support pad 76 can be two or three pieces of arc magnetic materials. It can be noted that thehollow support pad 76 can be a mixture of the above-mentioned structures, but the above-mentioned structures do not limit the shape of thehollow support pad 76. On the other hand, thehollow support pad 76 can be a rounded or tube-like pad, but the rounded pad has at least one raised portion touching the non-complete wafer area of thewafer 74. - The present invention utilizes the
hollow support pads 76 to separatewafers 74. The complete wafer area ofwafers 74 does not touch thehollow support pads 76, so the surface of thewafers 74 does not get polluted and scraped by touching thehollow support pads 76. Moreover, the present invention wafer packing 70 stacks thewafers 74, and uses thecassette 72 to fix and prevent movement of thewafers 74, so the diameter of thehollow support pads 76 is the same size as thewafers 74. Therefore, we can use theoriginal cassette 72, without a need to change the width or height of the cassette. The present invention can effectively decrease the volume of wafer packing 70 by holdingmore wafers 74 in a single cassette while not decreasing the quantity ofwafer packings 70 in a carton, and therefore decreases shipping costs. - To sum up, when related to the wafer packing of prior art, the present invention utilizes hollow support pads in the wafer packing and can be applied to ship 12″ wafers and thin wafers. Not only can the present invention avoid the polluting and scraping of the wafer from the wafer touching an interleaf, but it also decreases the volume problem of the FOSB wafer packing when the hollow support pads separate the wafers. In addition, the pads of prior art cannot solve the volume, pollution, and abrasion problems at which the present invention is directed. The present invention can eliminate the above-mentioned problems, and further decrease shipping costs.
- Those skilled in the art will readily observe that numerous modifications and alterations of the device and method may be made while retaining the teachings of the invention. Accordingly, the above disclosure should be construed as limited only by the metes and bounds of the appended claims.
Claims (7)
1. A wafer packing, the wafer packing comprising:
a cassette;
at least two sponges, the sponges respectively put on a bottom and under a lid of the cassette;
a plurality of hollow support pads, the hollow support pads put between the sponges on the bottom and under the lid of the cassette;
a plurality of wafers arranged in alternation with the plurality of hollow support pads, a non-complete wafer area of the each wafer touching adjacent hollow support pads.
2. The wafer packing of claim 1 wherein the hollow support pads are rounded pads, C-shaped pads, near rounded pads, and at least two arc pads.
3. The wafer packing of claim 2 wherein an angle of the C-shaped is larger than 180 degree.
4. The wafer packing of claim 2 wherein at least one of peripheries of the hollow support pads is toothlike in shape.
5. The wafer packing of claim 1 wherein a material of the hollow support pads is a plastic material, an electrically conducting material, or a magnetic material.
6. The wafer packing of claim 1 wherein a thickness of the hollow support pads is greater than 1 mm.
7. The wafer packing of claim 1 wherein a width of the hollow support pads is greater than 3 mm.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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US11/162,950 US20070068846A1 (en) | 2005-09-29 | 2005-09-29 | Wafer packing |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/162,950 US20070068846A1 (en) | 2005-09-29 | 2005-09-29 | Wafer packing |
Publications (1)
Publication Number | Publication Date |
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US20070068846A1 true US20070068846A1 (en) | 2007-03-29 |
Family
ID=37892547
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US11/162,950 Abandoned US20070068846A1 (en) | 2005-09-29 | 2005-09-29 | Wafer packing |
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US (1) | US20070068846A1 (en) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20090297303A1 (en) * | 2005-09-30 | 2009-12-03 | Miraial Co., Ltd. | Thin Plate Container and Processing Apparatus for Thin Plate Container |
US20100101635A1 (en) * | 2008-10-14 | 2010-04-29 | Christian Senning Verpackungsmaschinen Gmbh & Co. | Packagings for thin-layer slice-form products |
US20110042266A1 (en) * | 2006-07-19 | 2011-02-24 | Miraial Co., Ltd | Wafer container with cushion sheets |
US20140033659A1 (en) * | 2008-04-18 | 2014-02-06 | Texas Instruments Incorporated | Packing insert for disc-shaped objects |
US20160318698A1 (en) * | 2014-01-23 | 2016-11-03 | Shenzhen China Star Optoelectronics Technology Co., Ltd. | A Packaging Structure of Liquid Crystal Panel |
US20170330778A1 (en) * | 2014-11-27 | 2017-11-16 | Achilles Corporation | Ring spacer |
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US4021048A (en) * | 1975-02-03 | 1977-05-03 | Duovel Company | Carrier accessory for use with record discs on phonographs |
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US20020144927A1 (en) * | 2001-04-10 | 2002-10-10 | Brooks Ray G. | IC wafer cushioned separators |
US6581264B2 (en) * | 2000-05-02 | 2003-06-24 | Shin-Etsu Polymer Co., Ltd. | Transportation container and method for opening and closing lid thereof |
US6662950B1 (en) * | 1999-10-25 | 2003-12-16 | Brian R. Cleaver | Wafer shipping and storage container |
US20040149623A1 (en) * | 2003-02-05 | 2004-08-05 | Gonzalo Amador | Protective interleaf for stacked wafer shipping |
US20050011808A1 (en) * | 2003-07-14 | 2005-01-20 | Pylant James D. | Wafer shipper with orientation control |
US20070284282A1 (en) * | 2006-06-07 | 2007-12-13 | Toshitsugu Yajima | Wafer storage container |
-
2005
- 2005-09-29 US US11/162,950 patent/US20070068846A1/en not_active Abandoned
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US4021048A (en) * | 1975-02-03 | 1977-05-03 | Duovel Company | Carrier accessory for use with record discs on phonographs |
US4203127A (en) * | 1977-07-18 | 1980-05-13 | Motorola, Inc. | Package and method of packaging semiconductor wafers |
US6164454A (en) * | 1997-11-14 | 2000-12-26 | Lucent Technologies Inc. | Apparatus and method for storing semiconductor objects |
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US20040149623A1 (en) * | 2003-02-05 | 2004-08-05 | Gonzalo Amador | Protective interleaf for stacked wafer shipping |
US20050011808A1 (en) * | 2003-07-14 | 2005-01-20 | Pylant James D. | Wafer shipper with orientation control |
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Cited By (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20090297303A1 (en) * | 2005-09-30 | 2009-12-03 | Miraial Co., Ltd. | Thin Plate Container and Processing Apparatus for Thin Plate Container |
US8480348B2 (en) * | 2005-09-30 | 2013-07-09 | Miraial Co., Ltd. | Thin plate container and processing apparatus for thin plate container |
US20110042266A1 (en) * | 2006-07-19 | 2011-02-24 | Miraial Co., Ltd | Wafer container with cushion sheets |
US8079477B2 (en) * | 2006-07-19 | 2011-12-20 | Miraial Co., Ltd. | Wafer container with cushion sheets |
US20140033659A1 (en) * | 2008-04-18 | 2014-02-06 | Texas Instruments Incorporated | Packing insert for disc-shaped objects |
US9382022B2 (en) * | 2008-04-18 | 2016-07-05 | Texas Instruments Incorporated | Packing insert for disc-shaped objects |
US20100101635A1 (en) * | 2008-10-14 | 2010-04-29 | Christian Senning Verpackungsmaschinen Gmbh & Co. | Packagings for thin-layer slice-form products |
US20160318698A1 (en) * | 2014-01-23 | 2016-11-03 | Shenzhen China Star Optoelectronics Technology Co., Ltd. | A Packaging Structure of Liquid Crystal Panel |
US20170330778A1 (en) * | 2014-11-27 | 2017-11-16 | Achilles Corporation | Ring spacer |
US10658212B2 (en) * | 2014-11-27 | 2020-05-19 | Achilles Corporation | Ring spacer |
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AS | Assignment |
Owner name: UNITED MICROELECTRONICS CORP., TAIWAN Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:HSIAO, HUANG-TING;REEL/FRAME:016598/0001 Effective date: 20050925 |
|
STCB | Information on status: application discontinuation |
Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION |