US20060271795A1 - Method to prevent power dissipation attacks on a cryptographic algorithm by implementing a random transformation step - Google Patents
Method to prevent power dissipation attacks on a cryptographic algorithm by implementing a random transformation step Download PDFInfo
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- US20060271795A1 US20060271795A1 US11/433,232 US43323206A US2006271795A1 US 20060271795 A1 US20060271795 A1 US 20060271795A1 US 43323206 A US43323206 A US 43323206A US 2006271795 A1 US2006271795 A1 US 2006271795A1
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/06—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
- H04L9/0618—Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation
- H04L9/0625—Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation with splitting of the data block into left and right halves, e.g. Feistel based algorithms, DES, FEAL, IDEA or KASUMI
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
- H04L9/002—Countermeasures against attacks on cryptographic mechanisms
- H04L9/003—Countermeasures against attacks on cryptographic mechanisms for power analysis, e.g. differential power analysis [DPA] or simple power analysis [SPA]
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
- G06F2207/72—Indexing scheme relating to groups G06F7/72 - G06F7/729
- G06F2207/7219—Countermeasures against side channel or fault attacks
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
- H04L2209/08—Randomization, e.g. dummy operations or using noise
Definitions
- the present invention relates to a data protection method, for example designed to be implemented by the microprocessor of a bank card or an access authorization card during a connection to an authenticating computer terminal.
- the known types of data protection methods use a cryptographic algorithm comprising execution cycles of repetitive operations for processing data elements contained in a memory of the card so as to generate encrypted information intended to be communicated to the computer terminal.
- the execution of the method by the microprocessor of the card results in the sending of derivative signals such as peaks in the level of the microprocessor's electric power consumption, or variations in the electromagnetic radiation such that the envelope of electromagnetic radiation is indicative of the data processed.
- An attacker seeking to use the microprocessor cards in an unauthorized way can trigger the execution of the method repeatedly and analyze the derivative signals emitted in order to determine correspondences between the various processing operations and each signal or series of signals. From these correspondences, and for example by subjecting the card to electromagnetic disturbances or voltage drops at precise moments in the execution of the algorithm, the attacker can study the encrypted information obtained and the differences, or lack of differences, between the derivative signals emitted, in order to discover the data contained in the memory of the card.
- One object of the invention is to offer an effective protection method that does not have the aforementioned disadvantages.
- the invention provides a data protection method using a cryptographic algorithm for executing operations for processing data elements so as to generate encrypted information, this method comprising at least one step for the random transformation of the execution of at least one operation from one cycle to another, or for the random transformation of at least one of the data elements, so that the encrypted information is unchanged by this random transformation.
- Random transformation of the execution of at least one operation is intended to mean a modification of the order of execution of operations or parts of operations, or a modification of the execution of a single operation.
- at least one operation and/or at least one of the pieces of data processed is randomly modified, which randomly affects the derivative signals emitted. This makes it very difficult for an attacker to distinguish between the various processing operations and to discover the data from the derivative signals.
- the random modification does not affect the encrypted information, so it can be used in the normal way after it is generated.
- FIGS. 1-5 illustrating, in the form of block diagrams, different permutations of the execution of operations according to embodiments of the invention, and an exemplary hardware embodiment of the invention.
- the protection method according to the invention described herein uses a symmetric cryptographic algorithm of the DES (DATA ENCRYPTION STANDARD) type to generate 64-bit encrypted information C from a message block M and a secret key K 1 , both 64-bit.
- DES DATA ENCRYPTION STANDARD
- a description of the algorithms used in DES is presented in the document Federal Information Processing Standards Publication 46-2, Dec. 30, 1993 issued by the National Bureau of Standards, and its content is hereby incorporated by reference.
- the method begins with the permutation 10 of the bits of the message block M with one another, in order to form the block M 0 .
- the block M 0 is then divided into two 32-bit blocks M 1 and M 2 during a division step 20 .
- This expansion 30 is performed, for example, by partitioning the block M 2 into eight quartets, and by adding to each quartet the adjacent end bit of the quartets framing the quartet in question (the end quartets being considered to be adjacent).
- a permutation 110 is performed on the bits of the key K 1 to form the key K 2 .
- the insignificant bits of the key K 1 are simultaneously deleted so that the key K 2 has only 56 bits.
- the bits of the key K 2 are then randomly modified during a transformation 120 .
- the bits of the key K 3 corresponding to the modified bits of the key K 2 here marked with a star, are stored.
- the transformation 120 is for example performed by associating with the key K 2 , by means of a logical operator of the exclusive-OR type, a random number generated by an unpredictable number generator of the card.
- a key K 4 is obtained through the rotation 130 of the bits of the key K 3 . Then, a permutation 140 is performed on the bits of the key K 4 to form the key K 5 . Simultaneously with the permutation 140 , the insignificant bits of the key K 4 are eliminated so that the key K 5 comprises 48 bits.
- the method continues with the association 210 of the block M 3 and the key K 5 by means of a logic operator of the exclusive—OR type.
- the result of this association is the block R 1 .
- the inverse transformation of the bits of the block R 1 corresponding to the bits modified by the transformation 120 is then performed in order to form the block R 2 .
- the purpose of this inverse transformation 220 of the transformation 120 is to return the bits of the block R 1 corresponding to the bits marked with a star to the state in which they would have been without the transformation 120 .
- the method then continues, in a conventional way, with the division and the processing 230 of the block R 2 , the permutation 240 of the bits of the block R 3 formed in step 230 , and the association 250 of the block R 4 resulting from step 240 with the block M 1 by means of an exclusive-OR operator, in order to form the block R 5 .
- the group of operations designated overall by the reference 270 is then re-executed five times assigning, with each execution, the value of the block M 1 to the block M 2 and the value of the block R 5 to the block M 1 during an assignment step 260 .
- the method ends with the operation 300 for obtaining the encrypted information C through the inverse permutation and the combining of the last block M 2 and the last block R 5 obtained.
- the step for randomly modifying the key K 2 comprises the transformation phase 120 and the inverse transformation phase 220 . These two phases make it possible to obtain encrypted information C that is not affected by this random modification.
- the execution of at least one operation can be randomly modified from one cycle to another, a cycle being a complete execution cycle of the algorithm or an intermediate execution cycle of a group of operations.
- a random determination of the order of execution of certain operations can be made during an execution cycle of the algorithm.
- the operations retained are the ones whose order of execution relative to the others does not affect the result.
- the permutation 10 of the bits of the message block M could be performed after the permutation 110 of the bits of the key K 1 , or vice versa.
- the data are processed in elements.
- the blocks M 2 are processed in quartets. During this operation, it is possible to provide for a random determination of the processing order of the various quartets.
- the bits of the key K 4 are processed individually. A step for randomly determining the processing order of the bits can also be provided for the execution of this permutation.
- the quartets of the block M 2 can also be processed alternately with the bits of the key K 4 , meaning for example that a first quartet of the block M 2 is processed, followed by a bit string of the key K 4 , followed by a second quartet of the block M 2 , etc., each time storing the data elements processed in order to verify that all of the required operations are actually executed.
- the invention has been described in connection with an algorithm of the DES type, the invention can be applied to other symmetric algorithms that work by modifying bits.
- the modification being performed by means of a logical operator of the exclusive-OR type, the length of the non-transformed data elements is identical to the length of these data elements transformed.
- the data elements can be keys K 1 , K 2 , K 3 , K 4 , K 5 or message blocks M, M 0 , M 1 , M 2 , M 3 , or message blocks associated with a key by a logical operator of the exclusive-OR type R 1 , R 2 , R 3 , R 4 , R 5 .
- FIG. 2 is a block diagram illustrating an alternative embodiment in which the randomly transformed data element is a message block.
- FIG. 3 is a block diagram illustrating an alternative embodiment in which the randomly transformed data element is a message block associated with a key by logical operator of the exclusive-OR type.
- the random transformation step is a step that precedes the group of operations executed repeatedly
- the inverse transformation step is a step that follows said group of operations, generating a random number once and processing the message block M with the algorithm is enough to obtain the encrypted information, all the data elements of the block being modified.
- the data string is protected from end to end.
- the algorithm is executed quickly, which is necessary in the case of a chip card, in which the execution time of an algorithm should be minimal.
- FIG. 4 is a block diagram illustrating an embodiment in which the random transformation step is a step that precedes the group of operations ( 270 ) executed repeatedly and in which the inverse transformation step follow the group of repeated operations ( 270 ).
- FIG. 5 is a schematic illustration showing a microprocessor 505 of a chip card 501 , for example, a bank card or access authorization card connected to an authenticating computer terminal 507 .
- the data protection method of the present invention is, for example, designed to be implemented on a microprocessor 505 of a chip card 501 during a connection to an authenticating terminal 507 .
- the chip card 501 also contains a memory 509 having therein some data, for example, keys, which is protected by the method of the present invention.
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- Storage Device Security (AREA)
Abstract
The invention relates to a data protection method using a cryptographic algorithm comprising at least one execution cycle of repetitive operations for processing data elements (K2, R1) so as to generate encrypted information (C), this method comprising at least one step (120, 220) for randomly modifying the execution of at least one operation from one cycle to another, or at least one of the data elements, so that the encrypted information is unchanged by this random modification.
Description
- 1. Field of the Invention
- The present invention relates to a data protection method, for example designed to be implemented by the microprocessor of a bank card or an access authorization card during a connection to an authenticating computer terminal.
- 2. Background of the Invention
- The known types of data protection methods use a cryptographic algorithm comprising execution cycles of repetitive operations for processing data elements contained in a memory of the card so as to generate encrypted information intended to be communicated to the computer terminal.
- The execution of the method by the microprocessor of the card results in the sending of derivative signals such as peaks in the level of the microprocessor's electric power consumption, or variations in the electromagnetic radiation such that the envelope of electromagnetic radiation is indicative of the data processed. An attacker seeking to use the microprocessor cards in an unauthorized way can trigger the execution of the method repeatedly and analyze the derivative signals emitted in order to determine correspondences between the various processing operations and each signal or series of signals. From these correspondences, and for example by subjecting the card to electromagnetic disturbances or voltage drops at precise moments in the execution of the algorithm, the attacker can study the encrypted information obtained and the differences, or lack of differences, between the derivative signals emitted, in order to discover the data contained in the memory of the card.
- To complicate this type of analysis of the derivative signals, it has been suggested that parasitic signals be generated and added to the derivative signals emitted during the execution of the method. The extraction of the signals that correspond to the execution of the method is then more difficult, but it is still possible. It has also been suggested that the electronic components of the card and the program for executing the method be designed so that the derivative signals emitted are independent of the value of the sensitive data. However, this complicates the production of the cards without providing satisfactory protection of the data.
- One object of the invention is to offer an effective protection method that does not have the aforementioned disadvantages.
- In order to achieve this object, the invention provides a data protection method using a cryptographic algorithm for executing operations for processing data elements so as to generate encrypted information, this method comprising at least one step for the random transformation of the execution of at least one operation from one cycle to another, or for the random transformation of at least one of the data elements, so that the encrypted information is unchanged by this random transformation.
- Random transformation of the execution of at least one operation is intended to mean a modification of the order of execution of operations or parts of operations, or a modification of the execution of a single operation. Thus, at least one operation and/or at least one of the pieces of data processed is randomly modified, which randomly affects the derivative signals emitted. This makes it very difficult for an attacker to distinguish between the various processing operations and to discover the data from the derivative signals. Moreover, the random modification does not affect the encrypted information, so it can be used in the normal way after it is generated.
- Other characteristics and advantages of the invention will emerge through the reading of the following description of a particular non-limiting embodiment of the invention, in connection with the
FIGS. 1-5 , illustrating, in the form of block diagrams, different permutations of the execution of operations according to embodiments of the invention, and an exemplary hardware embodiment of the invention. - The protection method according to the invention described herein uses a symmetric cryptographic algorithm of the DES (DATA ENCRYPTION STANDARD) type to generate 64-bit encrypted information C from a message block M and a secret key K1, both 64-bit. A description of the algorithms used in DES is presented in the document Federal Information Processing Standards Publication 46-2, Dec. 30, 1993 issued by the National Bureau of Standards, and its content is hereby incorporated by reference.
- The method begins with the
permutation 10 of the bits of the message block M with one another, in order to form the block M0. - The block M0 is then divided into two 32-bit blocks M1 and M2 during a
division step 20. - It then performs the
expansion 30 of the block M2 to form a 48-bit block M3. Thisexpansion 30 is performed, for example, by partitioning the block M2 into eight quartets, and by adding to each quartet the adjacent end bit of the quartets framing the quartet in question (the end quartets being considered to be adjacent). - In parallel with these operations, a
permutation 110 is performed on the bits of the key K1 to form the key K2. The insignificant bits of the key K1 are simultaneously deleted so that the key K2 has only 56 bits. - According to the invention, the bits of the key K2 are then randomly modified during a
transformation 120. The bits of the key K3 corresponding to the modified bits of the key K2, here marked with a star, are stored. Thetransformation 120 is for example performed by associating with the key K2, by means of a logical operator of the exclusive-OR type, a random number generated by an unpredictable number generator of the card. - A key K4 is obtained through the
rotation 130 of the bits of the key K3. Then, apermutation 140 is performed on the bits of the key K4 to form the key K5. Simultaneously with thepermutation 140, the insignificant bits of the key K4 are eliminated so that the key K5 comprises 48 bits. - The method continues with the
association 210 of the block M3 and the key K5 by means of a logic operator of the exclusive—OR type. The result of this association is the block R1. - The inverse transformation of the bits of the block R1 corresponding to the bits modified by the
transformation 120 is then performed in order to form the block R2. The purpose of thisinverse transformation 220 of thetransformation 120 is to return the bits of the block R1 corresponding to the bits marked with a star to the state in which they would have been without thetransformation 120. - The method then continues, in a conventional way, with the division and the
processing 230 of the block R2, the permutation 240 of the bits of the block R3 formed instep 230, and the association 250 of the block R4 resulting from step 240 with the block M1 by means of an exclusive-OR operator, in order to form the block R5. - The group of operations designated overall by the
reference 270 is then re-executed five times assigning, with each execution, the value of the block M1 to the block M2 and the value of the block R5 to the block M1 during anassignment step 260. - The method ends with the
operation 300 for obtaining the encrypted information C through the inverse permutation and the combining of the last block M2 and the last block R5 obtained. - It is understood that the step for randomly modifying the key K2 comprises the
transformation phase 120 and theinverse transformation phase 220. These two phases make it possible to obtain encrypted information C that is not affected by this random modification. - It would also be possible, in the same way, to perform a random modification of the block M2 and/or of another piece of data.
- According to another embodiment of the invention, which can be associated with a modification step like the one described above, the execution of at least one operation can be randomly modified from one cycle to another, a cycle being a complete execution cycle of the algorithm or an intermediate execution cycle of a group of operations.
- For example, a random determination of the order of execution of certain operations can be made during an execution cycle of the algorithm. The operations retained are the ones whose order of execution relative to the others does not affect the result. To make this determination, it is possible to perform, at the end of the chosen operations, a conditional jump to certain operations as a function of the value of a random number or to define a table of the addresses of the various operations, scanned randomly.
- For example, the
permutation 10 of the bits of the message block M could be performed after thepermutation 110 of the bits of the key K1, or vice versa. - Likewise, it is possible to provide for a random determination of the order of execution of the operations of the
group 270 for each intermediate execution cycle of the latter (16 intermediate execution cycles of these operations for one complete execution cycle of the algorithm). Here again, the order of execution of these operations is chosen so as not to affect the result. - Furthermore, for certain operations, the data are processed in elements. Thus, during the
expansion 30, the blocks M2 are processed in quartets. During this operation, it is possible to provide for a random determination of the processing order of the various quartets. Likewise, during thepermutation 140, the bits of the key K4 are processed individually. A step for randomly determining the processing order of the bits can also be provided for the execution of this permutation. The quartets of the block M2 can also be processed alternately with the bits of the key K4, meaning for example that a first quartet of the block M2 is processed, followed by a bit string of the key K4, followed by a second quartet of the block M2, etc., each time storing the data elements processed in order to verify that all of the required operations are actually executed. - Of course, the invention is not limited to the embodiment just described, but on the contrary encompasses any variant that retains, with equivalent means, its essential characteristics.
- In particular, although the invention has been described in connection with an algorithm of the DES type, the invention can be applied to other symmetric algorithms that work by modifying bits. Thus, the modification being performed by means of a logical operator of the exclusive-OR type, the length of the non-transformed data elements is identical to the length of these data elements transformed.
- Furthermore, the numbers of bits of the data are only mentioned as an example and can be modified in order to be adapted to the degree of protection sought.
- It will also be noted that all of the data elements M, M0, M1, M2, M3, K1, K2, K3, K4, K5, R1, R2, R3, R4 and R5 can be transformed by associating a random number with them, by means of the exclusive-OR logical operator, bearing in mind that after this random transformation step, an inverse transformation step is performed so that the encrypted information C is unchanged by said transformations.
- In particular, the data elements can be keys K1, K2, K3, K4, K5 or message blocks M, M0, M1, M2, M3, or message blocks associated with a key by a logical operator of the exclusive-OR type R1, R2, R3, R4, R5.
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FIG. 2 is a block diagram illustrating an alternative embodiment in which the randomly transformed data element is a message block.FIG. 3 is a block diagram illustrating an alternative embodiment in which the randomly transformed data element is a message block associated with a key by logical operator of the exclusive-OR type. - Finally, it will be noted that if the random transformation step is a step that precedes the group of operations executed repeatedly, and if the inverse transformation step is a step that follows said group of operations, generating a random number once and processing the message block M with the algorithm is enough to obtain the encrypted information, all the data elements of the block being modified. The data string is protected from end to end. Moreover, by not multiplying the transformation steps and the number of random numbers generated, the algorithm is executed quickly, which is necessary in the case of a chip card, in which the execution time of an algorithm should be minimal.
-
FIG. 4 is a block diagram illustrating an embodiment in which the random transformation step is a step that precedes the group of operations (270) executed repeatedly and in which the inverse transformation step follow the group of repeated operations (270). -
FIG. 5 is a schematic illustration showing amicroprocessor 505 of achip card 501, for example, a bank card or access authorization card connected to an authenticatingcomputer terminal 507. The data protection method of the present invention is, for example, designed to be implemented on amicroprocessor 505 of achip card 501 during a connection to an authenticatingterminal 507. Thechip card 501 also contains amemory 509 having therein some data, for example, keys, which is protected by the method of the present invention.
Claims (11)
1. (canceled)
2. (canceled)
3. (canceled)
4. (canceled)
5. (canceled)
6. (canceled)
7. (canceled)
8. (canceled)
9. Data protection method for operating a microprocessor of a chip card to protect data elements contained in a memory of the chip card from discovery by analysis of the electric power consumption of the microprocessor, said method using a symmetric cryptographic algorithm of the DES-type with a permutation step for executing operations for processing data elements so as to generate encrypted information, said method comprising:
operating the microprocessor to randomly determine a processing order of the bits of an input data for the execution of the permutation step, thereby protecting said data elements from discovery by analysis of the microprocessor's electric power consumption.
10. The data protection method of claim 9 wherein the cryptographic algorithm for executing operations for processing data elements includes a group of operations executed repeatedly.
11. The data protection method of claim 9 wherein said data elements are keys.
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US11/433,232 US20060271795A1 (en) | 1998-03-17 | 2006-05-12 | Method to prevent power dissipation attacks on a cryptographic algorithm by implementing a random transformation step |
Applications Claiming Priority (5)
Application Number | Priority Date | Filing Date | Title |
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FR98/03242 | 1998-03-17 | ||
FR9803242A FR2776445A1 (en) | 1998-03-17 | 1998-03-17 | Cryptographic algorithm security technique |
PCT/FR1999/000613 WO1999048239A1 (en) | 1998-03-17 | 1999-03-17 | Method for data securement using a cryptographic algorithm |
US09/646,640 US7073072B1 (en) | 1998-03-17 | 1999-03-17 | Method to prevent power dissipation attacks on a cryptographic algorithm by implementing a random transformation step |
US11/433,232 US20060271795A1 (en) | 1998-03-17 | 2006-05-12 | Method to prevent power dissipation attacks on a cryptographic algorithm by implementing a random transformation step |
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US09/646,640 Continuation US7073072B1 (en) | 1998-03-17 | 1999-03-17 | Method to prevent power dissipation attacks on a cryptographic algorithm by implementing a random transformation step |
PCT/FR1999/000613 Continuation WO1999048239A1 (en) | 1998-03-17 | 1999-03-17 | Method for data securement using a cryptographic algorithm |
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US20060271795A1 true US20060271795A1 (en) | 2006-11-30 |
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US11/433,232 Abandoned US20060271795A1 (en) | 1998-03-17 | 2006-05-12 | Method to prevent power dissipation attacks on a cryptographic algorithm by implementing a random transformation step |
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US09/646,640 Expired - Fee Related US7073072B1 (en) | 1998-03-17 | 1999-03-17 | Method to prevent power dissipation attacks on a cryptographic algorithm by implementing a random transformation step |
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ES (1) | ES2205784T3 (en) |
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EP2234031A1 (en) * | 2009-03-24 | 2010-09-29 | SafeNet, Inc. | Obfuscation |
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US6049613A (en) * | 1997-03-07 | 2000-04-11 | Jakobsson; Markus | Method and apparatus for encrypting, decrypting, and providing privacy for data values |
US5991415A (en) * | 1997-05-12 | 1999-11-23 | Yeda Research And Development Co. Ltd. At The Weizmann Institute Of Science | Method and apparatus for protecting public key schemes from timing and fault attacks |
US6064740A (en) * | 1997-11-12 | 2000-05-16 | Curiger; Andreas | Method and apparatus for masking modulo exponentiation calculations in an integrated circuit |
US6304658B1 (en) | 1998-01-02 | 2001-10-16 | Cryptography Research, Inc. | Leak-resistant cryptographic method and apparatus |
EP2280502B1 (en) * | 1998-06-03 | 2018-05-02 | Cryptography Research, Inc. | Using unpredictable information to Resist Discovery of Secrets by External Monitoring |
JP3600454B2 (en) * | 1998-08-20 | 2004-12-15 | 株式会社東芝 | Encryption / decryption device, encryption / decryption method, and program storage medium therefor |
JP4188571B2 (en) * | 2001-03-30 | 2008-11-26 | 株式会社日立製作所 | Arithmetic method of information processing apparatus and tamper resistant arithmetic disturbance implementation method |
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1998
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1999
- 1999-03-17 AU AU28422/99A patent/AU2842299A/en not_active Abandoned
- 1999-03-17 WO PCT/FR1999/000613 patent/WO1999048239A1/en active IP Right Grant
- 1999-03-17 EP EP99909029A patent/EP1064752B1/en not_active Expired - Lifetime
- 1999-03-17 US US09/646,640 patent/US7073072B1/en not_active Expired - Fee Related
- 1999-03-17 DE DE69910549T patent/DE69910549T2/en not_active Expired - Lifetime
- 1999-03-17 ES ES99909029T patent/ES2205784T3/en not_active Expired - Lifetime
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2006
- 2006-05-12 US US11/433,232 patent/US20060271795A1/en not_active Abandoned
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US5623548A (en) * | 1994-01-10 | 1997-04-22 | Fujitsu Limited | Transformation pattern generating device and encryption function device |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2009156881A3 (en) * | 2008-06-24 | 2010-10-14 | Nds Limited | Security within integrated circuits |
US8539596B2 (en) | 2008-06-24 | 2013-09-17 | Cisco Technology Inc. | Security within integrated circuits |
US8913745B2 (en) | 2008-06-24 | 2014-12-16 | Cisco Technology Inc. | Security within integrated circuits |
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EP1064752B1 (en) | 2003-08-20 |
WO1999048239A1 (en) | 1999-09-23 |
FR2776445A1 (en) | 1999-09-24 |
AU2842299A (en) | 1999-10-11 |
US7073072B1 (en) | 2006-07-04 |
ES2205784T3 (en) | 2004-05-01 |
DE69910549D1 (en) | 2003-09-25 |
DE69910549T2 (en) | 2004-06-17 |
EP1064752A1 (en) | 2001-01-03 |
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