US20060199303A1 - Carrier for substrate film - Google Patents
Carrier for substrate film Download PDFInfo
- Publication number
- US20060199303A1 US20060199303A1 US11/415,766 US41576606A US2006199303A1 US 20060199303 A1 US20060199303 A1 US 20060199303A1 US 41576606 A US41576606 A US 41576606A US 2006199303 A1 US2006199303 A1 US 2006199303A1
- Authority
- US
- United States
- Prior art keywords
- substrate
- film
- carrier
- dies
- substrate film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 230
- 238000000034 method Methods 0.000 claims abstract description 56
- 239000000463 material Substances 0.000 claims abstract description 30
- 238000004519 manufacturing process Methods 0.000 claims description 23
- 239000004065 semiconductor Substances 0.000 claims description 11
- 238000000465 moulding Methods 0.000 claims description 3
- 230000000712 assembly Effects 0.000 abstract description 15
- 238000000429 assembly Methods 0.000 abstract description 15
- 238000003491 array Methods 0.000 abstract description 8
- 239000007795 chemical reaction product Substances 0.000 abstract description 5
- 230000009977 dual effect Effects 0.000 abstract description 5
- 230000002950 deficient Effects 0.000 abstract description 3
- 239000000853 adhesive Substances 0.000 description 10
- 230000001070 adhesive effect Effects 0.000 description 10
- 229910000679 solder Inorganic materials 0.000 description 10
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 6
- 239000004642 Polyimide Substances 0.000 description 6
- 229910052802 copper Inorganic materials 0.000 description 6
- 239000010949 copper Substances 0.000 description 6
- 229920001721 polyimide Polymers 0.000 description 6
- 238000005452 bending Methods 0.000 description 4
- 238000004891 communication Methods 0.000 description 4
- ZGHQUYZPMWMLBM-UHFFFAOYSA-N 1,2-dichloro-4-phenylbenzene Chemical compound C1=C(Cl)C(Cl)=CC=C1C1=CC=CC=C1 ZGHQUYZPMWMLBM-UHFFFAOYSA-N 0.000 description 3
- 238000004806 packaging method and process Methods 0.000 description 3
- 238000005520 cutting process Methods 0.000 description 2
- 238000005538 encapsulation Methods 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 230000006835 compression Effects 0.000 description 1
- 238000007906 compression Methods 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 239000012811 non-conductive material Substances 0.000 description 1
- 229920003223 poly(pyromellitimide-1,4-diphenyl ether) Polymers 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49503—Lead-frames or other flat leads characterised by the die pad
- H01L23/4951—Chip-on-leads or leads-on-chip techniques, i.e. inner lead fingers being used as die pad
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49572—Lead-frames or other flat leads consisting of thin flexible metallic tape with or without a film carrier
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/4985—Flexible insulating substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/45124—Aluminium (Al) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/852—Applying energy for connecting
- H01L2224/85201—Compression bonding
- H01L2224/85203—Thermocompression bonding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/852—Applying energy for connecting
- H01L2224/85201—Compression bonding
- H01L2224/85205—Ultrasonic bonding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/10251—Elemental semiconductors, i.e. Group IV
- H01L2924/10253—Silicon [Si]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0393—Flexible materials
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0097—Processing two or more printed circuits simultaneously, e.g. made from a common substrate, or temporarily stacked circuit boards
Definitions
- the present invention relates generally to the handling of semiconductor chips and, specifically, to a carrier adapted for supporting a substrate film during the assembly and bonding process.
- semiconductor chips or dies are typically batch fabricated on a silicon wafer.
- the wafer may contain hundreds of dies arranged in a matrix.
- the dies are separated and each die is typically mounted on an appropriate substrate, contacted, and packaged.
- the substrate is typically a thin flexible tape or film reel which permits automated transport and handling of the dies.
- Many dies may be attached adjacently to a single tape using, for example, a suitable adhesive material. Bond pads on the dies and the substrate film allow the dies to be wire bonded or connected, using suitable leads, to the substrate.
- the die-substrate assemblies may then be cut into individual units. Each unit is packaged in a suitable medium with output leads, for example, ball grid arrays (BGA), pin grid arrays (PGA), dual in-line packages (DIP), and the like. The outputs of these packages allow interconnections to a similarly patterned arrangement of connections on a printed circuit board (PCB).
- BGA ball grid arrays
- PGA pin grid arrays
- DIP dual in-line packages
- the thinness of the substrate film or tape is advantageous in that it does not significantly add to the weight and size of the end product. But this thinness can also cause the substrate film reel to be fragile and flimsy. As a result, during the assembly process, the film is prone to undesirable and/or unwanted bending and movement. This cannot only cause damage to the die, the substrate and the die-substrate interface, but can also complicate the handling and assembly of the die and substrate. For example, undesirable bending of the film substrate can result in breakage of one or more of the leads connecting the dies to the substrate.
- the invention relates to a carrier for supporting a substrate film during the chip-substrate assembly and bonding process.
- the carrier provides enhanced rigidity to the substrate film.
- the degree of rigidity and/or flexibility provided can be controlled by selection of the carrier dimensions, configuration and material choice.
- Advantages of embodiments of the carrier include easier handling, reduced probability of defective end products, and increased control in choosing the thinness of the substrate film.
- the substrate film carrier can be used for lead-over-chip (LOC) assemblies and lead-under-chip (LUC) assemblies to create ball grid arrays (BGA), pin grid arrays (PGA), dual in-line packages (DIP), and the like.
- LOC lead-over-chip
- LOC lead-under-chip
- DIP dual in-line packages
- a carrier for supporting a substrate film comprises side bars and cross bars.
- the side bars and cross bars are in mechanical communication with the substrate film and provide rigidity during the manufacturing process.
- an assembly comprises a substrate film and a carrier.
- the carrier comprises side bars which are in mechanical communication with the substrate film.
- an assembly comprises a film and a carrier.
- the film includes a plurality of substrate units.
- the plurality of substrate units is adapted to electrically interface with a plurality of dies.
- the carrier is in mechanical communication with the film.
- the carrier provides enhanced rigidity to the film by being sized and configured to add material at selected regions of the film.
- an assembly for attachment of integrated circuits comprises a film, a plurality of dies and a carrier.
- the film includes a plurality of substrate units.
- the plurality of dies are in electrical contact with the plurality of substrate units.
- the carrier is in mechanical communication with the film for providing enhanced rigidity to the film.
- One embodiment of the invention relates to method for supporting a substrate film.
- the method comprises connecting side bars to a substrate film and connecting cross bars to the substrate film, whereby the side bars and the cross bars provide rigidity during the manufacturing process.
- Another embodiment relates to a method of manufacturing an assembly.
- the method comprises connecting side bars to a substrate film and transporting the side bars and the substrate film through a manufacturing process.
- the method further comprises removing the side bars after at least a portion of the manufacturing process.
- An additional embodiment relates to a method of processing semiconductor dies.
- the method comprises forming a plurality of substrate units within a film and interfacing the substrate units with a plurality of dies.
- the method further comprises adding support material at selected regions of the film so as to provide enhanced rigidity to the substrate units.
- the method also comprises removing the support material at the completion of at least a portion of a manufacturing process.
- One embodiment relates to a method of manufacturing integrated circuits.
- the method comprises forming a plurality of substrate units within a substrate film and interfacing a plurality of dies to the plurality of substrate units.
- the method further comprises connecting a carrier to the film to enhance the rigidity of the film.
- FIG. 1 is a schematic exploded perspective view of one embodiment of a ball grid array (BGA) chip package and a printed circuit board (PCB);
- BGA ball grid array
- PCB printed circuit board
- FIG. 2 is a partially exploded perspective view of a substrate film, carrier and lead-over-chip (LOC) die assembly in accordance with one embodiment of the present invention
- FIG. 3 is a top plan view of the substrate film of FIG. 2 ;
- FIG. 4 is a top plan view of the substrate film and carrier of FIG. 2 ;
- FIG. 5 is a schematic cross-sectional view along line 5 - 5 of FIG. 4 in accordance with one embodiment of the present invention.
- FIG. 6 is a schematic cross-sectional view along line 5 - 5 of FIG. 4 in accordance with another embodiment of the present invention.
- FIG. 7 is a schematic cross-sectional view along line 5 - 5 of FIG. 4 in accordance with another embodiment of the present invention.
- FIG. 1 schematically illustrates a ball grid array (BGA) chip package 10 and a printed circuit board (PCB) 12 .
- the BGA package 10 serves as an encapsulating device for a die or chip and permits electrical access to the die via solder or electrode bumps 14 .
- the PCB 12 includes a pattern of pads 16 which are arranged in alignment with the BGA solder bumps 14 . This allows the BGA chip package 10 to be connected to the PCB 12 .
- chip packaging types may also be used, for example, pin grid arrays (PGA), dual in-line packages (DIP), and the like. These packaging types can be connected to compatible connectors on a PCB or other external circuitry.
- FIG. 2 is a representation of a lead-over-chip (LOC) assembly 17 and generally shows a substrate film 18 , a film carrier or structure 20 and a semiconductor die or chip 22 .
- the substrate film 18 includes a plurality of substrate units 24 , as discussed in greater detail below, with each unit 24 being interfaceable with an individual die 22 .
- the die 22 includes a plurality of bonding pads 28 which are in electrical contact with the integrated circuits formed on the die 22 . During assembly, the die 22 is adhered to the substrate unit 24 and the bonding pads 28 are electrically contacted to traces 26 formed on or in the substrate unit 24 through die lead wires (not shown).
- the LOC die-substrate assembly 17 is separated from the substrate film 18 and packaged, for example, in the BGA chip package 10 ( FIG. 1 ) with the substrate electrical traces 26 in electrical contact with the solder bumps 14 ( FIG. 1 ). This permits the die 22 to be electrically interfaced with external circuitry, for example, the PCB 12 ( FIG. 1 ).
- the LOC die-substrate assembly 17 can also be packaged in other forms, for example and as indicated above, using pin grid arrays (PGA), dual in-line packages (DIP), and the like.
- the substrate film carrier 20 may be used in connection with various types of die-substrate assemblies to provide rigidity to the substrate film 18 ( FIG. 2 ) during handling.
- the substrate film carrier 20 is used in conjunction with a lead-under-chip (LUC).
- LUC lead-under-chip
- the die attach materials and equipment are commercially available from suppliers such as Dow Corning, Hitachi and ShinEtsu, among others.
- the lead bond tools and equipment are commercially available from suppliers such as Gaiser, Hitachi, Shinkawa and others.
- the encapsulation materials and equipment are commercially available from suppliers such as Ablestick, Asymtek, Dow Corning, Hitachi, 3M, ShinEtsu and others.
- FIG. 3 shows a substrate film or tape 18 in accordance with one embodiment.
- the substrate film 18 generally includes a plurality of substrate units or elements 24 , and side rails 30 and 32 which are interconnected by end rails 34 and 36 and a plurality of cross rails 38 .
- the side rails 30 , 32 have a plurality of indexing holes 40 that facilitate transport and indexing of the substrate film 18 , for example, during automated assembling.
- the side rails 30 , 32 also include projecting portions 33 which define two of the edges of the substrate units 24 .
- the substrate film 18 ( FIG. 3 ) includes eighteen substrate units 24 grouped in substrate sets 42 with each substrate set 42 including three substrate units 24 .
- the cross rails 38 serve to space adjacent substrate sets 42 .
- the number of substrate units 24 in the substrate film 18 and the number of substrate units 24 forming each substrate set 42 can be increased or decreased with efficacy, as required or desired.
- each substrate unit 24 is flanked by a pair of spacing and/or separating slots 44 .
- the substrate unit 24 includes a plurality of electrical traces 26 with bond pads 50 formed thereon, and a generally central cavity 46 adjacent to a pair of adhesive tabs 48 formed on the under-surface of the substrate film 18 .
- the adhesive tabs 48 permit a plurality of dies, for example, the die 22 , to be adhered to respective substrate units 24 .
- the substrate unit cavity 46 is configured so that when the die 22 is in attachment with the substrate unit 24 the die bonding pads 28 are exposed. This allows die lead wires (not shown) to pass through the cavity 46 and be wire bonded to the die bonding pads 28 and corresponding substrate bond pads 50 . In turn, other bond pads 50 in electrical contact with the electrical traces 26 permit the substrate unit 24 , and hence the die 22 , to be externally interfaced, for example, via the solder or electrode bumps 14 ( FIG. 1 ).
- each substrate unit 24 also includes alignment holes 52 which facilitate alignment of the die-substrate assembly, for example, the LOC assembly 17 during encapsulation.
- the substrate film 18 ( FIG. 3 ) is fabricated from polyimide.
- substrate films 18 are commercially available from a wide variety of sources, for example, 3M, Casio, Shinko, Rite Flex and others.
- the fabrication of the film or tape 18 begins with providing a polyimide tape which is sandwiched on either side by a layer of copper and an outer layer of solder resist/mask. The desired electrical “artwork” is then etched on the polyimide tape.
- the skilled artisan will understand, however, that a variety of other non-conductive materials and processes can be used to create the substrate film 18 .
- the wire bonding of the die lead wires (not shown) to the die bonding pads 28 and substrate bond pads 50 can utilize one of several methods known in the art. For example, thermal compression bonding, ultrasonic bonding, and pulse bonding may be used.
- the die lead wires are typically made out of either gold or aluminum, but other materials may be used, as required or desired, giving due consideration to the goal of providing reliable electrical contacts.
- the substrate bond pads 50 are fabricated from gold plated copper, though a variety of other materials can be used, as required or desired, giving due consideration to the goal of providing reliable electrical contacts.
- the substrate film 18 has a thickness in the range from about 0.125 mm to 0.120 mm, a length in the range from about 182.03 mm to 182.93 mm and a width in the range from about 27.13 mm to 27.23 mm.
- the substrate film 18 may be adapted to have a wide variety of other thicknesses, lengths and widths.
- the side rails 30 , 32 have a thickness in the range from about 0.125 mm to 0.120 mm, a length in the range from about 182.03 mm to 182.93 mm, and a width in the range from 27.13 mm to 27.23 mm.
- the side rail projecting portions 33 extend inwards about 4.32 mm and are about 6.63 wide.
- the skilled artisan will recognize that the side rails 30 , 32 may be adapted to have a wide variety of other dimensions.
- the end rails 34 , 36 have a thickness in the range from about 0.125 mm to 0.120 mm, a length in the range from about 27.13 mm to 27.23 mm, and a width in the range from about 1.03 mm to 1.11 mm.
- the skilled artisan will recognize that the end rails 34 , 36 may be adapted to have a wide variety of other dimensions.
- the cross rails 38 have a thickness in the range from about 0.125 mm to 0.120 mm, a length in the range from about 27.13 mm to 27.23 mm, and a width in the range from about 2.11 mm to 2.21 mm.
- the spacing between neighboring cross rails 38 is in the range from about 5.03 mm to 5.11 mm.
- the substrate film 18 includes five cross rails 38 .
- the substrate film 18 may include fewer or more cross rails 38 .
- the slots 44 have a length in the range from about 18.49 mm to 18.59 mm and a width in the range from about 2.11 mm to 2.21 mm. In one embodiment, the spacing between neighboring slots 44 is in the range from about 5.03 mm to 5.11 mm. However, in other embodiments, the skilled artisan will recognize that the slots 44 may be adapted to have a wide variety of other dimensions and spacings. In one embodiment, the substrate film 18 includes seventeen slots 44 . However, in other embodiments, the substrate film 18 may include fewer or more slots 44 .
- the cavities 46 have a length in the range from about 15.95 mm to 16.05 mm and a width in the range from about 7.95 mm to 8.05 mm. In one embodiment, the spacing between neighboring cavities 46 is in the range from about 10.11 mm to 10.21 mm. However, in other embodiments, the skilled artisan will recognize that the cavities 46 may be adapted to have a wide variety of other dimensions and spacings. In one embodiment, the substrate film 18 includes eighteen cavities 46 . However, in other embodiments, the substrate film 18 may include fewer or more cavities 46 .
- the substrate units 24 have a thickness in the range from about 0.125 mm to 0.120 mm, a length in the range from about 182.03 mm to 182.93 mm, and a width in the range from about 27.13 mm to 27.23 mm.
- the substrate units 24 may be adapted to have a wide variety of other dimensions.
- the substrate film 18 includes eighteen substrate units 24 .
- the substrate film 18 may include fewer or more substrate units 24 .
- the substrate film 18 includes six substrate sets 42 .
- Each of the substrate sets 42 includes three substrate units 24 .
- the skilled artisan will realize that the substrate film 18 may include fewer or more substrate sets 42 and each substrate set 42 may include fewer or more substrate units 24 .
- each substrate unit 24 is associated with three indexing holes 40 .
- each substrate unit 24 may be associated with fewer or more indexing holes 40 .
- FIG. 4 shows the substrate film 18 supported by a carrier or structure 20 in accordance with one embodiment to form a carrier-film assembly 21 .
- the substrate film carrier 20 provides increased rigidity for the substrate film 18 which facilitates handling and assembling processes.
- the carrier 20 generally includes side bars 60 and 62 which are interconnected by end bars 64 and 66 and a plurality of cross bars 68 .
- the carrier side bars 60 , 62 are substantially aligned with the film side rails 30 , 32 ( FIG. 3 ) and include teeth 63 to form notches 65 .
- the teeth 63 are substantially aligned with the side rail projecting portions 33 and the notches 65 are substantially aligned with the ends of the film slots 44 .
- the carrier side bars 60 , 62 also include indexing holes 70 which are substantially aligned with the film indexing holes 40 .
- the carrier end bars 64 , 66 are substantially aligned with the film end rails 34 , 36 and the carrier cross bars 68 are substantially aligned with the film cross rails 38 .
- the substrate film carrier 20 provides enhanced rigidity to the substrate film 18 by adding extra material on the film side rails 30 , 32 , film end rails 34 , 36 , and film cross rails 38 . In one embodiment, this is achieved by providing a balance between flexibility and rigidity.
- the carrier-film assembly 21 is flexible enough so that it is easily handled by the processing machines but it is also rigid enough to provide sufficient support for the substrate film 18 during handling.
- the carrier side bars 60 , 62 , carrier end bars 64 , 66 , and carrier cross bars 68 are dimensioned to have substantially the same thickness. In other embodiments, the carrier side bars 60 , 62 , carrier end bars 64 , 66 , and carrier cross bars 68 can have different thicknesses.
- the substrate film carrier 20 comprises only the side bars 60 , 62 . In another embodiment, the substrate film carrier 20 comprises only the cross bars 68 . In yet another embodiment, the substrate film carrier 20 comprises the side bars 60 , 62 , and the cross bars 68 . In a further embodiment, the substrate film carrier 20 comprises the side bars 60 , 62 , and the end bars 64 , 66 . In yet another further embodiment, the substrate film carrier 20 comprises the end bars 64 , 66 , and the cross bars 68 .
- the substrate film carrier 20 can be configured in many other ways, for example, and referring to FIG. 4 , the teeth 63 or notches 65 shown on the carrier side bars 60 , 62 can be removed. Also, the substrate film carrier 20 can be provided on the adhesive tab 48 side of the film 18 or on both sides of the film 18 , giving due consideration to the goal of providing enhanced rigidity. The substrate film carrier 20 may also extend beyond the periphery and/or any edges of the film 18 , as required or desired. Moreover, the film carrier can be constructed to adapt to the particular shapes and/or sizes of a wide range of substrate films, giving due consideration to the goals of providing length-wise and/or cross-wise support.
- the substrate film carrier 20 comprises a frame that is adhered to the substrate film 18 to form the carrier-film assembly 21 .
- the carrier/frame 20 may be attached to the film 18 utilizing a wide variety of commercially available adhesive materials.
- the adhesive material is selected such that it can withstand a temperature of at least about 150 ⁇ C, for example, KAPTON, manufactured by 3M.
- the frame 20 is fabricated from BT resin.
- the skilled artisan will understand, however, that a variety of materials can be used for the substrate film carrier/frame 20 with efficacy, giving due consideration to the goal of providing enhanced rigidity for the substrate film 18 ( FIG. 3 ).
- the frame 20 ( FIG. 5 ), in one embodiment, can be manufactured by stamping a sheet of material in the desired shape and then punching the indexing holes 70 in suitable positions.
- the frame 20 may also be fabricated by other known manufacturing techniques.
- the process of providing a packaged die generally begins with the fabrication of the substrate film 18 .
- Side rails 30 , 32 , end rails 34 , 36 , cross rails 38 , indexing holes 40 , slots 44 , cavities 46 and alignment holes 52 are created.
- the electrical “artwork” (electrical traces 26 , bond pads 50 ) is formed on the film 18 , in one embodiment, by an etching process.
- Adhesive tabs 48 are added to the film 18 .
- a substrate film carrier/frame 20 is then formed.
- the substrate film carrier/frame 20 is manufactured by stamping a sheet of material to provide side bars 60 , 62 , end bars 64 , 66 , and cross bars 68 .
- the indexing holes 70 are punched into the carrier 20 .
- the carrier/frame 20 is adhered to the film 18 and adds thickness to the film 18 at selected locations.
- dies 22 ( FIG. 2 ) are adhered to respective substrate units 24 utilizing the adhesive tabs 48 .
- the dies 22 are wire bonded to the electrical traces 26 on respective substrate units 24 to form a plurality of die-substrate assemblies, for example, the LOC assemblies 17 ( FIG. 2 ).
- the die-substrate assemblies 17 are removed from the substrate film 18 , for example, by cutting.
- the die-substrate assemblies 17 are then packaged and tested to provide, for example, the BGA die package 10 ( FIG. 1 ).
- the substrate film carrier 20 has a thickness in the range from about 0.295 mm to 0.305 mm, a length in the range from about 182.03 mm to 182.93 mm and a width in the range from about 27.13 mm to 27.23 mm.
- the substrate film carrier 20 may be adapted to have a wide variety of other thicknesses, lengths and widths.
- the side bars 60 , 62 have a thickness in the range from about 0.295 mm to 0.305 mm, a length in the range from about 182.03 mm to 182.93 mm, and a width in the range from about 3.22 mm to 3.32 mm.
- the side bar teeth 63 extend inwards about 1.07 mm and are about 7.95 mm wide.
- the skilled artisan will recognize that the side bars 60 , 62 may be adapted to have a wide variety of other dimensions.
- the end bars 64 , 66 have a thickness in the range from about 0.295 mm to 0.305 mm, a length in the range from about 27.13 mm to 27.23 mm, and a width in the range from about 1.03 mm to 1.11 mm.
- the skilled artisan will recognize that the end bars 64 , 66 may be adapted to have a wide variety of other dimensions.
- the cross bars 68 have a thickness in the range from about 0.295 mm to 0.305 mm, a length in the range from about 27.13 mm to 27.23 mm, and a width in the range from about 2.11 mm to 2.21 mm.
- the spacing between neighboring cross bars 68 is in the range from about 5.03 mm to 5.11 mm.
- the substrate film carrier 20 includes five cross bars 68 .
- the substrate film carrier 20 may include fewer or more cross bars 68 .
- the carrier indexing holes 70 have a diameter in the range from about 1.574 mm to 1.499 mm. However, in other embodiments, the skilled artisan will recognize that the indexing holes 70 may be adapted to have a wide variety of other diameters. In one embodiment, the carrier 20 includes fifty-four indexing holes 70 . However, in other embodiments, the substrate film carrier 20 may include fewer or more indexing holes 70 .
- the substrate film carrier 20 is formed with the substrate film 18 to create the carrier-film assembly 21 .
- the carrier 20 and the film 18 are fabricated from polyimide. The skilled artisan will understand, however, that a variety of materials can be used for the carrier 20 and the film 18 . Referring to FIG. 6 , the carrier 20 and the film 18 may be manufactured by using known techniques, such as molding.
- the process of providing a packaged die generally begins with the fabrication of the substrate film 18 and the carrier 20 .
- Side rails 30 , 32 , end rails 34 , 36 , cross rails 38 , indexing holes 40 , slots 44 , cavities 46 and alignment holes 52 are created.
- Side bars 60 , 62 , end bars 64 , 66 , cross bars 68 , and indexing holes 70 are created.
- a molding process is utilized to form the carrier 20 with the film 18 .
- the carrier 20 adds thickness to the film 18 at selected locations.
- the electrical “artwork” (electrical traces 26 , bond pads 50 ) is formed on the film 18 .
- this “artwork” is formed by an etching process.
- Adhesive tabs 48 are added to the film 18 .
- dies 22 ( FIG. 2 ) are adhered to respective substrate units 24 utilizing the adhesive tabs 48 .
- the dies 22 are wire bonded to the electrical traces 26 on respective substrate units 24 to form a plurality of die-substrate assemblies, for example, the LOC assemblies 17 .
- the die-substrate assemblies 17 are removed from the substrate film 18 , for example, by cutting.
- the die-substrate assemblies 17 are then packaged and tested to provide, for example, the BGA die package 10 ( FIG. 1 ).
- the carrier 20 includes fifty-four indexing holes 70 .
- the substrate film carrier 20 may include fewer or more indexing holes 70 .
- the substrate film carrier 20 comprises a plurality of layers 74 of material.
- the layers 74 are polyimide.
- one or more of the layers 74 are metallic, for example, copper, and/or solder mask. These latter embodiments may be desirable especially in the situation, as indicated above, in which fabrication of the electrical “artwork” on the substrate film 18 utilizes layers of copper and solder resist.
- one or more layers 74 can be polyimide, one or more layers 74 can be copper, and one or more layers 74 can be solder mask.
- the thickness of each layer 74 can be controlled, as required or desired. Those skilled in the art will recognize that a number of materials may be used to fabricate the layered carrier 20 shown in FIG. 7 .
- one or more layers 74 of material is provided to form side bars 60 , 62 , end bars 64 , 66 , and cross bars 68 .
- the indexing holes 70 are punched into the carrier 20 .
- the layers 74 may also be formed during the fabrication of the film 18 and can comprise copper and/or solder resist.
- the carrier 20 adds thickness to the film 18 at selected locations.
- the substrate film carrier 20 has a thickness in the range from about 0.125 mm to 0.120 mm, a length in the range from about 182.03 mm to 182.93 mm and a width in the range from about 27.13 mm to 27.23 mm.
- the substrate film carrier 20 may be adapted to have a wide variety of other thicknesses, lengths and widths.
- the layers 74 may have a thickness in the range from about 0.125 mm to 0.120 mm However, in other embodiments, the skilled artisan will recognize that the layers 74 may be adapted to have a wide variety of other thicknesses.
- the side bars 60 , 62 have a thickness in the range from about 0.125 mm to 0.120 mm, a length in the range from about 182.03 mm to 182.93 mm, and a width in the range from about 27.13 mm to 27.23 mm.
- the side bar teeth 63 extend inwards about 4.32 mm and are about 6.63 mm wide.
- the skilled artisan will recognize that the side bars 60 , 62 may be adapted to have a wide variety of other dimensions.
- the end bars 64 , 66 have a thickness in the range from about 0.125 mm to 0.120 mm, a length in the range from about 27.13 mm to 27.23 mm, and a width in the range from about 1.03 mm to 1.11 mm.
- the skilled artisan will recognize that the end bars 64 , 66 may be adapted to have a wide variety of other dimensions.
- the cross bars 68 have a thickness in the range from about 0.125 mm to 0.120 mm, a length in the range from about 27.13 mm to 27.23 mm, and a width in the range from about 2.11 mm to 2.21 mm.
- the spacing between neighboring cross bars 68 is in the range from about 5.03 mm to 5.11 mm.
- the substrate film carrier 20 includes five cross bars 68 .
- the substrate film carrier 20 may include fewer or more cross bars 68 .
- the carrier indexing holes 70 have a diameter in the range from about 1.574 mm to 1.499 mm. However, in other embodiments, the skilled artisan will recognize that the indexing holes 70 may be adapted to have a wide variety of other diameters. In one embodiment, the carrier 20 includes fifty-four indexing holes 70 . However, in other embodiments, the substrate film carrier 20 may include fewer or more indexing holes 70 .
- one embodiment of the invention Upon completion of at least a portion of the manufacturing process, one embodiment of the invention removes the substrate film carrier 20 from the substrate film 18 . Upon removal of the substrate film carrier 20 , the substrate units 24 and the their corresponding dies 22 are separated from each other. Thus, the substrate file carrier 20 provides support during the manufacturing process.
- the substrate film carrier 20 demonstrates certain advantages over conventional handling of thin substrate films 18 .
- One advantage is that the substrate film carrier 20 provides enhanced rigidity to the substrate film during handling and die-substrate assembly. This reduces undesirable and/or unwanted bending and movement which can not only cause damage to the die, the substrate and the die-substrate interface, but can also complicate the handling and assembly of the die and substrate. For example, undesirable bending of the substrate film can result in breakage of one or more of the lead wires connecting the dies to the substrate film.
- the substrate film carrier 20 improves processability of the die-substrate assembly 17 ( FIG. 2 ) by providing enhanced rigidity to the substrate film 18 ( FIGS. 3 and 4 ), and hence helps in reducing the percentage of defective end products.
- the substrate film carrier 20 ( FIG. 4 ) can provide a better seal with a suction/vacuum tip, again largely due to the enhanced rigidity it provides.
- a suction tip for holding and/or transporting the substrate film 18 and/or the die-substrate assembly 17 .
- the flimsiness of conventional thin substrate films makes it difficult to use a suction tip.
- the substrate film carrier 20 ( FIG. 4 ) allows the use of suction tips to handle the substrate film 18 ( FIGS. 3 and 4 ) by providing enhanced rigidity to the substrate film 18 . This can improve the overall speed and efficiency of the assembly process.
- the substrate film carrier 20 ( FIG. 4 ) allows for more control in selecting the thinness of the substrate film 18 ( FIGS. 3 and 4 ).
- the lower limit on the thickness can be dictated by the handling processability of the substrate film.
- This limitation on the thickness of the substrate film is reduced by the substrate film carrier 20 ( FIG. 4 ) which provides enhanced rigidity to the substrate film 18 ( FIGS. 3 and 4 ).
- the degree of rigidity and/or flexibility provided can be controlled by selection of the carrier dimensions, configuration and material choice.
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Wire Bonding (AREA)
Abstract
The invention relates to a carrier for supporting a substrate film during the chip-substrate assembly and bonding process. The carrier provides enhanced rigidity to the substrate film. The degree of rigidity and/or flexibility provided can be controlled by selection of the carrier dimensions, configuration and material choice. Advantages of embodiments of the carrier include easier handling, reduced probability of defective end products, and increased control in choosing the thinness of the substrate film. For example, the substrate film carrier can be used for lead-over-chip (LOC) assemblies and lead-under-chip (LUC) assemblies to create ball grid arrays (BGA), pin grid arrays (PGA), dual in-line packages (DIP), and the like.
Description
- This application is a continuation of U.S. patent application Ser. No. 11/218,137, filed Sep. 1, 2005, which is a continuation of U.S. patent application Ser. No. 09/389,720, filed Sep. 3, 1999, now U.S. Pat. No. 6,975,021, the entirety of each one of which is hereby incorporated by reference herein.
- 1. Field of the Invention
- The present invention relates generally to the handling of semiconductor chips and, specifically, to a carrier adapted for supporting a substrate film during the assembly and bonding process.
- 2. Description of the Related Art
- In today's integrated circuit (IC) technology, semiconductor chips or dies are typically batch fabricated on a silicon wafer. The wafer may contain hundreds of dies arranged in a matrix. The dies are separated and each die is typically mounted on an appropriate substrate, contacted, and packaged.
- The substrate is typically a thin flexible tape or film reel which permits automated transport and handling of the dies. Many dies may be attached adjacently to a single tape using, for example, a suitable adhesive material. Bond pads on the dies and the substrate film allow the dies to be wire bonded or connected, using suitable leads, to the substrate. The die-substrate assemblies may then be cut into individual units. Each unit is packaged in a suitable medium with output leads, for example, ball grid arrays (BGA), pin grid arrays (PGA), dual in-line packages (DIP), and the like. The outputs of these packages allow interconnections to a similarly patterned arrangement of connections on a printed circuit board (PCB).
- The thinness of the substrate film or tape is advantageous in that it does not significantly add to the weight and size of the end product. But this thinness can also cause the substrate film reel to be fragile and flimsy. As a result, during the assembly process, the film is prone to undesirable and/or unwanted bending and movement. This cannot only cause damage to the die, the substrate and the die-substrate interface, but can also complicate the handling and assembly of the die and substrate. For example, undesirable bending of the film substrate can result in breakage of one or more of the leads connecting the dies to the substrate.
- The invention relates to a carrier for supporting a substrate film during the chip-substrate assembly and bonding process. The carrier provides enhanced rigidity to the substrate film. The degree of rigidity and/or flexibility provided can be controlled by selection of the carrier dimensions, configuration and material choice. Advantages of embodiments of the carrier include easier handling, reduced probability of defective end products, and increased control in choosing the thinness of the substrate film. For example, the substrate film carrier can be used for lead-over-chip (LOC) assemblies and lead-under-chip (LUC) assemblies to create ball grid arrays (BGA), pin grid arrays (PGA), dual in-line packages (DIP), and the like.
- In one embodiment, a carrier for supporting a substrate film comprises side bars and cross bars. The side bars and cross bars are in mechanical communication with the substrate film and provide rigidity during the manufacturing process. In another embodiment, an assembly comprises a substrate film and a carrier. The carrier comprises side bars which are in mechanical communication with the substrate film.
- In another embodiment, an assembly comprises a film and a carrier. The film includes a plurality of substrate units. The plurality of substrate units is adapted to electrically interface with a plurality of dies. The carrier is in mechanical communication with the film. The carrier provides enhanced rigidity to the film by being sized and configured to add material at selected regions of the film.
- In another embodiment, an assembly for attachment of integrated circuits comprises a film, a plurality of dies and a carrier. The film includes a plurality of substrate units. The plurality of dies are in electrical contact with the plurality of substrate units. The carrier is in mechanical communication with the film for providing enhanced rigidity to the film.
- One embodiment of the invention relates to method for supporting a substrate film. The method comprises connecting side bars to a substrate film and connecting cross bars to the substrate film, whereby the side bars and the cross bars provide rigidity during the manufacturing process.
- Another embodiment relates to a method of manufacturing an assembly. The method comprises connecting side bars to a substrate film and transporting the side bars and the substrate film through a manufacturing process. The method further comprises removing the side bars after at least a portion of the manufacturing process.
- An additional embodiment relates to a method of processing semiconductor dies. The method comprises forming a plurality of substrate units within a film and interfacing the substrate units with a plurality of dies. The method further comprises adding support material at selected regions of the film so as to provide enhanced rigidity to the substrate units. The method also comprises removing the support material at the completion of at least a portion of a manufacturing process.
- One embodiment relates to a method of manufacturing integrated circuits. The method comprises forming a plurality of substrate units within a substrate film and interfacing a plurality of dies to the plurality of substrate units. The method further comprises connecting a carrier to the film to enhance the rigidity of the film.
- For purposes of summarizing the invention, certain aspects, advantages and novel features of the invention have been described herein above. Of course, it is to be understood that not necessarily all such advantages may be achieved in accordance with any particular embodiment of the invention. Thus, the invention may be embodied or carried out in a manner that achieves or optimizes one advantage or group of advantages as taught herein without necessarily achieving other advantages as may be taught or suggested herein.
- All of these embodiments are intended to be within the scope of the invention herein disclosed. These and other embodiments of the present invention will become readily apparent to those skilled in the art from the following detailed description of the preferred embodiments having reference to the attached figures, the invention not being limited to any particular preferred embodiment(s) disclosed.
-
FIG. 1 is a schematic exploded perspective view of one embodiment of a ball grid array (BGA) chip package and a printed circuit board (PCB); -
FIG. 2 is a partially exploded perspective view of a substrate film, carrier and lead-over-chip (LOC) die assembly in accordance with one embodiment of the present invention; -
FIG. 3 is a top plan view of the substrate film ofFIG. 2 ; -
FIG. 4 is a top plan view of the substrate film and carrier ofFIG. 2 ; -
FIG. 5 is a schematic cross-sectional view along line 5-5 ofFIG. 4 in accordance with one embodiment of the present invention; -
FIG. 6 is a schematic cross-sectional view along line 5-5 ofFIG. 4 in accordance with another embodiment of the present invention; and -
FIG. 7 is a schematic cross-sectional view along line 5-5 ofFIG. 4 in accordance with another embodiment of the present invention. -
FIG. 1 schematically illustrates a ball grid array (BGA) chip package 10 and a printed circuit board (PCB) 12. The BGA package 10 serves as an encapsulating device for a die or chip and permits electrical access to the die via solder or electrode bumps 14. ThePCB 12 includes a pattern ofpads 16 which are arranged in alignment with the BGA solder bumps 14. This allows the BGA chip package 10 to be connected to thePCB 12. Of course, other chip packaging types may also be used, for example, pin grid arrays (PGA), dual in-line packages (DIP), and the like. These packaging types can be connected to compatible connectors on a PCB or other external circuitry. - In accordance with one embodiment,
FIG. 2 is a representation of a lead-over-chip (LOC)assembly 17 and generally shows asubstrate film 18, a film carrier orstructure 20 and a semiconductor die orchip 22. Thesubstrate film 18 includes a plurality ofsubstrate units 24, as discussed in greater detail below, with eachunit 24 being interfaceable with anindividual die 22. Thedie 22 includes a plurality ofbonding pads 28 which are in electrical contact with the integrated circuits formed on thedie 22. During assembly, thedie 22 is adhered to thesubstrate unit 24 and thebonding pads 28 are electrically contacted totraces 26 formed on or in thesubstrate unit 24 through die lead wires (not shown). In turn, the LOC die-substrate assembly 17 is separated from thesubstrate film 18 and packaged, for example, in the BGA chip package 10 (FIG. 1 ) with the substrateelectrical traces 26 in electrical contact with the solder bumps 14 (FIG. 1 ). This permits the die 22 to be electrically interfaced with external circuitry, for example, the PCB 12 (FIG. 1 ). The LOC die-substrate assembly 17 can also be packaged in other forms, for example and as indicated above, using pin grid arrays (PGA), dual in-line packages (DIP), and the like. - In general, the substrate film carrier 20 (
FIG. 2 ) may be used in connection with various types of die-substrate assemblies to provide rigidity to the substrate film 18 (FIG. 2 ) during handling. In one embodiment, thesubstrate film carrier 20 is used in conjunction with a lead-under-chip (LUC). The structure of such LUC assemblies is well known in the art, and hence will not be discussed in detail herein. - The die attach materials and equipment are commercially available from suppliers such as Dow Corning, Hitachi and ShinEtsu, among others. The lead bond tools and equipment are commercially available from suppliers such as Gaiser, Hitachi, Shinkawa and others. The encapsulation materials and equipment are commercially available from suppliers such as Ablestick, Asymtek, Dow Corning, Hitachi, 3M, ShinEtsu and others.
-
FIG. 3 shows a substrate film ortape 18 in accordance with one embodiment. Thesubstrate film 18 generally includes a plurality of substrate units orelements 24, andside rails end rails substrate film 18, for example, during automated assembling. In one embodiment, as shown inFIG. 3 , the side rails 30, 32 also include projectingportions 33 which define two of the edges of thesubstrate units 24. - In one embodiment, the substrate film 18 (
FIG. 3 ) includes eighteensubstrate units 24 grouped in substrate sets 42 with each substrate set 42 including threesubstrate units 24. The cross rails 38 serve to space adjacent substrate sets 42. Those skilled in the art will readily recognize that the number ofsubstrate units 24 in thesubstrate film 18 and the number ofsubstrate units 24 forming each substrate set 42 can be increased or decreased with efficacy, as required or desired. - Referring to
FIG. 3 , eachsubstrate unit 24 is flanked by a pair of spacing and/or separatingslots 44. Thesubstrate unit 24 includes a plurality ofelectrical traces 26 withbond pads 50 formed thereon, and a generallycentral cavity 46 adjacent to a pair ofadhesive tabs 48 formed on the under-surface of thesubstrate film 18. - As indicated above, and with reference to
FIGS. 2 and 3 , theadhesive tabs 48 permit a plurality of dies, for example, thedie 22, to be adhered torespective substrate units 24. Thesubstrate unit cavity 46 is configured so that when thedie 22 is in attachment with thesubstrate unit 24 thedie bonding pads 28 are exposed. This allows die lead wires (not shown) to pass through thecavity 46 and be wire bonded to the diebonding pads 28 and correspondingsubstrate bond pads 50. In turn,other bond pads 50 in electrical contact with theelectrical traces 26 permit thesubstrate unit 24, and hence thedie 22, to be externally interfaced, for example, via the solder or electrode bumps 14 (FIG. 1 ). - The substrate bond pads 50 (
FIGS. 2 and 3 ) can be connected to the solder bumps 14 (FIG. 1 ) in a number of ways as is known in the art, for example, by utilizing an interposer element within the chip packaging. In one embodiment, eachsubstrate unit 24 also includes alignment holes 52 which facilitate alignment of the die-substrate assembly, for example, theLOC assembly 17 during encapsulation. - In one embodiment, the substrate film 18 (
FIG. 3 ) is fabricated from polyimide.Such substrate films 18 are commercially available from a wide variety of sources, for example, 3M, Casio, Shinko, Rite Flex and others. Typically, the fabrication of the film ortape 18 begins with providing a polyimide tape which is sandwiched on either side by a layer of copper and an outer layer of solder resist/mask. The desired electrical “artwork” is then etched on the polyimide tape. The skilled artisan will understand, however, that a variety of other non-conductive materials and processes can be used to create thesubstrate film 18. - Referring to
FIGS. 2 and 3 , the wire bonding of the die lead wires (not shown) to the diebonding pads 28 andsubstrate bond pads 50 can utilize one of several methods known in the art. For example, thermal compression bonding, ultrasonic bonding, and pulse bonding may be used. The die lead wires are typically made out of either gold or aluminum, but other materials may be used, as required or desired, giving due consideration to the goal of providing reliable electrical contacts. Thesubstrate bond pads 50 are fabricated from gold plated copper, though a variety of other materials can be used, as required or desired, giving due consideration to the goal of providing reliable electrical contacts. - Referring to
FIG. 3 , in one embodiment, thesubstrate film 18 has a thickness in the range from about 0.125 mm to 0.120 mm, a length in the range from about 182.03 mm to 182.93 mm and a width in the range from about 27.13 mm to 27.23 mm. However, in other embodiments, the skilled artisan will recognize that thesubstrate film 18 may be adapted to have a wide variety of other thicknesses, lengths and widths. - The side rails 30, 32 have a thickness in the range from about 0.125 mm to 0.120 mm, a length in the range from about 182.03 mm to 182.93 mm, and a width in the range from 27.13 mm to 27.23 mm. The side
rail projecting portions 33 extend inwards about 4.32 mm and are about 6.63 wide. However, in other embodiments, the skilled artisan will recognize that the side rails 30, 32 may be adapted to have a wide variety of other dimensions. - The end rails 34, 36 have a thickness in the range from about 0.125 mm to 0.120 mm, a length in the range from about 27.13 mm to 27.23 mm, and a width in the range from about 1.03 mm to 1.11 mm. However, in other embodiments, the skilled artisan will recognize that the end rails 34, 36 may be adapted to have a wide variety of other dimensions.
- The cross rails 38 have a thickness in the range from about 0.125 mm to 0.120 mm, a length in the range from about 27.13 mm to 27.23 mm, and a width in the range from about 2.11 mm to 2.21 mm. In one embodiment, the spacing between neighboring cross rails 38 is in the range from about 5.03 mm to 5.11 mm. However, in other embodiments, the skilled artisan will recognize that the cross rails 38 may be adapted to have a wide variety of other dimensions and spacings. In one embodiment, the
substrate film 18 includes five cross rails 38. However, in other embodiments, thesubstrate film 18 may include fewer or more cross rails 38. - The
slots 44 have a length in the range from about 18.49 mm to 18.59 mm and a width in the range from about 2.11 mm to 2.21 mm. In one embodiment, the spacing between neighboringslots 44 is in the range from about 5.03 mm to 5.11 mm. However, in other embodiments, the skilled artisan will recognize that theslots 44 may be adapted to have a wide variety of other dimensions and spacings. In one embodiment, thesubstrate film 18 includes seventeenslots 44. However, in other embodiments, thesubstrate film 18 may include fewer ormore slots 44. - The
cavities 46 have a length in the range from about 15.95 mm to 16.05 mm and a width in the range from about 7.95 mm to 8.05 mm. In one embodiment, the spacing between neighboringcavities 46 is in the range from about 10.11 mm to 10.21 mm. However, in other embodiments, the skilled artisan will recognize that thecavities 46 may be adapted to have a wide variety of other dimensions and spacings. In one embodiment, thesubstrate film 18 includes eighteencavities 46. However, in other embodiments, thesubstrate film 18 may include fewer ormore cavities 46. - The
substrate units 24 have a thickness in the range from about 0.125 mm to 0.120 mm, a length in the range from about 182.03 mm to 182.93 mm, and a width in the range from about 27.13 mm to 27.23 mm. However, in other embodiments, the skilled artisan will recognize that thesubstrate units 24 may be adapted to have a wide variety of other dimensions. In one embodiment, thesubstrate film 18 includes eighteensubstrate units 24. However, in other embodiments, thesubstrate film 18 may include fewer ormore substrate units 24. - In one embodiment, the
substrate film 18 includes six substrate sets 42. Each of the substrate sets 42 includes threesubstrate units 24. However, in other embodiments, the skilled artisan will realize that thesubstrate film 18 may include fewer or more substrate sets 42 and each substrate set 42 may include fewer ormore substrate units 24. - The indexing holes 40 have a diameter in the range from about 1.574 mm to 1.499 mm. However, in other embodiments, the skilled artisan will recognize that the indexing holes 40 may be adapted to have a wide variety of other diameters. In one embodiment, each
substrate unit 24 is associated with three indexing holes 40. However, in other embodiments, eachsubstrate unit 24 may be associated with fewer or more indexing holes 40. -
FIG. 4 shows thesubstrate film 18 supported by a carrier orstructure 20 in accordance with one embodiment to form a carrier-film assembly 21. Thesubstrate film carrier 20 provides increased rigidity for thesubstrate film 18 which facilitates handling and assembling processes. Thecarrier 20 generally includes side bars 60 and 62 which are interconnected byend bars FIG. 3 ) and includeteeth 63 to formnotches 65. - The
teeth 63 are substantially aligned with the siderail projecting portions 33 and thenotches 65 are substantially aligned with the ends of thefilm slots 44. The carrier side bars 60, 62 also include indexing holes 70 which are substantially aligned with the film indexing holes 40. Similarly, the carrier end bars 64, 66 are substantially aligned with the film end rails 34, 36 and the carrier cross bars 68 are substantially aligned with the film cross rails 38. - Referring to
FIGS. 3 and 4 , thesubstrate film carrier 20 provides enhanced rigidity to thesubstrate film 18 by adding extra material on the film side rails 30, 32, film end rails 34, 36, and film cross rails 38. In one embodiment, this is achieved by providing a balance between flexibility and rigidity. The carrier-film assembly 21 is flexible enough so that it is easily handled by the processing machines but it is also rigid enough to provide sufficient support for thesubstrate film 18 during handling. - In one embodiment, and referring to
FIG. 4 , the carrier side bars 60, 62, carrier end bars 64, 66, and carrier cross bars 68 are dimensioned to have substantially the same thickness. In other embodiments, the carrier side bars 60, 62, carrier end bars 64, 66, and carrier cross bars 68 can have different thicknesses. - In one embodiment, the
substrate film carrier 20 comprises only the side bars 60, 62. In another embodiment, thesubstrate film carrier 20 comprises only the cross bars 68. In yet another embodiment, thesubstrate film carrier 20 comprises the side bars 60, 62, and the cross bars 68. In a further embodiment, thesubstrate film carrier 20 comprises the side bars 60, 62, and the end bars 64, 66. In yet another further embodiment, thesubstrate film carrier 20 comprises the end bars 64, 66, and the cross bars 68. - Those skilled in the art will realize that the
substrate film carrier 20 can be configured in many other ways, for example, and referring toFIG. 4 , theteeth 63 ornotches 65 shown on the carrier side bars 60, 62 can be removed. Also, thesubstrate film carrier 20 can be provided on theadhesive tab 48 side of thefilm 18 or on both sides of thefilm 18, giving due consideration to the goal of providing enhanced rigidity. Thesubstrate film carrier 20 may also extend beyond the periphery and/or any edges of thefilm 18, as required or desired. Moreover, the film carrier can be constructed to adapt to the particular shapes and/or sizes of a wide range of substrate films, giving due consideration to the goals of providing length-wise and/or cross-wise support. - In one embodiment, as shown in
FIG. 5 , thesubstrate film carrier 20 comprises a frame that is adhered to thesubstrate film 18 to form the carrier-film assembly 21. The carrier/frame 20 may be attached to thefilm 18 utilizing a wide variety of commercially available adhesive materials. In one embodiment the adhesive material is selected such that it can withstand a temperature of at least about 150 □C, for example, KAPTON, manufactured by 3M. - In one embodiment, the
frame 20 is fabricated from BT resin. The skilled artisan will understand, however, that a variety of materials can be used for the substrate film carrier/frame 20 with efficacy, giving due consideration to the goal of providing enhanced rigidity for the substrate film 18 (FIG. 3 ). The frame 20 (FIG. 5 ), in one embodiment, can be manufactured by stamping a sheet of material in the desired shape and then punching the indexing holes 70 in suitable positions. However, theframe 20 may also be fabricated by other known manufacturing techniques. - In one embodiment, and referring to
FIGS. 3, 4 and 5, the process of providing a packaged die, for example the BGA die package 10 (FIG. 1 ), generally begins with the fabrication of thesubstrate film 18. Side rails 30, 32, end rails 34, 36, cross rails 38, indexing holes 40,slots 44,cavities 46 and alignment holes 52 are created. The electrical “artwork” (electrical traces 26, bond pads 50) is formed on thefilm 18, in one embodiment, by an etching process.Adhesive tabs 48 are added to thefilm 18. - In one embodiment, and referring to
FIGS. 4 and 5 , a substrate film carrier/frame 20 is then formed. In one embodiment, the substrate film carrier/frame 20 is manufactured by stamping a sheet of material to provideside bars carrier 20. The carrier/frame 20 is adhered to thefilm 18 and adds thickness to thefilm 18 at selected locations. - In one embodiment, and referring to
FIGS. 4 and 5 , dies 22 (FIG. 2 ) are adhered torespective substrate units 24 utilizing theadhesive tabs 48. The dies 22 are wire bonded to theelectrical traces 26 onrespective substrate units 24 to form a plurality of die-substrate assemblies, for example, the LOC assemblies 17 (FIG. 2 ). The die-substrate assemblies 17 are removed from thesubstrate film 18, for example, by cutting. The die-substrate assemblies 17 are then packaged and tested to provide, for example, the BGA die package 10 (FIG. 1 ). - In one embodiment, the
substrate film carrier 20 has a thickness in the range from about 0.295 mm to 0.305 mm, a length in the range from about 182.03 mm to 182.93 mm and a width in the range from about 27.13 mm to 27.23 mm. However, in other embodiments, the skilled artisan will recognize that thesubstrate film carrier 20 may be adapted to have a wide variety of other thicknesses, lengths and widths. - The side bars 60, 62 have a thickness in the range from about 0.295 mm to 0.305 mm, a length in the range from about 182.03 mm to 182.93 mm, and a width in the range from about 3.22 mm to 3.32 mm. The
side bar teeth 63 extend inwards about 1.07 mm and are about 7.95 mm wide. However, in other embodiments, the skilled artisan will recognize that the side bars 60, 62 may be adapted to have a wide variety of other dimensions. - The end bars 64, 66 have a thickness in the range from about 0.295 mm to 0.305 mm, a length in the range from about 27.13 mm to 27.23 mm, and a width in the range from about 1.03 mm to 1.11 mm. However, in other embodiments, the skilled artisan will recognize that the end bars 64, 66 may be adapted to have a wide variety of other dimensions.
- The cross bars 68 have a thickness in the range from about 0.295 mm to 0.305 mm, a length in the range from about 27.13 mm to 27.23 mm, and a width in the range from about 2.11 mm to 2.21 mm. In one embodiment, the spacing between neighboring cross bars 68 is in the range from about 5.03 mm to 5.11 mm. However, in other embodiments, the skilled artisan will recognize that the cross bars 68 may be adapted to have a wide variety of other dimensions and spacings. In one embodiment, the
substrate film carrier 20 includes five cross bars 68. However, in other embodiments, thesubstrate film carrier 20 may include fewer or more cross bars 68. - The carrier indexing holes 70 have a diameter in the range from about 1.574 mm to 1.499 mm. However, in other embodiments, the skilled artisan will recognize that the indexing holes 70 may be adapted to have a wide variety of other diameters. In one embodiment, the
carrier 20 includes fifty-four indexing holes 70. However, in other embodiments, thesubstrate film carrier 20 may include fewer or more indexing holes 70. - In another embodiment, as shown in
FIG. 6 , thesubstrate film carrier 20 is formed with thesubstrate film 18 to create the carrier-film assembly 21. In one embodiment, thecarrier 20 and thefilm 18 are fabricated from polyimide. The skilled artisan will understand, however, that a variety of materials can be used for thecarrier 20 and thefilm 18. Referring toFIG. 6 , thecarrier 20 and thefilm 18 may be manufactured by using known techniques, such as molding. - In one embodiment, and referring to
FIGS. 3, 4 and 6, the process of providing a packaged die, for example the BGA die package 10 (FIG. 1 ), generally begins with the fabrication of thesubstrate film 18 and thecarrier 20. Side rails 30, 32, end rails 34, 36, cross rails 38, indexing holes 40,slots 44,cavities 46 and alignment holes 52 are created. Side bars 60, 62, end bars 64, 66, cross bars 68, and indexing holes 70 are created. In one embodiment, a molding process is utilized to form thecarrier 20 with thefilm 18. Thecarrier 20 adds thickness to thefilm 18 at selected locations. - Referring to
FIGS. 3, 4 and 6, in one embodiment, the electrical “artwork” (electrical traces 26, bond pads 50) is formed on thefilm 18. In one embodiment this “artwork” is formed by an etching process.Adhesive tabs 48 are added to thefilm 18. - In one embodiment, and referring to
FIGS. 4 and 6 , dies 22 (FIG. 2 ) are adhered torespective substrate units 24 utilizing theadhesive tabs 48. The dies 22 are wire bonded to theelectrical traces 26 onrespective substrate units 24 to form a plurality of die-substrate assemblies, for example, theLOC assemblies 17. The die-substrate assemblies 17 are removed from thesubstrate film 18, for example, by cutting. The die-substrate assemblies 17 are then packaged and tested to provide, for example, the BGA die package 10 (FIG. 1 ). - In one embodiment, the
carrier 20 includes fifty-four indexing holes 70. However, in other embodiments, thesubstrate film carrier 20 may include fewer or more indexing holes 70. - In another embodiment, as shown in
FIG. 7 , thesubstrate film carrier 20 comprises a plurality oflayers 74 of material. In one embodiment, thelayers 74 are polyimide. In other embodiments, one or more of thelayers 74 are metallic, for example, copper, and/or solder mask. These latter embodiments may be desirable especially in the situation, as indicated above, in which fabrication of the electrical “artwork” on thesubstrate film 18 utilizes layers of copper and solder resist. - For example, one or
more layers 74 can be polyimide, one ormore layers 74 can be copper, and one ormore layers 74 can be solder mask. The thickness of eachlayer 74 can be controlled, as required or desired. Those skilled in the art will recognize that a number of materials may be used to fabricate thelayered carrier 20 shown inFIG. 7 . - For example, one or
more layers 74 of material is provided to form side bars 60, 62, end bars 64, 66, and cross bars 68. The indexing holes 70 are punched into thecarrier 20. As indicated above, thelayers 74 may also be formed during the fabrication of thefilm 18 and can comprise copper and/or solder resist. Thecarrier 20 adds thickness to thefilm 18 at selected locations. - The
substrate film carrier 20 has a thickness in the range from about 0.125 mm to 0.120 mm, a length in the range from about 182.03 mm to 182.93 mm and a width in the range from about 27.13 mm to 27.23 mm. However, in other embodiments, the skilled artisan will recognize that thesubstrate film carrier 20 may be adapted to have a wide variety of other thicknesses, lengths and widths. - The
layers 74 may have a thickness in the range from about 0.125 mm to 0.120 mm However, in other embodiments, the skilled artisan will recognize that thelayers 74 may be adapted to have a wide variety of other thicknesses. - The side bars 60, 62 have a thickness in the range from about 0.125 mm to 0.120 mm, a length in the range from about 182.03 mm to 182.93 mm, and a width in the range from about 27.13 mm to 27.23 mm. The
side bar teeth 63 extend inwards about 4.32 mm and are about 6.63 mm wide. However, in other embodiments, the skilled artisan will recognize that the side bars 60, 62 may be adapted to have a wide variety of other dimensions. - The end bars 64, 66 have a thickness in the range from about 0.125 mm to 0.120 mm, a length in the range from about 27.13 mm to 27.23 mm, and a width in the range from about 1.03 mm to 1.11 mm. However, in other embodiments, the skilled artisan will recognize that the end bars 64, 66 may be adapted to have a wide variety of other dimensions.
- The cross bars 68 have a thickness in the range from about 0.125 mm to 0.120 mm, a length in the range from about 27.13 mm to 27.23 mm, and a width in the range from about 2.11 mm to 2.21 mm. In one embodiment, the spacing between neighboring cross bars 68 is in the range from about 5.03 mm to 5.11 mm. However, in other embodiments, the skilled artisan will recognize that the cross bars 68 may be adapted to have a wide variety of other dimensions and spacings. In one embodiment, the
substrate film carrier 20 includes five cross bars 68. However, in other embodiments, thesubstrate film carrier 20 may include fewer or more cross bars 68. - The carrier indexing holes 70 have a diameter in the range from about 1.574 mm to 1.499 mm. However, in other embodiments, the skilled artisan will recognize that the indexing holes 70 may be adapted to have a wide variety of other diameters. In one embodiment, the
carrier 20 includes fifty-four indexing holes 70. However, in other embodiments, thesubstrate film carrier 20 may include fewer or more indexing holes 70. - Upon completion of at least a portion of the manufacturing process, one embodiment of the invention removes the
substrate film carrier 20 from thesubstrate film 18. Upon removal of thesubstrate film carrier 20, thesubstrate units 24 and the their corresponding dies 22 are separated from each other. Thus, thesubstrate file carrier 20 provides support during the manufacturing process. - The
substrate film carrier 20 demonstrates certain advantages over conventional handling ofthin substrate films 18. One advantage is that thesubstrate film carrier 20 provides enhanced rigidity to the substrate film during handling and die-substrate assembly. This reduces undesirable and/or unwanted bending and movement which can not only cause damage to the die, the substrate and the die-substrate interface, but can also complicate the handling and assembly of the die and substrate. For example, undesirable bending of the substrate film can result in breakage of one or more of the lead wires connecting the dies to the substrate film. The substrate film carrier 20 (FIG. 4 ) improves processability of the die-substrate assembly 17 (FIG. 2 ) by providing enhanced rigidity to the substrate film 18 (FIGS. 3 and 4 ), and hence helps in reducing the percentage of defective end products. - Another advantage of the substrate film carrier 20 (
FIG. 4 ) is that it can provide a better seal with a suction/vacuum tip, again largely due to the enhanced rigidity it provides. In some situations during handling of the substrate film 18 (FIGS. 3 and 4 ) and/or die-substrate assembly 17 (FIG. 2 ) it is desirable to use a suction tip for holding and/or transporting thesubstrate film 18 and/or the die-substrate assembly 17. The flimsiness of conventional thin substrate films makes it difficult to use a suction tip. The substrate film carrier 20 (FIG. 4 ) allows the use of suction tips to handle the substrate film 18 (FIGS. 3 and 4 ) by providing enhanced rigidity to thesubstrate film 18. This can improve the overall speed and efficiency of the assembly process. - Another advantage of the substrate film carrier 20 (
FIG. 4 ) is that it allows for more control in selecting the thinness of the substrate film 18 (FIGS. 3 and 4 ). In general, it is desirable to have a thin substrate film to reduce the weight and size of the end product. But, with some conventional substrate films the lower limit on the thickness can be dictated by the handling processability of the substrate film. This limitation on the thickness of the substrate film is reduced by the substrate film carrier 20 (FIG. 4 ) which provides enhanced rigidity to the substrate film 18 (FIGS. 3 and 4 ). Moreover, the degree of rigidity and/or flexibility provided can be controlled by selection of the carrier dimensions, configuration and material choice. - While the components and techniques of the invention have been described with a certain degree of particularity, it is manifest that many changes may be made in the specific designs, constructions and methodology hereinabove described without departing from the spirit and scope of this disclosure. It should be understood that the invention is not limited to the embodiments set forth herein for purposes of exemplification, but is to be defined only by a fair reading of the appended claims, including the full range of equivalency to which each element thereof is entitled.
Claims (20)
1. A method of processing semiconductor dies, comprising:
forming a plurality of substrate units within a film with each of said substrate units comprising a generally central cavity formed therethrough;
interfacing said substrate units with a respective one of a plurality of dies;
connecting leads from said dies to a corresponding one of said substrate units to electrically interface said dies and said substrate units such that said lead are connected over said dies to said substrate units;
adding support material at selected regions of said film so as to provide enhanced rigidity to said substrate units by connecting support edges to said film to thicken the edges of said film, wherein said adding support material further comprising connecting support cross bars to said film; and
removing at least a portion of said support material at the completion of at least a portion of a manufacturing process.
2. The method of claim 1 , wherein said method further comprises transporting said support material, said substrate film and said dies through said manufacturing process.
3. The method of claim 1 , wherein said method further comprises forming said support material with at least two discrete layers with each layer comprising a different material.
4. The method of claim 3 , wherein said method further comprises forming said carrier with at least one indexing hole that extends through said layers and said film.
5. The method of claim 1 , wherein said support material and said dies are connected to opposed surfaces of said film.
6. The method of claim 5 , wherein the surface on said film that said leads are connected to is the same surface to which said support material is connected to.
7. A method of processing semiconductor dies, comprising:
providing a substrate film comprising a plurality of substrate units with each one of said substrate units comprising a substantially central cavity;
connecting a carrier to a first surface of said substrate film, said carrier comprising a pair of side bars connected to a plurality of cross bars and a pair of end bars;
electrically interfacing a plurality of dies with a respective one of said substrate units by connecting wires therebetween which pass through a respective one of said central cavities, said dies being connected to a second surface of said film which is opposed to said first surface of said film;
transporting said carrier, said substrate film and said dies through a manufacturing process, said carrier providing enhanced rigidity to said substrate film by being sized and configured to add material at selected regions of said substrate film; and
removing at least a portion of said carrier from said substrate film after at least a portion of said manufacturing process.
8. The method of claim 7 , wherein electrically interfacing a plurality of dies with a respective one of said substrate units by connecting wires therebetween comprises connecting said wires to a plurality of bonding pads on said dies and said substrate units.
9. The method of claim 7 , wherein providing a substrate film comprises providing a substrate film with a plurality of substrate sets with each substrate set comprising a plurality of said substrate units.
10. The method of claim 9 , wherein said method further comprises positioning each of said cross bars near a substrate set.
11. The method of claim 7 , wherein said method further comprises forming said carrier such that it comprises a plurality of layers.
12. The method of claim 7 , wherein said manufacturing process comprises a process for manufacturing semiconductor packages.
13. A method of processing semiconductor dies, comprising:
constructing a generally flat flexible tape comprising a plurality of substrate units with each being flanked by a pair of slots to facilitate removal and each having a cavity therebetween through which lead wires pass, said tape having a surface to which said lead wires are attached;
connecting a temporary carrier to said surface of said flexible tape to form at least a portion of an assembly, said temporary carrier comprising a plurality of cross bars with adjacent cross bars having at least one of said substrate units positioned therebetween;
interfacing a plurality of semiconductor dies with said substrate units utilizing said lead wires;
transporting said carrier, said flexible tape and said semiconductor dies through a manufacturing process to form individual die packages; and
separating said cross bars from said assembly during manufacture of said individual die packages such that each of said individual die packages comprises at least a portion of a single one of said substrate units and one of said semiconductor dies.
14. The method of claim 13 , wherein constructing a generally flat flexible tape comprises providing cross rails to said flexible tape that are substantially aligned with said cross bars.
15. The method of claim 13 , wherein forming at least a portion of an assembly comprises forming said flexible tape and said carrier as an integral unit.
16. The method of claim 15 , wherein forming at least a portion of an assembly comprises molding said flexible tape and said carrier to form said integral unit.
17. The method of claim 13 , wherein said method further comprises forming said carrier with a plurality of pairs of spaced teeth between adjacent slots such that each of said substrate units is generally circumscribed by a respective pair of said teeth and a respective pair of said slots.
18. The method of claim 13 , wherein constructing a generally flat flexible tape further comprises forming said flexible tape with first and second side rails, said first side rail including a plurality of spaced first projecting portions and said second side rail including a plurality of spaced second projecting portions, a respective one of said first projecting portions and a respective one of a said second projecting portions generally defining two edges of a respective one of said substrate units
19. The method of claim 18 , wherein said method further comprises forming said carrier with first and second side bars which are substantially aligned with respective first and second side rails of said flexible tape, said first side bar including a plurality of spaced first teeth substantially aligned with said first projecting portions and said second side bar including a plurality of second teeth substantially aligned with said second projecting portions.
20. The method of claim 13 , wherein said method further comprises connecting said dies to a second surface of said flexible film that is opposed to said surface of said flexible film to which said lead wires and said carrier are connected.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/415,766 US20060199303A1 (en) | 1999-09-03 | 2006-05-02 | Carrier for substrate film |
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/389,720 US6975021B1 (en) | 1999-09-03 | 1999-09-03 | Carrier for substrate film |
US11/218,137 US20050287704A1 (en) | 1999-09-03 | 2005-09-01 | Carrier for substrate film |
US11/415,766 US20060199303A1 (en) | 1999-09-03 | 2006-05-02 | Carrier for substrate film |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US11/218,137 Continuation US20050287704A1 (en) | 1999-09-03 | 2005-09-01 | Carrier for substrate film |
Publications (1)
Publication Number | Publication Date |
---|---|
US20060199303A1 true US20060199303A1 (en) | 2006-09-07 |
Family
ID=23539448
Family Applications (7)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US09/389,720 Expired - Fee Related US6975021B1 (en) | 1999-09-03 | 1999-09-03 | Carrier for substrate film |
US09/858,118 Abandoned US20020008307A1 (en) | 1999-09-03 | 2001-05-15 | Substrate film structure |
US10/461,548 Expired - Fee Related US6897092B2 (en) | 1999-09-03 | 2003-06-12 | Method of supporting a substrate film |
US11/218,137 Abandoned US20050287704A1 (en) | 1999-09-03 | 2005-09-01 | Carrier for substrate film |
US11/220,191 Abandoned US20060102990A1 (en) | 1999-09-03 | 2005-09-01 | Carrier for substrate film |
US11/415,766 Abandoned US20060199303A1 (en) | 1999-09-03 | 2006-05-02 | Carrier for substrate film |
US11/415,550 Abandoned US20060194369A1 (en) | 1999-09-03 | 2006-05-02 | Carrier for substrate film |
Family Applications Before (5)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US09/389,720 Expired - Fee Related US6975021B1 (en) | 1999-09-03 | 1999-09-03 | Carrier for substrate film |
US09/858,118 Abandoned US20020008307A1 (en) | 1999-09-03 | 2001-05-15 | Substrate film structure |
US10/461,548 Expired - Fee Related US6897092B2 (en) | 1999-09-03 | 2003-06-12 | Method of supporting a substrate film |
US11/218,137 Abandoned US20050287704A1 (en) | 1999-09-03 | 2005-09-01 | Carrier for substrate film |
US11/220,191 Abandoned US20060102990A1 (en) | 1999-09-03 | 2005-09-01 | Carrier for substrate film |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US11/415,550 Abandoned US20060194369A1 (en) | 1999-09-03 | 2006-05-02 | Carrier for substrate film |
Country Status (1)
Country | Link |
---|---|
US (7) | US6975021B1 (en) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6975021B1 (en) * | 1999-09-03 | 2005-12-13 | Micron Technology, Inc. | Carrier for substrate film |
US7557353B2 (en) * | 2001-11-30 | 2009-07-07 | Sicel Technologies, Inc. | Single-use external dosimeters for use in radiation therapies |
US7102217B2 (en) * | 2003-04-09 | 2006-09-05 | Micron Technology, Inc. | Interposer substrates with reinforced interconnect slots, and semiconductor die packages including same |
US7233064B2 (en) * | 2004-03-10 | 2007-06-19 | Micron Technology, Inc. | Semiconductor BGA package having a segmented voltage plane and method of making |
US20080085572A1 (en) * | 2006-10-05 | 2008-04-10 | Advanced Chip Engineering Technology Inc. | Semiconductor packaging method by using large panel size |
JP5299378B2 (en) * | 2010-08-11 | 2013-09-25 | 株式会社村田製作所 | Carrier tape, carrier tape manufacturing apparatus, and carrier tape manufacturing method |
CN102795594A (en) * | 2012-09-11 | 2012-11-28 | 杭州士兰集成电路有限公司 | MEMS (micro electro mechanical systems) package structure and package method |
US10453561B2 (en) * | 2012-12-28 | 2019-10-22 | Volcano Corporation | Multi-modality case explorer system and method |
Citations (67)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US511935A (en) * | 1894-01-02 | Mitering-machine | ||
US3774232A (en) * | 1971-11-11 | 1973-11-20 | Circuit Stik Inc | Package for integrated circuit chip |
US3942245A (en) * | 1971-11-20 | 1976-03-09 | Ferranti Limited | Related to the manufacture of lead frames and the mounting of semiconductor devices thereon |
US4878991A (en) * | 1988-12-12 | 1989-11-07 | General Electric Company | Simplified method for repair of high density interconnect circuits |
US4948645A (en) * | 1989-08-01 | 1990-08-14 | Rogers Corporation | Tape automated bonding and method of making the same |
US5023202A (en) * | 1989-07-14 | 1991-06-11 | Lsi Logic Corporation | Rigid strip carrier for integrated circuits |
US5075760A (en) * | 1988-01-18 | 1991-12-24 | Texas Instruments Incorporated | Semiconductor device package assembly employing flexible tape |
US5111935A (en) * | 1986-12-03 | 1992-05-12 | Sgs-Thomson Microelectronics, Inc. | Universal leadframe carrier |
US5170328A (en) * | 1990-04-24 | 1992-12-08 | Delco Electronics Corporation | Packaging for molded carriers of integrated circuits |
US5173766A (en) * | 1990-06-25 | 1992-12-22 | Lsi Logic Corporation | Semiconductor device package and method of making such a package |
US5196725A (en) * | 1990-06-11 | 1993-03-23 | Hitachi Cable Limited | High pin count and multi-layer wiring lead frame |
US5216278A (en) * | 1990-12-04 | 1993-06-01 | Motorola, Inc. | Semiconductor device having a pad array carrier package |
US5286679A (en) * | 1993-03-18 | 1994-02-15 | Micron Technology, Inc. | Method for attaching a semiconductor die to a leadframe using a patterned adhesive layer |
US5304842A (en) * | 1990-10-24 | 1994-04-19 | Micron Technology, Inc. | Dissimilar adhesive die attach for semiconductor devices |
US5343363A (en) * | 1992-12-21 | 1994-08-30 | Delco Electronics Corporation | Split backed pressure sensitive die carrier tape |
US5359222A (en) * | 1992-01-31 | 1994-10-25 | Kabushiki Kaisha Toshiba | TCP type semiconductor device capable of preventing crosstalk |
US5452182A (en) * | 1990-04-05 | 1995-09-19 | Martin Marietta Corporation | Flexible high density interconnect structure and flexibly interconnected system |
US5472085A (en) * | 1994-05-16 | 1995-12-05 | Gpax International, Inc. | Gated-pocket tape-form packaging system |
US5474957A (en) * | 1994-05-09 | 1995-12-12 | Nec Corporation | Process of mounting tape automated bonded semiconductor chip on printed circuit board through bumps |
US5545922A (en) * | 1994-06-28 | 1996-08-13 | Intel Corporation | Dual sided integrated circuit chip package with offset wire bonds and support block cavities |
US5585600A (en) * | 1993-09-02 | 1996-12-17 | International Business Machines Corporation | Encapsulated semiconductor chip module and method of forming the same |
US5661086A (en) * | 1995-03-28 | 1997-08-26 | Mitsui High-Tec, Inc. | Process for manufacturing a plurality of strip lead frame semiconductor devices |
US5677566A (en) * | 1995-05-08 | 1997-10-14 | Micron Technology, Inc. | Semiconductor chip package |
US5715143A (en) * | 1996-07-22 | 1998-02-03 | Delco Electronics Corporation | Carrier system for integrated circuit carrier assemblies |
US5726491A (en) * | 1995-06-29 | 1998-03-10 | Sharp Kabushiki Kaisha | Tape carrier package |
US5756377A (en) * | 1994-11-22 | 1998-05-26 | Sony Corporation | Lead frame and manufacturing method thereof |
US5789820A (en) * | 1996-02-28 | 1998-08-04 | Nec Corporation | Method for manufacturing heat radiating resin-molded semiconductor device |
US5796586A (en) * | 1996-08-26 | 1998-08-18 | National Semiconductor, Inc. | Substrate board having an anti-adhesive solder mask |
US5841194A (en) * | 1996-03-19 | 1998-11-24 | Matsushita Electric Industrial Co., Ltd. | Chip carrier with peripheral stiffener and semiconductor device using the same |
US5844168A (en) * | 1995-08-01 | 1998-12-01 | Minnesota Mining And Manufacturing Company | Multi-layer interconnect sutructure for ball grid arrays |
US5847445A (en) * | 1996-11-04 | 1998-12-08 | Micron Technology, Inc. | Die assemblies using suspended bond wires, carrier substrates and dice having wire suspension structures, and methods of fabricating same |
US5898214A (en) * | 1997-06-20 | 1999-04-27 | Nec Corporation | Wire bonding device |
US5925926A (en) * | 1997-03-19 | 1999-07-20 | Nec Corporation | Semiconductor device including an inner lead reinforcing pattern |
US5945834A (en) * | 1993-12-16 | 1999-08-31 | Matsushita Electric Industrial Co., Ltd. | Semiconductor wafer package, method and apparatus for connecting testing IC terminals of semiconductor wafer and probe terminals, testing method of a semiconductor integrated circuit, probe card and its manufacturing method |
US5951804A (en) * | 1996-07-15 | 1999-09-14 | Samsung Electronics Co., Ltd. | Method for simultaneously manufacturing chip-scale package using lead frame strip with a plurality of lead frames |
US5952711A (en) * | 1996-09-12 | 1999-09-14 | Wohlin; Leslie Theodore | Lead finger immobilization apparatus |
US5977617A (en) * | 1996-05-10 | 1999-11-02 | Nec Corporation | Semiconductor device having multilayer film carrier |
US5980683A (en) * | 1994-08-02 | 1999-11-09 | International Business Machines Corporation | Production of a support element module for embedding into smart cards or other data carrier cards |
US6013946A (en) * | 1996-09-11 | 2000-01-11 | Samsung Electronics Co., Ltd. | Wire bond packages for semiconductor chips and related methods and assemblies |
US6036173A (en) * | 1997-11-25 | 2000-03-14 | Siemens Aktiengesellschaft | Semiconductor element having a carrying device and a lead frame and a semiconductor chip connected thereto |
US6057174A (en) * | 1998-01-07 | 2000-05-02 | Seiko Epson Corporation | Semiconductor device, method of fabricating the same, and electronic apparatus |
US6087202A (en) * | 1997-06-03 | 2000-07-11 | Stmicroelectronics S.A. | Process for manufacturing semiconductor packages comprising an integrated circuit |
US6091140A (en) * | 1998-10-23 | 2000-07-18 | Texas Instruments Incorporated | Thin chip-size integrated circuit package |
US6097098A (en) * | 1997-02-14 | 2000-08-01 | Micron Technology, Inc. | Die interconnections using intermediate connection elements secured to the die face |
US6111324A (en) * | 1998-02-05 | 2000-08-29 | Asat, Limited | Integrated carrier ring/stiffener and method for manufacturing a flexible integrated circuit package |
US6118183A (en) * | 1996-12-19 | 2000-09-12 | Texas Instruments Incorporated | Semiconductor device, manufacturing method thereof, and insulating substrate for same |
US6144102A (en) * | 1997-05-16 | 2000-11-07 | Texas Instruments Incorporated | Semiconductor device package |
US6179127B1 (en) * | 1996-10-18 | 2001-01-30 | Shin-Etsu Polymer Co., Ltd. | Carrier tape and die apparatus for forming same |
US6199743B1 (en) * | 1999-08-19 | 2001-03-13 | Micron Technology, Inc. | Apparatuses for forming wire bonds from circuitry on a substrate to a semiconductor chip, and methods of forming semiconductor chip assemblies |
US6240632B1 (en) * | 1995-09-22 | 2001-06-05 | Sony Corporation | Method of manufacturing lead frame and integrated circuit package |
US6249046B1 (en) * | 1997-02-13 | 2001-06-19 | Seiko Epson Corporation | Semiconductor device and method for manufacturing and mounting thereof, and circuit board mounted with the semiconductor device |
US6258621B1 (en) * | 1996-05-09 | 2001-07-10 | Oki Electric Industry Co., Ltd. | Method of fabricating a semiconductor device having insulating tape interposed between chip and chip support |
US6265762B1 (en) * | 1996-03-18 | 2001-07-24 | Hitachi, Ltd | Lead frame and semiconductor device using the lead frame and method of manufacturing the same |
US6268646B1 (en) * | 1996-08-27 | 2001-07-31 | Hitachi Cable, Ltd. | Lead frame for lead on chip |
US6303219B1 (en) * | 1996-02-19 | 2001-10-16 | Toray Industries, Inc. | Adhesive sheet for semiconductor connecting substrate, adhesive-backed tape for tab, adhesive-backed tape for wire-bonding connection, semiconductor connecting substrate, and semiconductor device |
US6306687B1 (en) * | 1996-03-19 | 2001-10-23 | David J. Corisis | Tape under frame for conventional-type IC package assembly |
US6319354B1 (en) * | 1998-07-06 | 2001-11-20 | Micron Technology, Inc. | System and method for dicing semiconductor components |
US6323541B1 (en) * | 1998-07-07 | 2001-11-27 | Vanguard International Semiconductor Corp. | Structure for manufacturing a semiconductor die with copper plated tapes |
US6353268B1 (en) * | 1997-08-22 | 2002-03-05 | Micron Technology, Inc. | Semiconductor die attachment method and apparatus |
US6357594B1 (en) * | 1998-06-30 | 2002-03-19 | Tempo G | Means to assure ready release of singulated wafer die or integrated circuit chips packed in adhesive backed carrier tapes |
US20020033524A1 (en) * | 1997-10-15 | 2002-03-21 | Kenji Toyosawa | Tape-carrier-package semiconductor device and a liquid crystal panel display using such a device as well as a method for testing the disconnection thereof |
US6362637B2 (en) * | 1996-12-31 | 2002-03-26 | Micron Technology, Inc. | Apparatus for testing semiconductor wafers including base with contact members and terminal contacts |
US6379745B1 (en) * | 1997-02-20 | 2002-04-30 | Parelec, Inc. | Low temperature method and compositions for producing electrical conductors |
US6426548B1 (en) * | 1998-03-18 | 2002-07-30 | Hitachi Cable Ltd. | Semiconductor device, lead-patterning substrate, and electronics device, and method for fabricating same |
US6455354B1 (en) * | 1998-12-30 | 2002-09-24 | Micron Technology, Inc. | Method of fabricating tape attachment chip-on-board assemblies |
US6465876B1 (en) * | 1996-11-20 | 2002-10-15 | Hitachi, Ltd. | Semiconductor device and lead frame therefor |
US6476886B2 (en) * | 1999-02-15 | 2002-11-05 | Rainbow Displays, Inc. | Method for assembling a tiled, flat-panel microdisplay array |
Family Cites Families (20)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5874064A (en) | 1981-10-29 | 1983-05-04 | Nec Corp | Lead frame |
JPS58178544A (en) * | 1982-04-12 | 1983-10-19 | Matsushita Electronics Corp | Lead frame |
JPS6046059A (en) | 1983-08-24 | 1985-03-12 | Nec Corp | Lead frame |
KR940005608B1 (en) * | 1991-05-13 | 1994-06-21 | 금성일렉트론 주식회사 | Method of making mask of phase shift |
FI94152C (en) * | 1992-06-01 | 1995-07-25 | Outokumpu Eng Contract | Methods and apparatus for the oxidation of fuel in powder form with two gases with different oxygen levels |
JPH06177315A (en) * | 1992-12-09 | 1994-06-24 | Dainippon Printing Co Ltd | Multi-layered lead frame |
US5586600A (en) * | 1994-10-26 | 1996-12-24 | Valeo Engine Cooling, Inc. | Heat exchanger |
US5976955A (en) * | 1995-01-04 | 1999-11-02 | Micron Technology, Inc. | Packaging for bare dice employing EMR-sensitive adhesives |
US5611086A (en) * | 1996-05-06 | 1997-03-18 | Eggen; Kathleen R. | Nursing garment |
JP3375488B2 (en) * | 1996-06-11 | 2003-02-10 | ペンタックス株式会社 | Scanning optical device |
US6067202A (en) * | 1996-12-18 | 2000-05-23 | International Business Machines Corporation | Method and apparatus for controlling spindle motor commutation switching times in a disk drive |
JPH10207726A (en) * | 1997-01-23 | 1998-08-07 | Oki Electric Ind Co Ltd | Semiconductor disk device |
JPH10294607A (en) * | 1997-04-18 | 1998-11-04 | Fuji Elelctrochem Co Ltd | Jig for soldering and mounting isolator, production of isolator mount using the same and isolator mount produced by using the same |
KR100252051B1 (en) * | 1997-12-03 | 2000-04-15 | 윤종용 | Tap tape having a camber protecting layer |
JPH11180291A (en) | 1997-12-24 | 1999-07-06 | Aisin Seiki Co Ltd | Negative pressure type booster |
US6066512A (en) * | 1998-01-12 | 2000-05-23 | Seiko Epson Corporation | Semiconductor device, method of fabricating the same, and electronic apparatus |
US6574858B1 (en) * | 1998-02-13 | 2003-06-10 | Micron Technology, Inc. | Method of manufacturing a chip package |
JPH11274348A (en) | 1998-03-19 | 1999-10-08 | Sumitomo Metal Mining Co Ltd | Tape with reinforcing plate, tape carrier with the reinforcing plate, and semiconductor device using them |
US6975021B1 (en) * | 1999-09-03 | 2005-12-13 | Micron Technology, Inc. | Carrier for substrate film |
US6378745B1 (en) * | 2000-09-15 | 2002-04-30 | Dominic R. De Luccia | Knife holster for a hand |
-
1999
- 1999-09-03 US US09/389,720 patent/US6975021B1/en not_active Expired - Fee Related
-
2001
- 2001-05-15 US US09/858,118 patent/US20020008307A1/en not_active Abandoned
-
2003
- 2003-06-12 US US10/461,548 patent/US6897092B2/en not_active Expired - Fee Related
-
2005
- 2005-09-01 US US11/218,137 patent/US20050287704A1/en not_active Abandoned
- 2005-09-01 US US11/220,191 patent/US20060102990A1/en not_active Abandoned
-
2006
- 2006-05-02 US US11/415,766 patent/US20060199303A1/en not_active Abandoned
- 2006-05-02 US US11/415,550 patent/US20060194369A1/en not_active Abandoned
Patent Citations (69)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US511935A (en) * | 1894-01-02 | Mitering-machine | ||
US3774232A (en) * | 1971-11-11 | 1973-11-20 | Circuit Stik Inc | Package for integrated circuit chip |
US3942245A (en) * | 1971-11-20 | 1976-03-09 | Ferranti Limited | Related to the manufacture of lead frames and the mounting of semiconductor devices thereon |
US5111935A (en) * | 1986-12-03 | 1992-05-12 | Sgs-Thomson Microelectronics, Inc. | Universal leadframe carrier |
US5075760A (en) * | 1988-01-18 | 1991-12-24 | Texas Instruments Incorporated | Semiconductor device package assembly employing flexible tape |
US4878991A (en) * | 1988-12-12 | 1989-11-07 | General Electric Company | Simplified method for repair of high density interconnect circuits |
US5023202A (en) * | 1989-07-14 | 1991-06-11 | Lsi Logic Corporation | Rigid strip carrier for integrated circuits |
US4948645A (en) * | 1989-08-01 | 1990-08-14 | Rogers Corporation | Tape automated bonding and method of making the same |
US5452182A (en) * | 1990-04-05 | 1995-09-19 | Martin Marietta Corporation | Flexible high density interconnect structure and flexibly interconnected system |
US5170328A (en) * | 1990-04-24 | 1992-12-08 | Delco Electronics Corporation | Packaging for molded carriers of integrated circuits |
US5196725A (en) * | 1990-06-11 | 1993-03-23 | Hitachi Cable Limited | High pin count and multi-layer wiring lead frame |
US5173766A (en) * | 1990-06-25 | 1992-12-22 | Lsi Logic Corporation | Semiconductor device package and method of making such a package |
US5304842A (en) * | 1990-10-24 | 1994-04-19 | Micron Technology, Inc. | Dissimilar adhesive die attach for semiconductor devices |
US5216278A (en) * | 1990-12-04 | 1993-06-01 | Motorola, Inc. | Semiconductor device having a pad array carrier package |
US5359222A (en) * | 1992-01-31 | 1994-10-25 | Kabushiki Kaisha Toshiba | TCP type semiconductor device capable of preventing crosstalk |
US5343363A (en) * | 1992-12-21 | 1994-08-30 | Delco Electronics Corporation | Split backed pressure sensitive die carrier tape |
US5286679A (en) * | 1993-03-18 | 1994-02-15 | Micron Technology, Inc. | Method for attaching a semiconductor die to a leadframe using a patterned adhesive layer |
US5585600A (en) * | 1993-09-02 | 1996-12-17 | International Business Machines Corporation | Encapsulated semiconductor chip module and method of forming the same |
US5945834A (en) * | 1993-12-16 | 1999-08-31 | Matsushita Electric Industrial Co., Ltd. | Semiconductor wafer package, method and apparatus for connecting testing IC terminals of semiconductor wafer and probe terminals, testing method of a semiconductor integrated circuit, probe card and its manufacturing method |
US5474957A (en) * | 1994-05-09 | 1995-12-12 | Nec Corporation | Process of mounting tape automated bonded semiconductor chip on printed circuit board through bumps |
US5472085A (en) * | 1994-05-16 | 1995-12-05 | Gpax International, Inc. | Gated-pocket tape-form packaging system |
US5545922A (en) * | 1994-06-28 | 1996-08-13 | Intel Corporation | Dual sided integrated circuit chip package with offset wire bonds and support block cavities |
US5980683A (en) * | 1994-08-02 | 1999-11-09 | International Business Machines Corporation | Production of a support element module for embedding into smart cards or other data carrier cards |
US5756377A (en) * | 1994-11-22 | 1998-05-26 | Sony Corporation | Lead frame and manufacturing method thereof |
US5661086A (en) * | 1995-03-28 | 1997-08-26 | Mitsui High-Tec, Inc. | Process for manufacturing a plurality of strip lead frame semiconductor devices |
US5677566A (en) * | 1995-05-08 | 1997-10-14 | Micron Technology, Inc. | Semiconductor chip package |
US5726491A (en) * | 1995-06-29 | 1998-03-10 | Sharp Kabushiki Kaisha | Tape carrier package |
US5844168A (en) * | 1995-08-01 | 1998-12-01 | Minnesota Mining And Manufacturing Company | Multi-layer interconnect sutructure for ball grid arrays |
US6240632B1 (en) * | 1995-09-22 | 2001-06-05 | Sony Corporation | Method of manufacturing lead frame and integrated circuit package |
US6303219B1 (en) * | 1996-02-19 | 2001-10-16 | Toray Industries, Inc. | Adhesive sheet for semiconductor connecting substrate, adhesive-backed tape for tab, adhesive-backed tape for wire-bonding connection, semiconductor connecting substrate, and semiconductor device |
US5789820A (en) * | 1996-02-28 | 1998-08-04 | Nec Corporation | Method for manufacturing heat radiating resin-molded semiconductor device |
US6265762B1 (en) * | 1996-03-18 | 2001-07-24 | Hitachi, Ltd | Lead frame and semiconductor device using the lead frame and method of manufacturing the same |
US5841194A (en) * | 1996-03-19 | 1998-11-24 | Matsushita Electric Industrial Co., Ltd. | Chip carrier with peripheral stiffener and semiconductor device using the same |
US6306687B1 (en) * | 1996-03-19 | 2001-10-23 | David J. Corisis | Tape under frame for conventional-type IC package assembly |
US6258621B1 (en) * | 1996-05-09 | 2001-07-10 | Oki Electric Industry Co., Ltd. | Method of fabricating a semiconductor device having insulating tape interposed between chip and chip support |
US5977617A (en) * | 1996-05-10 | 1999-11-02 | Nec Corporation | Semiconductor device having multilayer film carrier |
US5951804A (en) * | 1996-07-15 | 1999-09-14 | Samsung Electronics Co., Ltd. | Method for simultaneously manufacturing chip-scale package using lead frame strip with a plurality of lead frames |
US5715143A (en) * | 1996-07-22 | 1998-02-03 | Delco Electronics Corporation | Carrier system for integrated circuit carrier assemblies |
US5796586A (en) * | 1996-08-26 | 1998-08-18 | National Semiconductor, Inc. | Substrate board having an anti-adhesive solder mask |
US6268646B1 (en) * | 1996-08-27 | 2001-07-31 | Hitachi Cable, Ltd. | Lead frame for lead on chip |
US6013946A (en) * | 1996-09-11 | 2000-01-11 | Samsung Electronics Co., Ltd. | Wire bond packages for semiconductor chips and related methods and assemblies |
US5952711A (en) * | 1996-09-12 | 1999-09-14 | Wohlin; Leslie Theodore | Lead finger immobilization apparatus |
US6179127B1 (en) * | 1996-10-18 | 2001-01-30 | Shin-Etsu Polymer Co., Ltd. | Carrier tape and die apparatus for forming same |
US5847445A (en) * | 1996-11-04 | 1998-12-08 | Micron Technology, Inc. | Die assemblies using suspended bond wires, carrier substrates and dice having wire suspension structures, and methods of fabricating same |
US6465876B1 (en) * | 1996-11-20 | 2002-10-15 | Hitachi, Ltd. | Semiconductor device and lead frame therefor |
US6118183A (en) * | 1996-12-19 | 2000-09-12 | Texas Instruments Incorporated | Semiconductor device, manufacturing method thereof, and insulating substrate for same |
US6362637B2 (en) * | 1996-12-31 | 2002-03-26 | Micron Technology, Inc. | Apparatus for testing semiconductor wafers including base with contact members and terminal contacts |
US6249046B1 (en) * | 1997-02-13 | 2001-06-19 | Seiko Epson Corporation | Semiconductor device and method for manufacturing and mounting thereof, and circuit board mounted with the semiconductor device |
US6097098A (en) * | 1997-02-14 | 2000-08-01 | Micron Technology, Inc. | Die interconnections using intermediate connection elements secured to the die face |
US6379745B1 (en) * | 1997-02-20 | 2002-04-30 | Parelec, Inc. | Low temperature method and compositions for producing electrical conductors |
US5925926A (en) * | 1997-03-19 | 1999-07-20 | Nec Corporation | Semiconductor device including an inner lead reinforcing pattern |
US6144102A (en) * | 1997-05-16 | 2000-11-07 | Texas Instruments Incorporated | Semiconductor device package |
US6087202A (en) * | 1997-06-03 | 2000-07-11 | Stmicroelectronics S.A. | Process for manufacturing semiconductor packages comprising an integrated circuit |
US5898214A (en) * | 1997-06-20 | 1999-04-27 | Nec Corporation | Wire bonding device |
US6353268B1 (en) * | 1997-08-22 | 2002-03-05 | Micron Technology, Inc. | Semiconductor die attachment method and apparatus |
US6670696B2 (en) * | 1997-10-15 | 2003-12-30 | Sharp Kabushiki Kaisha | Tape-carrier-package semiconductor device and a liquid crystal panel display using such a device as well as a method for testing the disconnection thereof |
US20020033524A1 (en) * | 1997-10-15 | 2002-03-21 | Kenji Toyosawa | Tape-carrier-package semiconductor device and a liquid crystal panel display using such a device as well as a method for testing the disconnection thereof |
US6036173A (en) * | 1997-11-25 | 2000-03-14 | Siemens Aktiengesellschaft | Semiconductor element having a carrying device and a lead frame and a semiconductor chip connected thereto |
US6057174A (en) * | 1998-01-07 | 2000-05-02 | Seiko Epson Corporation | Semiconductor device, method of fabricating the same, and electronic apparatus |
US6111324A (en) * | 1998-02-05 | 2000-08-29 | Asat, Limited | Integrated carrier ring/stiffener and method for manufacturing a flexible integrated circuit package |
US6284569B1 (en) * | 1998-02-05 | 2001-09-04 | Asat, Limited | Method of manufacturing a flexible integrated circuit package utilizing an integrated carrier ring/stiffener |
US6426548B1 (en) * | 1998-03-18 | 2002-07-30 | Hitachi Cable Ltd. | Semiconductor device, lead-patterning substrate, and electronics device, and method for fabricating same |
US6357594B1 (en) * | 1998-06-30 | 2002-03-19 | Tempo G | Means to assure ready release of singulated wafer die or integrated circuit chips packed in adhesive backed carrier tapes |
US6319354B1 (en) * | 1998-07-06 | 2001-11-20 | Micron Technology, Inc. | System and method for dicing semiconductor components |
US6323541B1 (en) * | 1998-07-07 | 2001-11-27 | Vanguard International Semiconductor Corp. | Structure for manufacturing a semiconductor die with copper plated tapes |
US6091140A (en) * | 1998-10-23 | 2000-07-18 | Texas Instruments Incorporated | Thin chip-size integrated circuit package |
US6455354B1 (en) * | 1998-12-30 | 2002-09-24 | Micron Technology, Inc. | Method of fabricating tape attachment chip-on-board assemblies |
US6476886B2 (en) * | 1999-02-15 | 2002-11-05 | Rainbow Displays, Inc. | Method for assembling a tiled, flat-panel microdisplay array |
US6199743B1 (en) * | 1999-08-19 | 2001-03-13 | Micron Technology, Inc. | Apparatuses for forming wire bonds from circuitry on a substrate to a semiconductor chip, and methods of forming semiconductor chip assemblies |
Also Published As
Publication number | Publication date |
---|---|
US20060194369A1 (en) | 2006-08-31 |
US20060102990A1 (en) | 2006-05-18 |
US20050287704A1 (en) | 2005-12-29 |
US6897092B2 (en) | 2005-05-24 |
US20020008307A1 (en) | 2002-01-24 |
US20030190769A1 (en) | 2003-10-09 |
US6975021B1 (en) | 2005-12-13 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US20060199303A1 (en) | Carrier for substrate film | |
US6683377B1 (en) | Multi-stacked memory package | |
US6818998B2 (en) | Stacked chip package having upper chip provided with trenches and method of manufacturing the same | |
US6563205B1 (en) | Angularly offset and recessed stacked die multichip device and method of manufacture | |
US5258330A (en) | Semiconductor chip assemblies with fan-in leads | |
US6972214B2 (en) | Method for fabricating a semiconductor package with multi layered leadframe | |
US20060261450A1 (en) | Leadframeless package structure and method | |
KR20090050079A (en) | Semiconductor device, lead-frame product used for the same and method for manufacturing the same | |
US6677219B2 (en) | Method of forming a ball grid array package | |
US6408510B1 (en) | Method for making chip scale packages | |
US5951804A (en) | Method for simultaneously manufacturing chip-scale package using lead frame strip with a plurality of lead frames | |
JP4615282B2 (en) | Manufacturing method of semiconductor package | |
US6791166B1 (en) | Stackable lead frame package using exposed internal lead traces | |
US6803648B1 (en) | Integrated circuit packages with interconnects on top and bottom surfaces | |
JP3612155B2 (en) | Semiconductor device and lead frame for semiconductor device | |
US20040262752A1 (en) | Semiconductor device | |
US8508032B2 (en) | Chip packaging | |
EP2130222B1 (en) | A carrier for bonding a semiconductor chip onto and a method of contacting a semiconductor chip to a carrier | |
EP3982405A1 (en) | Semiconductor package with improved board level reliability | |
US7224055B2 (en) | Center pad type IC chip with jumpers, method of processing the same and multi chip package | |
EP1035577A1 (en) | Wiring substrate, method of manufacture thereof, and semiconductor device | |
JP3630713B2 (en) | Surface mounting package and package mounting apparatus | |
US20070197030A1 (en) | Center pad type ic chip with jumpers, method of processing the same and multi chip package | |
US6429534B1 (en) | Interposer tape for semiconductor package | |
JPH02229461A (en) | Semiconductor device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
STCB | Information on status: application discontinuation |
Free format text: EXPRESSLY ABANDONED -- DURING EXAMINATION |