US20040175904A1 - Method for activating P-type semiconductor layer - Google Patents
Method for activating P-type semiconductor layer Download PDFInfo
- Publication number
- US20040175904A1 US20040175904A1 US10/377,605 US37760503A US2004175904A1 US 20040175904 A1 US20040175904 A1 US 20040175904A1 US 37760503 A US37760503 A US 37760503A US 2004175904 A1 US2004175904 A1 US 2004175904A1
- Authority
- US
- United States
- Prior art keywords
- semiconductor layer
- plasma
- semiconductor device
- activating
- type
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 161
- 238000000034 method Methods 0.000 title claims abstract description 76
- 230000003213 activating effect Effects 0.000 title claims abstract description 44
- 239000012535 impurity Substances 0.000 claims abstract description 46
- 150000001875 compounds Chemical class 0.000 claims abstract description 22
- 239000000758 substrate Substances 0.000 claims description 24
- 239000007789 gas Substances 0.000 claims description 22
- 229910052725 zinc Inorganic materials 0.000 claims description 9
- 229910052793 cadmium Inorganic materials 0.000 claims description 4
- 239000000203 mixture Substances 0.000 claims description 4
- 125000004430 oxygen atom Chemical group O* 0.000 claims 1
- 238000007086 side reaction Methods 0.000 abstract description 2
- 125000004429 atom Chemical group 0.000 description 8
- 239000000370 acceptor Substances 0.000 description 5
- 125000004435 hydrogen atom Chemical group [H]* 0.000 description 5
- 239000001257 hydrogen Substances 0.000 description 4
- 229910052739 hydrogen Inorganic materials 0.000 description 4
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 3
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000010894 electron beam technology Methods 0.000 description 3
- 230000001678 irradiating effect Effects 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 229910052594 sapphire Inorganic materials 0.000 description 3
- 239000010980 sapphire Substances 0.000 description 3
- 238000006243 chemical reaction Methods 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 239000002019 doping agent Substances 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 229910019080 Mg-H Inorganic materials 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 150000002431 hydrogen Chemical class 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 238000004151 rapid thermal annealing Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
- H01L21/3228—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of AIIIBV compounds, e.g. to make them semi-insulating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02538—Group 13/15 materials
- H01L21/0254—Nitrides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/0257—Doping during depositing
- H01L21/02573—Conductivity type
- H01L21/02579—P-type
Definitions
- This present invention relates to a method for activating a semiconductor structure, and more particularly to a method for activating a P-type semiconductor layer of a semiconductor structure.
- one well-known method for activating the active layer is heating the LED structure with a furnace or through a rapid thermal annealing process.
- the above-mentioned method sends the substrate with the active layer thereon into a high temperature furnace, to activate the active layer.
- the substrate with the active layer thereon is heated under a temperature about hundreds of degree C.
- the active layer can be activated under the high temperature, but the other portion of the LED may be hurt under the temperature.
- Another well-known method for activating the active layer is irradiating electron beams on the active layer.
- the uppermost active layer is activated by irradiating electron beams while maintaining a surface temperature of the active layer at 600° C. or higher.
- this method still activates the active layer by heat.
- the above-mentioned method is rarely applied on manufacturing process, because the method cannot be easily applied on a wide semiconductor device.
- a method for activating the P-type semiconductor layer of a semiconductor device is provided, wherein the method according to this invention can activate the P-type semiconductor layer of a semiconductor device.
- the above-mentioned method employs plasma to lower the resistance of a semiconductor device, thus the P-type semiconductor layer of the semiconductor device can be activated by the method according to this invention.
- Still another object of this invention is to provide a method for activating the P-type semiconductor layer of a semiconductor device.
- the above-mentioned method employs plasma to activate the P-type impurities in the P-type semiconductor layer of a semiconductor device, and thus the P-type semiconductor layer can show P-type characteristics.
- Still another object of this invention is to provide a method for activating the P-type semiconductor layer of a semiconductor device.
- a semiconductor device is activated by plasma without a thermal effect.
- the performance of the semiconductor device activated by plasma according to this invention is similar to, or even better than, the performance of the semiconductor device, activated by a thermal effect in the prior art.
- the invention provides a method for activating the P-type semiconductor layer of a semiconductor device.
- the above-mentioned method comprises the following steps: providing a substrate, forming a semiconductor layer with P-type impurities therein on the substrate, and reacting the semiconductor layer with plasma for activating the semiconductor device.
- the gas source of the plasma according to this invention may be oxygen (O 2 ), NO, N 2 O, or other gas including the elements of the VI Group.
- the P-type impurities are activated by the above-mentioned plasma.
- the performance of the semiconductor device activated by plasma according to this invention is similar to the performance of the semiconductor device activated by heat in the prior art.
- FIG. 1 is a diagram showing a flow chart for activating a P-type semiconductor layer of a semiconductor device according to this invention.
- FIG. 2 shows a semiconductor structure according to this present invention.
- One preferred embodiment of this invention is a method for activating a semiconductor device.
- an P-type semiconductor layer is formed on a substrate.
- the substrate may consist sapphire, SiC, Si, GaAs, or other materials.
- the P-type semiconductor layer comprises a III-V Group compound as GaN, or other compounds.
- the P-type semiconductor layer is activated by plasma.
- the gas source of the plasma may be O 2 , NO, N 2 O, or other gas including an element of VI Group.
- some impurities are doped into the P-type semiconductor layer of a semiconductor device.
- the impurity comprises at least a di-valence element.
- the P-type impurity are Zn, Cd, Be, Mg, Ca, Ba, and the others.
- the P-type impurity are Zn, Cd, Be, Mg, Ca, Ba, and the others.
- the P-type semiconductor layer of III-V Group such as GaN series compound semiconductor
- some P-type impurities of Mg, Zn, the impurities comprising II Group, or others are doped for making the III-V Group compound semiconductor characteristic P-type.
- some P-type impurities comprising V Group, or others are doped for making the semiconductor layer characteristic P-type.
- the impurities will bond with hydrogen atoms, or other atoms formed in the manufacture of the semiconductor device, and the performance of the semiconductor device is decreased.
- the above-mentioned bonding of the impurities is broken by the plasma to activate the P-type semiconductor layer of the semiconductor device.
- the activating method disclosed in this embodiment can activate the P-type semiconductor layer of a semiconductor device at a temperature lower than the temperature of the activating method in the prior art.
- the temperature of the activating method according to this embodiment is lower than 400°C.
- other layers of the semiconductor device may not be affected by adjusting the power of the plasma.
- all the semiconductor device structure is sent into a stove and heated at a temperature higher than 600° C. to activate the P-type semiconductor layer of the semiconductor device, some unwanted reactions may carry out in the other structures of the semiconductor device during the activating process in the prior art.
- FIG. 1 depicts a flowchart for activating a semiconductor device according to this embodiment.
- a substrate is provided at first.
- the substrate may be made of sapphire, SiC, Si, GaAs, or the like.
- a P-type semiconductor layer is formed on the substrate, as shown in the step 120 .
- the P-type semiconductor layer comprises a III-V Group compound, or other compounds, such as GaN.
- the P-type semiconductor layer further comprises at least a P-type impurity.
- the P-type impurity comprises a di-valence element.
- the P-type impurity comprises Zn, Cd, Be, Mg, Ca, Ba, or the mixture material thereof.
- the semiconductor device may comprise other structure(s) between the substrate and the P-type semiconductor layer.
- the P-type semiconductor layer is activated by plasma.
- the gas source of the plasma may be O 2 , NO, N 2 O, or other gases with the element of Group VI. Hydrogen (H) or other atoms may be produced during the growing of the P-type semiconductor layer or other layers of the semiconductor device.
- the above-mentioned atoms may bond with the impurities to prevent the P-type impurities from acting as an acceptor.
- the P-type semiconductor layer cannot exhibit any P-type characteristics.
- the plasma according to this preferred embodiment efficiently provides the above-mentioned bonding between the atoms and the P-type impurities.
- the P-type impurities free from atoms such as hydrogen can act normally as an acceptor, and the P-type semiconductor layer is activated. Furthermore, the performance of the semiconductor device activated by plasma according to this embodiment is similar to or better than the performance of the semiconductor device activated by heat in the prior art.
- the P-type semiconductor layer is activated by sending the substrate and the layers on the substrate into a furnace and heated to a temperature higher than 600° C.
- Another method for activating the P-type semiconductor layer in the prior art is to use irradiating electron beams on the P-type semiconductor layer while maintaining a surface temperature of the P-type semiconductor layer at 600°C. or higher.
- the P-type semiconductor layers in both of the above-cited method are activated by heat.
- breaking the unwanted bonding between the impurities and the atoms with the plasma activates the P-type semiconductor layer.
- the temperature of the P-type semiconductor layer may be increased by activating with plasma, the temperature of the P-type semiconductor layer is lower than 400° C. Therefore, this preferred embodiment provides an activating method by plasma instead of heat.
- FIG. 2 shows the semiconductor device according to this embodiment.
- a substrate 200 is provided, as shown in FIG. 2.
- the substrate 200 is made of sapphire, SiC, Si, GaAs, or other IV-IV Group compounds.
- a semiconductor layer 220 is formed on the substrate 200 , and an oxide layer 240 is developed on the semiconductor 220 .
- the semiconductor layer 220 may be the P-type semiconductor layer of the semiconductor device.
- the semiconductor layer 220 comprises a III-V Group compound element as GaN.
- the semiconductor layer 220 further comprises the P-type impurities.
- the P-type impurities at least comprise the compound comprising a di-valence element.
- the P-type impurities comprise Mg, Zn, or other P-type impurities, such as the impurities comprising a II Group element.
- a well-known process, such as metalorganic chemical vapor deposition (MOCVD) develops the semiconductor layer 220 .
- the above-mentioned semiconductor device may further comprise other structure between the substrate 200 and the oxide layer 240 .
- NH 3 is generally employed as an N source.
- NH 3 is decomposed as atomic hydrogens. These hydrogen atoms will bond to Mg, Zn, or any like dopant as an acceptor of impurities to prevent the P-type impurity from acting as an acceptor.
- the hydrogen boned to Mg or Zn in the form of Mg-H is released therefrom by the plasma.
- the LED structure including the substrate 200 and the layers thereon are sent into a chamber to perform the activating process.
- the platen power, for supporting the substrate 200 is about 10-40 W
- the coil power of the plasma is about 400-900 W.
- the gas source of the plasma is O 2
- the flow rate of O 2 is about 10-80 sccm.
- the pressure of the chamber is about 20-60 mTorr. Except O 2 , NO, N 2 O, or other gases including a VI Group compound element, or a mixture of gas thereof can also be employed as the gas source of the plasma.
- Table 1 depicts the comparison between the LED activated by plasma and the LED activated by heat.
- the numbers 1-1, 1-2, and 1-3 shows the deferent LED devices produced in the same batch of LED devices. There are four batches of LED devices shown in Table 1. In each batch of the LED devices, some of the LED devices are activated by plasma, and the other LED devices are activated by heat. TABLE 1 comparison between the LED activated by plasma and the LED activated by heat Activating Illumination Threshold NO.
- the plasma according to this embodiment can activate the P-type semiconductor layer of a LED device efficiently.
- the performance of the LED activated by plasma according to this embodiment is similar to, even better than, the performance of the LED activated by heat in the prior art.
- the P-type semiconductor layer can be activated by the following condition.
- the coil power is about 5-30 W.
- the gas source of the plasma may be NO 2 , and the flow rate is about 200 ⁇ 800 sccm.
- the pressure of the chamber is about 100 ⁇ 400 mTorr.
- this embodiment Compared with the activated method in the prior art, this embodiment employs plasma instead of heat to break the bonding between hydrogen atoms and the impurities.
- the hydrogen atom bonded to the impurities by heat at the temperature higher than 600° C.
- the surface temperature of the semiconductor layer 220 may be increased by the plasma, the surface temperature is still far lower than 400°C.
- the entire semiconductor structure is heated under a high temperature at hundreds to thousands of degree C; some unwanted reaction might be driven on to other layers of the semiconductor structure.
- the plasma only reacts with the P-type semiconductor layer of the semiconductor device. Therefore, the plasma will not affect other portions of the semiconductor device.
- this invention discloses a method for activating the P-type semiconductor layer of a semiconductor device.
- the above-mentioned method can activate the impurities in the P-type semiconductor layer of a semiconductor device by plasma.
- the plasma employs a gas source including a VI Group compound element.
- the performance of the semiconductor device activated by plasma according to this invention is similar to the performance of the semiconductor device activated by heat in the prior art. Therefore, this invention can provide a method, other then heat, for activating the P-type semiconductor layer of a semiconductor device.
- the layers other than P-type semiconductor layer will not be affected by plasma.
- this invention discloses an efficient method for activating a P-type semiconductor layer of a semiconductor structure by plasma instead of heat.
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Led Devices (AREA)
- Semiconductor Lasers (AREA)
Abstract
A method for activating the P-type semiconductor layer of a semiconductor device is disclosed in this present invention. The above-mentioned method can activate the impurities in the P-type semiconductor layer of a semiconductor device by plasma. The plasma comprises a gas source including a VI Group compound element. The performance of the semiconductor device activated by plasma according to this invention is similar to the performance of the semiconductor device activated by heat in the prior art. Therefore, this invention can provide a method, other then heat, for activating the P-type semiconductor layer of a semiconductor device. Moreover, in this invention, during the activating process by plasma, the layers other than P-type semiconductor layer will not be affected by plasma. That is, the activating process according to this invention will not cause any side-reactions in the layers other than the P-type semiconductor layer of a semiconductor device. Thus, this invention discloses an efficient method for activating a P-type semiconductor layer of a semiconductor structure by plasma instead of heat.
Description
- 1. Field of the Invention
- This present invention relates to a method for activating a semiconductor structure, and more particularly to a method for activating a P-type semiconductor layer of a semiconductor structure.
- 2. Description of the Prior Art
- In recent years, The Light-Emitting Diode (LED) has become more and more popular. However, a blue light-emitting device employing a blue color-emitting element has not yet been developed as a practical device. Actually, P-type III-V Group compound semiconductor having a sufficiently low-resistance cannot be produced by any conventional techniques. In the case of a GaN series compound semiconductor, as an active layer of an LED, there is a tendency for the semiconductor to exhibit n-type characteristics even without doping an n-type impurity. Therefore, some P-type dopants, such as Mg or Zn, are doped into the GaN series compound semiconductor. Even by conventional chemical vapor deposition or any like method while doping P-type impurities, it is impossible to make III-V Group compound semiconductor characteristic P-type. That is because an activating process is necessary after developing the III-V Group compound semiconductor.
- In the prior art, one well-known method for activating the active layer is heating the LED structure with a furnace or through a rapid thermal annealing process. The above-mentioned method sends the substrate with the active layer thereon into a high temperature furnace, to activate the active layer. The substrate with the active layer thereon is heated under a temperature about hundreds of degree C. According to the above-mentioned method, the active layer can be activated under the high temperature, but the other portion of the LED may be hurt under the temperature.
- Another well-known method for activating the active layer is irradiating electron beams on the active layer. According to this method, the uppermost active layer is activated by irradiating electron beams while maintaining a surface temperature of the active layer at 600° C. or higher. However, this method still activates the active layer by heat. Moreover, the above-mentioned method is rarely applied on manufacturing process, because the method cannot be easily applied on a wide semiconductor device.
- Hence, it is an important object, in developing a method for activating the active layer of a semiconductor device without thermal effects to lower the resistance of a semiconductor device and optimize the performance of the semiconductor device.
- In accordance with the present invention, a method for activating the P-type semiconductor layer of a semiconductor device is provided, wherein the method according to this invention can activate the P-type semiconductor layer of a semiconductor device.
- It is another object of this invention to provide a method for activating the P-type semiconductor layer of a semiconductor device. The above-mentioned method employs plasma to lower the resistance of a semiconductor device, thus the P-type semiconductor layer of the semiconductor device can be activated by the method according to this invention.
- Still another object of this invention is to provide a method for activating the P-type semiconductor layer of a semiconductor device. The above-mentioned method employs plasma to activate the P-type impurities in the P-type semiconductor layer of a semiconductor device, and thus the P-type semiconductor layer can show P-type characteristics.
- Still another object of this invention is to provide a method for activating the P-type semiconductor layer of a semiconductor device. According to this invention, a semiconductor device is activated by plasma without a thermal effect. Thus, the performance of the semiconductor device activated by plasma according to this invention is similar to, or even better than, the performance of the semiconductor device, activated by a thermal effect in the prior art.
- In accordance with the above-mentioned objects, the invention provides a method for activating the P-type semiconductor layer of a semiconductor device. The above-mentioned method comprises the following steps: providing a substrate, forming a semiconductor layer with P-type impurities therein on the substrate, and reacting the semiconductor layer with plasma for activating the semiconductor device. The gas source of the plasma according to this invention may be oxygen (O2), NO, N2O, or other gas including the elements of the VI Group. In this invention, the P-type impurities are activated by the above-mentioned plasma. Moreover, the performance of the semiconductor device activated by plasma according to this invention is similar to the performance of the semiconductor device activated by heat in the prior art.
- The foregoing aspects and many of the attendant advantages of this invention will become more readily appreciated as the same becomes better understood by reference to the following detailed description, when taken in conjunction with the accompanying drawings, wherein:
- FIG. 1 is a diagram showing a flow chart for activating a P-type semiconductor layer of a semiconductor device according to this invention; and
- FIG. 2 shows a semiconductor structure according to this present invention.
- Some sample embodiments of the invention will now be described in greater detail. Nevertheless, it should be recognized that the present invention can be practiced in a wide range of other embodiments besides those explicitly described, and the scope of the present invention is expressly not limited except as specified in the accompanying claims.
- Then, the components of the devices in this application are not shown to scale. Some dimensions are exaggerated to the related components to provide a more clear description and comprehension of the present invention.
- One preferred embodiment of this invention is a method for activating a semiconductor device. First of all, an P-type semiconductor layer is formed on a substrate. The substrate may consist sapphire, SiC, Si, GaAs, or other materials. The P-type semiconductor layer comprises a III-V Group compound as GaN, or other compounds. Subsequently, the P-type semiconductor layer is activated by plasma. The gas source of the plasma may be O2, NO, N2O, or other gas including an element of VI Group.
- Generally, some impurities are doped into the P-type semiconductor layer of a semiconductor device. The impurity comprises at least a di-valence element. Examples of the P-type impurity are Zn, Cd, Be, Mg, Ca, Ba, and the others. For instance, in the P-type semiconductor layer of III-V Group, such as GaN series compound semiconductor, some P-type impurities of Mg, Zn, the impurities comprising II Group, or others are doped for making the III-V Group compound semiconductor characteristic P-type. In another case, in the P-type semiconductor layer, some P-type impurities comprising V Group, or others are doped for making the semiconductor layer characteristic P-type. However, during the manufacturing of a semiconductor device, the impurities will bond with hydrogen atoms, or other atoms formed in the manufacture of the semiconductor device, and the performance of the semiconductor device is decreased. In this preferred embodiment, the above-mentioned bonding of the impurities is broken by the plasma to activate the P-type semiconductor layer of the semiconductor device.
- Compared with the activating method in the prior art, the activating method disclosed in this embodiment, can activate the P-type semiconductor layer of a semiconductor device at a temperature lower than the temperature of the activating method in the prior art. The temperature of the activating method according to this embodiment is lower than 400°C. On the other hand, during the activating process according to this embodiment, other layers of the semiconductor device may not be affected by adjusting the power of the plasma. In the prior art, because all the semiconductor device structure is sent into a stove and heated at a temperature higher than 600° C. to activate the P-type semiconductor layer of the semiconductor device, some unwanted reactions may carry out in the other structures of the semiconductor device during the activating process in the prior art.
- Another preferred embodiment of this present invention is a method for activating the P-type semiconductor layer of a semiconductor device. The above-mentioned semiconductor device may be a light-emitting device (LED), wherein said LED may emit blue light, purple light, or ultraviolet. FIG. 1 depicts a flowchart for activating a semiconductor device according to this embodiment. As shown in
step 100 in FIG. 1, a substrate is provided at first. The substrate may be made of sapphire, SiC, Si, GaAs, or the like. Next, a P-type semiconductor layer is formed on the substrate, as shown in thestep 120. The P-type semiconductor layer comprises a III-V Group compound, or other compounds, such as GaN. The P-type semiconductor layer further comprises at least a P-type impurity. The P-type impurity comprises a di-valence element. In some cases of this embodiment, the P-type impurity comprises Zn, Cd, Be, Mg, Ca, Ba, or the mixture material thereof. The semiconductor device may comprise other structure(s) between the substrate and the P-type semiconductor layer. - Subsequently, as shown in
step 140, the P-type semiconductor layer is activated by plasma. The gas source of the plasma may be O2, NO, N2O, or other gases with the element of Group VI. Hydrogen (H) or other atoms may be produced during the growing of the P-type semiconductor layer or other layers of the semiconductor device. The above-mentioned atoms may bond with the impurities to prevent the P-type impurities from acting as an acceptor. Thus, the P-type semiconductor layer cannot exhibit any P-type characteristics. However, the plasma according to this preferred embodiment efficiently provides the above-mentioned bonding between the atoms and the P-type impurities. The P-type impurities free from atoms such as hydrogen can act normally as an acceptor, and the P-type semiconductor layer is activated. Furthermore, the performance of the semiconductor device activated by plasma according to this embodiment is similar to or better than the performance of the semiconductor device activated by heat in the prior art. - In the prior art, the P-type semiconductor layer is activated by sending the substrate and the layers on the substrate into a furnace and heated to a temperature higher than 600° C. Another method for activating the P-type semiconductor layer in the prior art is to use irradiating electron beams on the P-type semiconductor layer while maintaining a surface temperature of the P-type semiconductor layer at 600°C. or higher. The P-type semiconductor layers in both of the above-cited method are activated by heat. However, in this preferred embodiment, breaking the unwanted bonding between the impurities and the atoms with the plasma activates the P-type semiconductor layer. Even though the temperature of the P-type semiconductor layer may be increased by activating with plasma, the temperature of the P-type semiconductor layer is lower than 400° C. Therefore, this preferred embodiment provides an activating method by plasma instead of heat.
- Another preferred embodiment according to this invention is a method for activating a P-type semiconductor layer of a semiconductor device. The above-mentioned semiconductor device may be a light-emitting device with blue light, purple light, or ultraviolet. FIG. 2 shows the semiconductor device according to this embodiment. At first, a
substrate 200 is provided, as shown in FIG. 2. Thesubstrate 200 is made of sapphire, SiC, Si, GaAs, or other IV-IV Group compounds. A semiconductor layer 220 is formed on thesubstrate 200, and anoxide layer 240 is developed on the semiconductor 220. The semiconductor layer 220 may be the P-type semiconductor layer of the semiconductor device. The semiconductor layer 220 comprises a III-V Group compound element as GaN. The semiconductor layer 220 further comprises the P-type impurities. The P-type impurities at least comprise the compound comprising a di-valence element. In some cases of this embodiment, the P-type impurities comprise Mg, Zn, or other P-type impurities, such as the impurities comprising a II Group element. A well-known process, such as metalorganic chemical vapor deposition (MOCVD) develops the semiconductor layer 220. The above-mentioned semiconductor device may further comprise other structure between thesubstrate 200 and theoxide layer 240. - During the development of the semiconductor layer220, hydrogen or other atoms may be produced. The atoms may bond with the P-type impurities in the semiconductor layer 220 to prevent the P-type impurities from acting as acceptors. In one case of developing a GaN series compound semiconductor layer, NH3 is generally employed as an N source. During the development of the semiconductor layer, NH3 is decomposed as atomic hydrogens. These hydrogen atoms will bond to Mg, Zn, or any like dopant as an acceptor of impurities to prevent the P-type impurity from acting as an acceptor.
- In this preferred embodiment, the hydrogen boned to Mg or Zn in the form of Mg-H is released therefrom by the plasma. The LED structure including the
substrate 200 and the layers thereon are sent into a chamber to perform the activating process. During the activating process, the platen power, for supporting thesubstrate 200 is about 10-40 W, and the coil power of the plasma is about 400-900 W. The gas source of the plasma is O2, and the flow rate of O2 is about 10-80 sccm. The pressure of the chamber is about 20-60 mTorr. Except O2, NO, N2O, or other gases including a VI Group compound element, or a mixture of gas thereof can also be employed as the gas source of the plasma. - Table 1 depicts the comparison between the LED activated by plasma and the LED activated by heat. In Table 1, the numbers 1-1, 1-2, and 1-3 shows the deferent LED devices produced in the same batch of LED devices. There are four batches of LED devices shown in Table 1. In each batch of the LED devices, some of the LED devices are activated by plasma, and the other LED devices are activated by heat.
TABLE 1 comparison between the LED activated by plasma and the LED activated by heat Activating Illumination Threshold NO. method (Lop) voltage (Vf) 1-1 Plasma 3.65 3.33 1-2 Plasma 3.76 3.40 1-3 Heat 3.47 3.33 2-1 Plasma 3.41 3.25 2-2 Plasma 3.25 3.25 2-3 Heat 3.15 3.31 2-4 Heat 3.14 3.28 3-1 Plasma 3.34 3.26 3-2 Plasma 3.505 3.23 3-3 Heat 3.23 3.30 3-4 Heat 3.16 3.31 4-1 Plasma 3.17 3.25 4-2 Plasma 3.23 3.28 4-3 Heat 3.03 3.28 4-4 Heat 3.17 3.32 - From Table 1, it has been found that the plasma according to this embodiment can activate the P-type semiconductor layer of a LED device efficiently. Preferably, the performance of the LED activated by plasma according to this embodiment is similar to, even better than, the performance of the LED activated by heat in the prior art.
- In another case of this embodiment, the P-type semiconductor layer can be activated by the following condition. In this case, the coil power is about 5-30 W. The gas source of the plasma may be NO2, and the flow rate is about 200˜800 sccm. The pressure of the chamber is about 100˜400 mTorr.
- Compared with the activated method in the prior art, this embodiment employs plasma instead of heat to break the bonding between hydrogen atoms and the impurities. In the prior art, the hydrogen atom bonded to the impurities by heat at the temperature higher than 600° C. In this embodiment, even though the surface temperature of the semiconductor layer220 may be increased by the plasma, the surface temperature is still far lower than 400°C.
- Moreover, the entire semiconductor structure is heated under a high temperature at hundreds to thousands of degree C; some unwanted reaction might be driven on to other layers of the semiconductor structure. However, during the activating process according to this embodiment, the plasma only reacts with the P-type semiconductor layer of the semiconductor device. Therefore, the plasma will not affect other portions of the semiconductor device.
- According to the preferred embodiments, this invention discloses a method for activating the P-type semiconductor layer of a semiconductor device. The above-mentioned method can activate the impurities in the P-type semiconductor layer of a semiconductor device by plasma. The plasma employs a gas source including a VI Group compound element. The performance of the semiconductor device activated by plasma according to this invention is similar to the performance of the semiconductor device activated by heat in the prior art. Therefore, this invention can provide a method, other then heat, for activating the P-type semiconductor layer of a semiconductor device. Moreover, according to this invention, during the activating process by plasma, the layers other than P-type semiconductor layer will not be affected by plasma. That is, the activating process according to this invention will not cause any side-reactions in the layers other than the P-type semiconductor layer of a semiconductor device. Thus, this invention discloses an efficient method for activating a P-type semiconductor layer of a semiconductor structure by plasma instead of heat.
- Although specific embodiments have been illustrated and described, it will be obvious to those skilled in the art that various modifications may be made without departing from what is intended, but not to be limited solely by the appended claims.
Claims (22)
1. A method for activating a P-type semiconductor layer, wherein said P-type semiconductor layer is a semiconductor layer of a semiconductor device, comprising:
providing a substrate;
growing said semiconductor layer on said substrate; and
employing a plasma to react with said semiconductor layer.
2. The method according to claim 1 , wherein said plasma comprises a gas source comprising at least a VI Group compound element.
3. The method according to claim 1 , wherein said semiconductor layer comprises a III-V Group compound element.
4. The method according to claim 1 , wherein said semiconductor layer comprises a P-type impurity.
5. The method according to claim 4 , wherein said P-type impurity comprises a di-valence element.
6. The method according to claim 4 , wherein said P-type impurity is selected from the group of Zn, Cd, Be, Mg, Ca, Ba, or an impurity of a mixture meterial thereof.
7. A method for activating a P-type semiconductor layer of a semiconductor device, comprising:
providing a substrate;
growing a semiconductor layer on said substrate, wherein said semiconductor layer comprises a P-type impurity; and
employing a plasma to react with said semiconductor layer.
8. The method according to claim 7 , wherein said plasma comprises a gas source comprising at least a VI Group compound element.
9. The method according to claim 7 , wherein said plasma comprises a gas source comprising O2.
10. The method according to claim 7 , wherein said plasma comprises a gas source comprising NO.
11. The structure according to claim 7 , wherein said plasma comprises a gas source comprising N2O.
12. The method according to claim 7 , wherein said semiconductor layer comprises a III-V Group compound element.
13. The method according to claim 7 , wherein said P-type impurity comprises a di-valence element.
14. The method according to claim 7 , wherein said P-type impurity is selected from the group of Zn, Cd, Be, Mg, Ca, Ba, or an impurity of a mixture meterial thereof.
15. A method for activating a P-type semiconductor layer of a semiconductor device, comprising:
providing a substrate;
growing a semiconductor layer on said substrate, wherein said semiconductor layer comprises a P-type impurity; and
employing a plasma to react with said semiconductor layer, wherein said plasma comprises a gas source comprising at least a gas with oxygen atom.
16. The method according to claim 15 , wherein said gas source comprises O2.
17. The method according to claim 15 , wherein said gas source comprises NO.
18. The method according to claim 15 , wherein said gas source comprises N2O.
19. The method according to claim 15 , wherein said semiconductor layer comprises GaN.
20. The method according to claim 15 , wherein said P-type impurity at least comprises a II Group element.
21. The method according to claim 15 , wherein said P-type impurity comprises Mg.
22. The method according to claim 15 , wherein said P-type impurity comprises Zn.
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/377,605 US20040175904A1 (en) | 2003-03-04 | 2003-03-04 | Method for activating P-type semiconductor layer |
JP2003073779A JP2004281885A (en) | 2003-03-04 | 2003-03-18 | P-type semiconductor layer activating method |
US11/049,981 US7368369B2 (en) | 2003-03-04 | 2005-02-04 | Method for activating P-type semiconductor layer |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/377,605 US20040175904A1 (en) | 2003-03-04 | 2003-03-04 | Method for activating P-type semiconductor layer |
JP2003073779A JP2004281885A (en) | 2003-03-04 | 2003-03-18 | P-type semiconductor layer activating method |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US11/049,981 Continuation-In-Part US7368369B2 (en) | 2003-03-04 | 2005-02-04 | Method for activating P-type semiconductor layer |
Publications (1)
Publication Number | Publication Date |
---|---|
US20040175904A1 true US20040175904A1 (en) | 2004-09-09 |
Family
ID=33436404
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US10/377,605 Abandoned US20040175904A1 (en) | 2003-03-04 | 2003-03-04 | Method for activating P-type semiconductor layer |
US11/049,981 Expired - Lifetime US7368369B2 (en) | 2003-03-04 | 2005-02-04 | Method for activating P-type semiconductor layer |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US11/049,981 Expired - Lifetime US7368369B2 (en) | 2003-03-04 | 2005-02-04 | Method for activating P-type semiconductor layer |
Country Status (2)
Country | Link |
---|---|
US (2) | US20040175904A1 (en) |
JP (1) | JP2004281885A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20100219394A1 (en) * | 2007-08-31 | 2010-09-02 | Lattice Power (Jiangxi) Corporation | Method for fabricating a low-resistivity ohmic contact to a p-type iii-v nitride semiconductor material at low temperature |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100647017B1 (en) | 2005-09-26 | 2006-11-23 | 삼성전기주식회사 | Nitride semiconductor light emitting device and method of manufacturing the same |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6013565A (en) * | 1991-12-16 | 2000-01-11 | Penn State Research Foundation | High conductivity thin film material for semiconductor device |
US6475923B1 (en) * | 1999-07-19 | 2002-11-05 | Sony Corporation | Group III nitride compound semiconductor thin film and deposition method thereof, and semiconductor device and manufacturing method thereof |
US6531408B2 (en) * | 2000-08-28 | 2003-03-11 | National Institute Of Advanced Industrial Science And Technology | Method for growing ZnO based oxide semiconductor layer and method for manufacturing semiconductor light emitting device using the same |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2635611B1 (en) * | 1988-08-18 | 1990-10-19 | Centre Nat Rech Scient | PROCESS FOR NEUTRALIZATION OF ACCEPTOR ATOMS IN TYPE P INP |
US6313035B1 (en) * | 1996-05-31 | 2001-11-06 | Micron Technology, Inc. | Chemical vapor deposition using organometallic precursors |
JPH10228249A (en) * | 1996-12-12 | 1998-08-25 | Nichia Chem Ind Ltd | Light emitting diode (led) and led display device using the diode |
JP3794876B2 (en) * | 1998-09-09 | 2006-07-12 | 松下電器産業株式会社 | Manufacturing method of semiconductor device |
JP3723374B2 (en) * | 1999-03-19 | 2005-12-07 | ローム株式会社 | Manufacturing method of semiconductor light emitting device |
JP3705016B2 (en) * | 1999-06-28 | 2005-10-12 | 豊田合成株式会社 | Translucent electrode film and group III nitride compound semiconductor device |
JP4660926B2 (en) * | 2001-01-09 | 2011-03-30 | 東京エレクトロン株式会社 | Single wafer processing equipment |
US6805728B2 (en) * | 2002-12-09 | 2004-10-19 | Advanced Technology Materials, Inc. | Method and apparatus for the abatement of toxic gas components from a semiconductor manufacturing process effluent stream |
-
2003
- 2003-03-04 US US10/377,605 patent/US20040175904A1/en not_active Abandoned
- 2003-03-18 JP JP2003073779A patent/JP2004281885A/en active Pending
-
2005
- 2005-02-04 US US11/049,981 patent/US7368369B2/en not_active Expired - Lifetime
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6013565A (en) * | 1991-12-16 | 2000-01-11 | Penn State Research Foundation | High conductivity thin film material for semiconductor device |
US6475923B1 (en) * | 1999-07-19 | 2002-11-05 | Sony Corporation | Group III nitride compound semiconductor thin film and deposition method thereof, and semiconductor device and manufacturing method thereof |
US6531408B2 (en) * | 2000-08-28 | 2003-03-11 | National Institute Of Advanced Industrial Science And Technology | Method for growing ZnO based oxide semiconductor layer and method for manufacturing semiconductor light emitting device using the same |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20100219394A1 (en) * | 2007-08-31 | 2010-09-02 | Lattice Power (Jiangxi) Corporation | Method for fabricating a low-resistivity ohmic contact to a p-type iii-v nitride semiconductor material at low temperature |
US8431475B2 (en) * | 2007-08-31 | 2013-04-30 | Lattice Power (Jiangxi) Corporation | Method for fabricating a low-resistivity ohmic contact to a p-type III-V nitride semiconductor material at low temperature |
Also Published As
Publication number | Publication date |
---|---|
US20050130396A1 (en) | 2005-06-16 |
JP2004281885A (en) | 2004-10-07 |
US7368369B2 (en) | 2008-05-06 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US6423984B1 (en) | Light-emitting semiconductor device using gallium nitride compound semiconductor | |
US7675068B2 (en) | Methods of treating a silicon carbide substrate for improved epitaxial deposition and resulting structures and devices | |
US20040222431A1 (en) | III-nitride optoelectronic device structure with high Al AlGaN diffusion barrier | |
CN103441194B (en) | LED, its manufacture method and comprise its LED chip | |
JPH08139361A (en) | Compound semiconductor light emitting device | |
EP1383176B1 (en) | Group iii nitride compound semiconductor light-emitting device and method of producing the same | |
JP2008177514A (en) | Gallium nitride compound semiconductor light-emitting device and method for manufacturing the same | |
JP4785249B2 (en) | Low temperature formation of backside ohmic contacts for vertical devices | |
US7368369B2 (en) | Method for activating P-type semiconductor layer | |
JP3447940B2 (en) | Method for manufacturing semiconductor device | |
JP2001015443A (en) | Manufacture of iii group nitride-based compound semiconductor element | |
JP2001156003A (en) | Method of manufacturing p-type gallium nitride semiconductor, and light-emitting element using p-type gallium nitride semiconductor | |
JP5947183B2 (en) | Method for forming p-type compound semiconductor layer | |
JP2002208729A (en) | Light emitting element and its fabricating method | |
JPH11274557A (en) | Manufacture of p-type gallium nitride compound semiconductor layer | |
US20070254445A1 (en) | Method of forming nitride film and nitride structure | |
JP5200829B2 (en) | Method for manufacturing group III nitride compound semiconductor light emitting device | |
CN111276579A (en) | LED epitaxial growth method | |
JP3449358B2 (en) | Light emitting device and manufacturing method thereof | |
JP2007173316A (en) | Nitride semiconductor light emitting element and its fabrication process | |
JP4137223B2 (en) | Method for producing compound semiconductor | |
CN1319183C (en) | Semiconductor luminessent device and method for manufacturing semiconductor luminescent device | |
CN114695611B (en) | Epitaxial wafer structure of GaN-based light emitting diode and preparation method thereof | |
CN1158697C (en) | Method for activating hihg-resistance P type film into low-resistance P type film | |
JP3557875B2 (en) | GaN-based semiconductor device and method of manufacturing the same |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AS | Assignment |
Owner name: UNI LIGHT TECHNOLOGY INC., TAIWAN Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:WU, BOR-JEN;YIH, NAE-GUANN;CHANG, YUAN-HSIAO;REEL/FRAME:013834/0405 Effective date: 20030220 |
|
STCB | Information on status: application discontinuation |
Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION |