US20040070529A1 - Signal preconditioning for analog-to-digital conversion with timestamps - Google Patents
Signal preconditioning for analog-to-digital conversion with timestamps Download PDFInfo
- Publication number
- US20040070529A1 US20040070529A1 US10/269,706 US26970602A US2004070529A1 US 20040070529 A1 US20040070529 A1 US 20040070529A1 US 26970602 A US26970602 A US 26970602A US 2004070529 A1 US2004070529 A1 US 2004070529A1
- Authority
- US
- United States
- Prior art keywords
- signal
- amplitude
- digital
- preconditioned
- analog
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/124—Sampling or signal conditioning arrangements specially adapted for A/D converters
- H03M1/1245—Details of sampling arrangements or methods
- H03M1/1265—Non-uniform sampling
- H03M1/127—Non-uniform sampling at intervals varying with the rate of change of the input signal
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/34—Analogue value compared with reference values
- H03M1/36—Analogue value compared with reference values simultaneously only, i.e. parallel type
Definitions
- the invention relates to processing of analog signals.
- the invention relates to analog-to-digital conversion of signals using timestamps of characteristic signal events.
- Analog signals are generated by and/or used in a wide variety of devices and systems. In many of these systems, the analog signals serve as a means of transferring information from one portion of the system to another. Devices that make up systems employing analog signals function to generate, modify, receive and/or detect the analog signals. Examples of systems or devices that make use of analog signals include sensors for monitoring environmental or other system conditions and a wide variety of different communications systems.
- ADC analog-to-digital converter
- ADCs sample the amplitude of the analog signal or waveform at successive, regularly spaced, points in time.
- the sampled amplitude values are converted to a digital format (i.e., digitized) by one of several approaches well known in the art.
- the analog signal is represented by a sequence of digital values representing the amplitudes sampled by the ADC. Normally, timing of the digital values in the amplitude sequence is known implicitly from the conversion scheme being used.
- ADC approaches known in the art are the over-sampling converters, such as the delta-sigma modulator-based ADCs, the successive approximation ADCs, and the so-called flash ADCs.
- ADC approaches such as the delta-sigma modulator-based ADCs, the successive approximation ADCs, and the so-called flash ADCs.
- Each of these technologies ultimately produces a string of digital words, each word representing a sampled amplitude value in digital form, in a time sequence at regularly spaced time intervals.
- the analog signal can be reconstructed from the digital words produced by the conventional ADC using a digital to analog converter (DAC).
- the DAC ‘reads’ or processes each successive digital word in the time-sequence and produces an analog voltage level at a DAC output port that corresponds to each of the words.
- the DAC can accurately reconstruct the analog signal.
- the present invention preconditions an analog signal and converts the analog signal into a digital timestamp representation of the preconditioned signal.
- the digital representation produced by the present invention effectively records as timestamps the time of occurrence of a plurality of amplitude events within the preconditioned analog signal and by extension, the original analog signal.
- a method of converting an analog signal into a digital representation comprises preconditioning the analog signal to generate a preconditioned signal.
- the method further comprises producing the digital representation from the preconditioned signal.
- the digital representation comprises a sequence or set of timestamps.
- a timestamp is a time record of an amplitude equality event between an amplitude of the preconditioned signal and an amplitude of a reference signal.
- an apparatus for converting an analog signal having an amplitude value to a digital signal comprises a preconditioner that receives the analog signal from an apparatus input and produces a preconditioned signal.
- the apparatus further comprises a reference signal source that generates separate reference signals of a quantity of N reference signals, where N is an integer equal to or greater than 1.
- a reference signal may be generated for a finite period of time, depending on the embodiment.
- the apparatus further comprises a comparator connected to receive the preconditioned signal from the preconditioner. The comparator being further connected to receive the generated reference signals from the reference source.
- the comparator produces a digital signal at a comparator output.
- the comparator output is connected to an apparatus output.
- the produced digital signal comprises a set of timestamps.
- a system for converting an analog signal into a digital representation comprises an analog to digital conversion apparatus having an input connected to receive the analog signal, and a quantity N of apparatus outputs, where N is an integer equal to or greater than 1.
- the analog to digital conversion apparatus preconditions the analog signal and produces a quantity N of separate digital signals at respective apparatus outputs.
- a digital signal comprises a set of timestamps.
- the system further comprises a quantity N of transition interval analyzers (TIA).
- TIA transition interval analyzers
- a TIA has an input and an output, wherein a respective apparatus output is connected to the input of a respective TIA.
- the TIA encodes timing of logic transitions in the digital signal as a sequence of digital words.
- FIG. 1 illustrates a flow chart of a method of converting according to an embodiment of the present invention.
- FIG. 2 illustrates a flow chart of a representative embodiment of producing timestamps according to an embodiment of the method of converting illustrated in FIG. 1.
- FIG. 3 illustrates a timing graph for an example in which a reference signal R(t) is employed to analyze an analog signal S(t) using an embodiment of a method of converting according to the present invention.
- FIG. 4A illustrates a block diagram of a conversion apparatus according to an embodiment of the present invention.
- FIG. 4B illustrates a block diagram of a conversion apparatus according to another embodiment of the present invention.
- FIG. 5 illustrates a block diagram of a conversion system according to an embodiment of the present invention.
- the present invention converts an analog signal into a digital representation, the digital representation comprising a sequence of timestamps.
- the digital representation produced by the present invention records as timestamps the time of occurrence of a plurality of amplitude events within the analog signal. Amplitudes of one or more reference signals define the amplitude events.
- the digital representation of the analog signal amplitude events can be viewed as a digital timestamp representation of the analog signal.
- the timestamps generated according to the present invention facilitate testing of a device under test (DUT) that generates an analog signal either as an output signal or as a signal internal to the DUT as well as being useful for signal processing in communications systems.
- DUT device under test
- the analog signal is preconditioned before the preconditioned signal is converted to the digital timestamp representation.
- the digital timestamp representation of the preconditioned signal may be used independently or in combination with a digital timestamp representation generated for the analog signal before preconditioning.
- Kamas et al. in U.S. Pat. No. 6,429,799 B1, and Jochen Rivoir in a co-pending patent application, Ser. No. 09/875,848, filed Jun. 6, 2001 and entitled “Analog-to-digital Signal Conversion Method and Apparatus”, both of which are incorporated by reference herein, disclose generating timestamp representations for an analog signal using time-varying reference signals or reference signals that may be either time-varying or non time-varying.
- the timestamps generated from a preconditioned signal correspond to amplitude events in the analog signal that may be different from those used to generate timestamps from the non-preconditioned analog signal.
- the different amplitude events represented by the timestamp sequence generated from the preconditioned analog signal may more directly encode or represent characteristics of interest in the analog signal.
- timestamp representations generated from both the original analog signal and the preconditioned analog signal provide more information than timestamp representations generated from either one separately or individually.
- the digital timestamp representation of either the preconditioned analog signal or the combination of the preconditioned signal and the original analog signal, along with information regarding specific preconditioning and the reference signal or signals, can be used to reconstruct a ‘sampled’ analog signal from the digital timestamp representation.
- the reconstructed sampled analog signal can be used by a test system to evaluate the analog signal itself or to evaluate the performance of a DUT that produced the analog signal.
- the timestamps can be used directly, without analog signal reconstruction, to test or evaluate the analog signal and/or the DUT.
- Such testing can include, but is not limited to, pass/fail testing and/or analog characteristic testing based on device specifications and signature analysis.
- signature analysis refers to comparing timestamps produced for the DUT to equivalent timestamps produced for a device that is known to be a ‘good device’.
- good device it is meant that the device operates in accordance with device specifications.
- an analog signal S(t) is defined as a signal having an amplitude s(t) that varies or takes on non-discrete values as a function of time.
- the analog signal has a time-varying signal amplitude s(t) that can be described by a continuous function of time. More preferably, the time-varying signal amplitude s(t) can be described by a smooth, continuous function of time.
- smooth as used herein with reference to a function of time means that at least a first derivative with respect to time of the function describing the time-varying signal amplitude s(t) exists and is defined for all time t greater than zero but less than a maximum time T max .
- FIG. 1 illustrates a flow chart of the method of converting 100 of the present invention.
- the method 100 of converting comprises preconditioning 110 the analog signal S(t).
- Preconditioning 110 transforms the analog signal S(t) into a preconditioned signal S′(t).
- Preconditioning 110 may include, but is not limited to, differentiation, integration, and filtering of the analog signal. For example, differentiation comprises determining a slope or equivalently, a first derivative of the analog signal S(t). Differentiation may be employed as the preconditioning 110 to produce the preconditioned signal S′(t).
- preconditioning 110 may include non-constant or time-varying preconditioning 110 .
- a filter employed to precondition 110 the analog signal S(t) may have characteristics that change as a function of time.
- a lowpass or a highpass filter having a time-varying corner frequency or a bandpass filter having a time-varying center frequency may be used for time-varying preconditioning 110 .
- One skilled in the art is familiar with a variety of types of signal preconditioning that may be applied to precondition 110 the analog signal S(t), all of which are within the scope of the present invention.
- the reference signals R i (t) are different from one another.
- each member of the quantity N of reference signals R i (t) is different from other members thereof.
- the reference signals R i (t) are time-varying reference signals.
- time-varying reference signals R i (t) include reference signals that vary in time such as, but not limited to, sinusoidal signals, and reference signals that vary both in time and in frequency such as, but not limited to, so called frequency ‘chirped’ time-varying signals and other such frequency modulated time-varying signals.
- the use of time-varying reference signals R i (t) that include time/frequency-varying signals may facilitate a randomization of working-point dependent, non-ideal characteristics of a comparator used to compare the preconditioned signal to the reference signals R i (t), for example.
- P i a function having a fixed value
- the non time-varying reference signal P i and the time-varying reference signal R i (t) are both represented herein as the ‘reference signal R i (t)’.
- the reference signal R i (t) of the quantity N of reference signals R i (t) can be any signal having an amplitude that is either constant or that varies or takes on non-discrete values as a function of time in a manner that is known ⁇ priori. That is to say, the reference signal R i (t) is a ‘known’ signal.
- the i-th reference signal R i (t) has a signal amplitude r i (t) that can be described by a waveform that is a continuous function of time. In general, the waveform may be constant, periodic or aperiodic.
- a periodic waveform is one in which the waveform repeats with a period T while an aperiodic waveform is non-repeating.
- either constant or periodic waveforms are preferred since constant waveforms and periodic waveforms typically are easier to generate 120 than aperiodic waveforms. More preferably, a waveform or waveforms are chosen that can be easily and inexpensively generated 120 .
- the signal amplitudes r i (t) of the reference signals R i (t) span an expected amplitude range of the preconditioned signal S′(t). Spanning the expected range helps to insure that the preconditioned signal S′(t) is adequately sampled by the reference signals R i (t).
- Examples of waveforms suitable for use in describing the reference signal R i (t) include, but are not limited to, a constant value waveform, a sine wave, a sawtooth wave, a triangle wave, a chirp, a ramp, a square wave, a multi-level stepped wave, and a wave having a pseudo-random amplitude variation with respect to time.
- waveforms having either a zero slope, such as a constant value waveform, or a finite slope, such as a sine wave or a chirp waveform are preferred since discontinuities in the slope or regions of non-finite slope can introduce ambiguities in the digital representation.
- Waveforms such as the sawtooth wave, that do have one or more regions of non-finite slope can be used in conjunction with the present invention by removing timestamps associated with time intervals of the regions of non-finite slope.
- Time gating is one approach to removing timestamps generated during regions of non-finite slope in the reference signal R i (t) waveform.
- One skilled in the art would readily identify other suitable waveforms for use in defining the reference signal R i (t). All such reference signal R i (t) waveforms and combinations thereof are within the scope of the present invention.
- the method of converting 100 further comprises comparing 130 the preconditioned signal S′(t) to the reference signals R i (t).
- the preconditioned signal S′(t) is compared 130 to each reference signal R i (t) in the quantity N of reference signals.
- the amplitude s′(t) of the preconditioned signal is compared to the amplitude r i (t) of each of the reference signal R i (t) in the quantity N of reference signals.
- a determination is made as to whether the preconditioned signal amplitude s′(t) at a time of comparison t c is either greater than, less than, or equal to the amplitude r i (t) of a respective reference signal R i (t).
- Comparing 130 may be done either in parallel by simultaneously comparing 130 the preconditioned signal amplitude s′(t) to all N of the reference signal amplitudes r i (t) or by sequentially comparing 130 ′ the preconditioned signal amplitude s′(t) to a first reference signal amplitude r 1 (t) followed by comparing 130 ′ the preconditioned signal amplitude s′(t) to a second reference signal amplitude r 2 (t) and so on, until the preconditioned signal amplitude s′(t) has been compared to the N-th reference signal amplitude r N (t).
- sequentially comparing 130 ′ may comprise comparing 130 ′ the preconditioned signal amplitude s′(t) to different ones of the reference signal amplitudes r i (t) during successive periods of the preconditioned signal S′(t).
- comparing 130 , 130 ′ is performed continuously or nearly continuously with respect to time.
- a time difference between two adjacent times of comparison t c1 , t c2 called a ‘comparison interval’ is preferably small and more preferably very small.
- Comparing 130 , 130 ′ can be viewed as a conversion of the preconditioned analog signal S′(t) to a time representation where ‘time’ is the time of occurrence of a crossing or an equality event with respect to a reference signal R i (t). The crossing or equality event occurs when the preconditioned analog signal S′(t) amplitude s′(t) crosses or is equal to the reference signal R i (t) amplitude r i (t).
- the method of converting 100 further comprises producing 140 a timestamp corresponding to the time of occurrence of a given reference signal R i (t) and preconditioned signal S′(t) equality event.
- a timestamp is produced 140 when the amplitude s′(t) of the preconditioned signal S′(t) is observed to be equal to or to ‘cross’ the amplitudes r i (t) of the reference signals R i (t), resulting in a sequence of timestamps.
- the amplitude values r i (t k ) are also known for all time values t k .
- the sequence of timestamps corresponds to a sequence of amplitude values s′(t k ) of the preconditioned signal S′(t). Comparing 130 and producing 140 are repeated for time t less than the maximum time T max , and preferably for all time t. Essentially, producing 140 can be viewed as a conversion from a time representation to a digital representation.
- producing 140 ′ timestamps introduces logic transitions in a quantity N of digital signals D i , where a relative timing of the logic transition represents the timestamps.
- a flow chart of the representative embodiment of producing 140 ′ of the method 100 is illustrated in FIG. 2.
- Producing 140 ′ comprises establishing 142 a logic level in the digital signals D i , and preferably in each of the digital signals D i .
- a digital signal D i is either a time-varying or a non time-varying signal having an amplitude d i (t) that preferably can take on only one of two allowed logic states or levels at any given point in time t.
- a first one of the logic levels is created 142 in the i-th digital signal D i when the preconditioned signal amplitude s′(t) is greater than the i-th reference signal amplitude r i (t).
- a second one of the logic levels is created 142 in the i-th digital signal D i when the preconditioned signal amplitude s′(t) is less than the i-th reference signal amplitude r i (t).
- the amplitude d i (t) of the i-th digital signal D i can likewise be described by a continuous function of time t.
- the i-th digital signal amplitude d i (t) will spend a portion of the time t at the first logic level and another portion of the time t at the second logic level.
- the transitions effectively serve as timestamps of the equality events.
- the producing 140 ′ timestamps of the representative embodiment of method 100 further optionally comprises measuring and creating 144 digital timestamps for the logic transitions in the i-th digital signal D i .
- measuring and creating 144 is illustrated as a box having a dashed-line border in FIG. 2.
- measuring and creating 144 measures the time of occurrence t k of a logic transition in the i-th digital signal D i and converts the time of occurrence t k of a transition in a format suitable for storing in a computer memory.
- the converted time of occurrence t k of a transition is a digital timestamp.
- the conversion is a binary encoding of elapsed time based on a timing clock.
- Measuring and creating 144 is repeated for each logic transition in each of the digital signals D i .
- additional information may be added to digital timestamps to distinguish timestamps of an i-th digital signal D i from those of a j-th digital signal D j .
- the method 100 of converting optionally further comprises storing 150 the digital timestamps.
- storing 150 saves the timestamps for later processing.
- the timestamps can be optionally stored 150 in computer memory. Storing 150 is optional since the digital timestamps can be used immediately once they have been produced 140 , 140 ′ instead of storing 150 .
- Optionally storing 150 is illustrated as a box having a dashed-line border in FIG. 1.
- the analog signal S(t) (not illustrated) is preconditioned 110 by an exemplary differentiation.
- the preconditioned signal S′(t) is the derivative of the analog signal S(t) for this example.
- the reference signal R(t) is illustrated as a dashed-line sine wave and the preconditioned signal S′(t) is illustrated as a solid line wave.
- the amplitude s′(t) of the preconditioned signal S′(t) repeatedly exceeds and then is less than the amplitude r(t) of the reference signal R(t).
- Differentiation is used to precondition 110 and a sine wave is used for the reference signal R(t) in the example illustrated in FIG. 3 for illustrative purposes only and are not intended to limit the scope of the present invention.
- digital signal D which has a logic transition that occurs every time the preconditioned signal amplitude s′(t) crosses the reference amplitude r(t).
- the correspondence between the timing of transitions in the digital signal D and the points where the preconditioned signal amplitude s′(t) crosses the reference amplitude r(t) is indicated by the vertical ‘dashed’ lines in FIG. 3 for convenience of illustration.
- the choice of which of the two logic values is used to indicate that the preconditioned signal amplitude s′(t) exceeds the reference amplitude r(t) is completely arbitrary according to the invention.
- the example illustrated in FIG. 3 could just as easily have used a logic ‘0’ to indicate that the preconditioned amplitude s′(t) was greater than reference amplitude r(t) and a logic ‘1’ to indicate that the preconditioned amplitude s′(t) was less than the reference amplitude r(t) and still be within the scope of the invention.
- the effect on the logic state of the digital signal D can be defined arbitrarily to suit a particular application.
- the case of equality can be arbitrarily defined to produce 140 ′ one of the two logic states in the digital signal D.
- the case of equality can be left to have an undefined effect on the logic state of the digital signal D since often it can be assumed that amplitudes s′(t) and r(t) will not be equal for an extended period.
- One skilled in the art would readily be able to determine such a definition to suit a particular application. All such definitions are within the scope of the invention.
- the timestamps or timestamp sequence produced 140 , 140 ′ by method 100 can be optionally stored 150 in computer memory for use at a later time or instead the timestamps can be used directly after they are produced 140 , 140 ′.
- one use of the timestamps is to reconstruct the analog signal.
- the method 100 of conversion optionally further comprises reconstructing 160 the preconditioned signal S′(t) and/or the analog signal S(t) from the timestamp representation.
- knowledge of the reference signals R i (t) is used along with the produced 140 , 140 ′ timestamps to reconstruct an analog representation of the preconditioned signal S′(t).
- Knowledge of the preconditioning may then be used to transform the reconstructed preconditioned signal S′(t) into a reconstructed version of the analog signal S(t).
- an inverse of the preconditioning transformation may be employed to transform the reconstructed preconditioned signal S′(t) into the reconstructed analog signal S(t).
- knowledge of the timestamps, the reference signals R i (t), and the preconditioning provides unambiguous knowledge of the analog signal S(t) at the times represented in the timestamps.
- the method 100 of the present invention can be viewed as a method of analog-to-digital conversion that first converts the preconditioned signal S′(t) to a timestamp representation and then converts the timestamp representation to a digital signal representation.
- the time representation is the timing associated with an equality event in comparing 130 .
- the digital representation in the representative embodiment of producing 140 ′ a timestamp is the quantity N of digital signals D i .
- the timestamp representation is encoded in the digital signals D i as the time of occurrence of the produced 140 ′ logic transitions.
- the results of the method 100 may contain enough information to reconstruct the analog signal from the digital representation provided the sampling is performed with ‘sufficient’ resolution.
- the analog-to-digital conversion of the method 100 of the present invention can be used to perform pass/fail testing and/or related analog characteristic analysis of a DUT based on device specification or to perform signature analysis of an analog signal in a DUT.
- a block diagram of the conversion apparatus 200 according to an embodiment of the present invention is illustrated in FIG. 4A.
- a block diagram of the conversion apparatus 200 ′ according to another embodiment of the present invention is illustrated in FIG. 4B.
- the means for comparing 2101 may be a type of comparator 210 i , for example.
- Each of the comparators 210 i has a first input, a second input and an output.
- the means for comparing is a Schmitt Trigger 210 ′ i .
- the comparing means 210 i is generally referred to hereinafter without limitation, as a ‘comparator’.
- the first input of the comparator 210 i is labeled ‘+’ and the second input is labeled ‘ ⁇ ’.
- the comparator 210 i is a device known in the art that compares the amplitudes of signals on its inputs and produces an output signal on its output, the level of the output signal being determined by relative values of the signals on the inputs.
- the output of the comparator is ‘high’.
- an operational amplifier can be used as a comparator 210 i for the apparatus 200 of the invention.
- An operational amplifier is a device that produces an output voltage that is the amplified difference between a voltage applied to a first input terminal and a voltage applied to a second input terminal.
- Typical operational amplifiers have very large scale or gain factors that multiply or exaggerate the difference.
- V out G ⁇ (V 1 -V 2 ), where G is an open loop gain of the operational amplifier.
- the value V out will be observed to swing between two voltages determined by the power supply voltages applied to the operational amplifier for very small differences in the voltages V 1 and V 2 .
- This is exactly what is desired for the quantity N comparators 210 i of the invention. If the voltage V 1 is related to the signal amplitude s(t) and the voltage V 2 is related to one of the reference signal amplitudes r i (t), then the operational amplifier will provide the desired comparator function for the apparatus 200 .
- One skilled in the art will readily recognize that there are other suitable approaches for implementing the quantity N comparators 210 i . All such suitable approaches are within the scope of the present invention.
- the apparatus 200 further comprises a reference signal source 220 having N outputs.
- the reference signal source 220 generates a quantity N of reference signals R i (t).
- a reference signal of the quantity is generated at an output of the N outputs.
- N>1 the quantity N of reference signals are different from one another and produced at different outputs.
- a first reference signal R 1 (t) generated by the reference source 220 is applied to the second input of a respective first comparator 210 1 .
- a second reference single R 2 (t) is applied to the second input of a respective second comparator 210 2 , and so on, until an N-th reference signal R N (t) is applied to a second input of a respective N-th comparator 210 N .
- the conversion apparatus 200 further comprises a preconditioner 230 between an input of the apparatus 200 and the respective first inputs of the comparators 210 i .
- the preconditioner 230 may comprise any preconditioning circuit or means for preconditioning known in the art. Preconditioner circuits known in the art include, but are not limited to, an integrator, a differentiator, and a filter. In some embodiments (not illustrated), the preconditioner 230 may be replaced by a plurality of preconditioners 230 i , a different one the preconditioners 230 i for each of the comparators 210 i . In particular, each of the preconditioners 230 i may provide a different preconditioning of the analog signal S(t).
- a first preconditioner 230 1 of the plurality of presconditioners 230 i may be an integrator while a second preconditioner 230 2 of the plurality of presconditioners 230 i may be a differentiator, and so on. Therefore, it is within the scope of the present invention to use a single preconditioner 230 connected to the first inputs of the quantity N comparators or to use more than one preconditioner 230 , which may be the same type or different types of preconditioners. When more than one preconditioner 230 is used, each preconditioner 230 is connected to one or more of the first inputs of respective one or more comparators 210 i .
- the analog signal S(t) is applied to the preconditioner 230 .
- the preconditioner 230 transforms the analog signal S(t) into a preconditioned signal S′(t).
- the preconditioned signal S′(t) is then applied to the first input of the comparators 210 i , and preferably to each of the comparators 210 i .
- An output signal generated by the first comparator 2101 is a respective first digital signal D 1 .
- An output signal generated by the second comparator 210 2 is a respective second digital D 2 , and so on, until an output signal generated by the N-th comparator 210 N is a respective N-th digital signal D N .
- the digital signal D i comprises a digital representation or format of the preconditioned signal S′(t).
- the apparatus 200 essentially implements the method 100 described hereinabove.
- the conversion apparatus 200 ′ comprises one comparator 210 , having a first input, a second input and an output.
- a Schmitt Trigger (not illustrated) may be used in place of the comparator 210 .
- the conversion apparatus 200 ′ further comprises a reference signal source 220 ′ having an output.
- the reference signal source 220 ′ output is connected to the second input of the comparator 210 .
- the conversion apparatus 200 ′ further comprises a preconditioner 230 between an input of the apparatus 200 ′ and the first input of the comparator 210 .
- An analog signal S(t) is applied to the input of the apparatus 200 ′.
- the preconditioner 230 transforms the applied analog signal S(t) into a preconditioned signal S′(t).
- the preconditioned signal S′(t) is then applied to the first input of the comparator 210 .
- the reference signal source 220 ′ sequentially generates a quantity of N reference signals R i (t).
- the arrow labeled ‘R i (t)’ in FIG. 4B indicates the sequence of reference signals R i (t).
- Each sequentially generated reference signal R i (t) is generated and output by the reference signal source 220 ′ for a separate, finite period of time t g .
- the first reference signal R 1 (t) is generated by the reference signal source 220 ′ and compared to the preconditioned signal S′(t) by the comparator 210 for a respective first period of time.
- the second reference signal R 2 (t) is generated by the reference signal source 220 ′ and compared to the preconditioned signal S′(t) by the comparator 210 for a respective second period of time, and so on until the N-th reference signal R N (t) is generated and compared.
- the period of time t g that each of the reference signals R i (t) is generated by the reference signal source 220 ′ may be, for example, a different period of the preconditioned analog signal S′(t).
- the output of the comparator 210 is a digital signal representation D′ of the preconditioned signal S′(t).
- the digital signal representation D′ is indicated by the arrow labeled D′ at the comparator output in FIG. 4B.
- the digital signal representation D′ of this alternate embodiment comprises a sequence of digital signal segments D i ′, wherein transitions within each segment are timestamps of equality events for a corresponding reference signal R i (t) comparison.
- a system 300 for converting an analog signal S(t) is provided. Such a system may be used to convert an analog output signal from a device under test (DUT) or from another source.
- FIG. 5 illustrates a block diagram of an embodiment of the conversion system 300 of the present invention.
- the system 300 comprises an analog-to-digital conversion apparatus 200 of the present invention that receives the analog input signal S(t).
- the conversion apparatus 200 preconditions the analog signal S(t) to produce a preconditioned signal S′(t).
- the conversion performed by the apparatus 200 essentially encodes the timing of certain predefined amplitude events in the preconditioned signal S′(t) as transitions in the digital signals D i .
- the digital signals D i comprise a sequence of timestamps of the predefined amplitude events.
- the system 300 further comprises a quantity N of transition interval analyzers (TIA) 310 i .
- a TIA 310 i receives a respective digital signal D i produced by the conversion apparatus 300 .
- the TIA 310 i is a device known in the art that measures the time of occurrence of logic transitions in the digital signals D i . Further, TIAs 310 i are well known in the art of testing DUTs.
- the system 300 optionally further comprises a test equipment 320 .
- the optional test equipment 320 is illustrated as a dashed-line box in FIG. 5 for that reason.
- the optional test equipment 320 may be, for example, an automated test equipment (ATE) system or another test system.
- the test equipment 320 has one or more ports that are connected to respective outputs of the quantity N TIAs 310 i .
- the TIAs 310 i generates a sequence of digital words that encode the timing of the transitions in the respective digital signals D i .
- the optional test equipment 320 comprises an optional memory for storing the timestamps and an optional test algorithm for analyzing the timestamps.
- the optional test equipment 320 might use the encoded timing information of the timestamps to recognize and analyze events in the preconditioned signal S′(t).
- knowledge of the preconditioning may be employed by the optional test equipment 320 to recognize and analyze events in the analog signal S(t) using the timestamps for the preconditioned signal S′(t).
- the analysis may be used to determine if a DUT meets a specification associated with the events encoded by the digital signals D i .
- the test equipment 320 stores the timestamps in memory and compares the timestamps using a test algorithm to expected timestamps or other timing information. The comparison performed by the ATE 320 with the test algorithm can then be used, for example, to assess the ‘pass/fail’ condition of the DUT based on specification for the DUT or to perform signature analysis using expected timestamps produced from a known good device.
- One skilled in the art would readily be able to choose and configure a TIA 310 i for a given ATE 320 and develop a test algorithm that would be suitable for the testing system 300 of the present invention without undue experimentation.
- the system 300 excluding the optional test equipment 320 may be implemented as a stand-alone element.
- the system 300 can be implemented as a DUT test board that interfaces a DUT to an external ATE system.
- the system 300 may be integrated into a DUT as part of the ‘on board’ test circuitry of the DUT. Further, the system 300 may be integrated into an ATE.
- the system 300 is preferably integrated into a device (e.g. DUT) as part of the device's built-in test circuitry. More preferably, only the conversion apparatus 200 is built into the device.
- the TIAs 310 i and optional test equipment 320 including the optional memory/algorithms are typically part of an external test system used to test the device, such as an ATE.
- the conversion apparatus 200 may be implemented either ‘off-chip’ or preferably ‘on-chip’ with respect to the device.
- An alternate embodiment of the system 300 ′ (not illustrated) comprises all of the elements of the system 300 except for the conversion apparatus 200 which is replaced by the conversion apparatus 200 ′ in the system 300 ′.
- the system 300 ′ comprises a single TIA 310 to receive the digital signal representation D′ from the single comparator 210 .
Abstract
Description
- The invention relates to processing of analog signals. In particular, the invention relates to analog-to-digital conversion of signals using timestamps of characteristic signal events.
- Analog signals are generated by and/or used in a wide variety of devices and systems. In many of these systems, the analog signals serve as a means of transferring information from one portion of the system to another. Devices that make up systems employing analog signals function to generate, modify, receive and/or detect the analog signals. Examples of systems or devices that make use of analog signals include sensors for monitoring environmental or other system conditions and a wide variety of different communications systems.
- In many practical situations encountered in the real world, it is necessary or at least desirable to transform analog signals into a digital representation. This is especially true in cases where digital methodologies are used largely to process and analyze the analog signals. For example, most manufacturers of integrated circuits (ICs) employ some form of automated test equipment (ATE) to test the IC products being manufactured. While ATEs are overwhelmingly implemented based on digital technologies, many of the modern ICs that are being manufactured and tested, produce or use analog output signals. This has become particularly true as modern system-on-a-chip devices are transitioned from the concept to the product phase. The problem for the designers and users of ATEs is how to transform analog signals into a format that can be utilized by the digital ATE. A related problem is the reconstruction of the analog signal from the digital representation.
- The conventional approach to converting an analog signal into a digital representation is to use an analog-to-digital converter (ADC). Conventional ADCs sample the amplitude of the analog signal or waveform at successive, regularly spaced, points in time. The sampled amplitude values are converted to a digital format (i.e., digitized) by one of several approaches well known in the art. Once digitized, the analog signal is represented by a sequence of digital values representing the amplitudes sampled by the ADC. Normally, timing of the digital values in the amplitude sequence is known implicitly from the conversion scheme being used. Among the commonly employed ADC approaches known in the art are the over-sampling converters, such as the delta-sigma modulator-based ADCs, the successive approximation ADCs, and the so-called flash ADCs. Each of these technologies ultimately produces a string of digital words, each word representing a sampled amplitude value in digital form, in a time sequence at regularly spaced time intervals.
- The analog signal can be reconstructed from the digital words produced by the conventional ADC using a digital to analog converter (DAC). The DAC ‘reads’ or processes each successive digital word in the time-sequence and produces an analog voltage level at a DAC output port that corresponds to each of the words. By reading the digital words in a manner that is consistent with the order and timing of the original analog-to-digital conversion, the DAC can accurately reconstruct the analog signal.
- While conventional amplitude sampled analog-to-digital conversion or amplitude sequence analog-to-digital conversion can provide high fidelity conversion of analog signals to a digital form, the conventional ADCs can be costly to implement in some instances. In particular, many of the conventional ADC technologies are not well suited for simple, accurate on-chip implementations. This is especially true when considering on-chip conversion of analog signals for built-in-self-test (BIST) purposes or in design for test (DFT) instances used in conjunction with an external digital ATE. Similarly, the use of conventional ADC approaches as an interface between an analog device and an ATE can pose many problems, not the least of which is the need for extra dedicated resources in the ATE to accommodate the often high data rate digital signals generated by a conventional time-sampling ADC. Finally, the bandwidth of many conventional ADCs is severely limited by the circuitry necessary to affect the analog-to-digital conversion, especially when many bits of amplitude accuracy are desired.
- Accordingly, it would be advantageous to be able to convert an analog signal into a digital representation that preserved selected or specific characteristics of the analog signal and that could optionally provide for accurate signal reconstruction from the digital representation. Such a transformation would solve a long-standing need in the area of analog-to-digital signal conversion, especially as the conversion relates to processing and testing of analog signals by digital systems, such as ATEs and communications systems.
- The present invention preconditions an analog signal and converts the analog signal into a digital timestamp representation of the preconditioned signal. The digital representation produced by the present invention effectively records as timestamps the time of occurrence of a plurality of amplitude events within the preconditioned analog signal and by extension, the original analog signal.
- In one aspect of the invention, a method of converting an analog signal into a digital representation is provided. The method of converting comprises preconditioning the analog signal to generate a preconditioned signal. The method further comprises producing the digital representation from the preconditioned signal. The digital representation comprises a sequence or set of timestamps. A timestamp is a time record of an amplitude equality event between an amplitude of the preconditioned signal and an amplitude of a reference signal.
- In another aspect of the invention, an apparatus for converting an analog signal having an amplitude value to a digital signal is provided. The apparatus comprises a preconditioner that receives the analog signal from an apparatus input and produces a preconditioned signal. The apparatus further comprises a reference signal source that generates separate reference signals of a quantity of N reference signals, where N is an integer equal to or greater than 1. A reference signal may be generated for a finite period of time, depending on the embodiment. The apparatus further comprises a comparator connected to receive the preconditioned signal from the preconditioner. The comparator being further connected to receive the generated reference signals from the reference source. The comparator produces a digital signal at a comparator output. The comparator output is connected to an apparatus output. The produced digital signal comprises a set of timestamps.
- In yet another aspect of the invention, a system for converting an analog signal into a digital representation is provided. The system for converting comprises an analog to digital conversion apparatus having an input connected to receive the analog signal, and a quantity N of apparatus outputs, where N is an integer equal to or greater than 1. The analog to digital conversion apparatus preconditions the analog signal and produces a quantity N of separate digital signals at respective apparatus outputs. A digital signal comprises a set of timestamps. The system further comprises a quantity N of transition interval analyzers (TIA). A TIA has an input and an output, wherein a respective apparatus output is connected to the input of a respective TIA. The TIA encodes timing of logic transitions in the digital signal as a sequence of digital words.
- Certain embodiments of the present invention have other advantages in addition to and in lieu of the advantages described hereinabove. These and other features and advantages of the invention are detailed below with reference to the following drawings.
- The various features and advantages of the present invention may be more readily understood with reference to the following detailed description taken in conjunction with the accompanying drawings, where like reference numerals designate like structural elements, and in which:
- FIG. 1 illustrates a flow chart of a method of converting according to an embodiment of the present invention.
- FIG. 2 illustrates a flow chart of a representative embodiment of producing timestamps according to an embodiment of the method of converting illustrated in FIG. 1.
- FIG. 3 illustrates a timing graph for an example in which a reference signal R(t) is employed to analyze an analog signal S(t) using an embodiment of a method of converting according to the present invention.
- FIG. 4A illustrates a block diagram of a conversion apparatus according to an embodiment of the present invention.
- FIG. 4B illustrates a block diagram of a conversion apparatus according to another embodiment of the present invention.
- FIG. 5 illustrates a block diagram of a conversion system according to an embodiment of the present invention.
- The present invention converts an analog signal into a digital representation, the digital representation comprising a sequence of timestamps. The digital representation produced by the present invention records as timestamps the time of occurrence of a plurality of amplitude events within the analog signal. Amplitudes of one or more reference signals define the amplitude events. As such, the digital representation of the analog signal amplitude events can be viewed as a digital timestamp representation of the analog signal. Among other things, the timestamps generated according to the present invention facilitate testing of a device under test (DUT) that generates an analog signal either as an output signal or as a signal internal to the DUT as well as being useful for signal processing in communications systems.
- According to the present invention, the analog signal is preconditioned before the preconditioned signal is converted to the digital timestamp representation. The digital timestamp representation of the preconditioned signal may be used independently or in combination with a digital timestamp representation generated for the analog signal before preconditioning. Kamas et al., in U.S. Pat. No. 6,429,799 B1, and Jochen Rivoir in a co-pending patent application, Ser. No. 09/875,848, filed Jun. 6, 2001 and entitled “Analog-to-digital Signal Conversion Method and Apparatus”, both of which are incorporated by reference herein, disclose generating timestamp representations for an analog signal using time-varying reference signals or reference signals that may be either time-varying or non time-varying.
- Advantageously, the timestamps generated from a preconditioned signal correspond to amplitude events in the analog signal that may be different from those used to generate timestamps from the non-preconditioned analog signal. In some cases, the different amplitude events represented by the timestamp sequence generated from the preconditioned analog signal may more directly encode or represent characteristics of interest in the analog signal. Additionally, timestamp representations generated from both the original analog signal and the preconditioned analog signal provide more information than timestamp representations generated from either one separately or individually.
- In addition, the digital timestamp representation of either the preconditioned analog signal or the combination of the preconditioned signal and the original analog signal, along with information regarding specific preconditioning and the reference signal or signals, can be used to reconstruct a ‘sampled’ analog signal from the digital timestamp representation. The reconstructed sampled analog signal can be used by a test system to evaluate the analog signal itself or to evaluate the performance of a DUT that produced the analog signal. Alternatively, the timestamps can be used directly, without analog signal reconstruction, to test or evaluate the analog signal and/or the DUT. Such testing can include, but is not limited to, pass/fail testing and/or analog characteristic testing based on device specifications and signature analysis. The term ‘signature analysis’ as used herein refers to comparing timestamps produced for the DUT to equivalent timestamps produced for a device that is known to be a ‘good device’. By ‘good device’ it is meant that the device operates in accordance with device specifications.
- For the purposes of discussion herein, an analog signal S(t) is defined as a signal having an amplitude s(t) that varies or takes on non-discrete values as a function of time. Preferably, the analog signal has a time-varying signal amplitude s(t) that can be described by a continuous function of time. More preferably, the time-varying signal amplitude s(t) can be described by a smooth, continuous function of time. The term ‘smooth’ as used herein with reference to a function of time means that at least a first derivative with respect to time of the function describing the time-varying signal amplitude s(t) exists and is defined for all time t greater than zero but less than a maximum time Tmax.
- In one aspect of the invention, a
method 100 of converting an analog signal S(t) into a digital representation, the digital representation comprising a sequence of timestamps, is provided. FIG. 1 illustrates a flow chart of the method of converting 100 of the present invention. Themethod 100 of converting comprisespreconditioning 110 the analog signal S(t).Preconditioning 110 transforms the analog signal S(t) into a preconditioned signal S′(t).Preconditioning 110 may include, but is not limited to, differentiation, integration, and filtering of the analog signal. For example, differentiation comprises determining a slope or equivalently, a first derivative of the analog signal S(t). Differentiation may be employed as thepreconditioning 110 to produce the preconditioned signal S′(t). - Furthermore,
preconditioning 110 may include non-constant or time-varyingpreconditioning 110. For example, a filter employed toprecondition 110 the analog signal S(t) may have characteristics that change as a function of time. As such, a lowpass or a highpass filter having a time-varying corner frequency or a bandpass filter having a time-varying center frequency may be used for time-varyingpreconditioning 110. One skilled in the art is familiar with a variety of types of signal preconditioning that may be applied toprecondition 110 the analog signal S(t), all of which are within the scope of the present invention. - The method of converting100 further comprises generating 120 a quantity N of reference signals Ri(t), where i=1, . . . , N and N is equal to or greater than one. The reference signals Ri(t) are different from one another. Preferably, each member of the quantity N of reference signals Ri(t) is different from other members thereof. Thus, an i-th reference signal Ri(t) is not equal to a j-th reference signal Rj(t) for all i≈j, where i,j=1, . . . , N. In some embodiments, the reference signals Ri(t) are time-varying reference signals. In particular, the time-varying reference signals Ri(t) include reference signals that vary in time such as, but not limited to, sinusoidal signals, and reference signals that vary both in time and in frequency such as, but not limited to, so called frequency ‘chirped’ time-varying signals and other such frequency modulated time-varying signals. The use of time-varying reference signals Ri(t) that include time/frequency-varying signals may facilitate a randomization of working-point dependent, non-ideal characteristics of a comparator used to compare the preconditioned signal to the reference signals Ri(t), for example.
- In other embodiments, the reference signals Ri(t) are not time-varying and may be represented as a fixed quantity Pi (i.e., Ri(t)=Pi, t>0 where Pi is a function having a fixed value). For simplicity of discussion hereinbelow and without loss of generality or scope, the non time-varying reference signal Pi and the time-varying reference signal Ri(t) are both represented herein as the ‘reference signal Ri(t)’.
- Thus, individually the reference signal Ri(t) of the quantity N of reference signals Ri(t) can be any signal having an amplitude that is either constant or that varies or takes on non-discrete values as a function of time in a manner that is known α priori. That is to say, the reference signal Ri(t) is a ‘known’ signal. Preferably, the i-th reference signal Ri(t) has a signal amplitude ri(t) that can be described by a waveform that is a continuous function of time. In general, the waveform may be constant, periodic or aperiodic. A periodic waveform is one in which the waveform repeats with a period T while an aperiodic waveform is non-repeating. In practice, either constant or periodic waveforms are preferred since constant waveforms and periodic waveforms typically are easier to generate 120 than aperiodic waveforms. More preferably, a waveform or waveforms are chosen that can be easily and inexpensively generated 120.
- In addition, although not required, preferably for time-varying reference signals Ri(t) the signal amplitudes ri(t) of the reference signals Ri(t) span an expected amplitude range of the preconditioned signal S′(t). Spanning the expected range helps to insure that the preconditioned signal S′(t) is adequately sampled by the reference signals Ri(t). The signal amplitudes ri(t) of the time-varying reference signals Ri(t) span an expected amplitude range of the preconditioned signal S′(t) if at least one of the reference signals Rp(t) has a minimum amplitude value rp(t)=rminp that is less than or equal to an expected minimum value smin′ of the amplitude s′(t) of the preconditioned signal S′(t) and at least one of the reference signals Rq(t) has a maximum amplitude value rq(t)=rmaxq that is greater than or equal to an expected maximum value smax′ of an amplitude s′(t) of the preconditioned signal S′(t).
- Examples of waveforms suitable for use in describing the reference signal Ri(t) include, but are not limited to, a constant value waveform, a sine wave, a sawtooth wave, a triangle wave, a chirp, a ramp, a square wave, a multi-level stepped wave, and a wave having a pseudo-random amplitude variation with respect to time. Generally, waveforms having either a zero slope, such as a constant value waveform, or a finite slope, such as a sine wave or a chirp waveform, are preferred since discontinuities in the slope or regions of non-finite slope can introduce ambiguities in the digital representation. Waveforms, such as the sawtooth wave, that do have one or more regions of non-finite slope can be used in conjunction with the present invention by removing timestamps associated with time intervals of the regions of non-finite slope. Time gating is one approach to removing timestamps generated during regions of non-finite slope in the reference signal Ri(t) waveform. One skilled in the art would readily identify other suitable waveforms for use in defining the reference signal Ri(t). All such reference signal Ri(t) waveforms and combinations thereof are within the scope of the present invention.
- The method of converting100 further comprises comparing 130 the preconditioned signal S′(t) to the reference signals Ri(t). Preferably, the preconditioned signal S′(t) is compared 130 to each reference signal Ri(t) in the quantity N of reference signals. During comparing 130, preferably the amplitude s′(t) of the preconditioned signal is compared to the amplitude ri(t) of each of the reference signal Ri(t) in the quantity N of reference signals. A determination is made as to whether the preconditioned signal amplitude s′(t) at a time of comparison tc is either greater than, less than, or equal to the amplitude ri(t) of a respective reference signal Ri(t).
- Comparing130 may be done either in parallel by simultaneously comparing 130 the preconditioned signal amplitude s′(t) to all N of the reference signal amplitudes ri(t) or by sequentially comparing 130′ the preconditioned signal amplitude s′(t) to a first reference signal amplitude r1(t) followed by comparing 130′ the preconditioned signal amplitude s′(t) to a second reference signal amplitude r2(t) and so on, until the preconditioned signal amplitude s′(t) has been compared to the N-th reference signal amplitude rN(t). In the case where the preconditioned signal S′(t) is a periodic signal, sequentially comparing 130′ may comprise comparing 130′ the preconditioned signal amplitude s′(t) to different ones of the reference signal amplitudes ri(t) during successive periods of the preconditioned signal S′(t).
- Preferably, comparing130, 130′ is performed continuously or nearly continuously with respect to time. In other words, a time difference between two adjacent times of comparison tc1, tc2 called a ‘comparison interval’ is preferably small and more preferably very small. Comparing 130, 130′ can be viewed as a conversion of the preconditioned analog signal S′(t) to a time representation where ‘time’ is the time of occurrence of a crossing or an equality event with respect to a reference signal Ri(t). The crossing or equality event occurs when the preconditioned analog signal S′(t) amplitude s′(t) crosses or is equal to the reference signal Ri(t) amplitude ri(t).
- The method of converting100 further comprises producing 140 a timestamp corresponding to the time of occurrence of a given reference signal Ri(t) and preconditioned signal S′(t) equality event. Thus, a timestamp is produced 140 when the amplitude s′(t) of the preconditioned signal S′(t) is observed to be equal to or to ‘cross’ the amplitudes ri(t) of the reference signals Ri(t), resulting in a sequence of timestamps. The sequence of timestamps can be represented as a set of N sequences of timestamps, the sequences having time values tk where k=1, . . . , K, and where K is greater than or equal to one. Since the reference signals Ri(t) are known a priori, the amplitude values ri(tk) are also known for all time values tk. Thus, the sequence of timestamps corresponds to a sequence of amplitude values s′(tk) of the preconditioned signal S′(t). Comparing 130 and producing 140 are repeated for time t less than the maximum time Tmax, and preferably for all time t. Essentially, producing 140 can be viewed as a conversion from a time representation to a digital representation.
- In a representative embodiment of the
method 100, producing 140′ timestamps introduces logic transitions in a quantity N of digital signals Di, where a relative timing of the logic transition represents the timestamps. A flow chart of the representative embodiment of producing 140′ of themethod 100 is illustrated in FIG. 2. Producing 140′ comprises establishing 142 a logic level in the digital signals Di, and preferably in each of the digital signals Di. In accordance with themethod 100, a digital signal Di is either a time-varying or a non time-varying signal having an amplitude di(t) that preferably can take on only one of two allowed logic states or levels at any given point in time t. During establishing 142, a first one of the logic levels is created 142 in the i-th digital signal Di when the preconditioned signal amplitude s′(t) is greater than the i-th reference signal amplitude ri(t). A second one of the logic levels is created 142 in the i-th digital signal Di when the preconditioned signal amplitude s′(t) is less than the i-th reference signal amplitude ri(t). - Note that, since the preconditioned signal amplitude s′(t) and i-th reference signal amplitude ri(t) are both described by continuous functions of time t, the amplitude di(t) of the i-th digital signal Di can likewise be described by a continuous function of time t. Moreover, if it is assumed that the preconditioned analog signal amplitude s′(t) at some times exceeds the i-th reference amplitude ri(t), while at other times it does not exceed the i-th reference amplitude ri(t), the i-th digital signal amplitude di(t) will spend a portion of the time t at the first logic level and another portion of the time t at the second logic level. Furthermore, the points in time t at which the i-th digital signal amplitude di(t) transitions between logic states will correspond to points in time t=tk when the preconditioned analog signal amplitude s′(t) either changes from being greater than to less than the i-th reference amplitude ri(t) or changes from being less than to greater than the i-th reference amplitude ri(t). Thus, as a result of the application of the method of converting 100 of the present invention, a logic transition is induced in the i-th digital signal Di at a time t=tk that corresponds to the time when the preconditioned signal amplitude s′(t) crosses the reference amplitude ri(t) (i.e., an i-th equality event). Thus, the transitions effectively serve as timestamps of the equality events.
- The producing140′ timestamps of the representative embodiment of
method 100 further optionally comprises measuring and creating 144 digital timestamps for the logic transitions in the i-th digital signal Di. Optionally measuring and creating 144 is illustrated as a box having a dashed-line border in FIG. 2. Optionally measuring and creating 144 measures the time of occurrence tk of a logic transition in the i-th digital signal Di and converts the time of occurrence tk of a transition in a format suitable for storing in a computer memory. The converted time of occurrence tk of a transition is a digital timestamp. Preferably, the conversion is a binary encoding of elapsed time based on a timing clock. Measuring and creating 144 is repeated for each logic transition in each of the digital signals Di. Optionally, additional information may be added to digital timestamps to distinguish timestamps of an i-th digital signal Di from those of a j-th digital signal Dj. - Referring back to FIG. 1, the
method 100 of converting optionally further comprises storing 150 the digital timestamps. Optionally storing 150 saves the timestamps for later processing. The timestamps can be optionally stored 150 in computer memory. Storing 150 is optional since the digital timestamps can be used immediately once they have been produced 140, 140′ instead of storing 150. Optionally storing 150 is illustrated as a box having a dashed-line border in FIG. 1. - Consider the example illustrated in FIG. 3 in which a single reference signal R(t) is employed (i.e., N=1) to analyze an analog signal S(t). For the purposes of the example, the analog signal S(t) (not illustrated) is preconditioned110 by an exemplary differentiation. Thus, the preconditioned signal S′(t) is the derivative of the analog signal S(t) for this example.
- Referring to FIG. 3, the reference signal R(t) is illustrated as a dashed-line sine wave and the preconditioned signal S′(t) is illustrated as a solid line wave. The amplitude s′(t) of the preconditioned signal S′(t) repeatedly exceeds and then is less than the amplitude r(t) of the reference signal R(t). Differentiation is used to
precondition 110 and a sine wave is used for the reference signal R(t) in the example illustrated in FIG. 3 for illustrative purposes only and are not intended to limit the scope of the present invention. - Furthermore for this example assume that, if during comparing130 it is determined that the preconditioned signal amplitude s′(t) is greater than the reference amplitude r(t), a logic ‘1’ (e.g. d(t)=1) will be produced 140′ in an output digital signal D. On the other hand, if it is determined during comparing 130 that the preconditioned signal amplitude s′(t) is less than the reference amplitude r(t), a logic ‘0’ (e.g. d(t)=0) will be produced 140′ in the output digital signal D. The results of the application of the method of converting 100 to the preconditioned signal amplitude s′(t) are illustrated in the lower half of FIG. 3 as digital signal D, which has a logic transition that occurs every time the preconditioned signal amplitude s′(t) crosses the reference amplitude r(t). The correspondence between the timing of transitions in the digital signal D and the points where the preconditioned signal amplitude s′(t) crosses the reference amplitude r(t) is indicated by the vertical ‘dashed’ lines in FIG. 3 for convenience of illustration.
- As would be readily recognized by one skilled in the art, the choice of which of the two logic values is used to indicate that the preconditioned signal amplitude s′(t) exceeds the reference amplitude r(t) is completely arbitrary according to the invention. The example illustrated in FIG. 3 could just as easily have used a logic ‘0’ to indicate that the preconditioned amplitude s′(t) was greater than reference amplitude r(t) and a logic ‘1’ to indicate that the preconditioned amplitude s′(t) was less than the reference amplitude r(t) and still be within the scope of the invention. Likewise, when the preconditioned signal amplitude s′(t) and the reference amplitude r(t) are equal, the effect on the logic state of the digital signal D can be defined arbitrarily to suit a particular application. For example, the case of equality can be arbitrarily defined to produce140′ one of the two logic states in the digital signal D. Alternatively, the case of equality can be left to have an undefined effect on the logic state of the digital signal D since often it can be assumed that amplitudes s′(t) and r(t) will not be equal for an extended period. One skilled in the art would readily be able to determine such a definition to suit a particular application. All such definitions are within the scope of the invention.
- The timestamps or timestamp sequence produced140, 140′ by
method 100 can be optionally stored 150 in computer memory for use at a later time or instead the timestamps can be used directly after they are produced 140, 140′. In particular, one use of the timestamps is to reconstruct the analog signal. Thus, themethod 100 of conversion optionally further comprises reconstructing 160 the preconditioned signal S′(t) and/or the analog signal S(t) from the timestamp representation. In optionally reconstructing 160, knowledge of the reference signals Ri(t) is used along with the produced 140, 140′ timestamps to reconstruct an analog representation of the preconditioned signal S′(t). Knowledge of the preconditioning may then be used to transform the reconstructed preconditioned signal S′(t) into a reconstructed version of the analog signal S(t). In particular, an inverse of the preconditioning transformation may be employed to transform the reconstructed preconditioned signal S′(t) into the reconstructed analog signal S(t). As discussed hereinabove, knowledge of the timestamps, the reference signals Ri(t), and the preconditioning provides unambiguous knowledge of the analog signal S(t) at the times represented in the timestamps. - As already mentioned above, the
method 100 of the present invention can be viewed as a method of analog-to-digital conversion that first converts the preconditioned signal S′(t) to a timestamp representation and then converts the timestamp representation to a digital signal representation. The time representation is the timing associated with an equality event in comparing 130. The digital representation in the representative embodiment of producing 140′ a timestamp is the quantity N of digital signals Di. The timestamp representation is encoded in the digital signals Di as the time of occurrence of the produced 140′ logic transitions. As an analog-to-digital conversion, the results of themethod 100 may contain enough information to reconstruct the analog signal from the digital representation provided the sampling is performed with ‘sufficient’ resolution. One skilled in the art would readily be able to determine a sufficient resolution for reconstructing a given signal, such as that based on a Nyquist Criteria, without undue experimentation. Nyquist Criteria are well known to those skilled in the art. Alternatively, the analog-to-digital conversion of themethod 100 of the present invention can be used to perform pass/fail testing and/or related analog characteristic analysis of a DUT based on device specification or to perform signature analysis of an analog signal in a DUT. - In another aspect of the invention, an analog-to-
digital conversion apparatus 200 is provided. Theconversion apparatus 200 accepts an analog signal S(t), preconditions the analog signal S(t) to produce a preconditioned signal S′(t), and converts the preconditioned signal S′(t) into the quantity N of digital signals Di, where i=1, . . . , N and N is greater than or equal to 1. A block diagram of theconversion apparatus 200 according to an embodiment of the present invention is illustrated in FIG. 4A. A block diagram of theconversion apparatus 200′ according to another embodiment of the present invention is illustrated in FIG. 4B. - Referring to FIG. 4A, the
conversion apparatus 200 comprises a quantity N of means for comparing 210 i. i=1. . . N. The means for comparing 2101 may be a type ofcomparator 210 i, for example. Each of thecomparators 210 i has a first input, a second input and an output. In an alternate embodiment (not illustrated), the means for comparing is aSchmitt Trigger 210′i. The comparing means 210 i is generally referred to hereinafter without limitation, as a ‘comparator’. The first input of thecomparator 210 i is labeled ‘+’ and the second input is labeled ‘−’. Thecomparator 210 i is a device known in the art that compares the amplitudes of signals on its inputs and produces an output signal on its output, the level of the output signal being determined by relative values of the signals on the inputs. By convention and as used herein, but not by way of limitation, if a signal amplitude applied to the first input ‘+’ is larger than a signal amplitude applied to the second ‘−’ input, the output of the comparator is ‘high’. - For example, an operational amplifier can be used as a
comparator 210 i for theapparatus 200 of the invention. An operational amplifier is a device that produces an output voltage that is the amplified difference between a voltage applied to a first input terminal and a voltage applied to a second input terminal. Typical operational amplifiers have very large scale or gain factors that multiply or exaggerate the difference. Thus, if a voltage V1 is applied to the first terminal of an operational amplifier and a second voltage V2 that is less than V1 is applied to the second terminal, the output will be a large value Vout=G·(V1-V2), where G is an open loop gain of the operational amplifier. Generally, the value Vout will be observed to swing between two voltages determined by the power supply voltages applied to the operational amplifier for very small differences in the voltages V1 and V2. This is exactly what is desired for thequantity N comparators 210 i of the invention. If the voltage V1 is related to the signal amplitude s(t) and the voltage V2 is related to one of the reference signal amplitudes ri(t), then the operational amplifier will provide the desired comparator function for theapparatus 200. One skilled in the art will readily recognize that there are other suitable approaches for implementing thequantity N comparators 210 i. All such suitable approaches are within the scope of the present invention. - The
apparatus 200 further comprises areference signal source 220 having N outputs. Thereference signal source 220 generates a quantity N of reference signals Ri(t). A reference signal of the quantity is generated at an output of the N outputs. When N>1, the quantity N of reference signals are different from one another and produced at different outputs. A first reference signal R1(t) generated by thereference source 220 is applied to the second input of a respectivefirst comparator 210 1. A second reference single R2(t) is applied to the second input of a respectivesecond comparator 210 2, and so on, until an N-th reference signal RN(t) is applied to a second input of a respective N-th comparator 210 N. - The
conversion apparatus 200 further comprises apreconditioner 230 between an input of theapparatus 200 and the respective first inputs of thecomparators 210 i. Thepreconditioner 230 may comprise any preconditioning circuit or means for preconditioning known in the art. Preconditioner circuits known in the art include, but are not limited to, an integrator, a differentiator, and a filter. In some embodiments (not illustrated), thepreconditioner 230 may be replaced by a plurality ofpreconditioners 230 i, a different one thepreconditioners 230 i for each of thecomparators 210 i. In particular, each of thepreconditioners 230 i may provide a different preconditioning of the analog signal S(t). Thus, afirst preconditioner 230 1 of the plurality ofpresconditioners 230 i may be an integrator while asecond preconditioner 230 2 of the plurality ofpresconditioners 230 i may be a differentiator, and so on. Therefore, it is within the scope of the present invention to use asingle preconditioner 230 connected to the first inputs of the quantity N comparators or to use more than one preconditioner 230, which may be the same type or different types of preconditioners. When more than one preconditioner 230 is used, eachpreconditioner 230 is connected to one or more of the first inputs of respective one ormore comparators 210 i. - Referring again to FIG. 4A, the analog signal S(t) is applied to the
preconditioner 230. Thepreconditioner 230 transforms the analog signal S(t) into a preconditioned signal S′(t). The preconditioned signal S′(t) is then applied to the first input of thecomparators 210 i, and preferably to each of thecomparators 210 i. An output signal generated by the first comparator 2101 is a respective first digital signal D1. An output signal generated by thesecond comparator 210 2 is a respective second digital D2, and so on, until an output signal generated by the N-th comparator 210 N is a respective N-th digital signal DN. The digital signal Di comprises a digital representation or format of the preconditioned signal S′(t). Theapparatus 200 essentially implements themethod 100 described hereinabove. - Referring to the alternate embodiment of the
conversion apparatus 200′ illustrated in FIG. 4B, theconversion apparatus 200′ comprises onecomparator 210, having a first input, a second input and an output. A Schmitt Trigger (not illustrated) may be used in place of thecomparator 210. Theconversion apparatus 200′ further comprises areference signal source 220′ having an output. Thereference signal source 220′ output is connected to the second input of thecomparator 210. Theconversion apparatus 200′ further comprises apreconditioner 230 between an input of theapparatus 200′ and the first input of thecomparator 210. - An analog signal S(t) is applied to the input of the
apparatus 200′. Thepreconditioner 230 transforms the applied analog signal S(t) into a preconditioned signal S′(t). The preconditioned signal S′(t) is then applied to the first input of thecomparator 210. Thereference signal source 220′ sequentially generates a quantity of N reference signals Ri(t). The arrow labeled ‘Ri(t)’ in FIG. 4B indicates the sequence of reference signals Ri(t). Each sequentially generated reference signal Ri(t) is generated and output by thereference signal source 220′ for a separate, finite period of time tg. - Thus for example, the first reference signal R1(t) is generated by the
reference signal source 220′ and compared to the preconditioned signal S′(t) by thecomparator 210 for a respective first period of time. Then the second reference signal R2(t) is generated by thereference signal source 220′ and compared to the preconditioned signal S′(t) by thecomparator 210 for a respective second period of time, and so on until the N-th reference signal RN(t) is generated and compared. The period of time tg that each of the reference signals Ri(t) is generated by thereference signal source 220′ may be, for example, a different period of the preconditioned analog signal S′(t). The output of thecomparator 210 is a digital signal representation D′ of the preconditioned signal S′(t). The digital signal representation D′ is indicated by the arrow labeled D′ at the comparator output in FIG. 4B. The digital signal representation D′ of this alternate embodiment comprises a sequence of digital signal segments Di′, wherein transitions within each segment are timestamps of equality events for a corresponding reference signal Ri(t) comparison. - In yet another aspect of the invention, a
system 300 for converting an analog signal S(t) is provided. Such a system may be used to convert an analog output signal from a device under test (DUT) or from another source. FIG. 5 illustrates a block diagram of an embodiment of theconversion system 300 of the present invention. Thesystem 300 comprises an analog-to-digital conversion apparatus 200 of the present invention that receives the analog input signal S(t). Theconversion apparatus 200 preconditions the analog signal S(t) to produce a preconditioned signal S′(t). Theconversion apparatus 200 converts the preconditioned signal S′(t) into a quantity N of digital signals Di, where i=1, . . . , N and N is greater than or equal to 1. As noted hereinabove, the conversion performed by theapparatus 200 essentially encodes the timing of certain predefined amplitude events in the preconditioned signal S′(t) as transitions in the digital signals Di. In other words, the digital signals Di comprise a sequence of timestamps of the predefined amplitude events. - Referring again to FIG. 5, the
system 300 further comprises a quantity N of transition interval analyzers (TIA) 310 i. A TIA 310 i receives a respective digital signal Di produced by theconversion apparatus 300. The TIA 310 i is a device known in the art that measures the time of occurrence of logic transitions in the digital signals Di. Further, TIAs 310 i are well known in the art of testing DUTs. - The
system 300 optionally further comprises atest equipment 320. Theoptional test equipment 320 is illustrated as a dashed-line box in FIG. 5 for that reason. Theoptional test equipment 320 may be, for example, an automated test equipment (ATE) system or another test system. Thetest equipment 320 has one or more ports that are connected to respective outputs of the quantity N TIAs 310 i. The TIAs 310 i generates a sequence of digital words that encode the timing of the transitions in the respective digital signals Di. Theoptional test equipment 320 comprises an optional memory for storing the timestamps and an optional test algorithm for analyzing the timestamps. For example, theoptional test equipment 320 might use the encoded timing information of the timestamps to recognize and analyze events in the preconditioned signal S′(t). By extension, knowledge of the preconditioning may be employed by theoptional test equipment 320 to recognize and analyze events in the analog signal S(t) using the timestamps for the preconditioned signal S′(t). - In one example application of the
system 300, the analysis may be used to determine if a DUT meets a specification associated with the events encoded by the digital signals Di. In general, thetest equipment 320 stores the timestamps in memory and compares the timestamps using a test algorithm to expected timestamps or other timing information. The comparison performed by the ATE 320 with the test algorithm can then be used, for example, to assess the ‘pass/fail’ condition of the DUT based on specification for the DUT or to perform signature analysis using expected timestamps produced from a known good device. One skilled in the art would readily be able to choose and configure a TIA 310 i for a given ATE 320 and develop a test algorithm that would be suitable for thetesting system 300 of the present invention without undue experimentation. - The
system 300 excluding theoptional test equipment 320 may be implemented as a stand-alone element. For example, thesystem 300 can be implemented as a DUT test board that interfaces a DUT to an external ATE system. Thesystem 300 may be integrated into a DUT as part of the ‘on board’ test circuitry of the DUT. Further, thesystem 300 may be integrated into an ATE. In a representative embodiment, thesystem 300 is preferably integrated into a device (e.g. DUT) as part of the device's built-in test circuitry. More preferably, only theconversion apparatus 200 is built into the device. When only theconversion apparatus 200 is built-in, the TIAs 310 i andoptional test equipment 320 including the optional memory/algorithms are typically part of an external test system used to test the device, such as an ATE. In other words, theconversion apparatus 200 may be implemented either ‘off-chip’ or preferably ‘on-chip’ with respect to the device. An alternate embodiment of thesystem 300′ (not illustrated) comprises all of the elements of thesystem 300 except for theconversion apparatus 200 which is replaced by theconversion apparatus 200′ in thesystem 300′. For this alternate embodiment, thesystem 300′ comprises a single TIA 310 to receive the digital signal representation D′ from thesingle comparator 210. - Thus, there has been described a novel method of analog-to-digital conversion with signal preconditioning using reference signals to generate a timestamp representation. In addition, a conversion apparatus for converting an analog signal to a digital representation and a system for converting and testing an analog signal are described. It should be understood that the above-described embodiments are merely illustrative of some of the many specific embodiments that represent the principles of the present invention. Those skilled in the art can readily devise numerous other arrangements without departing from the scope of the present invention.
Claims (33)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/269,706 US6717540B1 (en) | 2002-10-10 | 2002-10-10 | Signal preconditioning for analog-to-digital conversion with timestamps |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/269,706 US6717540B1 (en) | 2002-10-10 | 2002-10-10 | Signal preconditioning for analog-to-digital conversion with timestamps |
Publications (2)
Publication Number | Publication Date |
---|---|
US6717540B1 US6717540B1 (en) | 2004-04-06 |
US20040070529A1 true US20040070529A1 (en) | 2004-04-15 |
Family
ID=32030394
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US10/269,706 Expired - Lifetime US6717540B1 (en) | 2002-10-10 | 2002-10-10 | Signal preconditioning for analog-to-digital conversion with timestamps |
Country Status (1)
Country | Link |
---|---|
US (1) | US6717540B1 (en) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20060291329A1 (en) * | 2003-03-26 | 2006-12-28 | James Martin | Processing seismic data representative of the acceleration wavefiled |
US20100289551A1 (en) * | 2007-06-07 | 2010-11-18 | Abb Technology Ag | Increased reliability in the processing of digital signals |
US8754797B2 (en) * | 2012-08-30 | 2014-06-17 | Texas Instruments Incorporated | Asynchronous analog-to-digital converter having rate control |
RU2637479C1 (en) * | 2016-11-16 | 2017-12-04 | Леонид Иванович Ананьев | Analog-to-digital transformer with time registration |
JP2019519776A (en) * | 2016-06-10 | 2019-07-11 | オネラ(オフィス ナシオナル デチュドゥ エ ドゥ ルシェルシュ アエロスパシアル) | System and method for providing sinusoidal signal amplitude and phase delay |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2006063192A1 (en) * | 2004-12-07 | 2006-06-15 | The Trustees Of Columbia University In The City Of New York | Systems and methods for continuous-time digital modulation |
JP2006304035A (en) * | 2005-04-22 | 2006-11-02 | Agilent Technol Inc | Analog-digital converting method and system thereof |
US7579969B2 (en) * | 2005-10-19 | 2009-08-25 | The Trustees Of Columbia University In The City Of New York | Systems and methods for creating and using a conditioning signal |
US7876251B2 (en) * | 2008-10-22 | 2011-01-25 | Siemens Medical Solutions Usa, Inc. | System for processing patient monitoring signals |
US20110054827A1 (en) * | 2009-08-26 | 2011-03-03 | Advantest Corporation, a Japanese Corporation | Test apparatus and method for modulated signal |
US8891713B2 (en) | 2011-04-06 | 2014-11-18 | Siemens Medical Solutions Usa, Inc. | System for adaptive sampled medical signal interpolative reconstruction for use in patient monitoring |
US8760329B2 (en) * | 2012-08-30 | 2014-06-24 | Texas Instruments Incorporated | Asynchronous analog-to-digital converter |
US8830106B2 (en) * | 2012-08-30 | 2014-09-09 | Texas Instruments Incorporated | Asynchronous analog-to-digital converter having adapative reference control |
Citations (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4093866A (en) * | 1976-04-05 | 1978-06-06 | Greenwood Mills, Inc. | Diffraction pattern amplitude analysis for use in fabric inspection |
US4232302A (en) * | 1978-08-24 | 1980-11-04 | Ohio Nuclear, Inc. | Video speed logarithmic analog-to digital converter |
US4417233A (en) * | 1979-02-28 | 1983-11-22 | Matsushita Electric Industrial Co., Ltd. | Fully parallel threshold type analog-to-digital converter |
US4774498A (en) * | 1987-03-09 | 1988-09-27 | Tektronix, Inc. | Analog-to-digital converter with error checking and correction circuits |
US4990917A (en) * | 1988-03-08 | 1991-02-05 | Yamaha Corporation | Parallel analog-to-digital converter |
US5519437A (en) * | 1992-05-11 | 1996-05-21 | Regam Medical Ab | Method for compensation of dark current of CCD-sensor in dental x-raying |
US5790061A (en) * | 1995-02-24 | 1998-08-04 | Nec Corporation | Adaptive A/D converting device for adaptively converting and input analog signal into an output digital signal having a constant quantizing error |
US5877715A (en) * | 1997-06-12 | 1999-03-02 | International Business Machines Corporation | Correlated double sampling with up/down counter |
US5920274A (en) * | 1997-08-05 | 1999-07-06 | International Business Machines Corporation | Image sensor employing non-uniform A/D conversion |
US6078444A (en) * | 1995-05-12 | 2000-06-20 | Cirrus Logic, Inc. | Read channel auxiliary high precision data conversion |
US6429799B1 (en) * | 2001-07-14 | 2002-08-06 | Agilent Technologies, Inc. | Method and apparatus for analog to digital conversion using time-varying reference signal |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6281828B1 (en) | 1998-03-19 | 2001-08-28 | Kabushiki Kaisha Toshiba | Analog/digital converter apparatus |
-
2002
- 2002-10-10 US US10/269,706 patent/US6717540B1/en not_active Expired - Lifetime
Patent Citations (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4093866A (en) * | 1976-04-05 | 1978-06-06 | Greenwood Mills, Inc. | Diffraction pattern amplitude analysis for use in fabric inspection |
US4232302A (en) * | 1978-08-24 | 1980-11-04 | Ohio Nuclear, Inc. | Video speed logarithmic analog-to digital converter |
US4417233A (en) * | 1979-02-28 | 1983-11-22 | Matsushita Electric Industrial Co., Ltd. | Fully parallel threshold type analog-to-digital converter |
US4774498A (en) * | 1987-03-09 | 1988-09-27 | Tektronix, Inc. | Analog-to-digital converter with error checking and correction circuits |
US4990917A (en) * | 1988-03-08 | 1991-02-05 | Yamaha Corporation | Parallel analog-to-digital converter |
US5519437A (en) * | 1992-05-11 | 1996-05-21 | Regam Medical Ab | Method for compensation of dark current of CCD-sensor in dental x-raying |
US5790061A (en) * | 1995-02-24 | 1998-08-04 | Nec Corporation | Adaptive A/D converting device for adaptively converting and input analog signal into an output digital signal having a constant quantizing error |
US6078444A (en) * | 1995-05-12 | 2000-06-20 | Cirrus Logic, Inc. | Read channel auxiliary high precision data conversion |
US5877715A (en) * | 1997-06-12 | 1999-03-02 | International Business Machines Corporation | Correlated double sampling with up/down counter |
US5920274A (en) * | 1997-08-05 | 1999-07-06 | International Business Machines Corporation | Image sensor employing non-uniform A/D conversion |
US6429799B1 (en) * | 2001-07-14 | 2002-08-06 | Agilent Technologies, Inc. | Method and apparatus for analog to digital conversion using time-varying reference signal |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20060291329A1 (en) * | 2003-03-26 | 2006-12-28 | James Martin | Processing seismic data representative of the acceleration wavefiled |
US7778110B2 (en) * | 2003-03-26 | 2010-08-17 | Westerngeco L.L.C. | Processing seismic data representative of the acceleration wavefield |
US20100289551A1 (en) * | 2007-06-07 | 2010-11-18 | Abb Technology Ag | Increased reliability in the processing of digital signals |
US8738331B2 (en) * | 2007-06-07 | 2014-05-27 | Abb Technology Ag | Increased reliability in the processing of digital signals |
US8754797B2 (en) * | 2012-08-30 | 2014-06-17 | Texas Instruments Incorporated | Asynchronous analog-to-digital converter having rate control |
JP2019519776A (en) * | 2016-06-10 | 2019-07-11 | オネラ(オフィス ナシオナル デチュドゥ エ ドゥ ルシェルシュ アエロスパシアル) | System and method for providing sinusoidal signal amplitude and phase delay |
US11307230B2 (en) | 2016-06-10 | 2022-04-19 | Office National D'etudes Et De Recherches Aérospatiales | System and method for providing the amplitude and phase delay of a sinusoidal signal |
RU2637479C1 (en) * | 2016-11-16 | 2017-12-04 | Леонид Иванович Ананьев | Analog-to-digital transformer with time registration |
Also Published As
Publication number | Publication date |
---|---|
US6717540B1 (en) | 2004-04-06 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US6717540B1 (en) | Signal preconditioning for analog-to-digital conversion with timestamps | |
US7248200B2 (en) | Analog to digital conversion method using track/hold circuit and time interval analyzer, and an apparatus using the method | |
US6931579B2 (en) | Integrated excitation/extraction system for test and measurement | |
US6429799B1 (en) | Method and apparatus for analog to digital conversion using time-varying reference signal | |
US5854598A (en) | Method of testing an analog-to-digital converter | |
JP3960858B2 (en) | Analog / digital signal conversion method | |
KR101011618B1 (en) | Undersampling of a repetitive signal for measuring transistion times to reconstruct an analog waveform | |
CN109831207B (en) | Multi-site testing method integrating SAR ADC and SD ADC | |
Jin et al. | Linearity testing of precision analog-to-digital converters using stationary nonlinear inputs | |
Hafed et al. | A stand-alone integrated excitation/extraction system for analog BIST applications | |
Max | Testing high speed high accuracy analog to digital converters embedded in systems on a chip | |
Linnenbrink et al. | ADC testing | |
Linnenbrink et al. | ADC testing with IEEE Std 1241-2000 | |
US6339389B1 (en) | Method of testing analog to digital converters | |
Leger et al. | Digital test for the extraction of integrator leakage in first-and second-order ΣΔ modulators | |
Balestrieri et al. | Research trends and challenges on DAC testing | |
US20030220758A1 (en) | Method for testing an AD-converter | |
US11901919B2 (en) | On chip test architecture for continuous time delta sigma analog-to-digital converter | |
Balestrieri et al. | DAC testing: recent research directions | |
Souloumiac | A Blind Reconstruction Algorithm for Level-Crossing Analog-to-Digital Conversion | |
Kim et al. | Efficient BIST scheme for A/D converters | |
Georgopoulos et al. | Review of test strategies and resources used in high-resolution interface testing | |
Carnì et al. | Comparative analysis of different acquisition techniques applied to static and dynamic characterization of high resolution DAC | |
KR100489144B1 (en) | Analog-to-digital converter test method and integrated circuit | |
Sokolović et al. | TESTING AND DIAGNOSTICS OF ADC FOR AN INTEGRATED POWER METER |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AS | Assignment |
Owner name: AGILENT TECHNOLOGIES, INC., COLORADO Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:KAMAS, LINDA A.;RIVOIR, JOCHEN;REEL/FRAME:013274/0694;SIGNING DATES FROM 20021023 TO 20021107 |
|
STCF | Information on status: patent grant |
Free format text: PATENTED CASE |
|
REMI | Maintenance fee reminder mailed | ||
AS | Assignment |
Owner name: VERIGY (SINGAPORE) PTE. LTD., SINGAPORE Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:AGILENT TECHNOLOGIES, INC.;REEL/FRAME:019990/0760 Effective date: 20070405 |
|
FPAY | Fee payment |
Year of fee payment: 4 |
|
SULP | Surcharge for late payment | ||
FEPP | Fee payment procedure |
Free format text: PAYOR NUMBER ASSIGNED (ORIGINAL EVENT CODE: ASPN); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY |
|
FPAY | Fee payment |
Year of fee payment: 8 |
|
AS | Assignment |
Owner name: ADVANTEST (SINGAPORE) PTE LTD, SINGAPORE Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:VERIGY (SINGAPORE) PTE LTD;REEL/FRAME:027896/0018 Effective date: 20120302 |
|
AS | Assignment |
Owner name: ADVANTEST CORPORATION, JAPAN Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:ADVANTEST (SINGAPORE) PTE. LTD.;REEL/FRAME:035371/0265 Effective date: 20150401 |
|
AS | Assignment |
Owner name: ADVANTEST CORPORATION, JAPAN Free format text: CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE ADDRESS PREVIOUSLY RECORDED AT REEL: 035371 FRAME: 0265. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT;ASSIGNOR:ADVANTEST (SINGAPORE) PTE. LTD.;REEL/FRAME:035425/0768 Effective date: 20150401 |
|
FPAY | Fee payment |
Year of fee payment: 12 |
|
AS | Assignment |
Owner name: ADVANTEST CORPORATION, JAPAN Free format text: CHANGE OF ADDRESS;ASSIGNOR:ADVANTEST CORPORATION;REEL/FRAME:047987/0626 Effective date: 20181112 |