US20030074789A1 - Modified pad for copper/low-k - Google Patents

Modified pad for copper/low-k Download PDF

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Publication number
US20030074789A1
US20030074789A1 US09/777,302 US77730201A US2003074789A1 US 20030074789 A1 US20030074789 A1 US 20030074789A1 US 77730201 A US77730201 A US 77730201A US 2003074789 A1 US2003074789 A1 US 2003074789A1
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Prior art keywords
layer
bonding pad
top metal
etch stop
metal layer
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US6560862B1 (en
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Sheng-Hsiung Chen
Shun Chen
Hungtse Lin
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Definitions

  • the present invention relates generally to semiconductor devices and more specifically to methods of fabricating improved bonding pads.
  • Low-k materials have poor mechanical strength and cause serious concerns in conjunction with wire bonding to wire bonding pads. Also, the low-k material exhibits some problems of low adhesion and bad heat transport. These problems are most significant on the top, or upper wire bonding pad, which is susceptible to the highest stress during wire bonding compared to lower, or underlying layers.
  • U.S. Pat. No. 5,783,868 to Galloway describes the fabrication and use of a bonding pad extension for the purposes of burn-in testing.
  • the extension is used only for connections during such testing and is preferably formed to be easily removed after the burn-in testing.
  • U.S. Pat. No. 6,028,367 to Yu describes a bond pad structure equipped with a heat dissipating ring surrounding the pad and a method to fabricate the structure.
  • U.S. Pat. No. 5,942,800 to Yiu et al. describes a chess-board patterned bond pad structure with stress buffered characteristics and a method to fabricate the structure.
  • U.S. Pat. No. 5,874,356 to Chen et al. describes a method for forming a zig-zag bordered opening in a semiconductor structure such that the film stress in a barrier/glue layer of TiN is reduced to eliminate volcano defects that cause delamination or peeling-off of the TiN layer.
  • U.S. Pat. No. 6,025,277 to Chen et al. describes a bond pad structure where a hole is etched that is wider in an lower, first insulating layer than in an upper, second insulating layer.
  • Another object of the present invention is to provide a method to fabricate a bonding pad structure having a wire bond affixed to a planar dielectric area without causing dielectric cracking or peeling, and a method to fabricate same.
  • a substrate having a top metal layer and a passivation layer overlying the top metal layer is provided.
  • the top metal layer being electrically connected to a lower metal layer by at least one metal via within a metal via area.
  • the substrate includes a low-k dielectric layer at least between the lower metal layer and the top metal layer.
  • the passivation layer is etched within the metal via area to form a trench exposing at least a portion of the top metal layer.
  • a patterned, extended bonding pad is formed over the etched passivation layer and lining the trench. The extended bonding pad having a portion that extends over a peripheral planar area of the substrate adjacent the trench not within the metal via area.
  • a wire bond is bonded to the extended bonding pad at the peripheral planar area portion to form the bonding pad structure.
  • FIGS. 1 to 4 illustrate a preferred embodiment of the present invention.
  • FIG. 5A is a graph illustrating ball shear (mg/cm 2 ) for a conventional bonding pad structure.
  • FIG. 5B is a graph illustrating ball shear (mg/cm 2 ) for a bonding pad structure fabricated in accordance with a preferred embodiment of the present invention.
  • the inventors discovered that when a metal bonding pad comprised of, for example copper (Cu), was formed over an underlying low-k material layer, and a wire was bonded to the copper bonding pad, there was a relatively high probability that either the copper wire bonding pad, either peeled apart from the low-k material and/or the low-k material cracked. In either situation, the chip may fail and the failure site was found most often on the low-k material/metal bonding pad interface. Poor mechanical strength and poor adhesion of the low-k material to either SiN or Cu was determined to be the root cause.
  • Cu copper
  • the inventors studied wire bond failures on SiLK (low-k) packaging samples and identified the root cause as failure of the low-k/copper interface at the bottom of the metal vias.
  • the inventors have discovered that by extending the pad area (bonding pad) to the peripheral planar area that does not have the metal via underneath has increased mechanical strength, and affixing the wire bond to that peripheral planar area, low-k dielectric layer cracking and/or peeling of the bonding pad from the low-k dielectric layer is eliminated.
  • FIG. 1 is a simplified illustration of structure 10 including substrate or die 12 with a top metal layer 14 that is preferably comprised of copper (Cu). Top Cu layer 14 is electrically connected to lower metal layer 16 , for example, by metal vias 18 . Substrate/die 12 includes low-k dielectric, or inter-metal dielectric (IMD), layer 20 between lower metal layer 16 and top Cu layer 14 , and surrounding metal vias 18 .
  • IMD inter-metal dielectric
  • Etch stop layer 22 overlies substrate/die 12 and is preferably comprised of either SiON or Si 3 N 4 , (SiN).
  • SiO 2 (oxide) layer 24 overlies etch stop layer 22 and is preferably from about 3800 to 4200 ⁇ thick, and is more preferably about 4000 ⁇ thick.
  • Passivation layer 26 overlies oxide layer 24 , is preferably comprised of SiN and is preferably from about 6600 to 7400 521 thick, and is more preferably about 7000 ⁇ thick.
  • SiN passivation layer 26 , oxide layer 24 , and etch stop layer 22 are then etched to form bonding pad trench 28 .
  • barrier layer 30 is formed over the etched SiN passivation layer 26 , lining bonding pad trench 28 .
  • Barrier layer 30 is preferably comprised of titanium nitride (TiN).
  • Metal bonding pad layer 32 is then formed over TiN barrier layer 30 .
  • Metal bonding pad layer 32 is preferably formed of an aluminum copper alloy (AlCu).
  • patterned masking layer 34 is formed over AlCu bonding pad layer 34 (and TiN barrier layer 30 ) to additionally mask a portion of AlCu bonding pad layer 34 that overlies a peripheral planar area 36 over substrate/die 12 that does not have the metal vias 18 thereunder.
  • Masking layer 34 may be comprised of, for example, photoresist as shown in FIG. 3.
  • AlCu bonding pad layer 32 and TiN barrier layer 30 are etched, using patterned masking layer 34 as a mask, to form extended, permanent, AlCu bonding pad 32 ′ with underlying extended, permanent, TiN barrier layer 30 ′.
  • Extended AlCu bonding pad 32 ′, with underlying extended TiN barrier layer 30 ′, extend over peripheral planar area 36 of substrate/die 12 that does not have the metal vias 18 thereunder.
  • Patterned masking layer 34 is then removed and the structure 10 may be cleaned and tested, as necessary.
  • Wire bond 40 including wire 42 that is preferably comprised of gold (Au), is permanently attached/affixed to extended AlCu bonding pad 32 ′ at peripheral planar area 36 over substrate/die 12 that does not have the metal vias 18 thereunder.
  • the inventors have determined that such a wire bond 40 arrangement does not cause cracking of low-k dielectric layer 20 , or peeling of: (1) AlCu bonding pad 32 ′ with underlying extended TiN barrier layer 30 ′; and/or (2) SiON/SiN etch stop layer 22 from low-k dielectric layer 20 .
  • the wire bonding will fail at the via bottom ( 18 ) due to low mechanical properties and bad heat transport.
  • a conventional bonding pad structure would not include permanent extended AlCu bonding pad 32 ′ over peripheral planar area 36 , and would instead affix wire bond 40 to portion 50 of non-extended AlCu bonding pad over metal vias 18 .
  • the inventors have determined that such a conventional bonding pad structure is highly susceptible to cracking of the low-k dielectric layer, and/or peeling of: the bonding pad; and/or the etch stop layer from the low-k dielectric layer.
  • the ball shear for the bonding pad structure fabricated in accordance with the present invention (FIG. 5B) is improved from the ball shear for a conventional bonding pad structure (FIG. 5A). That is, the conventional bonding pad structure has a wire bond shear of about 22 mg/cm 2 while the wire bond 40 shear for the bonding pad structure of FIG. 4 made in accordance with the method of the present invention has a ball shear of greater than about 30 mg/cm 2 .

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Abstract

A method to fabricate a bonding pad structure including the following steps. A substrate having a top metal layer and a passivation layer overlying the top metal layer is provided. The top metal layer being electrically connected to a lower metal layer by at least one metal via within a metal via area. The substrate includes a low-k dielectric layer at least between the lower metal layer and the top metal layer. The passivation layer is etched within the metal via area to form a trench exposing at least a portion of the top metal layer. A patterned, extended bonding pad is formed over the etched passivation layer and lining the trench. The extended bonding pad having a portion that extends over a peripheral planar area of the substrate adjacent the trench not within the metal via area. A wire bond is bonded to the extended bonding pad at the peripheral planar area portion to form the bonding pad structure.

Description

    FIELD OF THE INVENTION
  • The present invention relates generally to semiconductor devices and more specifically to methods of fabricating improved bonding pads. [0001]
    • BACKGROUND OF THE INVENTION
  • Low-k materials have poor mechanical strength and cause serious concerns in conjunction with wire bonding to wire bonding pads. Also, the low-k material exhibits some problems of low adhesion and bad heat transport. These problems are most significant on the top, or upper wire bonding pad, which is susceptible to the highest stress during wire bonding compared to lower, or underlying layers. [0002]
  • U.S. Pat. No. 5,783,868 to Galloway describes the fabrication and use of a bonding pad extension for the purposes of burn-in testing. The extension is used only for connections during such testing and is preferably formed to be easily removed after the burn-in testing. [0003]
  • U.S. Pat. No. 6,028,367 to Yu describes a bond pad structure equipped with a heat dissipating ring surrounding the pad and a method to fabricate the structure. [0004]
  • U.S. Pat. No. 5,942,800 to Yiu et al. describes a chess-board patterned bond pad structure with stress buffered characteristics and a method to fabricate the structure. [0005]
  • U.S. Pat. No. 5,923,088 to Shiue et al. describes a bond pad structure with plugs underneath to prevent peeling and a method to fabricate the structure. [0006]
  • U.S. Pat. No. 5,874,356 to Chen et al. describes a method for forming a zig-zag bordered opening in a semiconductor structure such that the film stress in a barrier/glue layer of TiN is reduced to eliminate volcano defects that cause delamination or peeling-off of the TiN layer. [0007]
  • U.S. Pat. No. 6,025,277 to Chen et al. describes a bond pad structure where a hole is etched that is wider in an lower, first insulating layer than in an upper, second insulating layer. [0008]
    • SUMMARY OF THE INVENTION
  • Accordingly, it is an object of the present invention to provide a bonding pad structure having a wire bond affixed to a planar dielectric area having a stronger mechanical strength, and a method to fabricate same. [0009]
  • Another object of the present invention is to provide a method to fabricate a bonding pad structure having a wire bond affixed to a planar dielectric area without causing dielectric cracking or peeling, and a method to fabricate same. [0010]
  • Other objects will appear hereinafter. [0011]
  • It has now been discovered that the above and other objects of the present invention may be accomplished in the following manner. Specifically, a substrate having a top metal layer and a passivation layer overlying the top metal layer is provided. The top metal layer being electrically connected to a lower metal layer by at least one metal via within a metal via area. The substrate includes a low-k dielectric layer at least between the lower metal layer and the top metal layer. The passivation layer is etched within the metal via area to form a trench exposing at least a portion of the top metal layer. A patterned, extended bonding pad is formed over the etched passivation layer and lining the trench. The extended bonding pad having a portion that extends over a peripheral planar area of the substrate adjacent the trench not within the metal via area. A wire bond is bonded to the extended bonding pad at the peripheral planar area portion to form the bonding pad structure. [0012]
    • BRIEF DESCRIPTION OF THE DRAWINGS
  • The present invention will be more clearly understood from the following description taken in conjunction with the accompanying drawings in which like reference numerals designate similar or corresponding elements, regions and portions and in which: [0013]
  • FIGS. [0014] 1 to 4 illustrate a preferred embodiment of the present invention.
  • FIG. 5A is a graph illustrating ball shear (mg/cm[0015] 2) for a conventional bonding pad structure.
  • FIG. 5B is a graph illustrating ball shear (mg/cm[0016] 2) for a bonding pad structure fabricated in accordance with a preferred embodiment of the present invention.
    • DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT
  • Unless otherwise specified, all structures, layers, steps, methods, etc. may be formed or accomplished by conventional steps or methods known in the prior art. [0017]
    • Problem Discovered by the Inventors
  • The inventors discovered that when a metal bonding pad comprised of, for example copper (Cu), was formed over an underlying low-k material layer, and a wire was bonded to the copper bonding pad, there was a relatively high probability that either the copper wire bonding pad, either peeled apart from the low-k material and/or the low-k material cracked. In either situation, the chip may fail and the failure site was found most often on the low-k material/metal bonding pad interface. Poor mechanical strength and poor adhesion of the low-k material to either SiN or Cu was determined to be the root cause. [0018]
  • The inventors studied wire bond failures on SiLK (low-k) packaging samples and identified the root cause as failure of the low-k/copper interface at the bottom of the metal vias. [0019]
    • Preferred Embodiment of the Present Invention Summary of the Present Invention
  • The inventors have discovered that by extending the pad area (bonding pad) to the peripheral planar area that does not have the metal via underneath has increased mechanical strength, and affixing the wire bond to that peripheral planar area, low-k dielectric layer cracking and/or peeling of the bonding pad from the low-k dielectric layer is eliminated. [0020]
    • Initial Structure
  • FIG. 1 is a simplified illustration of [0021] structure 10 including substrate or die 12 with a top metal layer 14 that is preferably comprised of copper (Cu). Top Cu layer 14 is electrically connected to lower metal layer 16, for example, by metal vias 18. Substrate/die 12 includes low-k dielectric, or inter-metal dielectric (IMD), layer 20 between lower metal layer 16 and top Cu layer 14, and surrounding metal vias 18.
  • [0022] Etch stop layer 22 overlies substrate/die 12 and is preferably comprised of either SiON or Si3N4, (SiN). SiO2 (oxide) layer 24 overlies etch stop layer 22 and is preferably from about 3800 to 4200 Å thick, and is more preferably about 4000 Å thick. Passivation layer 26 overlies oxide layer 24, is preferably comprised of SiN and is preferably from about 6600 to 7400 521 thick, and is more preferably about 7000 Å thick.
    • Passivation Layer 26 Etch
  • [0023] SiN passivation layer 26, oxide layer 24, and etch stop layer 22 are then etched to form bonding pad trench 28.
    • Formation of Barrier Layer 30 and Bond Pad Metal Layer 32
  • As shown in FIG. 2, [0024] barrier layer 30 is formed over the etched SiN passivation layer 26, lining bonding pad trench 28. Barrier layer 30 is preferably comprised of titanium nitride (TiN).
  • Metal [0025] bonding pad layer 32 is then formed over TiN barrier layer 30. Metal bonding pad layer 32 is preferably formed of an aluminum copper alloy (AlCu).
    • Formation of Patterned Masking Layer 34 Over AlCu Bonding Pad Layer 32
  • As shown in FIG. 3, patterned [0026] masking layer 34 is formed over AlCu bonding pad layer 34 (and TiN barrier layer 30) to additionally mask a portion of AlCu bonding pad layer 34 that overlies a peripheral planar area 36 over substrate/die 12 that does not have the metal vias 18 thereunder.
  • [0027] Masking layer 34 may be comprised of, for example, photoresist as shown in FIG. 3.
    • Patterning of Metal Bonding Pad Layer 32 to Form Extended Bonding Pad 32′
  • As shown in FIG. 4, in a key step of the invention, AlCu [0028] bonding pad layer 32 and TiN barrier layer 30 are etched, using patterned masking layer 34 as a mask, to form extended, permanent, AlCu bonding pad 32′ with underlying extended, permanent, TiN barrier layer 30′. Extended AlCu bonding pad 32′, with underlying extended TiN barrier layer 30′, extend over peripheral planar area 36 of substrate/die 12 that does not have the metal vias 18 thereunder.
  • Patterned masking [0029] layer 34 is then removed and the structure 10 may be cleaned and tested, as necessary.
    • Attachment of Wire Bond 40 to Extended AlCu Bonding Pad 32′
  • [0030] Wire bond 40, including wire 42 that is preferably comprised of gold (Au), is permanently attached/affixed to extended AlCu bonding pad 32′ at peripheral planar area 36 over substrate/die 12 that does not have the metal vias 18 thereunder. The inventors have determined that such a wire bond 40 arrangement does not cause cracking of low-k dielectric layer 20, or peeling of: (1) AlCu bonding pad 32′ with underlying extended TiN barrier layer 30′; and/or (2) SiON/SiN etch stop layer 22 from low-k dielectric layer 20. In the conventional pad structure, the wire bonding will fail at the via bottom (18) due to low mechanical properties and bad heat transport.
  • It is noted that a conventional bonding pad structure would not include permanent extended [0031] AlCu bonding pad 32′ over peripheral planar area 36, and would instead affix wire bond 40 to portion 50 of non-extended AlCu bonding pad over metal vias 18. As noted above, the inventors have determined that such a conventional bonding pad structure is highly susceptible to cracking of the low-k dielectric layer, and/or peeling of: the bonding pad; and/or the etch stop layer from the low-k dielectric layer.
    • Ball Shear Improvement
  • As illustrated in FIGS. 5A and 5B (, the ball shear for the bonding pad structure fabricated in accordance with the present invention (FIG. 5B) is improved from the ball shear for a conventional bonding pad structure (FIG. 5A). That is, the conventional bonding pad structure has a wire bond shear of about 22 mg/cm[0032] 2 while the wire bond 40 shear for the bonding pad structure of FIG. 4 made in accordance with the method of the present invention has a ball shear of greater than about 30 mg/cm2.
    • Advantages of the Present Invention
  • The advantages of the present invention include: [0033]
  • 1) the wire bond ball shear is increased; [0034]
  • 2) cracking of the low-k dielectric layer is eliminated; [0035]
  • 3) peeling of the bonding pad from the low-k dielectric layer is eliminated; [0036]
  • 4) peeling of the SiON/SiN etch stop layer from the low-k dielectric layer is eliminated; and [0037]
  • 5) to improve the copper/low-k wire bond reliability characteristics. [0038]
  • While particular embodiments of the present invention have been illustrated and described, it is not intended to limit the invention, except as defined by the following claims. [0039]

Claims (16)

We claim:
1. A method to fabricate a bonding pad structure including the steps of:
providing a substrate having a top metal layer and a passivation layer overlying the top metal layer; the top metal layer being electrically connected to a lower metal layer by at least one metal via within a metal via area; substrate including a low-k dielectric layer at least between the lower metal layer and the top metal layer;
etching the passivation layer within the metal via area to form a trench exposing at least a portion of the top metal layer;
forming a patterned, extended bonding pad over the etched passivation layer and lining the trench; the extended bonding pad having a portion that extends over a peripheral planar area of the substrate adjacent the trench not within the metal via area;
bonding a wire bond to the extended bonding pad at the peripheral planar area portion to form the bonding pad structure.
2. The method of claim 1, wherein the top metal layer is comprised of copper; the passivation layer is comprised of SiN; the extended bonding pad is comprised of an AlCu alloy; and the wire bond includes a gold wire.
3. The method of claim 1, wherein the passivation layer is from about 6600 to 7400 Å thick.
4. The method of claim 1, wherein the top metal layer has an etch stop layer formed thereover, an oxide layer is formed over the etch stop layer, and the passivation layer is formed over the oxide layer.
5. The method of claim 1, wherein the top metal layer has an etch stop layer formed thereover, an oxide layer is formed over the etch stop layer, and the passivation layer is formed over the oxide layer; the top metal layer being comprised of copper, the etch stop layer being comprised of a material selected from the group consisting of SiON and Si3N4, and the passivation layer being comprised of Si3N4.
6. The method of claim 1, wherein the top metal layer has an etch stop layer formed thereover, an oxide layer having a thickness of from about 3800 to 4200 Å is formed over the etch stop layer, and the passivation layer having a thickness of from about 6600 to 7400 Å is formed over the oxide layer.
7. A method to fabricate a bonding pad structure including the steps of:
providing a substrate having a top metal layer; the top metal layer being electrically connected to a lower metal layer by at least one metal via within a metal via area; substrate including a low-k dielectric layer at least between the lower metal layer and the top metal layer;
forming an etch stop layer over the low-k dielectric layer and the top metal layer;
forming an oxide layer over the etch stop layer;
forming a passivation layer overlying the oxide layer;
etching the passivation layer, the oxide layer, and the etch stop layer within the metal via area to form a trench exposing at least a portion of the top metal layer;
forming a patterned, extended bonding pad with an underlying barrier layer, over the etched passivation layer and lining the trench; the extended bonding pad with underlying barrier layer each having a portion that extends over a peripheral planar area of the substrate adjacent the trench not within the metal via area;
bonding a wire bond to the extended bonding pad at the peripheral planar area portion to form the bonding pad structure.
8. The method of claim 7, wherein the top metal layer is comprised of copper; the etch stop layer is comprised of a material selected from the group consisting of SiON and Si3N4, the passivation layer is comprised of SiN; the extended bonding pad is comprised of an AlCu alloy; and the wire bond includes a gold wire.
9. The method of claim 7, wherein the oxide layer is from about 3800 to 4200 Å thick, and the passivation layer is from about 6600 to 7400 Å thick.
10. The method of claim 7, wherein the oxide layer is about 4000 Å thick, and the passivation layer is about 7000 Å thick.
11. In a bonding pad structure having a substrate with a top metal layer exposed through an etched, trenched passivation layer overlying the substrate; the top metal layer being electrically connected to a lower metal layer within the substrate by at least one metal via within a metal via area; and a bonding pad formed over the exposed top metal layer and at least a portion of the etched passivation layer; the improvement comprising:
extending the bonding pad over a peripheral planar area of the substrate adjacent the trench formed within the passivation layer that is not within the metal via area; and
bonding a wire bond to the extended bonding pad at the peripheral planar area portion.
12. The method of claim 11, wherein the top metal layer is comprised of copper; the passivation layer is comprised of SiN; the extended bonding pad is comprised of an AlCu alloy; and the wire bond includes a gold wire.
13. The method of claim 11, wherein the passivation layer is from about 6600 to 7400 Å thick.
14. The method of claim 11, wherein the top metal layer has an etch stop layer formed thereover, an oxide layer is formed over the etch stop layer, and the passivation layer is formed over the oxide layer.
15. The method of claim 11, wherein the top metal layer has an etch stop layer formed thereover, an oxide layer is formed over the etch stop layer, and the passivation layer is formed over the oxide layer; the top metal layer being comprised of copper, the etch stop layer being comprised of a material selected from the group consisting of SiON and Si3N4, and the passivation layer being comprised of Si3N4.
16. The method of claim 11, wherein the top metal, layer has an etch stop layer formed thereover, an oxide layer having a thickness of from about 3800 to 4200 Å is formed over the etch stop layer, and the passivation layer having a thickness of from about 6600 to 7400 Å is formed over the oxide layer.
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