US20020102750A1 - Method for reducing borderless contact leakage by opc - Google Patents

Method for reducing borderless contact leakage by opc Download PDF

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US20020102750A1
US20020102750A1 US09/774,456 US77445601A US2002102750A1 US 20020102750 A1 US20020102750 A1 US 20020102750A1 US 77445601 A US77445601 A US 77445601A US 2002102750 A1 US2002102750 A1 US 2002102750A1
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active area
borderless contact
outer corner
substrate
contact
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US6451680B1 (en
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Hsueh-Wen Wang
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United Microelectronics Corp
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United Microelectronics Corp
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    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/36—Masks having proximity correction features; Preparation thereof, e.g. optical proximity correction [OPC] design processes
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70425—Imaging strategies, e.g. for increasing throughput or resolution, printing product fields larger than the image field or compensating lithography- or non-lithography errors, e.g. proximity correction, mix-and-match, stitching or double patterning
    • G03F7/70433—Layout for increasing efficiency or for compensating imaging errors, e.g. layout of exposure fields for reducing focus errors; Use of mask features for increasing efficiency or for compensating imaging errors
    • G03F7/70441—Optical proximity correction [OPC]
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/942—Masking

Definitions

  • the present invention generally pertains to a method for reducing borderless contact leakage, and more particularly to a method for reducing borderless contact leakage by optical proximity compensation (OPC) method.
  • OPC optical proximity compensation
  • Trench isolation is fast becoming the standard means of isolation in complex semiconductor devices, replacing the well established LOCOS (Localized Oxidation of Silicon) method of isolation.
  • LOCOS Localized Oxidation of Silicon
  • trenches are formed in a semiconductor substrate between what are to become active areas that need to be isolated from one another.
  • the trenches are filled with an insulating material, such as oxide, to provide electrical insulation.
  • Active devices including transistors and resistors, are then built and formed on and over the semiconductor substrate in appropriate active regions and in-between the isolation trenches.
  • a borderless contact is a contact which overlies and exposes both the active and isolation regions of the semiconductor substrate, usually for the purpose of making contact to a diffusion region formed in the substrate, as shown in FIG. 1.
  • a substrate 10 is provided with trench isolation 20 formed therein, and a liner layer 22 , such as silicon nitride, is usually formed between the isolation 20 and the substrate 10 such that borderless contact will automatically stop on this layer to prevent from overetching trench isolation 20 and leakage.
  • a MOS (metal-oxide-semiconductor) transistor which comprises gate electrode 30 , source/drain regions 34 and spacers 32 , is formed in and on the substrate 10 .
  • An interlevel dielectric layer 40 is deposited on the substrate 10 and a borderless contact 50 is formed in the dielectric layer 40 to expose a portion of both source/drain regions and isolation 20 .
  • FIG. 2 an L-shaped diffusion region 12 from top view is provided and a borderless contact 50 is on the outer corner of the diffusion region 12 .
  • a borderless contact 50 on the inside of a diffusion area 12 is shown in FIG. 3.
  • the overlapped region between contact and diffusion region in FIG. 2 is less than the overlapped region in FIG. 3.
  • a method for forming borderless contact that substantially increases overlapped area between diffusion area and borderless contact and hence reduces borderless contact leakage.
  • a method for reducing borderless contact leakage includes performing an optical proximity correction on an outer corner of an active area mask to form an active area on a substrate such that a portion of an outer corner of the active area is enlarged in photolithography process. Then, a dielectric layer is deposited on the substrate. A borderless contact is formed in the dielectric layer to make contact with the outer corner of the active area, whereby the enlarged portion of the outer corner of the active area increases overlapped area between the borderless contact and the active area, and reduces borderless contact leakage.
  • FIG. 1 is a schematic representation of a conventional borderless contact on a MOS transistor in a cross-view
  • FIG. 2 illustrates an L-shaped diffusion region on a substrate with a borderless contact on the outer corner of the diffusion region
  • FIG. 3 illustrates an L-shaped diffusion region on a substrate with a borderless contact on the inside corner of the diffusion region
  • FIG. 4 shows an illumination pattern produced on a substrate by lighting an L-shaped reticle and a borderless contact on the outer corner of the pattern
  • FIG. 5 shows an illumination pattern produced on a substrate by lighting an L-shaped reticle and a borderless contact on the inside corner of the pattern
  • FIG. 6 illustrates a reticle in accordance with a method disclosed herein to overcome the rounding effect
  • FIG. 7 is a schematic representation of a borderless contact on the outer corner of a diffusion area in accordance with a method disclosed.
  • This invention utilizes optical proximity correction method on an outer corner of an active area mask to enlarge a portion of an outer corner of an active area on a substrate in photolithography process, wherein the outer corner of the active area is used to make contact with a borderless contact.
  • Optical proximity correction involves adding dark regions to and/or subtracting dark regions from a reticle design at locations chosen to overcome the distorting effects of diffraction and scattering.
  • the enlarged portion of the outer corner of the active area increases overlapped area between the borderless contact and the active area, and reduces borderless contact leakage.
  • a preferred embodiment according to this invention is set forth below and referred to FIG. 6 and FIG. 7.
  • an L-shaped reticle 100 used for forming a diffusion area is provided, and a serif 110 is square chromium extensions protruding beyond the corners of base rectangle 100 .
  • the L-shaped region 100 and serif 110 is chromium on a glass to block radiation to generate an image corresponding to intended IC design features.
  • This serif 110 will correct shape of outer corner of diffusion area from rounded corner to a more rectangular shape in lithography process.
  • the size of serif 110 will depend upon real optical correction in lithography process.
  • this corrected reticle 100 is used to form an L-shaped diffusion region 120 in a substrate.
  • an electronic device such as MOS (metal-oxide-semiconductor) transistor, is formed in the diffusion region 120 .
  • a dielectric layer (not shown in the FIG. 7) is then deposited on the substrate to cover the diffusion region 120 as well as the electronic device.
  • the dielectric layer can be made from any typical and well-known dielectric material used in wafer fabrication, such as silicon oxide.
  • a borderless contact 150 is formed in the dielectric layer to make contact with the outer corner of the diffusion region 120 .
  • the enlarged portion of the outer corner of the diffusion area 120 increases overlapped area between the borderless contact 150 and the diffusion area 120 , and reduces borderless contact leakage.
  • the outer corner of an L-shaped diffusion region is enlarged by using the OPC method and the overlapped area between diffusion area and borderless contact is increased. Therefore, borderless contact leakage is reduced.

Abstract

This invention increases overlapped area between diffusion area and borderless contact by using optical proximity correction (OPC) method. The method includes performing an optical proximity correction on an outer corner of an active area mask to enlarge a portion of an outer corner of an active area on a substrate in photolithography process, wherein the outer corner of the active area is used to make contact with a borderless contact. The enlarged portion of the outer corner of the active area increases overlapped area between the borderless contact and said active area, and reduces borderless contact leakage.

Description

    BACKGROUND OF THE INVENTION
  • 1. Field of the Invention [0001]
  • The present invention generally pertains to a method for reducing borderless contact leakage, and more particularly to a method for reducing borderless contact leakage by optical proximity compensation (OPC) method. [0002]
  • 2. Description of the Prior Art [0003]
  • Trench isolation is fast becoming the standard means of isolation in complex semiconductor devices, replacing the well established LOCOS (Localized Oxidation of Silicon) method of isolation. In a standard trench isolation process, trenches are formed in a semiconductor substrate between what are to become active areas that need to be isolated from one another. The trenches are filled with an insulating material, such as oxide, to provide electrical insulation. Active devices, including transistors and resistors, are then built and formed on and over the semiconductor substrate in appropriate active regions and in-between the isolation trenches. [0004]
  • One problem with standard trench isolation process is the leakage. A borderless contact is a contact which overlies and exposes both the active and isolation regions of the semiconductor substrate, usually for the purpose of making contact to a diffusion region formed in the substrate, as shown in FIG. 1. A [0005] substrate 10 is provided with trench isolation 20 formed therein, and a liner layer 22, such as silicon nitride, is usually formed between the isolation 20 and the substrate 10 such that borderless contact will automatically stop on this layer to prevent from overetching trench isolation 20 and leakage. A MOS (metal-oxide-semiconductor) transistor, which comprises gate electrode 30, source/drain regions 34 and spacers 32, is formed in and on the substrate 10. An interlevel dielectric layer 40 is deposited on the substrate 10 and a borderless contact 50 is formed in the dielectric layer 40 to expose a portion of both source/drain regions and isolation 20.
  • However, mis-alignment will dominate the leakage when the borderless contact is off the border of diffusion. There is a phenomenon that the contact outside the diffusion with alignment off two sides of diffusion will have large leakage compared to contact inside the diffusion with off two sides of diffusion, as shown in FIG. 2 and FIG. 3. Referring to FIG. 2, an L-[0006] shaped diffusion region 12 from top view is provided and a borderless contact 50 is on the outer corner of the diffusion region 12. On the other hand, a borderless contact 50 on the inside of a diffusion area 12 is shown in FIG. 3. The overlapped region between contact and diffusion region in FIG. 2 is less than the overlapped region in FIG. 3.
  • Worst, the outer corner of a diffusion area pattern is rounded in exposure of a lithography process, as shown in FIG. 4 and FIG. 5. Contact [0007] 50 on the inside of diffusion region 12 will not reduce the overlapped area, as shown in FIG. 5. However, if contact 50 is on the outer corner of diffusion region 12, the overlapped area will be compressed, and leakage current will increase.
    • SUMMARY OF THE INVENTION
  • In accordance with the present invention, a method is provided for forming borderless contact that substantially increases overlapped area between diffusion area and borderless contact and hence reduces borderless contact leakage. [0008]
  • In one embodiment, a method for reducing borderless contact leakage is provided. The method includes performing an optical proximity correction on an outer corner of an active area mask to form an active area on a substrate such that a portion of an outer corner of the active area is enlarged in photolithography process. Then, a dielectric layer is deposited on the substrate. A borderless contact is formed in the dielectric layer to make contact with the outer corner of the active area, whereby the enlarged portion of the outer corner of the active area increases overlapped area between the borderless contact and the active area, and reduces borderless contact leakage.[0009]
    • BRIEF DESCRIPTION OF THE DRAWINGS
  • The foregoing aspects and many of the attendant advantages of this invention will become more readily appreciated as the same becomes better understood by reference to the following detailed description, when taken in conjunction with the accompanying drawings, wherein: [0010]
  • FIG. 1 is a schematic representation of a conventional borderless contact on a MOS transistor in a cross-view; [0011]
  • FIG. 2 illustrates an L-shaped diffusion region on a substrate with a borderless contact on the outer corner of the diffusion region; [0012]
  • FIG. 3 illustrates an L-shaped diffusion region on a substrate with a borderless contact on the inside corner of the diffusion region; [0013]
  • FIG. 4 shows an illumination pattern produced on a substrate by lighting an L-shaped reticle and a borderless contact on the outer corner of the pattern; [0014]
  • FIG. 5 shows an illumination pattern produced on a substrate by lighting an L-shaped reticle and a borderless contact on the inside corner of the pattern; [0015]
  • FIG. 6 illustrates a reticle in accordance with a method disclosed herein to overcome the rounding effect; and [0016]
  • FIG. 7 is a schematic representation of a borderless contact on the outer corner of a diffusion area in accordance with a method disclosed.[0017]
    • DESCRIPTION OF THE PREFERRED EMBODIMENT
  • Some sample embodiments of the invention will now be described in greater detail. Nevertheless, it should be recognized that the present invention can be practiced in a wide range of other embodiments besides those explicitly described, and the scope of the present invention is expressly not limited except as specified in the accompanying claims. [0018]
  • This invention utilizes optical proximity correction method on an outer corner of an active area mask to enlarge a portion of an outer corner of an active area on a substrate in photolithography process, wherein the outer corner of the active area is used to make contact with a borderless contact. Optical proximity correction involves adding dark regions to and/or subtracting dark regions from a reticle design at locations chosen to overcome the distorting effects of diffraction and scattering. The enlarged portion of the outer corner of the active area increases overlapped area between the borderless contact and the active area, and reduces borderless contact leakage. A preferred embodiment according to this invention is set forth below and referred to FIG. 6 and FIG. 7. [0019]
  • Referring to FIG. 6, an L-[0020] shaped reticle 100 used for forming a diffusion area is provided, and a serif 110 is square chromium extensions protruding beyond the corners of base rectangle 100. The L-shaped region 100 and serif 110 is chromium on a glass to block radiation to generate an image corresponding to intended IC design features. This serif 110 will correct shape of outer corner of diffusion area from rounded corner to a more rectangular shape in lithography process. The size of serif 110 will depend upon real optical correction in lithography process.
  • Therefore, this corrected [0021] reticle 100 is used to form an L-shaped diffusion region 120 in a substrate. Then, an electronic device, such as MOS (metal-oxide-semiconductor) transistor, is formed in the diffusion region 120. A dielectric layer (not shown in the FIG. 7) is then deposited on the substrate to cover the diffusion region 120 as well as the electronic device. The dielectric layer can be made from any typical and well-known dielectric material used in wafer fabrication, such as silicon oxide. Next, a borderless contact 150 is formed in the dielectric layer to make contact with the outer corner of the diffusion region 120. The enlarged portion of the outer corner of the diffusion area 120 increases overlapped area between the borderless contact 150 and the diffusion area 120, and reduces borderless contact leakage.
  • According to the preferred embodiment of this invention, the outer corner of an L-shaped diffusion region is enlarged by using the OPC method and the overlapped area between diffusion area and borderless contact is increased. Therefore, borderless contact leakage is reduced. [0022]
  • Although specific embodiments have been illustrated and described, it will be obvious to those skilled in the art that various modifications may be made without departing from what is intended to be limited solely by the appended claims. [0023]

Claims (10)

What is claimed is:
1. A method for reducing borderless contact leakage, said method comprising:
performing an optical proximity correction on an outer corner of an active area mask to enlarge a portion of an outer corner of an active area on a substrate in photolithography process, wherein the outer corner of said active area is used to make contact with a borderless contact;
whereby the enlarged portion of the outer corner of said active area increases overlapped area between said borderless contact and said active area, and reduces borderless contact leakage.
2. The method according to claim 1, wherein said active area comprises an electronic device.
3. The method according to claim 1, wherein said borderless contact is formed in a dielectric layer on said substrate.
4. The method according to claim 1, wherein said dielectric layer comprises silicon oxide.
5. A method for reducing borderless contact leakage, said method comprising:
performing an optical proximity correction on an outer corner of an active area reticle to form an active area on a substrate such that a portion of an outer corner of said active area is enlarged in photolithography process;
depositing a dielectric layer on said substrate;
forming a borderless contact in said dielectric layer to make contact with the outer corner of said active area, whereby the enlarged portion of the outer corner of said active area increases overlapped area between said borderless contact and said active area, and reduces borderless contact leakage.
6. The method according to claim 5, wherein said active area comprises an electronic device.
7. The method according to claim 5, wherein said dielectric layer comprises silicon oxide.
8. A method for reducing borderless contact leakage by using optical proximity correction method, said method comprising:
providing a substrate;
forming an L-shaped diffusion region in said substrate, wherein a portion of the outer corner of said diffusion region is enlarged by using optical proximity correction method in photolithography process;
forming an electronic device in said diffusion region;
depositing a dielectric layer on said substrate;
forming a borderless contact in said dielectric layer to make contact with the outer corner of said diffusion region, whereby the enlarged portion of the outer corner of said active area increases overlapped area between said borderless contact and said active area, and reduces borderless contact leakage.
9. The method according to claim 8, wherein said diffusion region comprises an electronic device.
10. The method according to claim 8, wherein said dielectric layer comprises silicon oxide.
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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20180108635A1 (en) * 2013-12-11 2018-04-19 Taiwan Semiconductor Manufacturing Co., Ltd. Connecting techniques for stacked cmos devices
CN109494185A (en) * 2018-10-31 2019-03-19 上海华力微电子有限公司 A kind of optical adjacent correction method optimizing via layer switching performance
CN111443568A (en) * 2020-03-19 2020-07-24 上海华力集成电路制造有限公司 Polycrystalline silicon layer graph for screening whether source and drain are wrapped or not and OPC (optical proximity correction) method
CN111624855A (en) * 2019-02-27 2020-09-04 中芯国际集成电路制造(上海)有限公司 Pre-processing method before optical proximity correction and optical proximity correction method

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JP4387654B2 (en) * 2002-10-10 2009-12-16 パナソニック株式会社 Semiconductor device and manufacturing method thereof
US20060292885A1 (en) * 2005-06-24 2006-12-28 Texas Instruments Incorporated Layout modification to eliminate line bending caused by line material shrinkage
KR100642417B1 (en) * 2005-09-20 2006-11-03 주식회사 하이닉스반도체 Method of inspecting optical proximity correction using layer versus layer method
CN101738848B (en) * 2008-11-24 2011-11-02 上海华虹Nec电子有限公司 Method for establishing OPC model based on variable light acid diffusion length

Family Cites Families (2)

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Publication number Priority date Publication date Assignee Title
US6282696B1 (en) * 1997-08-15 2001-08-28 Lsi Logic Corporation Performing optical proximity correction with the aid of design rule checkers
US6080527A (en) * 1999-11-18 2000-06-27 United Microelectronics Corp. Optical proximity correction of L and T shaped patterns on negative photoresist

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20180108635A1 (en) * 2013-12-11 2018-04-19 Taiwan Semiconductor Manufacturing Co., Ltd. Connecting techniques for stacked cmos devices
US10497661B2 (en) * 2013-12-11 2019-12-03 Taiwan Semiconductor Manufacturing Co., Ltd. Connecting techniques for stacked CMOS devices
US11217553B2 (en) 2013-12-11 2022-01-04 Taiwan Semiconductor Manufacturing Company, Ltd. Connection structure for stacked substrates
US11532586B2 (en) 2013-12-11 2022-12-20 Taiwan Semiconductor Manufacturing Company, Ltd. Connecting techniques for stacked substrates
CN109494185A (en) * 2018-10-31 2019-03-19 上海华力微电子有限公司 A kind of optical adjacent correction method optimizing via layer switching performance
CN111624855A (en) * 2019-02-27 2020-09-04 中芯国际集成电路制造(上海)有限公司 Pre-processing method before optical proximity correction and optical proximity correction method
CN111443568A (en) * 2020-03-19 2020-07-24 上海华力集成电路制造有限公司 Polycrystalline silicon layer graph for screening whether source and drain are wrapped or not and OPC (optical proximity correction) method

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