US20020017955A1 - Phase correction amplifier and a feed-forward amplifier using the same - Google Patents
Phase correction amplifier and a feed-forward amplifier using the same Download PDFInfo
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- US20020017955A1 US20020017955A1 US09/966,174 US96617401A US2002017955A1 US 20020017955 A1 US20020017955 A1 US 20020017955A1 US 96617401 A US96617401 A US 96617401A US 2002017955 A1 US2002017955 A1 US 2002017955A1
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- 230000005669 field effect Effects 0.000 claims abstract description 32
- 230000008878 coupling Effects 0.000 claims abstract description 8
- 238000010168 coupling process Methods 0.000 claims abstract description 8
- 238000005859 coupling reaction Methods 0.000 claims abstract description 8
- 230000005540 biological transmission Effects 0.000 claims abstract description 4
- 230000003247 decreasing effect Effects 0.000 claims description 2
- 239000013598 vector Substances 0.000 description 10
- 230000003321 amplification Effects 0.000 description 4
- 238000003199 nucleic acid amplification method Methods 0.000 description 4
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/08—Modifications of amplifiers to reduce detrimental influences of internal impedances of amplifying elements
- H03F1/12—Modifications of amplifiers to reduce detrimental influences of internal impedances of amplifying elements by use of attenuating means
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/32—Modifications of amplifiers to reduce non-linear distortion
- H03F1/3223—Modifications of amplifiers to reduce non-linear distortion using feed-forward
- H03F1/3229—Modifications of amplifiers to reduce non-linear distortion using feed-forward using a loop for error extraction and another loop for error subtraction
Definitions
- the present invention relates to a phase correction amplifier for correcting a phase characteristic, and a feed-forward amplifier using the above phase correction amplifier, which can be applied to a transmitting power amplifier used, for example, in a radio base station.
- a power amplifier used for a transmitting apparatus in a mobile radio communication system has a structure in which an amplification is performed within a linear area of an amplification characteristic in order to realize low signal distortion. In this case, however, there is a problem in which this structure has a low power efficiency.
- an operation area of the amplification is extended until an output of the power amplifier reaches in the vicinity of a saturation area in order to improve the power efficiency.
- a peak envelope power i.e., an instantaneous power
- the signal distortion also becomes large.
- the present invention relates to an improvement of the feed-forward type amplifier by correcting the phase characteristic of a phase correction amplifier.
- the object of the present invention is to provide a phase correction amplifier which can correct a phase characteristic thereof and can be applied to a transmitting power amplifier used, for example, in a radio base station.
- Another object of the present invention is to provide a feed-forward amplifier using the above phase correction amplifier.
- a phase correction amplifier including: a GaAs field effect transistor; and a Si field effect transistor or a Si bipolar transistor; wherein the GaAs field effect transistor and the Si field effect transistor or the Si bipolar transistor are cascade-connected each other.
- a phase correction amplifier including: a GaAs field effect transistor; and a Si field effect transistor or a Si bipolar transistor; wherein the GaAs field effect transistor and the Si field effect transistor or the Si bipolar transistor are cascade-connected each other through a variable attenuator.
- a feed-forward amplifier including: a distortion extracting loop consisting of a main amplifier signal path and a linear signal path in order to distribute a transmission signal; a directional coupler for receiving an output signal through the main amplifier signal path and an output signal through the linear signal path; a distortion eliminating loop consisting of a sub-amplifier signal path and a linear signal path in order to input an output signal from the directional coupler; and a power compositor for receiving an output signal through the sub-amplifier signal path and an output signal through the linear signal path, and coupling both the output signals.
- each of the main amplifier and the sub-amplifier is constituted by a phase correction amplifier comprising a GaAs field effect transistor, and a Si field effect transistor or a Si bipolar transistor, wherein the GaAs field effect transistor and the Si field effect transistor or the Si bipolar transistor are cascade-connected each other through a variable attenuator.
- FIG. 1 shows a feed-forward amplifier according to an embodiment of the present invention
- FIG. 2A is a graph for explaining a relationship between an amplitude level (Gain, dB) and an input level for an AM-AM characteristic in the case of a GaAs FET;
- FIG. 2B is a graph for explaining a relationship between a phase degree and an input level for an AM-PM characteristic in the case of the GaAs FET;
- FIG. 3A is the AM-AM characteristic in the case of a MOS FET
- FIG. 3B is the AM-PM characteristic in the case of the MOS FET.
- FIG. 4A is a graph for explaining a relationship between an amplitude level (Gain, dB) and an input level for the AM-AM characteristic;
- FIG. 4B is a graph for explaining a relationship between a phase degree and an input level for the AM-PM characteristic
- FIG. 5A is a graph for explaining a relationship between an amplitude level/phase degree and a relative output level (dB) for the AM-AM and the AM-PM characteristics on a linear signal path;
- FIG. 5B is a graph for explaining a relationship between an amplitude level/phase degree and a relative output level (dB) for the AM-AM and the AM-PM characteristics on a sub-amplifier signal path;
- FIG. 5C is a graph for explaining a relationship between quantity of suppressed distortion and frequencies
- FIG. 5D is another graph for explaining a relationship between quantity of suppressed distortion and frequencies
- FIG. 6 shows a detailed circuit of a phase correction amplifier according to an embodiment of the present invention
- FIG. 7 is a graph for comparing the present invention and the conventional art
- FIG. 8 shows a feed-forward amplifier in a conventional art
- FIG. 9 shows a detailed circuit of a main amplifier and a sub-amplifier
- FIG. 10A is a graph for explaining a relationship between an amplitude level/phase degree and a relative output level for the AM-AM and the AM-PM characteristics on the linear signal path;
- FIG. 10B is a graph for explaining a relationship between an amplitude level/phase degree and a relative output level for the AM-AM and the AM-PM characteristics on the sub amplifier signal path;
- FIG. 10C is a graph for explaining a relationship between quantity of suppressed distortion and frequencies.
- FIG. 10D is another graph for explaining a relationship between quantity of suppressed distortion and frequencies.
- FIG. 8 shows a feed-forward amplifier in a conventional art.
- the feed-forward amplifier is constituted by a distortion extracting loop 33 and a distortion eliminating loop 34 connected to the distortion extracting loop 33 through a directional coupler 44 .
- the distortion extracting loop 33 includes an input terminal 31 , a power distributor 43 connected to the input terminal 31 , a vector adjustor 41 connected to the power distributor 43 , and a main amplifier 35 connected to the vector adjustor 41 and the directional coupler 44 .
- 37 is a main amplifier signal path (or, simply, a signal path 37 ) connecting the power distributor 43 to the main amplifier 35 through the vector adjustor 41
- 39 is a linear signal path (or, simply, a signal path 39 ) connecting the power distributor 43 to the directional coupler 44 .
- the distortion eliminating loop 34 includes a vector adjuster 42 connected to the directional coupler 44 , a sub-amplifier 36 connected to the vector adjuster 42 , a power compositor 45 and an output terminal 32 .
- 38 is a sub-amplifier signal path (or, simply, a signal path 38 ) connecting the directional coupler 44 to the sub-amplifier 36 through the vector adjustor 42
- 40 is a linear signal path (or, simply, a signal path 40 ) connecting the directional coupler 44 to the power compositor 45 .
- an input signal is distributed by the power distributor 43 to the signal path 37 and signal path 39 .
- the input signal on the signal path 37 is input to the main amplifier 35 through the vector adjustor 41 and amplified by the main amplifier 35 .
- An amplified signal is input to the directional coupler 44 .
- the input signal on the signal path 39 is directly input to the directional coupler 44 .
- the signal amplified by the main amplifier 35 is input from the directional coupler 44 to the signal path 40 , and a distortion component of the signal is input from the directional coupler 44 to the signal path 38 .
- the distortion component is input to the sub-amplifier 36 through the vector adjustor 42 and amplified by the sub-amplifier 36 .
- the signal from the path 40 and another signal from the sub-amplifier 36 are composited by the power compositor 45 after inversion of the phase of any one of these signals.
- the main amplifier 35 and the sub-amplifier 36 are generally constituted by MOS FETs.
- FIG. 9 shows a detailed circuit of the main amplifier 35 and the sub-amplifier 36 .
- Q 3 and Q 4 are MOS FETS
- C is a coupling condenser
- Vg denotes a gate bias voltage
- Vd denotes a drain voltage.
- the amplifier is constituted by two MOS FETs Q 3 and Q 4 which are coupled through the coupling condenser C.
- the drain voltage Vd is 25V.
- the remaining circuit which is constituted by condensers, inductors and resistors, is shown as a lumped parameter circuit, this circuit can be constituted by a distributed constant circuit using strip lines so that matching circuits and bias circuits are shown in the drawing.
- FIG. 10A is a graph for explaining a relationship between an amplitude level/phase degree and a relative output level for an AM-AM and AM-PM characteristics on the linear signal path
- FIG. 10B is a graph for explaining a relationship between an amplitude level/phase degree and a relative output level for AM-AM and AM-PM characteristics on the sub-amplifier signal path
- FIG. 10C is a graph for explaining a relationship between quantity of suppressed distortion and frequencies
- FIG. 10D is another graph for explaining a relationship between quantity of suppressed distortion and frequencies.
- the AM-AM characteristic represents the characteristic between fluctuation of an input level and fluctuation of an output level
- the AM-PM represents the characteristic between fluctuation of an input level and fluctuation of an output phase.
- the graph in FIG. 10A is in the case of fluctuation on the linear signal path 40 in the distortion eliminating loop 34 when the MOS FET amplifier is used as the sub-amplifier 36
- the graph in FIG. 10B is in the case of fluctuation on the sub-amplifier signal path 38 in the distortion eliminating loop 34 .
- the AM-AM and AM-PM characteristics in FIG. 10A if the AM-AM and AM-PM characteristics are linear on the sub-amplifier signal path 38 , it may be possible to eliminate the signal distortion.
- the sub-amplifier 36 since the sub-amplifier 36 includes non-linear elements, the sub-amplifier 36 has non-linear characteristic as shown in FIG. 10B so that the amplitude and phase cannot follow instantaneous increase of the peak envelope power. As a result, there is problem in which the quantity of suppressed distortion is decreased.
- the present invention aims to correct the phase characteristic, and to maintain the quantity of sufficiently suppressed distortion for the feed-forward amplifier even if the peak envelope power is increased.
- FIG. 1 shows a feed-forward amplifier according to an embodiment of the present invention.
- reference number 1 is an input terminal
- 2 is an output terminal
- 3 is a distortion extracting loop
- 4 is a distortion eliminating loop
- 5 is a main amplifier
- 6 is a sub-amplifier
- 7 is a main amplifier signal path
- 8 is a sub-amplifier signal path
- 9 and 10 are linear signal paths
- 11 and 12 are vector adjusters
- 13 is a power distributor
- 14 is a directional coupler
- 15 is a power compositor
- a 1 to A 4 are transistors.
- the main amplifier 5 in the distortion extracting loop 3 and the sub-amplifier 6 in the distortion eliminating loop 4 are constituted by transistors each having different phase characteristic.
- the preceding transistors A 1 and A 3 in the main and sub-amplifiers 5 and 6 are formed of GaAs field effect transistor (GaAs FET), and the following transistors A 2 and A 4 are formed of either Si field effect transistor (MOS FET) or Si bipolar transistor.
- the GaAs FET and MOS FET or Si-bipolar
- the transistors A 1 and A 2 are cascade-connected each other. This means that, as explained below, when the GaAs FET is used as the preceding transistor (A 1 ), the MOS FET is used as the following transistor (A 2 ), and further, when the MOS FET is used as the preceding transistor (A 1 ), the GaAs FET is used as the following transistor (A 2 ).
- the transistors A 3 and A 4 are cascade-connected each other. That is, when the GaAs FET is used as the preceding transistor (A 3 ), the MOS FET is used as the following transistor (A 4 ), and further, when the MOS FET is used as the preceding transistor (A 3 ), the GaAs FET is used as the following transistor (A 4 ).
- the GaAs FET is used as the preceding transistor, and the MOS FET (or Si-bipolar) is used as the following transistor. Further, in general, 10 (V) is used as the power voltage of the GaAs FET, and 20 to 30 (V) are used as the power voltage of the MOS FET. Accordingly, it is preferable to use the MOS FET having a high power voltage as the following transistors A 2 and A 4 in view of an output power, etc.
- FIG. 2A is a graph for explaining a relationship between an amplitude level (Gain, dB) and an input level for an AM-AM characteristic in the case of the GaAs FET
- FIG. 2B is a graph for explaining a relationship between a phase degree and an input level for an AM-PM characteristic in the case of the GaAs FET.
- FIG. 3A is the AM-AM characteristic in the case of the MOS FET
- FIG. 3B is the AM-PM characteristic in the case of the MOS FET.
- FIGS. 2A, 2B, 3 A and 3 B these characteristics were measured in the frequency of 2.1 GHz.
- the input level Pin (dBm) at an abscissa is in the range of ⁇ 20 to 0 (dBm)
- the amplitude (Gain (dB)) at an ordinate is shown by one dB per one scale (i.e., 1 dB/).
- the phase (deg.) at the ordinate is shown by 2 degrees per one scale (i.e., 2°/).
- the AM-AM and the AM-PM characteristics shown in FIGS. 3A and 3B are in the case of the amplifier using only MOS FETs. In this case, measuring conditions and the ordinate/abscissa are the same as that of FIGS. 2A and 2B.
- the AM-AM characteristic of the GaAs FET amplifier is approximately equal to that of the MOS FET amplifier.
- the AM-PM characteristic of the GaAs FET amplifier has inverse phase characteristic for that of the MOS FET amplifier.
- FIG. 4A is a graph for explaining a relationship between an amplitude level (Gain, dB) and an input level for an AM-AM characteristic
- FIG. 4B is a graph for explaining a relationship between a phase degree and an input level for an AM-PM characteristic.
- the preceding transistor is the GaAs FET
- the following transistor is the MOS FET.
- the measuring conditions of FIGS. 4A and 4B are the same as that of FIGS. 2A and 2B.
- FIG. 5A is a graph for explaining a relationship between an amplitude level/phase degree and a relative output level (dB) for an AM-AM and AM-PM characteristics on the linear signal path
- FIG. 5B is a graph for explaining a relationship between an amplitude level/phase degree and a relative output level (dB) for an AM-AM and AM-PM characteristics on the sub-amplifier signal path
- FIG. 5C is a graph for explaining a relationship between quantity of suppressed distortion and frequencies
- FIG. 5D is another graph for explaining a relationship between quantity of suppressed distortion and frequencies.
- the AM-AM characteristic represents the characteristic between fluctuation of an input level and fluctuation of an output level
- the AM-PM represents the characteristic between fluctuation of an input level and fluctuation of an output phase.
- the graph in FIG. 5A is in the case of fluctuation on the linear signal path 10 in the distortion eliminating loop 4
- the graph in FIG. SB is in the case of fluctuation on the sub-amplifier signal path 8 in the distortion eliminating loop 4 .
- FIGS. 5A and 5B show the relative output level (dB), the average power is 0 (dB), and the peak envelope power is 9 (dB). Further, the ordinate shows the amplitude level (dB) and the phase (deg.). In this case, the phase is 0° as a reference level in FIG. 5A, and the phase is 180° as the reference level in FIG. 5B since the phase is inverted.
- the sub-amplifier 6 on the sub-amplifier signal path 8 is constituted by the phase correction amplifier, it is possible to realize small fluctuations of the input level at the peak envelope power so that it is possible to obtain the characteristic similar to the characteristic in the case of the linear signal path. Accordingly, since the distortion can be surely eliminated, it is possible to realize ⁇ 35 dB as the quantity of suppressed distortion as shown in FIG. 5D.
- FIG. 6 shows a detailed circuit of the phase correction amplifier according to the embodiment of the present invention.
- Q 1 is a GaAs FET
- Q 2 is a MOS FET.
- ATT is a variable attenuator
- C 1 and C 2 are coupling condensers
- Vg 1 and Vg 2 are gate bias voltages
- Vd 1 and Vd 2 are drain voltages.
- the remaining circuit which is constituted by condensers, inductors and resistors, is shown by the distributed constant circuit using strip lines.
- the GaAs FET is used as the preceding transistor, and the MOS FET is used as the following transistor.
- the preceding transistor Q 1 (GaAs FET) is connected to the following transistor Q 2 (MOS FET) through the coupling condenser Cl, the attenuator ATT and the coupling condenser C 2 . Accordingly, the input level of the MOS FET can be adjusted by the attenuator ATT so that it is possible to improve precision of the phase correction characteristic.
- the MOS FET can be provided as the preceding transistor, and the GaAs FET can be provided as the following transistor. Further, the attenuator ATT can be eliminated if it is not necessary to adjust the input level of the following transistor.
- the drain voltage Vdl of the GaAs FET is approximately 10 (V), and the drain voltage Vd 2 of the MOS FET is approximately 25 (V).
- V the drain voltage
- Vd 2 of the MOS FET the drain voltage
- two kinds of voltages i.e., 10 (V) and 25 (V) are required as the drain voltage, this is because the desired voltage can be easily obtained by a DC-DC converter.
- FIG. 7 is a graph for comparing the present invention and the conventional art.
- thin and thick solid lines (A, B) are in the case of the present invention
- thin and thick chain-dotted lines (a, b) are in the case of the conventional art.
- the ordinate shows leakage power (dBm)
- the abscissa shows peak level (relative value) (dB).
- the thin chain-dotted line “a” represents the leakage power when the phase correction was not performed, and the thin solid line “A” represents the leakage power when the phase correction was performed.
- the thick chain-doted line “b” represents the quantity of suppressed distortion when the phase correction was not performed, and the thick solid line “B” represents the quantity of suppressed distortion when the phase correction was performed.
- the leakage power represents the power which is input to the sub-amplifier signal path ( 8 , 38 ) in the distortion eliminating loop ( 4 , 34 ) through the directional coupler ( 14 , 44 ), without cancellation of the characteristic when vectors are shifted in the non-linear area of the AM-AM and AM-PM characteristics. Accordingly, when the linear characteristic of the main amplifier is bad so that the AM-AM and AM-PM characteristics are shifted, the leakage power on the signal path ( 8 , 38 ) becomes large, and the operation level of the sub-amplifier becomes high. Necessarily, the operation in the non-linear area makes a feed-forward compensating characteristic worse, and the distortion characteristic also becomes worse.
- the distortion component includes the peak leakage power and is input to the sub-amplifier signal path ( 8 , 38 ). That is, when the linear characteristic of the main amplifier is good, the distortion component can be expressed as a low peak distortion. On the other hand, when the linear characteristic of the main amplifier is bad, the distortion component can be expressed as a high peak distortion.
- the main amplifier 5 in the distortion extracting loop 3 is constituted by the phase correction amplifier, even if the peak level (dB) is high, the leakage power is reduced by several dB compared to the conventional art as shown by the thin solid line “A” in the graph.
- the quantity of suppressed distortion can be considerably improved as shown by an arrow on the curve “B”. Further, since the phase characteristic of the MOS FET is similar to that of the Si-bipolar, it is possible to constitute the phase correction amplifier by combining the GaAs FET with the Si-bipolar.
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Abstract
A phase correction amplifier according to the present invention includes; a GaAs field effect transistor; and a Si field effect transistor or a Si bipolar transistor; wherein the GaAs field effect transistor and the Si field effect transistor or the Si bipolar transistor are cascade-connected each other through a variable attenuator. Further, a feed-forward amplifier includes the above phase correction amplifier and is constituted by: a distortion extracting loop consisting of a main amplifier signal path and a linear Signal path in order to distribute a transmission signal; a directional coupler for receiving an output signal through the main amplifier signal path and an output signal through the linear signal path; a distortion eliminating loop consisting of a sub-amplifier signal path and a linear signal path in order to input an output signal from the directional coupler: and a power compositor for receiving an output signal through the sub-amplifier signal path and an output signal through the linear signal path, and coupling both the output signals.
Description
- 1. Field of the Invention
- The present invention relates to a phase correction amplifier for correcting a phase characteristic, and a feed-forward amplifier using the above phase correction amplifier, which can be applied to a transmitting power amplifier used, for example, in a radio base station.
- 2. Description of the Related Art
- A power amplifier used for a transmitting apparatus in a mobile radio communication system has a structure in which an amplification is performed within a linear area of an amplification characteristic in order to realize low signal distortion. In this case, however, there is a problem in which this structure has a low power efficiency.
- Accordingly, in actual use of the power amplifier, an operation area of the amplification is extended until an output of the power amplifier reaches in the vicinity of a saturation area in order to improve the power efficiency. In this case, when a peak envelope power (i.e., an instantaneous power) of an input signal becomes large, the signal distortion also becomes large.
- For example, in a power amplifier used in a PDC (Personal Digital Cellular) system for collectively amplifying and transmitting signals on a plurality of channels, the signal distortion at mutual modulation becomes large compared to amplification of the transmitting signal on a single channel. In a CDMA (Code Division Multiple Access) system, since the peak envelope power becomes large due to coincidence of phases in carrier wave when using large multiplexed codes.
- Conventionally, there are known many structures to compensate for the signal distortion in the power amplifier. For example, a pre-distortion type distortion compensator, a feed-forward type amplifier consisting of a distortion extraction loop and a distortion eliminating loop, etc., have been known.
- Accordingly, the present invention relates to an improvement of the feed-forward type amplifier by correcting the phase characteristic of a phase correction amplifier.
- The object of the present invention is to provide a phase correction amplifier which can correct a phase characteristic thereof and can be applied to a transmitting power amplifier used, for example, in a radio base station.
- Another object of the present invention is to provide a feed-forward amplifier using the above phase correction amplifier.
- In accordance with a first aspect of the present invention, there is provided a phase correction amplifier including: a GaAs field effect transistor; and a Si field effect transistor or a Si bipolar transistor; wherein the GaAs field effect transistor and the Si field effect transistor or the Si bipolar transistor are cascade-connected each other.
- In accordance with a second aspect of the present invention, there is provided a phase correction amplifier including: a GaAs field effect transistor; and a Si field effect transistor or a Si bipolar transistor; wherein the GaAs field effect transistor and the Si field effect transistor or the Si bipolar transistor are cascade-connected each other through a variable attenuator.
- In accordance with a third aspect of the present invention, there is provided a feed-forward amplifier including: a distortion extracting loop consisting of a main amplifier signal path and a linear signal path in order to distribute a transmission signal; a directional coupler for receiving an output signal through the main amplifier signal path and an output signal through the linear signal path; a distortion eliminating loop consisting of a sub-amplifier signal path and a linear signal path in order to input an output signal from the directional coupler; and a power compositor for receiving an output signal through the sub-amplifier signal path and an output signal through the linear signal path, and coupling both the output signals.
- In a preferred embodiment, each of the main amplifier and the sub-amplifier is constituted by a phase correction amplifier comprising a GaAs field effect transistor, and a Si field effect transistor or a Si bipolar transistor, wherein the GaAs field effect transistor and the Si field effect transistor or the Si bipolar transistor are cascade-connected each other through a variable attenuator.
- FIG. 1 shows a feed-forward amplifier according to an embodiment of the present invention;
- FIG. 2A is a graph for explaining a relationship between an amplitude level (Gain, dB) and an input level for an AM-AM characteristic in the case of a GaAs FET;
- FIG. 2B is a graph for explaining a relationship between a phase degree and an input level for an AM-PM characteristic in the case of the GaAs FET;
- FIG. 3A is the AM-AM characteristic in the case of a MOS FET;
- FIG. 3B is the AM-PM characteristic in the case of the MOS FET.
- FIG. 4A is a graph for explaining a relationship between an amplitude level (Gain, dB) and an input level for the AM-AM characteristic;
- FIG. 4B is a graph for explaining a relationship between a phase degree and an input level for the AM-PM characteristic;
- FIG. 5A is a graph for explaining a relationship between an amplitude level/phase degree and a relative output level (dB) for the AM-AM and the AM-PM characteristics on a linear signal path;
- FIG. 5B is a graph for explaining a relationship between an amplitude level/phase degree and a relative output level (dB) for the AM-AM and the AM-PM characteristics on a sub-amplifier signal path;
- FIG. 5C is a graph for explaining a relationship between quantity of suppressed distortion and frequencies;
- FIG. 5D is another graph for explaining a relationship between quantity of suppressed distortion and frequencies;
- FIG. 6 shows a detailed circuit of a phase correction amplifier according to an embodiment of the present invention;
- FIG. 7 is a graph for comparing the present invention and the conventional art;
- FIG. 8 shows a feed-forward amplifier in a conventional art;
- FIG. 9 shows a detailed circuit of a main amplifier and a sub-amplifier;
- FIG. 10A is a graph for explaining a relationship between an amplitude level/phase degree and a relative output level for the AM-AM and the AM-PM characteristics on the linear signal path;
- FIG. 10B is a graph for explaining a relationship between an amplitude level/phase degree and a relative output level for the AM-AM and the AM-PM characteristics on the sub amplifier signal path;
- FIG. 10C is a graph for explaining a relationship between quantity of suppressed distortion and frequencies; and
- FIG. 10D is another graph for explaining a relationship between quantity of suppressed distortion and frequencies.
- Before describing preferred embodiments, a conventional art and its problem will be explained in detail with reference to the drawings.
- FIG. 8 shows a feed-forward amplifier in a conventional art. The feed-forward amplifier is constituted by a
distortion extracting loop 33 and adistortion eliminating loop 34 connected to thedistortion extracting loop 33 through adirectional coupler 44. - The
distortion extracting loop 33 includes aninput terminal 31, apower distributor 43 connected to theinput terminal 31, avector adjustor 41 connected to thepower distributor 43, and amain amplifier 35 connected to thevector adjustor 41 and thedirectional coupler 44. Further, 37 is a main amplifier signal path (or, simply, a signal path 37) connecting thepower distributor 43 to themain amplifier 35 through thevector adjustor power distributor 43 to thedirectional coupler 44. - On the other hand, the
distortion eliminating loop 34 includes avector adjuster 42 connected to thedirectional coupler 44, asub-amplifier 36 connected to thevector adjuster 42, apower compositor 45 and anoutput terminal 32. Further, 38 is a sub-amplifier signal path (or, simply, a signal path 38) connecting thedirectional coupler 44 to thesub-amplifier 36 through thevector adjustor directional coupler 44 to thepower compositor 45. - In the
distortion extracting loop 33, an input signal is distributed by thepower distributor 43 to thesignal path 37 andsignal path 39. The input signal on thesignal path 37 is input to themain amplifier 35 through thevector adjustor 41 and amplified by themain amplifier 35. An amplified signal is input to thedirectional coupler 44. On the other hand, the input signal on thesignal path 39 is directly input to thedirectional coupler 44. - In the
distortion eliminating loop 34, the signal amplified by themain amplifier 35 is input from thedirectional coupler 44 to thesignal path 40, and a distortion component of the signal is input from thedirectional coupler 44 to thesignal path 38. The distortion component is input to the sub-amplifier 36 through thevector adjustor 42 and amplified by the sub-amplifier 36. Further, the signal from thepath 40 and another signal from the sub-amplifier 36 are composited by thepower compositor 45 after inversion of the phase of any one of these signals. As a result, it is possible to output an amplified output signal, in which the distortion component is cancelled, from theoutput terminal 32. In general, themain amplifier 35 and the sub-amplifier 36 are generally constituted by MOS FETs. - FIG. 9 shows a detailed circuit of the
main amplifier 35 and the sub-amplifier 36. Q3 and Q4 are MOS FETS, C is a coupling condenser, Vg denotes a gate bias voltage, and Vd denotes a drain voltage. As shown in the drawing, the amplifier is constituted by two MOS FETs Q3 and Q4 which are coupled through the coupling condenser C. In general, the drain voltage Vd is 25V. Further, although the remaining circuit, which is constituted by condensers, inductors and resistors, is shown as a lumped parameter circuit, this circuit can be constituted by a distributed constant circuit using strip lines so that matching circuits and bias circuits are shown in the drawing. - FIG. 10A is a graph for explaining a relationship between an amplitude level/phase degree and a relative output level for an AM-AM and AM-PM characteristics on the linear signal path, and FIG. 10B is a graph for explaining a relationship between an amplitude level/phase degree and a relative output level for AM-AM and AM-PM characteristics on the sub-amplifier signal path. Further, FIG. 10C is a graph for explaining a relationship between quantity of suppressed distortion and frequencies, and FIG. 10D is another graph for explaining a relationship between quantity of suppressed distortion and frequencies.
- In FIGS. 10A and 10B, the AM-AM characteristic represents the characteristic between fluctuation of an input level and fluctuation of an output level, and the AM-PM represents the characteristic between fluctuation of an input level and fluctuation of an output phase. In this case, the graph in FIG. 10A is in the case of fluctuation on the
linear signal path 40 in thedistortion eliminating loop 34 when the MOS FET amplifier is used as the sub-amplifier 36, and the graph in FIG. 10B is in the case of fluctuation on thesub-amplifier signal path 38 in thedistortion eliminating loop 34. - As shown in FIG. 10C, when an average power (or, an effective power) is 0 (dB), and when the peak envelope power is 9 (dB), the quantity (dB) of the suppressed distortion within a band of signal frequency at the average power is −40 (dB). On the other hand, as shown in FIG. 10D, when the relative output level of the peak envelope power is 9 (dB), the quantity (dB) of the suppressed distortion is −25 (dB). That is, the peak envelope power becomes larger, the quantity of the suppressed distortion becomes considerably smaller.
- In mobile communication systems, there are an increased of the number of subscribers and a requirement for a large capacity for data transmission in order to handle multimedia. For example, there are increases in the number of carrier frequencies in a PDC (Personal Digital Cellular) system and increase of multiplexed codes in a CDMA (Code Division Multiple Access) system. As a result of increase of these parameters, the peak envelope power of the carrier frequency becomes larger, and the signal distortion becomes larger, even if the feed-forward amplifier is applied to the mobile communication system.
- That is, as shown by the AM-AM and AM-PM characteristics in FIG. 10A, if the AM-AM and AM-PM characteristics are linear on the
sub-amplifier signal path 38, it may be possible to eliminate the signal distortion. However, in actuality, since the sub-amplifier 36 includes non-linear elements, the sub-amplifier 36 has non-linear characteristic as shown in FIG. 10B so that the amplitude and phase cannot follow instantaneous increase of the peak envelope power. As a result, there is problem in which the quantity of suppressed distortion is decreased. - Accordingly, in order to resolve the above problems, the present invention aims to correct the phase characteristic, and to maintain the quantity of sufficiently suppressed distortion for the feed-forward amplifier even if the peak envelope power is increased.
- FIG. 1 shows a feed-forward amplifier according to an embodiment of the present invention. In FIG. 1,
reference number 1 is an input terminal, 2 is an output terminal, 3 is a distortion extracting loop, 4 is a distortion eliminating loop, 5 is a main amplifier, 6 is a sub-amplifier, 7 is a main amplifier signal path, 8 is a sub-amplifier signal path, 9 and 10 are linear signal paths, 11 and 12 are vector adjusters, 13 is a power distributor, 14 is a directional coupler, 15 is a power compositor, A1 to A4 are transistors. - As explained in the following drawings, in the present invention, the
main amplifier 5 in thedistortion extracting loop 3 and thesub-amplifier 6 in thedistortion eliminating loop 4 are constituted by transistors each having different phase characteristic. For example, the preceding transistors A1 and A3 in the main andsub-amplifiers - The transistors A1 and A2 (i.e., GaAs FET and the MOS FET) are cascade-connected each other. This means that, as explained below, when the GaAs FET is used as the preceding transistor (A1), the MOS FET is used as the following transistor (A2), and further, when the MOS FET is used as the preceding transistor (A1), the GaAs FET is used as the following transistor (A2).
- Similarly, the transistors A3 and A4 are cascade-connected each other. That is, when the GaAs FET is used as the preceding transistor (A3), the MOS FET is used as the following transistor (A4), and further, when the MOS FET is used as the preceding transistor (A3), the GaAs FET is used as the following transistor (A4).
- In this embodiment, the GaAs FET is used as the preceding transistor, and the MOS FET (or Si-bipolar) is used as the following transistor. Further, in general, 10 (V) is used as the power voltage of the GaAs FET, and 20 to 30 (V) are used as the power voltage of the MOS FET. Accordingly, it is preferable to use the MOS FET having a high power voltage as the following transistors A2 and A4 in view of an output power, etc.
- FIG. 2A is a graph for explaining a relationship between an amplitude level (Gain, dB) and an input level for an AM-AM characteristic in the case of the GaAs FET, and FIG. 2B is a graph for explaining a relationship between a phase degree and an input level for an AM-PM characteristic in the case of the GaAs FET. On the other hand, FIG. 3A is the AM-AM characteristic in the case of the MOS FET, and FIG. 3B is the AM-PM characteristic in the case of the MOS FET.
- In FIGS. 2A, 2B,3A and 3B, these characteristics were measured in the frequency of 2.1 GHz. Further, the input level Pin (dBm) at an abscissa is in the range of −20 to 0 (dBm), and the amplitude (Gain (dB)) at an ordinate is shown by one dB per one scale (i.e., 1 dB/). Still further, the phase (deg.) at the ordinate is shown by 2 degrees per one scale (i.e., 2°/).
- The AM-AM and the AM-PM characteristics shown in FIGS. 3A and 3B are in the case of the amplifier using only MOS FETs. In this case, measuring conditions and the ordinate/abscissa are the same as that of FIGS. 2A and 2B. As is obvious from FIGS. 2A and 3A, the AM-AM characteristic of the GaAs FET amplifier is approximately equal to that of the MOS FET amplifier. However, as is obvious from in FIGS. 2B and 3B, the AM-PM characteristic of the GaAs FET amplifier has inverse phase characteristic for that of the MOS FET amplifier.
- FIG. 4A is a graph for explaining a relationship between an amplitude level (Gain, dB) and an input level for an AM-AM characteristic, and FIG. 4B is a graph for explaining a relationship between a phase degree and an input level for an AM-PM characteristic. In both
main amplifier 5 and thesub-amplifier 6, the preceding transistor is the GaAs FET, and the following transistor is the MOS FET. In this case, the measuring conditions of FIGS. 4A and 4B are the same as that of FIGS. 2A and 2B. - As shown by the AM-PM characteristic in FIG. 4B, in the phase correction amplifier according to the embodiment of the present invention, when the input level (Pin (dBm)) is increased, the fluctuation (i.e., change) of the phase is very small so that it is possible to provide an amplifier having improved AM-PM characteristic.
- FIG. 5A is a graph for explaining a relationship between an amplitude level/phase degree and a relative output level (dB) for an AM-AM and AM-PM characteristics on the linear signal path, and FIG. 5B is a graph for explaining a relationship between an amplitude level/phase degree and a relative output level (dB) for an AM-AM and AM-PM characteristics on the sub-amplifier signal path. Further, FIG. 5C is a graph for explaining a relationship between quantity of suppressed distortion and frequencies, and FIG. 5D is another graph for explaining a relationship between quantity of suppressed distortion and frequencies.
- In FIGS. 5A and 5B, the AM-AM characteristic represents the characteristic between fluctuation of an input level and fluctuation of an output level, and the AM-PM represents the characteristic between fluctuation of an input level and fluctuation of an output phase. In this case, the graph in FIG. 5A is in the case of fluctuation on the
linear signal path 10 in thedistortion eliminating loop 4, and the graph in FIG. SB is in the case of fluctuation on thesub-amplifier signal path 8 in thedistortion eliminating loop 4. - The abscissa of FIGS. 5A and 5B show the relative output level (dB), the average power is 0 (dB), and the peak envelope power is 9 (dB). Further, the ordinate shows the amplitude level (dB) and the phase (deg.). In this case, the phase is 0° as a reference level in FIG. 5A, and the phase is 180° as the reference level in FIG. 5B since the phase is inverted.
- When the relative output power is 0 (dB), the quantity of suppressed distortion (dB) at the average power is shown in FIG. 5C. Further, when the peak envelope power is 9 (dB), the quantity of suppressed distortion (dB) is shown in FIG. 5D. In this case, the abscissa shows the frequency, and the ordinate shows the quantity of suppressed distortion.
- As is obvious from comparison with FIG. 9, since the
sub-amplifier 6 on thesub-amplifier signal path 8 is constituted by the phase correction amplifier, it is possible to realize small fluctuations of the input level at the peak envelope power so that it is possible to obtain the characteristic similar to the characteristic in the case of the linear signal path. Accordingly, since the distortion can be surely eliminated, it is possible to realize −35 dB as the quantity of suppressed distortion as shown in FIG. 5D. - FIG. 6 shows a detailed circuit of the phase correction amplifier according to the embodiment of the present invention. In the drawing, Q1 is a GaAs FET, and Q2 is a MOS FET. Further, ATT is a variable attenuator, C1 and C2 are coupling condensers, Vg1 and Vg2 are gate bias voltages, and Vd1 and Vd2 are drain voltages. Further, although the remaining circuit, which is constituted by condensers, inductors and resistors, is shown by the distributed constant circuit using strip lines.
- In this embodiment, the GaAs FET is used as the preceding transistor, and the MOS FET is used as the following transistor. The preceding transistor Q1 (GaAs FET) is connected to the following transistor Q2 (MOS FET) through the coupling condenser Cl, the attenuator ATT and the coupling condenser C2. Accordingly, the input level of the MOS FET can be adjusted by the attenuator ATT so that it is possible to improve precision of the phase correction characteristic.
- As another embodiment, the MOS FET can be provided as the preceding transistor, and the GaAs FET can be provided as the following transistor. Further, the attenuator ATT can be eliminated if it is not necessary to adjust the input level of the following transistor.
- The drain voltage Vdl of the GaAs FET is approximately 10 (V), and the drain voltage Vd2 of the MOS FET is approximately 25 (V). As mentioned above, although two kinds of voltages, i.e., 10 (V) and 25 (V), are required as the drain voltage, this is because the desired voltage can be easily obtained by a DC-DC converter.
- FIG. 7 is a graph for comparing the present invention and the conventional art. In the drawing, thin and thick solid lines (A, B) are in the case of the present invention, and thin and thick chain-dotted lines (a, b) are in the case of the conventional art. Further, the ordinate shows leakage power (dBm), and the abscissa shows peak level (relative value) (dB).
- Still further, the thin chain-dotted line “a” represents the leakage power when the phase correction was not performed, and the thin solid line “A” represents the leakage power when the phase correction was performed. On the other hand, the thick chain-doted line “b” represents the quantity of suppressed distortion when the phase correction was not performed, and the thick solid line “B” represents the quantity of suppressed distortion when the phase correction was performed.
- In this case, the leakage power represents the power which is input to the sub-amplifier signal path (8, 38) in the distortion eliminating loop (4, 34) through the directional coupler (14, 44), without cancellation of the characteristic when vectors are shifted in the non-linear area of the AM-AM and AM-PM characteristics. Accordingly, when the linear characteristic of the main amplifier is bad so that the AM-AM and AM-PM characteristics are shifted, the leakage power on the signal path (8, 38) becomes large, and the operation level of the sub-amplifier becomes high. Necessarily, the operation in the non-linear area makes a feed-forward compensating characteristic worse, and the distortion characteristic also becomes worse.
- Accordingly, as the relationship between the leakage power and the distortion component, it is possible to explain that the distortion component includes the peak leakage power and is input to the sub-amplifier signal path (8, 38). That is, when the linear characteristic of the main amplifier is good, the distortion component can be expressed as a low peak distortion. On the other hand, when the linear characteristic of the main amplifier is bad, the distortion component can be expressed as a high peak distortion.
- In the present invention, since the
main amplifier 5 in thedistortion extracting loop 3 is constituted by the phase correction amplifier, even if the peak level (dB) is high, the leakage power is reduced by several dB compared to the conventional art as shown by the thin solid line “A” in the graph. - On the other hand, in the quantity of suppressed distortion according to the present invention, −40 (dB) can be maintained until the peak level is9 (dB) as shown by the thick solid line “B”. In the conventional art, however, when the peak level exceeds 6 (dB), the quantity of suppressed distortion is reduced, and when the peak level is 8 (dB), the quantity of suppressed distortion becomes approximately -27 (dB) as shown by the thick chain-dotted line “b”.
- That is, according to the present invention, the quantity of suppressed distortion can be considerably improved as shown by an arrow on the curve “B”. Further, since the phase characteristic of the MOS FET is similar to that of the Si-bipolar, it is possible to constitute the phase correction amplifier by combining the GaAs FET with the Si-bipolar.
Claims (6)
1. A phase correction amplifier comprising:
a GaAs field effect transistor; and
a Si field effect transistor or a Si bipolar transistor;
wherein the GaAs field effect transistor and the Si field effect transistor or the Si bipolar transistor are cascade-connected each other.
2. A phase correction amplifier comprising:
a GaAs field effect transistor; and
a Si field effect transistor or a Si bipolar transistor;
wherein the GaAs field effect transistor and the Si field effect transistor or the Si bipolar transistor are cascade-connected each other through a variable attenuator.
3. A feed-forward amplifier comprising:
a distortion extracting loop consisting of a main amplifier signal path and a linear signal path in order to distribute a transmission signal;
a directional coupler for receiving an output signal through the main amplifier signal path and an output signal through the linear signal path;
a distortion eliminating loop consisting of a sub-amplifier signal path and a linear signal path in order to input an output signal from the directional coupler; and
a power compositor for receiving an output signal through the sub-amplifier signal path and an output signal through the linear signal path, and coupling both the output signals.
4. A feed-forward amplifier as claimed in claim 3 , wherein each of the main amplifier and the sub-amplifier is constituted by a phase correction amplifier comprising a GaAs field effect transistor, and a Si field effect transistor or a Si bipolar transistor, wherein the GaAs field effect transistor and the Si field effect transistor or the Si bipolar transistor are cascade-connected each other through a variable attenuator.
5. A phase correction amplifier comprising:
a first transistor having a characteristic of an input level-to-an output phase in which, when the input level is increased, the output phase is gradually increased; and
a second transistor having a characteristic of an input level-to-an output phase in which, when the input level is increased, the output phase is gradually decreased;
wherein the first transistor and the second transistor are cascade-connected each other through an input level controller.
6. A phase correction amplifier as claimed in claim 5 , wherein said first transistor is a GaAs field effect transistor; said second transistor is a Si field effect transistor or a Si bipolar transistor; and said input level controller is a variable attenuator.
Priority Applications (1)
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US09/966,174 US20020017955A1 (en) | 1999-03-01 | 2001-09-28 | Phase correction amplifier and a feed-forward amplifier using the same |
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JP11-052406 | 1999-03-01 | ||
JP11052406A JP2000252758A (en) | 1999-03-01 | 1999-03-01 | Phase correction amplifier and feedforward amplifier using the phase correction amplifier |
US09/491,149 US6313702B1 (en) | 1999-03-01 | 2000-01-26 | Phase correction amplifier and a feed-forward amplifier using the same |
US09/966,174 US20020017955A1 (en) | 1999-03-01 | 2001-09-28 | Phase correction amplifier and a feed-forward amplifier using the same |
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US09/491,149 Division US6313702B1 (en) | 1999-03-01 | 2000-01-26 | Phase correction amplifier and a feed-forward amplifier using the same |
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US09/966,174 Abandoned US20020017955A1 (en) | 1999-03-01 | 2001-09-28 | Phase correction amplifier and a feed-forward amplifier using the same |
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CN110661539A (en) * | 2019-09-20 | 2020-01-07 | 锐捷网络股份有限公司 | Data receiving circuit, method, device, equipment and medium |
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WO2002047409A1 (en) * | 2000-12-08 | 2002-06-13 | Matsushita Electric Industrial Co., Ltd. | Radio communication base station system including optical advanced base station |
CN1241324C (en) * | 2001-07-18 | 2006-02-08 | 松下电器产业株式会社 | Feed forward amplifier and feed forward amplifying method |
KR101400862B1 (en) * | 2007-09-19 | 2014-05-28 | 삼성전자주식회사 | Apparatus and method for low noise amplify in wireless communication system |
CN104868487B (en) * | 2015-05-07 | 2017-08-29 | 国家电网公司 | Low-frequency range suppresses reinforced anti-reflective and adjusts electric system stabilizing method |
Family Cites Families (14)
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FR2418981A1 (en) * | 1978-03-03 | 1979-09-28 | Lignes Telegraph Telephon | AMPLIFICATION CIRCUIT FOR HYPERFREQUENCY TELECOMMUNICATION |
JPH0777330B2 (en) | 1988-02-03 | 1995-08-16 | 日本電信電話株式会社 | Feedforward amplifier automatic adjustment circuit |
JPH0785523B2 (en) | 1988-02-05 | 1995-09-13 | 日本電信電話株式会社 | Non-linear distortion compensation circuit |
JP2948279B2 (en) | 1990-07-25 | 1999-09-13 | 日本電信電話株式会社 | Feedforward amplifier |
JP2799911B2 (en) | 1991-03-14 | 1998-09-21 | 日本電信電話株式会社 | Feedforward amplifier |
JP2945451B2 (en) | 1990-07-25 | 1999-09-06 | 日本電信電話株式会社 | Feedforward amplifier |
JP2711413B2 (en) | 1990-12-28 | 1998-02-10 | 日本電信電話株式会社 | Feedforward amplifier |
JP2711414B2 (en) | 1990-12-28 | 1998-02-10 | 日本電信電話株式会社 | Feedforward amplifier |
JP2945447B2 (en) | 1990-07-11 | 1999-09-06 | 日本電信電話株式会社 | Feedforward amplifier |
US5565814A (en) * | 1994-12-21 | 1996-10-15 | Nec Corporation | Feedforward amplifier using frequency changeable pilot signal |
JP3361657B2 (en) * | 1995-07-20 | 2003-01-07 | 松下電器産業株式会社 | Control device and control method for feedforward amplifier |
US5796307A (en) * | 1995-11-16 | 1998-08-18 | Ntt Mobile Communications Network Inc. | Amplifying device having input and output nonlinear phase shifters of opposite phase-frequency characteristics |
US6172567B1 (en) * | 1998-08-31 | 2001-01-09 | Hitachi, Ltd. | Radio communication apparatus and radio frequency power amplifier |
JP4015782B2 (en) * | 1998-10-22 | 2007-11-28 | 日本無線株式会社 | Feedforward nonlinear distortion compensation amplifier |
-
1999
- 1999-03-01 JP JP11052406A patent/JP2000252758A/en active Pending
-
2000
- 2000-01-26 US US09/491,149 patent/US6313702B1/en not_active Expired - Fee Related
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CN110661539A (en) * | 2019-09-20 | 2020-01-07 | 锐捷网络股份有限公司 | Data receiving circuit, method, device, equipment and medium |
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