US20020001878A1 - A method for encapsulating with a fixing member to secure an electronic device - Google Patents

A method for encapsulating with a fixing member to secure an electronic device Download PDF

Info

Publication number
US20020001878A1
US20020001878A1 US09/157,458 US15745898A US2002001878A1 US 20020001878 A1 US20020001878 A1 US 20020001878A1 US 15745898 A US15745898 A US 15745898A US 2002001878 A1 US2002001878 A1 US 2002001878A1
Authority
US
United States
Prior art keywords
electronic device
fixing member
packing
pins
product
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
US09/157,458
Other versions
US6383841B2 (en
Inventor
Allen Li
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Delta Electronics Inc
Original Assignee
Delta Electronics Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Delta Electronics Inc filed Critical Delta Electronics Inc
Assigned to DELTA ELECTRONICS, INC. reassignment DELTA ELECTRONICS, INC. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: LI, ALLEN
Publication of US20020001878A1 publication Critical patent/US20020001878A1/en
Application granted granted Critical
Publication of US6383841B2 publication Critical patent/US6383841B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits

Definitions

  • the present invention relates to a method for packing electronic device.
  • FIG. 1 shows that the chip ( 10 ) having a plurality of connectors is put on a support ( 111 ) of a frame ( 11 ) having a plurality of connecting pins ( 112 ) corresponding to the plurality of connectors.
  • the connecting member ( 112 ) are electrically connected to the plurality of pins by a plurality of metal wires ( 13 ).
  • a filling medium ( 14 ) is applied on the chip ( 10 ) or between the chip ( 10 ) and the frame ( 11 ) to form a semi-product.
  • the semi-product is packed and hardened by a plastic molding process to form a product.
  • the traditional electronic device having a circuit ( 20 ) (including a printed circuit board (PCB) or not) is electrically connected to the plurality of connecting members of a frame ( 21 ) through a plurality of metal wires ( 23 ). Consequently, a filling medium ( 24 ) is applied on the surface of the electronic device ( 20 ) or between the electronic device and the connecting members ( 212 ) to form a semi-product.
  • the semi-product is further packed by a plastic molding process to form product.
  • the present invention provides a method for improving the above-described.
  • the present inventions provide an effective method for packing the electronic devices by using a fixing member to avoid an impact in packing process.
  • An object of the present invention is to provide a practical method for packing an electronic device.
  • the method includes the steps of (a) putting an electronic device having a plurality of pins in a frame having a plurality of connecting members corresponding to the plurality of pins, (b) electrically connecting the plurality of pins of the electronic device with the corresponding connecting members, (c) mounting a fixing member on the frame to fix the electronic device with respect to the frame to form a semi-product, and (d) packing the semi-product with the fixing member.
  • the electronic device includes a chip or a functional block having circuits thereon.
  • the plurality of pins are electrically connected to the corresponding connecting members by welding wires between the pins and the corresponding connecting members.
  • the step (b) further includes a step of (b 1 ) applying a filling medium between the electronic device and the frame.
  • the step (c) further includes a step of (c 1 ) mounting another fixing member under the electronic device.
  • the fixing member is an adhering piece made of a molding material.
  • the step (d) further includes: (d 1 ) providing a mold enveloping the electronic device and the fixing member; (d 2 ) filling a packing medium into the mold; and (d 3 ) curing the fixing member and the packing medium.
  • FIG. 1 shows a structure for packing a chip according to prior art
  • FIG. 2 a shows a structure for packing an electronic device according to prior art
  • FIG. 2 b is a side view of a packing structure in FIG. 2 a;
  • FIG. 3 a shows a preferred embodiment of a method for packing electronic device according to the present invention
  • FIG. 3 b is a side view of a packing structure shown in FIG. 3 a;
  • FIG. 4 a shows a preferred embodiment of a method for packing a chip according to the present invention
  • FIG. 4 b shows a structure for packing IC according to the present invention
  • FIG. 5 shows a structure of an electronic circuit with the printed circuit board (PCB).
  • FIG. 6 shows a structure of an electronic circuit having a functional block.
  • FIG. 3 a and FIG. 3 b show the first preferable embodiment of present invention for packing an electronic device.
  • an electronic device having a circuit ( 30 ) is put in a frame ( 31 ).
  • FIG. 5 shows the electronic device has a circuit structure in printed circuit board (PCB).
  • FIG. 6 shows an electronic device with a functional block which does not include PCB.
  • a plurality of metal wires ( 33 ) was used to make an electrical connection between a plurality of pins in the electronic device ( 30 ) and a plurality of corresponding connecting members ( 312 ) in the frame ( 31 ).
  • a filling medium ( 34 ) is applied between the electronic device ( 31 ) and connecting members ( 312 ) to fix the electronic device in the center of the frame ( 31 ) to form a semi-product.
  • the above described method is the same as the prior art.
  • Two fixing members ( 35 ), ( 36 ) are respectively attached to the top and bottom surface of the semi-product to fix the semi-product.
  • a plastic molding process is performed to pack the semi-product. The process includes following steps as: providing a mold enveloping the electronic device and the fixing member, filling a packing medium into the mold, and curing the fixing member and the packing medium.
  • the fixing member is an adhering piece made of a molding material.
  • the fixing members ( 35 ), ( 36 ) can protect the semi-product from an impact in the plastic molding. The impact often causes an exposure of the semi-product or the breakage of the electrical contact wires. So, according to the present invention, the semi-product is not so required to be precisely positioned like the prior art.
  • the flux design of the mold can also be simplified. Therefore, the present invention can greatly reduce the design cost and the manufacturing cost.
  • the fixing member can effectively fix the semi-product and protect the semi-product from being impacted. It is unnecessary to allow the semi-product to have a lot of safely moving space. Thus, the package of the electronic device can be minimized. This method will greatly simplify the packing process and reduce the cost of production.
  • FIG. 4( a ) and FIG. 4( b ) show the second preferred embodiment of the method of present invention for packing a chip.
  • a chip ( 40 ) having a circuit thereon is put on a support ( 411 ) in the frame ( 41 ).
  • a plurality of metal wires ( 43 ) is used to make an electrical connection between a plurality of pins in the electronic device ( 40 ) and a plurality of corresponding connectors in the frame ( 412 ).
  • a filling medium ( 44 ) is applied between the chip and the frame to form a semi-product.
  • the fixing members ( 45 ), ( 46 ) are mounted on the chip to fix the chip with respect to the frame.
  • the final process is to provide a mold enveloping the electronic device and the fixing member. Then, filling a packing medium into the mold, the fixing member and the packing medium are cured to form product.

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Packaging Frangible Articles (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

The present invention is to provide a effective method for packing an electronic device including steps of: (a) putting an electronic device having a plurality of pins in a frame having a plurality of connecting members corresponding to said plurality of pins; (b) electrically connecting the plurality of pins of the electronic device with the corresponding connecting members; (c) mounting a fixing member on the electronic device to fix the electronic device with respect to the frame to form a semi-product; and (d) packing the semi-product with the fixing member.

Description

    FIELD OF THE INVENTION
  • The present invention relates to a method for packing electronic device. [0001]
    • BACKGROUND OF THE INVENTION
  • The packing structure of electronic device are genarally classified into two type as follows: [0002]
  • 1. Chip [0003]
  • FIG. 1 shows that the chip ([0004] 10) having a plurality of connectors is put on a suport (111) of a frame (11) having a plurality of connecting pins (112) corresponding to the plurality of connectors. The connecting member (112) are electrically connected to the plurality of pins by a plurality of metal wires (13). Then, a filling medium (14) is applied on the chip (10) or between the chip (10) and the frame (11) to form a semi-product. Finally, the semi-product is packed and hardened by a plastic molding process to form a product.
  • 2. General electronic device [0005]
  • As shown in FIG. 2[0006] a and FIG. 2b, the traditional electronic device having a circuit (20) (including a printed circuit board (PCB) or not) is electrically connected to the plurality of connecting members of a frame (21) through a plurality of metal wires (23). Consequently, a filling medium (24) is applied on the surface of the electronic device (20) or between the electronic device and the connecting members (212) to form a semi-product. The semi-product is further packed by a plastic molding process to form product.
  • However, the methods of traditional packing electronic device still have some disavantages as following: [0007]
  • 1. The semi-product must be precisely fixed in the center of packing structure. If not, it will cause the semi-product to be exposed during the packing process. [0008]
  • 2. During the plastic molding process, the filling medium must be evenly distributed in the mold in order to prevent an excess of the filling medium in one side of the mold. Otherwise, the semi-product will be shifted and exposed. [0009]
  • Therefore, the present invention provides a method for improving the above-described. [0010]
    • SUMMARY OF THE INVENTION
  • The present inventions provide an effective method for packing the electronic devices by using a fixing member to avoid an impact in packing process. [0011]
  • An object of the present invention is to provide a practical method for packing an electronic device. The method includes the steps of (a) putting an electronic device having a plurality of pins in a frame having a plurality of connecting members corresponding to the plurality of pins, (b) electrically connecting the plurality of pins of the electronic device with the corresponding connecting members, (c) mounting a fixing member on the frame to fix the electronic device with respect to the frame to form a semi-product, and (d) packing the semi-product with the fixing member. [0012]
  • In accordance with an aspect of the present invention, the electronic device includes a chip or a functional block having circuits thereon. [0013]
  • In accordance with another aspect of the present invention, in the step (b), the plurality of pins are electrically connected to the corresponding connecting members by welding wires between the pins and the corresponding connecting members. [0014]
  • In accordance with another aspect of the present invention, the step (b) further includes a step of (b[0015] 1) applying a filling medium between the electronic device and the frame.
  • In accordance with another aspect of the present invention, the step (c) further includes a step of (c[0016] 1) mounting another fixing member under the electronic device.
  • In accordance with another aspect of the present invention in the step (c), the fixing member is an adhering piece made of a molding material. [0017]
  • In accordance with another aspect of the present invention, the step (d) further includes: (d[0018] 1) providing a mold enveloping the electronic device and the fixing member; (d2) filling a packing medium into the mold; and (d3) curing the fixing member and the packing medium.
  • The present invention may best be understood through the following description with reference to the accompanying drawings, in which:[0019]
    • BRIEF DESCRIPTION OF THE DRAWINGS
  • FIG. 1 shows a structure for packing a chip according to prior art; [0020]
  • FIG. 2[0021] a shows a structure for packing an electronic device according to prior art;
  • FIG. 2[0022] b is a side view of a packing structure in FIG. 2a;
  • FIG. 3[0023] a shows a preferred embodiment of a method for packing electronic device according to the present invention;
  • FIG. 3[0024] b is a side view of a packing structure shown in FIG. 3a;
  • FIG. 4[0025] a shows a preferred embodiment of a method for packing a chip according to the present invention;
  • FIG. 4[0026] b shows a structure for packing IC according to the present invention;
  • FIG. 5 shows a structure of an electronic circuit with the printed circuit board (PCB); and [0027]
  • FIG. 6 shows a structure of an electronic circuit having a functional block.[0028]
    • DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
  • FIG. 3[0029] a and FIG. 3b show the first preferable embodiment of present invention for packing an electronic device. Firstly, an electronic device having a circuit (30) is put in a frame (31). FIG. 5 shows the electronic device has a circuit structure in printed circuit board (PCB). FIG. 6 shows an electronic device with a functional block which does not include PCB. A plurality of metal wires (33) was used to make an electrical connection between a plurality of pins in the electronic device (30) and a plurality of corresponding connecting members (312) in the frame (31). Then, a filling medium (34) is applied between the electronic device (31) and connecting members (312) to fix the electronic device in the center of the frame (31) to form a semi-product. The above described method is the same as the prior art. Two fixing members (35), (36) are respectively attached to the top and bottom surface of the semi-product to fix the semi-product. Finally, a plastic molding process is performed to pack the semi-product. The process includes following steps as: providing a mold enveloping the electronic device and the fixing member, filling a packing medium into the mold, and curing the fixing member and the packing medium.
  • The fixing member is an adhering piece made of a molding material. The fixing members ([0030] 35), (36) can protect the semi-product from an impact in the plastic molding. The impact often causes an exposure of the semi-product or the breakage of the electrical contact wires. So, according to the present invention, the semi-product is not so required to be precisely positioned like the prior art. In addition, the flux design of the mold can also be simplified. Therefore, the present invention can greatly reduce the design cost and the manufacturing cost. The fixing member can effectively fix the semi-product and protect the semi-product from being impacted. It is unnecessary to allow the semi-product to have a lot of safely moving space. Thus, the package of the electronic device can be minimized. This method will greatly simplify the packing process and reduce the cost of production.
  • Moreover, the same method is applied on the package of a chip. As FIG. 4([0031] a) and FIG. 4(b) show the second preferred embodiment of the method of present invention for packing a chip. First of all, a chip (40) having a circuit thereon is put on a support (411) in the frame (41). Thereafter, a plurality of metal wires (43) is used to make an electrical connection between a plurality of pins in the electronic device (40) and a plurality of corresponding connectors in the frame (412). Then, a filling medium (44) is applied between the chip and the frame to form a semi-product. The fixing members (45), (46) are mounted on the chip to fix the chip with respect to the frame. The final process is to provide a mold enveloping the electronic device and the fixing member. Then, filling a packing medium into the mold, the fixing member and the packing medium are cured to form product.
  • While the invention has been described in terms of what are presently considered to be the most practical and preferred embodiments, it is to be understood that the invention needs not be limited to the disclosed embodiment. On the contrary, it is intended to cover various modifications and similar arrangements included within the spirit and scope of the appended claims which are to be accorded with the broadest interpretation so as to encompass all such modifications and similar structures. [0032]

Claims (7)

What is claimed is:
1. A method for packing an electronic device comprising steps of:
(a) putting an electronic device having a plurality of pins in a frame having a plurality of connecting members corresponding to said plurality of pins;
(b) electrically connecting said plurality of pins of said electronic device with said corresponding connecting members;
(c) mounting a fixing member on said electronic device to fix said electronic device with respect to said frame to form a semi-product; and
(d) packing said semi-product with said fixing member.
2. A method of claim 1, wherein said electronic device comprises a chip having circuits thereon.
3. A method of claim 1, wherein in said step (a), said plurality of pins are electrically connected to said corresponding connecting members by welding wires between said pins and said corresponding connecting members.
4. A method of claim 1, wherein before said step (b) further comprises a step of (b1) applying a filling medium between said electronic device and said frame.
5. A method of claim 1, wherein said step (c) further comprising a step of (c1) mounting another fixing member under said electronic device.
6. A method of claim 1, wherein in step (c), said fixing member is an adhering piece made of a molding material.
7. A method of claim 1, wherein said step (d) further comprises steps of
(d1) providing a mold enveloping said electronic device and said fixing member;
(d2) filling a packing medium into said mold; and
(d3) curing said fixing member and said packing medium.
US09/157,458 1998-03-12 1998-09-21 Method for encapsulating with a fixing member to secure an electronic device Expired - Fee Related US6383841B2 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
TW87103686 1998-03-12
TW087103686A TW469611B (en) 1998-03-12 1998-03-12 Packaging method for electronic device

Publications (2)

Publication Number Publication Date
US20020001878A1 true US20020001878A1 (en) 2002-01-03
US6383841B2 US6383841B2 (en) 2002-05-07

Family

ID=21629675

Family Applications (1)

Application Number Title Priority Date Filing Date
US09/157,458 Expired - Fee Related US6383841B2 (en) 1998-03-12 1998-09-21 Method for encapsulating with a fixing member to secure an electronic device

Country Status (2)

Country Link
US (1) US6383841B2 (en)
TW (1) TW469611B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7067905B2 (en) * 2002-08-08 2006-06-27 Micron Technology, Inc. Packaged microelectronic devices including first and second casings

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4163072A (en) * 1977-06-07 1979-07-31 Bell Telephone Laboratories, Incorporated Encapsulation of circuits
JPH0382059A (en) * 1989-08-24 1991-04-08 Nec Corp Resin sealed type semiconductor device
JP2936669B2 (en) * 1990-08-07 1999-08-23 株式会社デンソー Resin-sealed semiconductor device
JP2973506B2 (en) * 1990-10-30 1999-11-08 日本電気株式会社 Method of manufacturing resin-encapsulated semiconductor device
US5641997A (en) * 1993-09-14 1997-06-24 Kabushiki Kaisha Toshiba Plastic-encapsulated semiconductor device
JP2531382B2 (en) * 1994-05-26 1996-09-04 日本電気株式会社 Ball grid array semiconductor device and manufacturing method thereof
KR100206894B1 (en) * 1996-03-11 1999-07-01 구본준 Bga package
JP2871591B2 (en) * 1996-05-14 1999-03-17 日本電気株式会社 High frequency electronic component and method of manufacturing high frequency electronic component
US5904955A (en) * 1996-09-30 1999-05-18 Motorola, Inc. Encapsulation means and method

Also Published As

Publication number Publication date
TW469611B (en) 2001-12-21
US6383841B2 (en) 2002-05-07

Similar Documents

Publication Publication Date Title
AU671868B2 (en) Electronic module of extra-thin construction
US5895970A (en) Semiconductor package having semiconductor element, mounting structure of semiconductor package mounted on circuit board, and method of assembling semiconductor package
GB2285342A (en) Integrated circuit arrangements
KR970067788A (en) Semiconductor device, manufacturing method and substrate frame
US6242797B1 (en) Semiconductor device having pellet mounted on radiating plate thereof
JPH08306723A (en) Electronic circuit board and its preparation
US6484394B1 (en) Encapsulation method for ball grid array semiconductor package
US20020050379A1 (en) Integrated circuit package with bond wires at the corners of an integrated circuit
US20090016040A1 (en) IC device and method of manufacturing the same
EP0548496B1 (en) A mold and a method for manufacturing semiconductor devices of plastics incorporating an exposed heat sink of metal for inspecting the soldered joint
US6101098A (en) Structure and method for mounting an electric part
EP0694966A1 (en) Package for an electronic semiconductor circuit
US6383841B2 (en) Method for encapsulating with a fixing member to secure an electronic device
US6565008B2 (en) Module card and a method for manufacturing the same
JPH1074887A (en) Electronic part and its manufacture
JP3713123B2 (en) Semiconductor device and manufacturing method thereof
EP1055193B1 (en) Data carrier with chip and fully enclosed connection means
KR100388289B1 (en) Printed Circuit Board for Ball Grid Array Semiconductor Packages
JPH10189792A (en) Semiconductor package
KR0163214B1 (en) Integrated circuit package using ceramic substrate and manufacturing method thereof
US7491568B2 (en) Wafer level package and method for making the same
JP3057884B2 (en) Lead frame
JPH10178044A (en) Semiconductor device and manufacture thereof
KR100306230B1 (en) Semiconductor package structure
JP5477999B2 (en) Semiconductor device and manufacturing method of semiconductor device

Legal Events

Date Code Title Description
AS Assignment

Owner name: DELTA ELECTRONICS, INC., TAIWAN

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:LI, ALLEN;REEL/FRAME:009483/0810

Effective date: 19980819

FEPP Fee payment procedure

Free format text: PAYOR NUMBER ASSIGNED (ORIGINAL EVENT CODE: ASPN); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY

FPAY Fee payment

Year of fee payment: 4

REMI Maintenance fee reminder mailed
LAPS Lapse for failure to pay maintenance fees
STCH Information on status: patent discontinuation

Free format text: PATENT EXPIRED DUE TO NONPAYMENT OF MAINTENANCE FEES UNDER 37 CFR 1.362

FP Lapsed due to failure to pay maintenance fee

Effective date: 20100507