US20010055191A1 - Multilayer capacitor - Google Patents
Multilayer capacitor Download PDFInfo
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- US20010055191A1 US20010055191A1 US09/805,079 US80507901A US2001055191A1 US 20010055191 A1 US20010055191 A1 US 20010055191A1 US 80507901 A US80507901 A US 80507901A US 2001055191 A1 US2001055191 A1 US 2001055191A1
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- 239000003990 capacitor Substances 0.000 title claims abstract description 202
- 239000003989 dielectric material Substances 0.000 claims abstract description 9
- 230000004907 flux Effects 0.000 description 19
- 230000000052 comparative effect Effects 0.000 description 5
- 230000009467 reduction Effects 0.000 description 5
- 239000000919 ceramic Substances 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000009774 resonance method Methods 0.000 description 2
- 230000008901 benefit Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 230000012447 hatching Effects 0.000 description 1
- 230000006698 induction Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000010287 polarization Effects 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/002—Details
- H01G4/005—Electrodes
- H01G4/012—Form of non-self-supporting electrodes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/002—Details
- H01G4/005—Electrodes
- H01G4/01—Form of self-supporting electrodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/002—Details
- H01G4/228—Terminals
- H01G4/232—Terminals electrically connecting two or more layers of a stacked or rolled capacitor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/30—Stacked capacitors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
- H05K1/023—Reduction of cross-talk, noise or electromagnetic interference using auxiliary mounted passive components or auxiliary substances
- H05K1/0231—Capacitors or dielectric substances
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
- H05K3/3442—Leadless components having edge contacts, e.g. leadless chip capacitors, chip carriers
Definitions
- the present invention relates to a multilayer capacitor and, more particularly, to a multilayer capacitor which can be advantageously used in high frequency circuits.
- FIG. 15 is a plan view of the external appearance of the multilayer capacitor 1 .
- FIG. 16 is a plan view of a first section of the multilayer capacitor 1 showing a first electrode 10 located on one surface of one internal dielectric layer 9 of the capacitor 1 .
- FIG. 17 is a plan view of a second section of the multilayer capacitor 1 showing a second electrode 11 located on one surface of a differential internal dielectric layer 9 of the capacitor 1 .
- the multilayer capacitor 1 includes a capacitor main body 8 in the form of a rectangular parallelpiped having two principal surfaces 2 and 3 in a face-to-face relationship with each other and four side surfaces 4 , 5 , 6 and 7 connecting the principal surf aces 2 and 3 .
- the capacitor main body 8 includes a plurality of dielectric layers 9 (FIGS. 16 - 17 ) made of, for example, a ceramic dielectric material. Each of the dielectrical layers is generally planar in shape and lies generally parallel to the principal surfaces 2 and 3 .
- At least a pair of first and second internal electrodes 10 and 11 are provided on respective surfaces of-the dielectric layers 9 in a face-to-face relationship with each other with a dielectric layer 9 interposed therebetween to form a capacitor unit.
- the first internal electrode 10 is formed with four lead electrodes 12 , 13 , 14 and 15 which extend to two opposing side surfaces 4 and 6 , as shown.
- Each lead electrode 12 , 13 , 14 and 15 is coupled to a respective external terminal electrode 16 , 17 , 18 and 19 provided on the side surfaces 4 and 6 of the capacitor main body 8 .
- the lead electrodes 12 and 13 are connected to the external terminal electrodes 16 and 17 , respectively, which are located on the side surface 4
- the lead electrodes 14 and 15 are connected to the external terminal electrodes 18 and 19 , respectively, which are located on the side surface 6 .
- the second internal electrode 11 is also formed with four lead electrodes 20 , 21 , 22 and 23 which extend to the side surfaces 4 and 6 , respectively. More specifically, the lead electrodes 20 and 21 extend to positions on the side surface 4 which are different from the positions to which the lead electrodes 12 and 13 extend, and the lead electrodes 22 and 23 extend to positions on the side surface 6 of the main body 8 which are different from the positions to which the lead electrodes 14 and 15 extend.
- the lead electrodes 20 through 23 are electrically coupled to external terminal electrodes 24 , 25 , 26 and 27 , respectively.
- External terminal electrodes 24 and 25 are located on the side surface 4 at positions which are different from those of the external terminal electrodes 16 and 17 .
- External terminal electrodes 26 and 27 are located on the side surface 6 at positions which are different from the positions of the external terminal electrodes 18 and 19 .
- the plurality of first external terminal electrodes 16 through 19 and the plurality of second external terminal electrodes 24 through 27 are arranged on the two side surfaces 4 and 6 such that they alternate adjacently to each other.
- FIG. 18 illustrates current flowing through the multilayer capacitor 1 as viewed in plan view corresponding to FIG. 17.
- first internal electrode 10 and second internal electrode 11 shown with broken and solid lines, respectively, are shown in an overlapping relationship.
- the arrows indicate typical current paths and directions. In the state illustrated, current flows from each of the external terminal electrodes 24 through 27 to each of the external terminal electrodes 16 through 19 . Because an alternating current is used, the direction of current flow will reverse periodically.
- a multilayer capacitor comprises:
- a capacitor main body having a generally rectangular parallelpiped shape with two principal surfaces in a face-to-face relationship with each other and four side surfaces connecting said principal surfaces;
- each of said capacitor units being formed by a respective pair of first and second internal electrodes disposed in said main body in a face-to-face relationship with a dielectric material layer interposed therebetween to form a capacitor unit;
- n first external electrodes n being an integer greater than 2; each of said first external electrodes being located on a respective one of said side surfaces of said capacitor main body, at least one of said first external electrodes being located on each of at least three of said side surfaces;
- said first internal electrode having n first lead electrodes, each of said first lead electrodes extending to and being electrically coupled to a respective one of said first external electrodes;
- p second external electrodes p being an integer greater than 1, each of said second external electrodes being located on a respective one of said side surfaces of said capacitor main body;
- said second internal electrode having p second lead electrodes, each of said second lead electrodes extending to and being electrically coupled to a respective one of said second external electrodes.
- the internal and lead electrodes are preferably arranged in such a manner that when currents of different polarity are applied to said first and second internal electrodes, the net induced inductance in the area of all four of said side surfaces is substantially zero.
- the first internal electrode is formed with at least four first lead electrodes which extend respectively to respective ones of the four side surfaces. An equal number of first external terminal electrodes are provided. At least one of the first external terminal electrodes is located on each of the four side surfaces.
- the second internal electrode is formed with at least four second lead electrodes which extend to respective ones of the four side surfaces.
- An equal number of second external terminal electrodes are provided. At least one of the second external terminal electrodes is located on each of the four side surfaces.
- each of the first external terminal electrodes located on that surface is located adjacent to one a corresponding second external terminal electrode located on that side surface. It is more advantageous if all of the first external terminal electrodes and all of the second external terminal electrodes are arranged such that they alternate with each other throughout the four side surfaces.
- all of the external terminal electrodes are arranged such that they are not adjacent to any other external electrode which is connected to the same internal electrode.
- the first external internal electrode is formed with three first lead electrodes which extend respectively to three of the side surfaces.
- the second internal electrode is formed with two second lead electrodes which extend respectively to two of the side surfaces, one of which does have a first external electrode.
- At least one of the first and at least one of the second external terminal electrodes is provided on each of the four side surfaces.
- a plurality of capacitor units can be provided in the multilayer capacitor.
- Each capacitor unit includes a respective pair of first and second internal electrodes with a respective dielectric layer located therebetween.
- the effect of reducing ESL can be expected from effective cancellation of magnetic and reduction of the lengths of currents achieved by providing a third internal electrode facing at least either the first or second internal electrodes with a dielectric material layer interposed therebetween.
- the third internal electrode is formed with at least two third lead electrodes which extend to respective ones of the side surfaces.
- An equal number of third external terminal electrodes are provided on the corresponding side surfaces and are electrically coupled to respective ones of the third lead electrode.
- FIG. 1 is a plan view of a multilayer capacitor 31 according to a first embodiment of the present invention
- FIG. 2 is a plan view of the multilayer capacitor 31 shown in FIG. 1 showing an internal structure thereof in the form of a section along which a first internal electrode 40 extends;
- FIG. 3 is a plan view of the multilayer capacitor shown 31 in FIG. 1 showing an internal structure thereof in the form of a section along which a second internal electrode 41 extends;
- FIG. 4 is a plan view illustrating currents flowing in the multilayer capacitor 31 ;
- FIG. 5 is a plan view of a multilayer capacitor 71 according to a second embodiment of the invention showing the external appearance thereof;
- FIG. 6 is a plan view of the multilayer capacitor 71 shown in FIG. 5 showing an internal structure thereof in the form of a section along which a first internal electrode 40 a extends;
- FIG. 7 is a plan view of the multilayer capacitor 71 shown in FIG. 5 showing an internal structure thereof in the form of a section along which a second internal electrode 41 a extends;
- FIG. 8 is a plan view of a multilayer capacitor 81 according to a third embodiment of the invention showing the external appearance thereof;
- FIG. 9 is a plan view of the multiplayer capacitor 81 shown in FIG. 8 showing an internal structure thereof in the form of a section along which a third internal electrode 82 extends;
- FIG. 10 is a plan view of the multiplayer capacitor 81 shown in FIG. 8 showing an internal structure thereof in the form of a section along which a first internal electrode 40 b extends;
- FIG. 11 is a plan view of the multilayer capacitor 81 shown in FIG. 8 showing an internal structure thereof in the form of a section along which a second internal electrode 41 b extends;
- FIG. 12 is a plan view of a multilayer capacitor 91 according to a fourth embodiment of the invention showing the external appearance thereof;
- FIG. 13 is a plan view of the multilayer capacitor 91 shown in FIG. 12 showing an internal structure thereof in the form of a section along which a first internal electrode 40 c extends;
- FIG. 14 is a plan view of the multilayer capacitor 91 shown in FIG. 12 showing an internal structure thereof in the form of a section along which a second internal electrode 41 c extends;
- FIG. 15 is a plan view of a conventional multilayer capacitor 1 which is of interest to the present invention showing the external appearance thereof;
- FIG. 16 is a plan view of the multilayer capacitor 1 shown in FIG. 15 showing an internal structure thereof in the form of a section along which a first internal electrode 10 extends;
- FIG. 17 is a plan view of the multilayer capacitor 1 shown in FIG. 15 showing an internal structure thereof in the form of a section along which a second internal electrode 11 extends;
- FIG. 18 is a plan view illustrating currents flowing in the multilayer capacitor 1 shown in FIG. 15;
- FIG. 19 is a plan view of a multilayer capacitor 101 according to a fifth embodiment of the present invention.
- FIG. 20 is a plan view of the multilayer capacitor 101 shown in FIG. 19 showing an internal structure thereof in the form of a section along which a first internal electrode 40 d extends;
- FIG. 21 is a plan view of the multilayer capacitor 101 shown in FIG. 10 showing an internal structure thereof in the form of a section along which a second internal electrode 41 d extends.
- FIGS. 1 through 3 a first embodiment of a multilayer capacitor constructed in accordance with the principles of the present invention and designated generally as 31 .
- FIGS. 1 through 3 correspond to FIGS. 15 through 17.
- FIG. 1 is a plan view of the external appearance multilayer capacitor 31 .
- FIG. 2 is a plan view multilayer capacitor 31 showing a first internal electrode 40 located on one surface of a first internal dielectric layer 39 of the capacitor 31 .
- FIG. 3 is a plan view of a second section of the multilayer capacitor 31 showing a second internal electrode 41 located on one surface of a second internal dielectric layer 39 of the capacitor 31 .
- Multilayer capacitor 31 includes a capacitor main body 38 in the form of a rectangular parallelpiped having two opposed principal surfaces 32 and 33 and four side surfaces 34 , 35 , 36 and 37 extending therebetween.
- the capacitor main body 38 includes a plurality of generally planar dielectric layers 39 made of, for example, a ceramic dielectric material.
- the main surfaces of the dielectric layers 39 are situated generally parallel to the principal surfaces 32 , 33 of the capacitor main body 38 .
- At least a pair of first and second internal electrodes 40 and 41 are provided in a face-to-face relationship with each other with a dielectric material layer 39 interposed therebetween, each such pair of internal electrodes forming a respective capacitor unit.
- the first internal electrode 40 has six lead electrodes 42 , 43 , 44 , 45 , 46 and 47 , each of which extends to a respective one of the four side surfaces 34 through 37 .
- the lead electrodes 42 and 43 extend to the side surface 34 ;
- the lead electrode 44 extends to the side surface 35 ;
- the lead electrodes 45 and 46 extend to the side surface 36 ;
- the lead electrode 47 extends to the side surface 37 .
- Each lead electrode 42 - 47 is electrically coupled to a respective external terminal electrodes 48 - 53 .
- the external terminal electrodes 48 and 49 connected to the lead electrodes 42 and 43 , respectively, are located on the side surface 34 ;
- the external terminal electrode 50 connected to the lead electrode 44 , is located on the side surface 35 ,
- the external terminal electrodes 51 and 52 connected to the lead electrodes 45 and 46 , respectively, are located on the side surface 36 ;
- the external terminal electrode 53 connected to the lead electrode 47 , is located on the side surface 37 .
- the internal electrode 41 is formed with six second lead electrodes 54 , 55 , 56 , 57 , 58 and 59 , each of which extend to a respective one of the four side surfaces 34 through 37 . More specifically, the lead electrodes 54 and 55 extend to side surface 34 ; lead electrode 56 extends to side surface 35 ; lead electrodes 57 and 58 extend to side surface 36 ; and lead electrode 59 extends to the side surface 37 .
- the positions on the side surfaces 34 through 37 to which the respective lead electrodes 54 through 59 extend are different from the positions to which the respective lead electrodes 42 through 47 extend.
- External terminal electrodes 60 , 61 , 62 , 63 , 64 and 65 which are electrically coupled to respective lead electrodes 54 through 59 , are provided on the side surfaces 34 through 37 a positions which are different than the positions of the external terminal electrodes 48 through 53 .
- External terminal electrodes 60 and 61 connected to lead electrodes 54 and 55 , respectively, are located on side surface 34 ;
- external terminal electrode 62 connected to lead electrode 56 , is located on side surface 35 ;
- external terminal electrodes 63 and 64 connected to lead is electrodes 57 and 58 , respectively, are located on side surface 36 ; and external terminal electrode 65 , connected to lead electrode 59 , are located on side surface 37 .
- the external terminal electrodes 48 through 53 are arranged in an interleaved manner such that no two external electrodes which are electrically coupled to the same internal electrode 40 or 41 are adjacent one another.
- the polarization of the first and second internal electrodes 40 , 41 are preferably opposite to one another.
- the multilayer capacitor 31 can include two sets of capacitor units, each set being defined by a respective pair of first and second internal electrodes 40 , 41 separated by a respective dielectric layer.
- the plurality of capacitor units are preferably connected in parallel by at least either appropriate ones of the first external-terminal electrodes 48 through 53 or the second external terminal electrodes 60 through 65 .
- Each of the external terminal electrodes 48 through 53 and 60 through 65 is preferably formed so as to extend not only on the side surfaces 34 through 37 but also onto a part of each of the principal surfaces 32 and 33 .
- FIG. 4 illustrates various currents flowing in the multilayer capacitor 31 .
- the first internal electrode 40 is indicated by a broken line and the second internal electrode 41 is indicated by a solid line, the two electrodes being illustrated in an overlapping relationship.
- FIGS. 1 - 4 produces a much more desirable result in the areas 67 adjacent the side surfaces 35 , 37 . Since the first external terminal electrodes 50 and 53 and the second external terminal electrodes 62 and 65 are provided at the side surfaces 34 and 36 , there is no significant net current flow in the areas 67 and no significant generation of net magnetic flux.
- Another advantage of this embodiment is that the current paths between each of the electrodes is reduced. Particularly, each of the first lead electrodes 42 through 47 (and the first external terminal electrodes 48 through 53 ) is located relatively close to its adjacent second lead electrode 54 through 59 (and the second external terminal electrode 60 through 64 ) compared to the prior art of FIG. 18. This reduces the lengths of the current paths and thereby reduces self-inductance components produced between them.
- FIG. 5 is a plan view of the external appearance of the multilayer capacitor 71 .
- FIG. 6 is a plan view showing one surface of an internal dielectric layer 39 of the multilayer capacitor 71 having a first internal electrode 40 a located thereon.
- FIG. 7 is a plan view showing one surface of a different one of the internal dielectric layers 39 of the multilayer capacitor . 71 having a second internal electrode 41 a located thereon.
- FIGS. 5 through 7 respectively correspond to FIGS. 1 through 3 of the first embodiment.
- elements corresponding to elements shown in FIGS. 1 through 3 are indicated by like reference numbers and will not be described here to avoid duplication.
- the first internal electrode 40 a is formed with five lead electrodes 42 , 43 , 45 , 46 and 47 a which extend to respective side surfaces 34 , 36 and 37 .
- the multilayer capacitor 71 is different from the multilayer capacitor 31 of the first embodiment in that the multilayer capacitor 71 has no lead electrode extending to side surface 35 . Additionally, lead electrode 47 a extends to the middle of the side surface 37 , whereas lead electrode 47 extends to the upper half of side surface 37 .
- the five lead electrodes 42 through 47 a are electrically coupled to five external terminal electrodes 48 , 49 , 51 , 52 and 53 a , respectively.
- the five external electrodes 48 , 49 , 51 , 52 and 53 a are each located on one of the three side surfaces 34 , 36 and 37 .
- the multilayer capacitor 71 is different from the multilayer capacitor 31 of the first embodiment in that the multilayer capacitor 71 has no external terminal corresponding to the first external terminal electrode 50 and In that the external terminal electrode 53 a is different in location from the external terminal electrode 53 .
- a second internal electrode 41 a has five lead electrodes 54 , 55 , 56 a , 57 and 58 which extend to respective side surfaces 34 through 36 .
- the multilayer capacitor 71 is different from the multilayer capacitor 31 of the first embodiment in that it has no lead electrode extending to the side surface 37 and in that the lead electrode 56 a which extends to the side surface 35 extends to the middle of the side surface 35 , rather than the bottom of the side surface 35 as is the case with lead electrode 56 of the first embodiment.
- Each of the lead electrodes 54 through 58 is electrically coupled to a respective external terminal electrode 60 , 61 , 62 a , 63 and 64 .
- Each of these terminal electrodes are provided on a respective side surface 34 through 36 .
- the multilayer capacitor 71 is different from the multilayer capacitor 31 of the first embodiment in that it has no external terminal corresponding to the external terminal electrode 65 and in that the external terminal electrode 62 a is located in a different position than the external terminal electrode 62 .
- the capacity of multilayer capacitor 71 can be increased by providing a plurality of capacitive units, each defined by a respective set of internal electrodes 40 a , 41 a , separated by a respective dielectric is layer 38 .
- the plurality of capacitor units are then connected in parallel by appropriate ones of the external terminal electrodes 48 through 53 a or 60 through 64 .
- each of the external terminal electrodes 48 , 49 , 51 and 52 coupled to the first internal electrode 40 a is located adjacent at least one of the external terminal electrodes 60 , 61 , 63 and 64 coupled to internal electrode 41 a .
- only the second external terminal electrode 62 a is located on the side surface 35
- only the first external terminal electrode 53 a is located on the side surface 37 .
- FIGS. 8 through 11 show a multilayer capacitor 81 according to a third embodiment of the present invention.
- FIG. 8 is a plan view of the external appearance of the multilayer capacitor 81 .
- FIG. 9 is a plan view of the surface of one of the internal dielectric layers 39 of the multilayer capacitor 81 having a first internal electrode 82 formed thereon.
- FIG. 10 is a plan view of the surface of one of the internal dielectric layers 39 of the multilayer capacitor 81 having a second internal electrode 40 b formed thereon.
- FIG. 11 is a plan view of the surface of one of the internal dielectric layers 39 of the multilayer capacitor 81 having a third internal electrode 41 b formed thereon.
- FIGS. 8 through 11 elements corresponding to elements shown in FIGS. 1 through 3 are indicated by like reference numbers and will not be described here to avoid duplication.
- the multilayer capacitor 81 of the third embodiment of the invention includes a third internal electrode 82 facing at least either the first internal electrode 40 b or second internal electrode 41 b with a dielectric material layer 39 interposed therebetween.
- the third internal electrode 82 is formed with four lead electrodes 83 , 84 , 85 and 86 , each of which extends to a respective side surface 34 and 36 . More specifically, lead electrodes 83 and 84 extend to side surface 34 , and lead electrodes 85 and 86 extend to side surface 36 .
- External terminal electrodes 87 , 88 , 89 and 90 which are electrically coupled to the lead electrodes 83 through 86 , respectively, are provided on respective side surfaces 34 and 36 .
- the multilayer capacitor 81 is different from the multilayer capacitor 31 of the first embodiment in that it includes the third external terminal electrodes 87 and 90 provided, respectively, in the positions where the first external terminal electrodes 48 and 52 are provided on the multilayer capacitor 31 of the first embodiment and includes the third external terminal electrodes 88 and 89 provided respectively in the positions where the second external terminal electrodes 61 and 63 are provided on the multilayer capacitor 31 .
- a first internal electrode 40 b has four first lead electrodes 42 b , 44 , 45 b and 47 which extend to respective side surfaces 34 through 37 .
- the first internal electrode 40 b of the multilayer capacitor 81 is different from the multilayer capacitor 31 of the first embodiment in that it has only one lead electrode 42 b which extends to side surface 34 and one lead electrode 45 b which extends to side surface 36 .
- first external terminal electrodes 48 b , 50 , 51 b and 53 are electrically coupled to the four first lead electrodes 42 b through 47 , respectively, and are provided on the four side surfaces 34 through 37 , respectively.
- the multilayer capacitor 81 is different from the multilayer capacitor 31 of the first embodiment in that it includes the first external terminal electrodes 48 b and 51 b provided respectively in the positions where the second external terminal electrodes 60 and 64 are provided on the multilayer capacitor 31 .
- a second internal electrode 41 b has four second lead electrodes 54 b , 56 , 57 b and 59 which extend to respective side surfaces 34 through 37
- the second internal electrode of the multilayer capacitor 81 is different from the second internal electrode 41 of the multilayer capacitor 31 of the first embodiment in that only one lead electrode 54 b extends to the side surface 34 and only one lead electrode 57 b extends to side surface 36 .
- second external terminal electrodes 60 b , 62 , 63 b and 65 are electrically coupled to the four first lead electrodes 54 b through 59 , respectively.
- the four second external terminal electrodes are provided on the four side surfaces 34 through 37 , respectively.
- the multilayer capacitor 81 is different from the multilayer capacitor 31 of the first embodiment in that the second external terminal electrodes 60 b and 63 b provided, respectively, in the positions where the first external terminal electrodes 49 and 51 are provided on the multilayer capacitor 31 .
- the multilayer capacitor 81 can be formed by locating the third internal electrode 82 , the first internal electrode 40 b and the second internal electrode 41 b , one above the other with respective dielectric layers being located therebetween. Irrespective of the relative locations of the internal electrodes, the external terminal electrodes are arranged such that each of the third external terminal electrodes 87 through 90 is followed by one of the first external terminal electrodes 48 b through 53 and then followed by one of the second external terminal electrodes 60 b through 65 . This alternating arrangement is repeated throughout the four side surfaces 34 through 37 .
- the above-described order of stacking the internal electrodes 82 , 40 b and 41 b may be changed arbitrarily.
- a plurality of third internal electrodes 82 , first internal electrodes 40 b and second internal electrodes 41 b may be provided to form a plurality of capacitor units.
- a plurality of third internal electrodes 82 and a plurality of first internal electrodes 40 b may be provided; a plurality of second internal electrodes 41 b and a plurality of third internal electrodes 82 may be provided; or a plurality of third internal electrodes 82 , a plurality of first internal electrodes 40 b and a plurality of second internal electrodes 41 b may be provided.
- the resultant capacitor units are connected in parallel by at least any of the third external terminal electrodes 87 through 90 , the first external terminal electrodes 48 b through 53 and the second external terminal electrodes Gob through 65 .
- external terminal electrodes connected to different internal electrodes are located on each of-the four side surfaces 34 through 37 . More specifically, first external terminal electrode 48 b , second external terminal electrode 60 b and third external terminal electrodes 87 and 88 are located on the side surface 34 ; first external terminal electrode 50 and second external terminal electrode 62 are located on side surface 35 ; first external terminal electrode 51 b , second external terminal electrode 63 b and third external terminal electrodes 89 and 90 are located on side surface 36 ; and first external terminal electrode 53 and second external terminal electrode 65 are located on side surface 37 .
- the arrangement of the third embodiment is different from that in the first embodiment in that external terminal electrodes having different polarities are not necessarily adjacent to each other in all locations, the directions of the current flows on the internal electrodes 40 b and 41 b is more diverse than those in the conventional multilayer capacitor 1 shown in FIGS. 15 through 17 and the lengths of the current paths are shorter. This makes it possible to achieve a higher reduction of the induced inductance components
- a multilayer capacitor may be provided in which only the first and second internal electrodes 40 b and 41 b are provided and the third internal electrode 82 is excluded. Further, the third internal electrode 82 may be formed with lead electrodes which extend to the side surfaces 35 and 37 .
- FIGS. 12 through 14 show a multilayer capacitor 91 according to a fourth embodiment of the present invention.
- FIG. 12 is a plan view of the external appearance of the multilayer capacitor 91 .
- FIG. 13 is a plan view of the surface of one of the dielectric layers of the multilayer capacitor 91 having a first internal electrode 40 c formed thereon.
- FIG. 14 is a plan view of the surface of one of the dielectric layers of the multilayer capacitor 91 having a second internal electrode 41 c formed thereon.
- FIGS. 12 through 14 respectively correspond to FIGS. 1 through 3 of the first embodiment.
- elements corresponding to elements shown in FIGS. 1 through 3 ate indicated by like reference numbers and will not be described here to avoid duplication.
- the multilayer capacitor 91 of the fourth embodiment of the invention resembles the multilayer capacitor 71 of the second embodiment in its external appearance.
- a first internal electrode 40 c has five first lead electrodes 42 , 43 , 44 c , 45 c and 46 c which extend to respective side surfaces 34 , 35 and 36 .
- the multilayer capacitor 91 is different from the multilayer capacitor 31 of the first embodiment in that does not include a lead electrode corresponding to the lead electrode 47 which extends to the side surface 37 and in that the positions at which the lead electrodes 44 c , 45 c and 46 c respectively extends to the side surfaces 35 and 36 are different from the positions that the lead electrodes 44 through 46 extend to those surfaces.
- the multilayer capacitor 91 is different from the multilayer capacitor 31 of the first embodiment in that it does not include an external terminal electrode corresponding to the first external terminal electrode 53 and in that the positions of the external terminal electrodes 50 c , 51 c and 52 c are different from the positions of the external terminal electrodes 50 through 52 , respectively.
- a second internal electrode 41 c has five lead electrodes 54 , 55 , 57 c , 58 c and 59 c , each of which extends to a respective side surfaces 34 , 36 and 37 .
- the multilayer capacitor 91 is different from the multilayer capacitor 31 of the first embodiment in that it does not include a lead electrode corresponding to the lead electrode 59 which extends to the side surface 35 and in that the positions of the lead electrodes 57 c , 58 c and 59 c are different from the positions of the lead electrodes 57 through 59 , respectively.
- the external terminal electrodes 60 , 61 , 63 c , 64 c and 65 c which are electrically coupled to second lead electrodes 54 through 59 c , respectively, are provided on the side surfaces 34 , 36 and 37 .
- the multilayer capacitor 91 is different from the multilayer capacitor 31 of the first embodiment in that it does not include an external terminal electrode corresponding to the second external terminal electrode 62 and in that the positions of the external terminal electrodes 63 c , 64 c and 65 c are different from the positions of the external terminal electrodes 63 through 65 , respectively.
- first internal electrodes 40 c and a plurality of second internal electrodes 41 c can be provided. Pairs of internal electrodes 40 c , 41 c will face one another with a dielectric layer formed therebetween so as to form respective capacitor units. These capacitor units will be connected in parallel by at least either the first external terminal electrodes 48 through 52 c or the second external terminal electrodes 60 through 65 c.
- each of the first external terminal electrodes 48 through 52 c of the fourth embodiment of the invention is arranged so as to alternate with respective ones of the second external 30 . terminal electrodes 60 through 65 c throughout the four side surfaces 34 through 37 .
- the fourth embodiment is different from the second embodiment in this regard.
- the fourth embodiment of the invention since the flow of currents on the internal electrodes 40 c and 41 c can be directed in various directions, the various components of induced magnetic flux will be cancelled and the lengths of the current paths will be shortened relative to the prior art of FIGS. 15 - 17 .
- the fourth embodiment will effectively reduce the induced inductance components to a degree which is similar to that of the first embodiment.
- FIGS. 19 through 21 show a multilayer capacitor 101 according to a fifth embodiment of the present invention.
- FIG. 19 is a plan view of the external appearance of the multilayer capacitor 101 .
- FIG. 20 is a plan view of the surface of one of the dielectric layers of the multilayer capacitor 101 having a first internal electrode 40 d formed thereon.
- FIG. 21 is a plan view of the surface of one of the dielectric layers of the multilayer capacitor. 101 having a second internal electrode 41 d formed thereon.
- FIGS. 19 through 21 respectively correspond to FIGS. 1 through 3 of the first embodiment.
- elements corresponding to elements shown in FIGS. 1 through 3 are indicated by like reference numbers and will not be described here to avoid duplication.
- a first internal electrode 40 d has three first lead electrodes 44 d , 45 d and 47 d which extend to respective side surfaces 35 ; 36 and 37 .
- the multilayer capacitor 101 is different from the multilayer capacitor 31 of the first embodiment in that it does not include lead electrodes 42 and 43 which extends to the side surface 34 , does not include a lead electrode 46 which extends to the side surface 36 , and in that the positions at which the lead electrodes 44 d , 45 d , and 47 d respectively extends to the side surfaces 35 , 36 and 37 are different from the positions that the lead electrodes 44 , 45 and 47 extend to those surfaces.
- the three lead electrodes 44 d , 45 d and 47 d are electrically coupled to three external terminal, electrodes 50 d , 51 d and 53 d respectively. These external terminal electrodes are provided on the side surfaces 35 through 37 .
- the multilayer capacitor 101 is different from the multilayer 31 of the first embodiment in that it does not include external terminal electrodes corresponding to the first external terminal electrodes 48 , 49 and 52 in that the positions of the external terminal electrodes 50 d , 51 d and 53 d are different from the positions of the external terminal electrodes 50 , 51 and 53 , respectively.
- a second internal electrode 41 d has two lead electrodes 54 d and 57 d , each of which extends to respective side surfaces 34 and. 36 .
- the multilayer capacitor 101 is different from the multilayer capacitor 31 of the first embodiment in that it does not include lead electrodes corresponding to the lead electrodes 61 , 62 , 64 and 65 which extends to the side surfaces 34 through 37 , respectively, and in that the positions of the lead electrodes 54 d and 57 d are different from the positions of the lead electrodes 54 and 57 , respectively.
- Two external terminal electrodes 60 d and 63 d are electrically coupled to the two lead electrodes 54 d and 57 d , respectively, and are provided on the side surfaces 34 and 36 .
- the multilayer capacitor is different from the multilayer capacitor 31 of the first embodiment in that it does not include external terminal electrodes corresponding to the second external terminal electrodes 61 , 62 , 64 and 65 , and in that the positions of the external terminal electrodes 60 d and 63 d are different from the positions of the external terminal electrodes 60 and 63 , respectively.
- a plurality of first internal electrodes 40 d and a plurality of second internal electrodes 41 d can be provided. Therefore, according to the fifth embodiment of the invention, since the flow of the currents on the internal electrodes 40 b and 41 b can be directed in various directions to effectively cancel magnetic flux and to reduce the lengths of the current paths, the induced inductance components can be reduced.
- the arrangement of the fifth embodiment is different from that in that first embodiment in that external terminal electrodes having different polarities are not necessarily adjacent to each other in all locations the directions of the current flows on the internal electrodes 40 d and 41 d is more diverse that those in the conventional multilayer capacitor 1 shown in FIGS. 15 and 17 and the lengths of the current paths are shorter. Therefore, this makes it possible to achieve a higher reduction of the induced inductance components.
- Each sample was formed with outer plan dimensions of 3.2 mm ⁇ 2.5 mm.
- samples having six layers of internal electrodes in total i.e., those having two kinds of internal electrodes such as the multilayer capacitors 31 , 71 , 91 and 1 (embodiments 1, 2 and 4 and comparative example)
- the stacking of the two kinds of internal electrodes was repeated three times (i.e., three pairs of internal electrodes where used to form three capacitance units).
- the stacking of the three kinds of internal electrodes was repeated twice.
- ESL was obtained using the resonance method.
- the resonance method is a method wherein the impedance frequency characteristics of each of the sample multilayer capacitor is measured and ESL is obtained from a frequency f 0 at a minimum point (referred to as series resonance point between the capacity component C 8 and ESL of the capacitor) using the following equation.
- At least either a first or a second internal electrode is formed with at least three lead electrodes which extend respectively to at least three of the side surfaces of a capacitor main body, and external terminal electrodes which are electrically coupled to respective lead electrodes are provided on respective side surfaces.
- a multilayer capacitor according to the invention can accommodate electronic circuits at higher frequencies than was possible with the comparative example and can be advantageously used, for example, as a bypass capacitor or decoupling capacitor in a high frequency circuit.
- a decoupling capacitor used in an MPU microprocessing unit
- a quick power supply a function of supplying power from an amount of electricity charged in the capacitor when there is a sudden need for power as in the case of power-up
- a multilayer capacitor according to the invention can be used for such an application because it has low ESL.
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Abstract
A multilayer capacitor whose equivalent series inductance is reduced includes a capacitor main body having a generally rectangular parallel piped shape with two principal surfaces in a face-to-face relationship with each other and four side surfaces connecting the principal surfaces. A capacitor unit is formed in the capacitor main body by a respective pair of first and second internal electrodes disposed in the main body in a face-to-face relationship with a dielectric material layer interposed therebetween. At least three first external electrodes are located on respective ones of the side surfaces of the capacitor main body, with at least one of the first external electrodes being located on each of at least three of the side surfaces. The first internal electrode has at least three first lead electrodes, each of which extends to and is electrically coupled to a respective one of the first external electrodes. A plurality of second external electrodes are located on respective side surfaces of the capacitor main body and the second internal electrode has an equal plurality of second lead electrodes, each extending to and being electrically coupled to a respective one of the second external electrodes.
Description
- 1. Field of the Invention
- The present invention relates to a multilayer capacitor and, more particularly, to a multilayer capacitor which can be advantageously used in high frequency circuits.
- 2. Description of the Related Art
- Conventional multilayer capacitors include that described in Japanese Unexamined Patent Publication No. H2-256216 in which a
multilayer capacitor 1, as shown in FIGS. 15 through 17, is disclosed. FIG. 15 is a plan view of the external appearance of themultilayer capacitor 1. FIG. 16 is a plan view of a first section of themultilayer capacitor 1 showing afirst electrode 10 located on one surface of one internaldielectric layer 9 of thecapacitor 1. FIG. 17 is a plan view of a second section of themultilayer capacitor 1 showing asecond electrode 11 located on one surface of a differential internaldielectric layer 9 of thecapacitor 1. - Referring to FIGS.15-17, the
multilayer capacitor 1 includes a capacitormain body 8 in the form of a rectangular parallelpiped having twoprincipal surfaces side surfaces principal surf aces main body 8 includes a plurality of dielectric layers 9 (FIGS. 16-17) made of, for example, a ceramic dielectric material. Each of the dielectrical layers is generally planar in shape and lies generally parallel to theprincipal surfaces internal electrodes dielectric layers 9 in a face-to-face relationship with each other with adielectric layer 9 interposed therebetween to form a capacitor unit. - The first
internal electrode 10 is formed with fourlead electrodes opposing side surfaces - Each
lead electrode external terminal electrode side surfaces main body 8. Specifically, thelead electrodes external terminal electrodes side surface 4, and thelead electrodes external terminal electrodes side surface 6. - Referring to FIG. 17, the second
internal electrode 11 is also formed with fourlead electrodes side surfaces lead electrodes side surface 4 which are different from the positions to which thelead electrodes lead electrodes side surface 6 of themain body 8 which are different from the positions to which thelead electrodes - The
lead electrodes 20 through 23 are electrically coupled toexternal terminal electrodes External terminal electrodes side surface 4 at positions which are different from those of theexternal terminal electrodes External terminal electrodes side surface 6 at positions which are different from the positions of theexternal terminal electrodes - Thus, the plurality of first
external terminal electrodes 16 through 19 and the plurality of secondexternal terminal electrodes 24 through 27 are arranged on the twoside surfaces - FIG. 18 illustrates current flowing through the
multilayer capacitor 1 as viewed in plan view corresponding to FIG. 17. In FIG. 18, firstinternal electrode 10 and secondinternal electrode 11, shown with broken and solid lines, respectively, are shown in an overlapping relationship. - In FIG. 18, the arrows indicate typical current paths and directions. In the state illustrated, current flows from each of the
external terminal electrodes 24 through 27 to each of theexternal terminal electrodes 16 through 19. Because an alternating current is used, the direction of current flow will reverse periodically. - When the currents flow, magnetic flux is induced. The direction of the flux is determined by the direction of the currents to produce self-inductance components. Since the currents flow in various directions at central regions28 (indicated by circles) of the
internal electrodes - The current in the vicinity of each of the
external terminal electrodes 16 through 19 and 24 through 27 tends to flow toward each of theexternal terminal electrodes 16 through 19 and away from each of theexternal terminal electrodes 24 through 27. There are currents that flow to the left and right as viewed in FIG. 18 to spread at an angle of about 180 degrees. As a result, a major part of magnetic flux is canceled and there is no significant generation of net magnetic flux in these areas. - Therefore, in the
multilayer capacitor 1 shown in FIGS. 15 through 17, the generation of self-inductance is suppressed in the areas points described above to reduce equivalent series induction (hereinafter “ESL”). - However, currents flow substantially in the same direction in the vicinity of each of the
side surfaces multilayer capacitor 1 shown in FIGS. 15 through 17 is less than desirable. - It is therefore an object of the invention to provide a multilayer capacitor which more effectively reduces ESL.
- In accordance with one aspect of the present invention, a multilayer capacitor, comprises:
- a capacitor main body having a generally rectangular parallelpiped shape with two principal surfaces in a face-to-face relationship with each other and four side surfaces connecting said principal surfaces;
- m capacitor units formed in said capacitor main body, m being an integer greater than or equal to one, each of said capacitor units being formed by a respective pair of first and second internal electrodes disposed in said main body in a face-to-face relationship with a dielectric material layer interposed therebetween to form a capacitor unit;
- n first external electrodes, n being an integer greater than 2; each of said first external electrodes being located on a respective one of said side surfaces of said capacitor main body, at least one of said first external electrodes being located on each of at least three of said side surfaces;
- said first internal electrode having n first lead electrodes, each of said first lead electrodes extending to and being electrically coupled to a respective one of said first external electrodes;
- p second external electrodes, p being an integer greater than 1, each of said second external electrodes being located on a respective one of said side surfaces of said capacitor main body; and
- said second internal electrode having p second lead electrodes, each of said second lead electrodes extending to and being electrically coupled to a respective one of said second external electrodes.
- The internal and lead electrodes are preferably arranged in such a manner that when currents of different polarity are applied to said first and second internal electrodes, the net induced inductance in the area of all four of said side surfaces is substantially zero.
- In one embodiment of the present invention the first internal electrode is formed with at least four first lead electrodes which extend respectively to respective ones of the four side surfaces. An equal number of first external terminal electrodes are provided. At least one of the first external terminal electrodes is located on each of the four side surfaces.
- In this embodiment, the second internal electrode is formed with at least four second lead electrodes which extend to respective ones of the four side surfaces. An equal number of second external terminal electrodes are provided. At least one of the second external terminal electrodes is located on each of the four side surfaces.
- It is more advantageous if the above-described configuration is employed for both of the first and second internal electrodes.
- In another embodiment, for each side surface which has both a first and a second external terminal electrode, each of the first external terminal electrodes located on that surface is located adjacent to one a corresponding second external terminal electrode located on that side surface. It is more advantageous if all of the first external terminal electrodes and all of the second external terminal electrodes are arranged such that they alternate with each other throughout the four side surfaces.
- In yet another embodiment, all of the external terminal electrodes are arranged such that they are not adjacent to any other external electrode which is connected to the same internal electrode.
- In still another embodiment, the first external internal electrode is formed with three first lead electrodes which extend respectively to three of the side surfaces. The second internal electrode is formed with two second lead electrodes which extend respectively to two of the side surfaces, one of which does have a first external electrode.
- In the most preferred embodiment, at least one of the first and at least one of the second external terminal electrodes is provided on each of the four side surfaces.
- A plurality of capacitor units can be provided in the multilayer capacitor. Each capacitor unit includes a respective pair of first and second internal electrodes with a respective dielectric layer located therebetween.
- According to the present invention, the effect of reducing ESL can be expected from effective cancellation of magnetic and reduction of the lengths of currents achieved by providing a third internal electrode facing at least either the first or second internal electrodes with a dielectric material layer interposed therebetween. The third internal electrode is formed with at least two third lead electrodes which extend to respective ones of the side surfaces. An equal number of third external terminal electrodes are provided on the corresponding side surfaces and are electrically coupled to respective ones of the third lead electrode.
- In the above-described embodiment, when all of the first, second and third external terminal electrodes are arranged in the same order of arrangement repeated throughout the four side surfaces, the various components of magnetic flux can be more effectively canceled and the lengths of the current paths can be shortened further for a further reduction of ESL.
- For the purpose of illustrating the invention, there is shown in the drawing several forms which are presently preferred, it being understood, however, that the invention is not limited to the precise arrangements and instrumentalities shown.
- FIG. 1 is a plan view of a
multilayer capacitor 31 according to a first embodiment of the present invention; - FIG. 2 is a plan view of the
multilayer capacitor 31 shown in FIG. 1 showing an internal structure thereof in the form of a section along which a firstinternal electrode 40 extends; - FIG. 3 is a plan view of the multilayer capacitor shown31 in FIG. 1 showing an internal structure thereof in the form of a section along which a second
internal electrode 41 extends; - FIG. 4 is a plan view illustrating currents flowing in the
multilayer capacitor 31; - FIG. 5 is a plan view of a
multilayer capacitor 71 according to a second embodiment of the invention showing the external appearance thereof; - FIG. 6 is a plan view of the
multilayer capacitor 71 shown in FIG. 5 showing an internal structure thereof in the form of a section along which a firstinternal electrode 40 a extends; - FIG. 7 is a plan view of the
multilayer capacitor 71 shown in FIG. 5 showing an internal structure thereof in the form of a section along which a secondinternal electrode 41 a extends; - FIG. 8 is a plan view of a
multilayer capacitor 81 according to a third embodiment of the invention showing the external appearance thereof; - FIG. 9 is a plan view of the
multiplayer capacitor 81 shown in FIG. 8 showing an internal structure thereof in the form of a section along which a thirdinternal electrode 82 extends; - FIG. 10 is a plan view of the
multiplayer capacitor 81 shown in FIG. 8 showing an internal structure thereof in the form of a section along which a first internal electrode 40 b extends; - FIG. 11 is a plan view of the
multilayer capacitor 81 shown in FIG. 8 showing an internal structure thereof in the form of a section along which a secondinternal electrode 41 b extends; - FIG. 12 is a plan view of a
multilayer capacitor 91 according to a fourth embodiment of the invention showing the external appearance thereof; - FIG. 13 is a plan view of the
multilayer capacitor 91 shown in FIG. 12 showing an internal structure thereof in the form of a section along which a firstinternal electrode 40 c extends; - FIG. 14 is a plan view of the
multilayer capacitor 91 shown in FIG. 12 showing an internal structure thereof in the form of a section along which a secondinternal electrode 41 c extends; - FIG. 15 is a plan view of a
conventional multilayer capacitor 1 which is of interest to the present invention showing the external appearance thereof; - FIG. 16 is a plan view of the
multilayer capacitor 1 shown in FIG. 15 showing an internal structure thereof in the form of a section along which a firstinternal electrode 10 extends; - FIG. 17 is a plan view of the
multilayer capacitor 1 shown in FIG. 15 showing an internal structure thereof in the form of a section along which a secondinternal electrode 11 extends; - FIG. 18 is a plan view illustrating currents flowing in the
multilayer capacitor 1 shown in FIG. 15; - FIG. 19 is a plan view of a
multilayer capacitor 101 according to a fifth embodiment of the present invention; - FIG. 20 is a plan view of the
multilayer capacitor 101 shown in FIG. 19 showing an internal structure thereof in the form of a section along which a firstinternal electrode 40 d extends; and - FIG. 21 is a plan view of the
multilayer capacitor 101 shown in FIG. 10 showing an internal structure thereof in the form of a section along which a secondinternal electrode 41 d extends. - First Embodiment
- Referring now to the drawings, wherein like numerals indicate like elements, there is shown in FIGS. 1 through 3 a first embodiment of a multilayer capacitor constructed in accordance with the principles of the present invention and designated generally as31. FIGS. 1 through 3 correspond to FIGS. 15 through 17.
- FIG. 1 is a plan view of the external
appearance multilayer capacitor 31. FIG. 2 is a planview multilayer capacitor 31 showing a firstinternal electrode 40 located on one surface of a firstinternal dielectric layer 39 of thecapacitor 31. FIG. 3 is a plan view of a second section of themultilayer capacitor 31 showing a secondinternal electrode 41 located on one surface of a secondinternal dielectric layer 39 of thecapacitor 31. -
Multilayer capacitor 31 includes a capacitormain body 38 in the form of a rectangular parallelpiped having two opposed principal surfaces 32 and 33 and fourside surfaces main body 38 includes a plurality of generally planardielectric layers 39 made of, for example, a ceramic dielectric material. The main surfaces of thedielectric layers 39 are situated generally parallel to the principal surfaces 32, 33 of the capacitormain body 38. At least a pair of first and secondinternal electrodes dielectric material layer 39 interposed therebetween, each such pair of internal electrodes forming a respective capacitor unit. - As shown in FIG. 2, the first
internal electrode 40 has sixlead electrodes side surfaces 34 through 37. Particularly, thelead electrodes side surface 34; thelead electrode 44 extends to theside surface 35; thelead electrodes side surface 36; and thelead electrode 47 extends to theside surface 37. - Each lead electrode42-47 is electrically coupled to a respective external terminal electrodes 48-53. The external
terminal electrodes lead electrodes side surface 34; the externalterminal electrode 50, connected to thelead electrode 44, is located on theside surface 35, the externalterminal electrodes lead electrodes side surface 36; and the externalterminal electrode 53, connected to thelead electrode 47, is located on theside surface 37. - As shown in FIG. 3, the
internal electrode 41 is formed with six secondlead electrodes side surfaces 34 through 37. More specifically, thelead electrodes surface 34;lead electrode 56 extends to sidesurface 35;lead electrodes surface 36; andlead electrode 59 extends to theside surface 37. - The positions on the side surfaces34 through 37 to which the
respective lead electrodes 54 through 59 extend are different from the positions to which therespective lead electrodes 42 through 47 extend. -
External terminal electrodes respective lead electrodes 54 through 59, are provided on the side surfaces 34 through 37 a positions which are different than the positions of the externalterminal electrodes 48 through 53. Externalterminal electrodes electrodes side surface 34; externalterminal electrode 62, connected to leadelectrode 56, is located onside surface 35; - external
terminal electrodes electrodes side surface 36; and externalterminal electrode 65, connected to leadelectrode 59, are located onside surface 37. - The external
terminal electrodes 48 through 53 are arranged in an interleaved manner such that no two external electrodes which are electrically coupled to the sameinternal electrode internal electrodes - In order to increase the capacity of the
multilayer capacitor 31, additional pairs of internal electrodes can be provided to define additional capacitor units. For example, themultilayer capacitor 31 can include two sets of capacitor units, each set being defined by a respective pair of first and secondinternal electrodes terminal electrodes 48 through 53 or the second externalterminal electrodes 60 through 65. - Each of the external
terminal electrodes 48 through 53 and 60 through 65 is preferably formed so as to extend not only on the side surfaces 34 through 37 but also onto a part of each of theprincipal surfaces - FIG. 4 illustrates various currents flowing in the
multilayer capacitor 31. In FIG. 4, the firstinternal electrode 40 is indicated by a broken line and the secondinternal electrode 41 is indicated by a solid line, the two electrodes being illustrated in an overlapping relationship. - As apparent from these typical paths and the directions of current flow indicated by the arrows in FIG. 4 (the direction of current flow indicates that direction of each of the noted current paths at a given point in time, the direction of the flow of current through these paths will alternate periodically), a current flows from each of the second external
terminal electrodes 60 through 65 to each of the first -external terminal electrodes 48 through 53. When such currents flow, induced magnetic flux is generated. - As in the prior art, the various components of the induced flux at the
central regions 66 indicated by the circles cancel one another out because currents flow in various directions. Similarly, the various components of the induced flux in the areas of the side surfaces 34 and 36 tend to cancel one another. In this connection, current flow in the area of side surfaces 34 and 36 is very similar to that of the prior art of FIG. 18. - However, the embodiment of FIGS.1-4 produces a much more desirable result in the
areas 67 adjacent the side surfaces 35, 37. Since the first externalterminal electrodes terminal electrodes areas 67 and no significant generation of net magnetic flux. - As a result, the degree of net induced magnetic flux generated over the entire region of the
multilayer capacitor 31 is significantly reduced, thereby allowing the ESL to be suppressed to a very low level. - Another advantage of this embodiment is that the current paths between each of the electrodes is reduced. Particularly, each of the
first lead electrodes 42 through 47 (and the first externalterminal electrodes 48 through 53) is located relatively close to its adjacent secondlead electrode 54 through 59 (and the second externalterminal electrode 60 through 64) compared to the prior art of FIG. 18. This reduces the lengths of the current paths and thereby reduces self-inductance components produced between them. - Second Embodiment
- FIGS. 5 through 7 show a
multilayer capacitor 71 according to a second embodiment of the present invention. FIG. 5 is a plan view of the external appearance of themultilayer capacitor 71. FIG. 6 is a plan view showing one surface of aninternal dielectric layer 39 of themultilayer capacitor 71 having a firstinternal electrode 40 a located thereon. FIG. 7 is a plan view showing one surface of a different one of the internaldielectric layers 39 of the multilayer capacitor .71 having a secondinternal electrode 41 a located thereon. - FIGS. 5 through 7 respectively correspond to FIGS. 1 through 3 of the first embodiment. In FIGS. 5 through 7, elements corresponding to elements shown in FIGS. 1 through 3 are indicated by like reference numbers and will not be described here to avoid duplication.
- Referring to FIG. 6, the first
internal electrode 40 a is formed with fivelead electrodes multilayer capacitor 71 is different from themultilayer capacitor 31 of the first embodiment in that themultilayer capacitor 71 has no lead electrode extending toside surface 35. Additionally, lead electrode 47 a extends to the middle of theside surface 37, whereaslead electrode 47 extends to the upper half ofside surface 37. - The five
lead electrodes 42 through 47 a are electrically coupled to five externalterminal electrodes external electrodes side surfaces multilayer capacitor 71 is different from themultilayer capacitor 31 of the first embodiment in that themultilayer capacitor 71 has no external terminal corresponding to the firstexternal terminal electrode 50 and In that the externalterminal electrode 53 a is different in location from the externalterminal electrode 53. - Referring to FIG. 7, a second
internal electrode 41 a has fivelead electrodes multilayer capacitor 71 is different from themultilayer capacitor 31 of the first embodiment in that it has no lead electrode extending to theside surface 37 and in that the lead electrode 56 a which extends to theside surface 35 extends to the middle of theside surface 35, rather than the bottom of theside surface 35 as is the case withlead electrode 56 of the first embodiment. - Each of the
lead electrodes 54 through 58 is electrically coupled to a respective externalterminal electrode multilayer capacitor 71 is different from themultilayer capacitor 31 of the first embodiment in that it has no external terminal corresponding to the externalterminal electrode 65 and in that the externalterminal electrode 62 a is located in a different position than the externalterminal electrode 62. - If desired, the capacity of
multilayer capacitor 71 can be increased by providing a plurality of capacitive units, each defined by a respective set ofinternal electrodes layer 38. The plurality of capacitor units are then connected in parallel by appropriate ones of the externalterminal electrodes 48 through 53 a or 60 through 64. - In the second embodiment of the invention, each of the external
terminal electrodes internal electrode 40 a is located adjacent at least one of the externalterminal electrodes internal electrode 41 a. Further, only the second externalterminal electrode 62 a is located on theside surface 35, and only the firstexternal terminal electrode 53 a is located on theside surface 37. By providing the externalterminal electrodes internal electrodes conventional multilayer capacitor 1 shown in FIGS. 15 through 17. It is also possible to reduce the length of the path of these currents thereby further reducing the induced inductance components. - Third Embodiment
- FIGS. 8 through 11 show a
multilayer capacitor 81 according to a third embodiment of the present invention. FIG. 8 is a plan view of the external appearance of themultilayer capacitor 81. FIG. 9 is a plan view of the surface of one of the internaldielectric layers 39 of themultilayer capacitor 81 having a firstinternal electrode 82 formed thereon. FIG. 10 is a plan view of the surface of one of the internaldielectric layers 39 of themultilayer capacitor 81 having a second internal electrode 40 b formed thereon. FIG. 11 is a plan view of the surface of one of the internaldielectric layers 39 of themultilayer capacitor 81 having a thirdinternal electrode 41 b formed thereon. - In FIGS. 8 through 11, elements corresponding to elements shown in FIGS. 1 through 3 are indicated by like reference numbers and will not be described here to avoid duplication.
- The
multilayer capacitor 81 of the third embodiment of the invention includes a thirdinternal electrode 82 facing at least either the first internal electrode 40 b or secondinternal electrode 41 b with adielectric material layer 39 interposed therebetween. The thirdinternal electrode 82 is formed with fourlead electrodes respective side surface lead electrodes surface 34, and leadelectrodes surface 36. -
External terminal electrodes lead electrodes 83 through 86, respectively, are provided on respective side surfaces 34 and 36. Themultilayer capacitor 81 is different from themultilayer capacitor 31 of the first embodiment in that it includes the third externalterminal electrodes terminal electrodes multilayer capacitor 31 of the first embodiment and includes the third externalterminal electrodes terminal electrodes multilayer capacitor 31. - Referring to FIG. 10, a first internal electrode40 b has four
first lead electrodes multilayer capacitor 81 is different from themultilayer capacitor 31 of the first embodiment in that it has only one lead electrode 42 b which extends toside surface 34 and one lead electrode 45 b which extends toside surface 36. - Four first external
terminal electrodes side surfaces 34 through 37, respectively. Themultilayer capacitor 81 is different from themultilayer capacitor 31 of the first embodiment in that it includes the first externalterminal electrodes terminal electrodes multilayer capacitor 31. - Referring to FIG. 11, a second
internal electrode 41 b has foursecond lead electrodes multilayer capacitor 81 is different from the secondinternal electrode 41 of themultilayer capacitor 31 of the first embodiment in that only onelead electrode 54 b extends to theside surface 34 and only one lead electrode 57 b extends to sidesurface 36. - Four second external
terminal electrodes first lead electrodes 54 b through 59, respectively. The four second external terminal electrodes are provided on the fourside surfaces 34 through 37, respectively. Themultilayer capacitor 81 is different from themultilayer capacitor 31 of the first embodiment in that the second externalterminal electrodes terminal electrodes multilayer capacitor 31. - By way of example, the
multilayer capacitor 81 can be formed by locating the thirdinternal electrode 82, the first internal electrode 40 b and the secondinternal electrode 41 b, one above the other with respective dielectric layers being located therebetween. Irrespective of the relative locations of the internal electrodes, the external terminal electrodes are arranged such that each of the third externalterminal electrodes 87 through 90 is followed by one of the first externalterminal electrodes 48 b through 53 and then followed by one of the second externalterminal electrodes 60 b through 65. This alternating arrangement is repeated throughout the fourside surfaces 34 through 37. The above-described order of stacking theinternal electrodes - In order to increase the capacity of the
multilayer capacitor 81, a plurality of thirdinternal electrodes 82, first internal electrodes 40 b and secondinternal electrodes 41 b may be provided to form a plurality of capacitor units. For example, a plurality of thirdinternal electrodes 82 and a plurality of first internal electrodes 40 b may be provided; a plurality of secondinternal electrodes 41 b and a plurality of thirdinternal electrodes 82 may be provided; or a plurality of thirdinternal electrodes 82, a plurality of first internal electrodes 40 b and a plurality of secondinternal electrodes 41 b may be provided. The resultant capacitor units are connected in parallel by at least any of the third externalterminal electrodes 87 through 90, the first externalterminal electrodes 48 b through 53 and the second external terminal electrodes Gob through 65. - Like the first embodiment, external terminal electrodes connected to different internal electrodes (that is, external terminal electrodes having different polarities) are located on each of-the four
side surfaces 34 through 37. More specifically, firstexternal terminal electrode 48 b, second externalterminal electrode 60 b and third externalterminal electrodes side surface 34; firstexternal terminal electrode 50 and second externalterminal electrode 62 are located onside surface 35; firstexternal terminal electrode 51 b, second externalterminal electrode 63 b and third externalterminal electrodes side surface 36; and firstexternal terminal electrode 53 and second externalterminal electrode 65 are located onside surface 37. - Therefore, according to the third embodiment of the invention, since the flow of currents on the
internal electrodes 40 b and 41 b can be directed in various directions to effectively cancel magnetic flux and to reduce the lengths of the current paths, the induced inductance components can be reduced. - Although the arrangement of the third embodiment is different from that in the first embodiment in that external terminal electrodes having different polarities are not necessarily adjacent to each other in all locations, the directions of the current flows on the
internal electrodes 40 b and 41 b is more diverse than those in theconventional multilayer capacitor 1 shown in FIGS. 15 through 17 and the lengths of the current paths are shorter. This makes it possible to achieve a higher reduction of the induced inductance components - As an alternative to the third embodiment, a multilayer capacitor may be provided in which only the first and second
internal electrodes 40 b and 41 b are provided and the thirdinternal electrode 82 is excluded. Further, the thirdinternal electrode 82 may be formed with lead electrodes which extend to the side surfaces 35 and 37. - Fourth Embodiment
- FIGS. 12 through 14 show a
multilayer capacitor 91 according to a fourth embodiment of the present invention. FIG. 12 is a plan view of the external appearance of themultilayer capacitor 91. FIG. 13 is a plan view of the surface of one of the dielectric layers of themultilayer capacitor 91 having a firstinternal electrode 40 c formed thereon. FIG. 14 is a plan view of the surface of one of the dielectric layers of themultilayer capacitor 91 having a secondinternal electrode 41 c formed thereon. - FIGS. 12 through 14 respectively correspond to FIGS. 1 through 3 of the first embodiment. In FIGS. 12 through 14, elements corresponding to elements shown in FIGS. 1 through 3 ate indicated by like reference numbers and will not be described here to avoid duplication.
- The
multilayer capacitor 91 of the fourth embodiment of the invention resembles themultilayer capacitor 71 of the second embodiment in its external appearance. A firstinternal electrode 40 c has fivefirst lead electrodes multilayer capacitor 91 is different from themultilayer capacitor 31 of the first embodiment in that does not include a lead electrode corresponding to thelead electrode 47 which extends to theside surface 37 and in that the positions at which thelead electrodes 44 c, 45 c and 46 c respectively extends to the side surfaces 35 and 36 are different from the positions that thelead electrodes 44 through 46 extend to those surfaces. - Five external
terminal electrodes lead electrodes 42 through 46 c, respectively. These external electrodes are provided on the side surfaces 34 through 36. Themultilayer capacitor 91 is different from themultilayer capacitor 31 of the first embodiment in that it does not include an external terminal electrode corresponding to the firstexternal terminal electrode 53 and in that the positions of the externalterminal electrodes terminal electrodes 50 through 52, respectively. - Referring to FIG. 14, a second
internal electrode 41 c has fivelead electrodes multilayer capacitor 91 is different from themultilayer capacitor 31 of the first embodiment in that it does not include a lead electrode corresponding to thelead electrode 59 which extends to theside surface 35 and in that the positions of thelead electrodes lead electrodes 57 through 59, respectively. - The external
terminal electrodes lead electrodes 54 through 59 c, respectively, are provided on the side surfaces 34, 36 and 37. Themultilayer capacitor 91 is different from themultilayer capacitor 31 of the first embodiment in that it does not include an external terminal electrode corresponding to the second externalterminal electrode 62 and in that the positions of the externalterminal electrodes terminal electrodes 63 through 65, respectively. - In order to increase the capacity of
multilayer capacitor 91, a plurality of firstinternal electrodes 40 c and a plurality of secondinternal electrodes 41 c can be provided. Pairs ofinternal electrodes terminal electrodes 48 through 52 c or the second externalterminal electrodes 60 through 65 c. - Like the first embodiment described above, each of the first external
terminal electrodes 48 through 52 c of the fourth embodiment of the invention is arranged so as to alternate with respective ones of the second external 30.terminal electrodes 60 through 65 c throughout the fourside surfaces 34 through 37. The fourth embodiment is different from the second embodiment in this regard. - Therefore, according to the fourth embodiment of the invention, since the flow of currents on the
internal electrodes - Fifth Embodiment
- FIGS. 19 through 21 show a
multilayer capacitor 101 according to a fifth embodiment of the present invention. FIG. 19 is a plan view of the external appearance of themultilayer capacitor 101. FIG. 20 is a plan view of the surface of one of the dielectric layers of themultilayer capacitor 101 having a firstinternal electrode 40 d formed thereon. FIG. 21 is a plan view of the surface of one of the dielectric layers of the multilayer capacitor. 101 having a secondinternal electrode 41 d formed thereon. - FIGS. 19 through 21 respectively correspond to FIGS. 1 through 3 of the first embodiment. In FIGS. 19 through 21, elements corresponding to elements shown in FIGS. 1 through 3 are indicated by like reference numbers and will not be described here to avoid duplication.
- Referring to FIG. 20, a first
internal electrode 40 d has threefirst lead electrodes multilayer capacitor 101 is different from themultilayer capacitor 31 of the first embodiment in that it does not includelead electrodes side surface 34, does not include alead electrode 46 which extends to theside surface 36, and in that the positions at which thelead electrodes lead electrodes - The three
lead electrodes electrodes multilayer capacitor 101 is different from themultilayer 31 of the first embodiment in that it does not include external terminal electrodes corresponding to the first externalterminal electrodes terminal electrodes terminal electrodes - Referring to FIG. 21, a second
internal electrode 41 d has twolead electrodes multilayer capacitor 101 is different from themultilayer capacitor 31 of the first embodiment in that it does not include lead electrodes corresponding to thelead electrodes lead electrodes lead electrodes - Two external
terminal electrodes lead electrodes multilayer capacitor 31 of the first embodiment in that it does not include external terminal electrodes corresponding to the second externalterminal electrodes terminal electrodes terminal electrodes - In order to increase the capacity of
multilayer capacitor 101, a plurality of firstinternal electrodes 40 d and a plurality of secondinternal electrodes 41 d can be provided. Therefore, according to the fifth embodiment of the invention, since the flow of the currents on theinternal electrodes 40 b and 41 b can be directed in various directions to effectively cancel magnetic flux and to reduce the lengths of the current paths, the induced inductance components can be reduced. - Although the arrangement of the fifth embodiment is different from that in that first embodiment in that external terminal electrodes having different polarities are not necessarily adjacent to each other in all locations the directions of the current flows on the
internal electrodes conventional multilayer capacitor 1 shown in FIGS. 15 and 17 and the lengths of the current paths are shorter. Therefore, this makes it possible to achieve a higher reduction of the induced inductance components. - Test Results
- A sample of each of the
multilayer capacitor 31 according to the first embodiment (embodiment 1), themultilayer capacitor 71 according to the second embodiment (embodiment 2), themultilayer capacitor 81 according to the third embodiment (embodiment 3), themultilayer capacitor 91 according to the fourth embodiment (embodiment 4) and the conventional multilayer capacitor 1 (comparative example) was fabricated and ESL of each of them was evaluated. - Each sample was formed with outer plan dimensions of 3.2 mm×2.5 mm. For samples having six layers of internal electrodes in total, i.e., those having two kinds of internal electrodes such as the
multilayer capacitors embodiments - ESL was obtained using the resonance method. The resonance method is a method wherein the impedance frequency characteristics of each of the sample multilayer capacitor is measured and ESL is obtained from a frequency f0 at a minimum point (referred to as series resonance point between the capacity component C8 and ESL of the capacitor) using the following equation.
- ESL=1/[(2πf 0)2 ×C 8]
- The measured value of ESL of each sample is shown in the Table 1 below.
TABLE 1 ESL Value (pH) Embodiment 140 Embodiment 272 Embodiment 385 Embodiment 451 Comparative Example 95 - It is apparent from Table 1 that ESL was suppressed to a greater degree in each of the
embodiments 1 through 4 than in the comparative example. Theembodiment 1 was most advantageous in reducing ESL. Theembodiment 4 was-more advantageous than theembodiments embodiment 1. - While the present invention has been described with reference to the illustrated embodiments, for example, it is possible to change positions and the number of the lead-out electrodes of the internal electrodes variously and to change the positions and number of the external terminal electrodes accordingly within the scope of the invention.
- As described above, according to the preferred embodiments of the present invention, at least either a first or a second internal electrode is formed with at least three lead electrodes which extend respectively to at least three of the side surfaces of a capacitor main body, and external terminal electrodes which are electrically coupled to respective lead electrodes are provided on respective side surfaces. As a result, since the flow of currents on the internal electrodes can be directed in various directions to cancel magnetic flux and to reduce the lengths of the currents path effectively, ESL can be reduced.
- With this structure, a high resonance frequency can be achieved and the frequency band of the capacitor can be increased. Accordingly, a multilayer capacitor according to the invention can accommodate electronic circuits at higher frequencies than was possible with the comparative example and can be advantageously used, for example, as a bypass capacitor or decoupling capacitor in a high frequency circuit. Further, while a decoupling capacitor used in an MPU (microprocessing unit) must also have the function of a quick power supply (a function of supplying power from an amount of electricity charged in the capacitor when there is a sudden need for power as in the case of power-up), a multilayer capacitor according to the invention can be used for such an application because it has low ESL.
- In the embodiments of the present invention described below, the cancellation of magnetic fluxes as described above is further improved and the lengths of currents are further reduced to achieve more effective reduction of ESL.
- It should be understood that the foregoing description is only illustrative of the invention. Various alternatives and modifications can be devised by those skilled in the art without departing from the invention. Accordingly, the present invention is intended to embrace all such alternatives, modifications and variances which fall within the scope of the appended claims.
Claims (26)
1. A multilayer capacitor, comprising:
a capacitor main body having a generally rectangular parallelpiped shape with two principal surfaces in a face-to-face relationship with each other and four side surfaces connecting said principal surfaces;
m capacitor units formed in said capacitor main body, m being an integer greater than or equal to one, each of said capacitor units being formed by a respective pair of first and second internal electrodes disposed in said main body in a face-to-face relationship with a dielectric material layer interposed therebetween to form a capacitor unit;
n first external electrodes, n being an integer greater than two, each of said first external electrodes being located on a respective one of said side surfaces of said capacitor main body, at least one of said first external electrodes being located on each of at least three of said side surfaces;
said first internal electrode having n first lead electrodes, each of said first lead electrodes extending to and being electrically coupled to a respective one of said first external electrodes;
p second external electrodes, p being an integer greater than one, each of said second external electrodes being located on a respective one of said side surfaces of said capacitor main body; and
said second internal electrode having p second lead electrodes, each of said second lead electrodes extending to and being electrically coupled to a respective one of said second external electrodes.
2. The multilayer capacitor according to , wherein said internal and lead electrodes are arranged in such a manner that when currents of different polarity are applied to said first and second internal electrodes, the net induced inductance in the area of all four of said side surfaces is substantially zero.
claim 1
3. The multilayer capacitor according to , wherein p is an integer greater than two and at least a respective one of said second external electrodes is located on each of three of said side surfaces.
claim 1
4. The multilayer capacitor according to , wherein on any given side Surface, no two external electrodes which are electrically coupled to the same one of said first and second internal-electrodes are located adjacent one another.
claim 3
5. The multilayer capacitor according to , wherein n is four and wherein a respective one of said first external electrodes is located on each of said four side surfaces.
claim 3
6. The multilayer capacitor according , wherein p is four and wherein a respective one of said second external electrodes is located on each of said four side surfaces.
claim 5
7. The multilayer capacitor according to , wherein said first and second external electrodes are arranged alternately along said side surfaces such that no two external electrodes electrically coupled to the same internal electrode are located adjacent one another.
claim 6
8. The multilayer capacitor according to any of claims 1 through 7, wherein m is an integer greater than 1 and wherein each of said capacitor units are connected in parallel via at least either said first or second external terminal electrodes.
9. The multilayer capacitor according to , wherein at least two of said first external electrodes is located on a same one of said side surfaces.
claim 1
10. The multilayer capacitor according to , wherein at least two of said second external electrodes is located on a same one of said side surfaces.
claim 9
11. The multilayer capacitor according to , wherein each said capacitor unit further includes a third internal electrode disposed in said main body in a face-to-face relationship with at least either said first or second internal electrodes with a dielectric material layer interposed therebetween.
claim 1
12. The multilayer capacitor of , further including at least two third external electrodes located on said side surfaces and wherein said third internal electrode has at least two third lead electrodes which extend to and are electrically coupled to respective ones of said at least two third external electrodes.
claim 11
13. The multilayer capacitor according to , wherein all of said first, second and third internal electrodes are interposed with respect to one another such that no two external electrodes which are coupled to the same internal electrode are located adjacent one another.
claim 12
14. The multilayer capacitor according to any of claims 1 through 6, wherein all of said external terminal electrodes are arranged such that they are not located adjacent to another external terminal electrode connected to the same internal electrode.
15. The multilayer capacitor according to any of claims 1, 2, 3, 4, 5 and 7, wherein at least one of said external terminal electrodes is provided on each of said four side surfaces.
16. The multilayer capacitor according to any of claims 1 through 7, wherein said first and second internal electrodes are generally planar and lie in planes which are generally parallel to one another.
17. The multilayer capacitor according to , wherein said planes are generally parallel to the principal surfaces of said capacitor main body.
claim 16
18. The multilayer capacitor according to , wherein said first and second internal electrodes are generally rectangular in shape as viewed along said planes.
claim 16
19. The multilayer capacitor according to , wherein n is three and wherein a respective one of said first external electrodes is located on each of three of said side surfaces.
claim 1
20. The multilayer capacitor according to , wherein p is two and wherein a respective one of said second external electrodes is located on each of two of said side surfaces.
claim 19
21. The multilayer capacitor according to , wherein said first and second external electrodes are arranged alternately along said side surfaces such that no two external electrodes electrically coupled to the same internal electrode are located adjacent to another along the same side surface.
claim 20
22. The multilayer capacitor according to , wherein said second external electrodes are arranged on opposite ones of said side surfaces.
claim 20
23. The multilayer capacitor according to , wherein said side surfaces are first, second, third and fourth side surfaces, a respective one of said first external electrodes is located on each of said first, second and third side surfaces, one of said second external electrodes is located on said fourth side surface and the other of said second external electrodes is located on said second side surface.
claim 22
24. The multilayer capacitor according to , wherein said second and fourth side surfaces are located opposite one another.
claim 23
25. The multilayer capacitor according to , wherein m is an integer greater than 1 and wherein each of said capacitor units are connected in parallel via at least either said first or second external terminal electrodes.
claim 19
26. The multilayer capacitor according to any of claims 19 through 24, wherein said first and second internal electrodes are generally planar and lie in planes which are generally parallel to one another.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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US09/805,079 US6430025B2 (en) | 1997-11-10 | 2001-03-13 | Multilayer capacitor |
Applications Claiming Priority (5)
Application Number | Priority Date | Filing Date | Title |
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JP9306717A JP2991175B2 (en) | 1997-11-10 | 1997-11-10 | Multilayer capacitors |
JP9-306717 | 1997-11-10 | ||
US09/042,379 US6072687A (en) | 1997-11-10 | 1998-03-13 | Multilayer capacitor |
US09/458,154 US6215647B1 (en) | 1997-11-10 | 1999-12-09 | Multilayer capacitor |
US09/805,079 US6430025B2 (en) | 1997-11-10 | 2001-03-13 | Multilayer capacitor |
Related Parent Applications (1)
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US09/458,154 Continuation US6215647B1 (en) | 1997-11-10 | 1999-12-09 | Multilayer capacitor |
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US20010055191A1 true US20010055191A1 (en) | 2001-12-27 |
US6430025B2 US6430025B2 (en) | 2002-08-06 |
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US09/042,379 Expired - Lifetime US6072687A (en) | 1997-11-10 | 1998-03-13 | Multilayer capacitor |
US09/390,861 Expired - Lifetime US6188565B1 (en) | 1997-11-10 | 1999-09-03 | Multilayer capacitor |
US09/415,539 Expired - Lifetime US6226169B1 (en) | 1997-11-10 | 1999-10-08 | Multilayer capacitor |
US09/458,154 Expired - Lifetime US6215647B1 (en) | 1997-11-10 | 1999-12-09 | Multilayer capacitor |
US09/805,079 Expired - Lifetime US6430025B2 (en) | 1997-11-10 | 2001-03-13 | Multilayer capacitor |
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US09/042,379 Expired - Lifetime US6072687A (en) | 1997-11-10 | 1998-03-13 | Multilayer capacitor |
US09/390,861 Expired - Lifetime US6188565B1 (en) | 1997-11-10 | 1999-09-03 | Multilayer capacitor |
US09/415,539 Expired - Lifetime US6226169B1 (en) | 1997-11-10 | 1999-10-08 | Multilayer capacitor |
US09/458,154 Expired - Lifetime US6215647B1 (en) | 1997-11-10 | 1999-12-09 | Multilayer capacitor |
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US (5) | US6072687A (en) |
EP (3) | EP1087411B1 (en) |
JP (1) | JP2991175B2 (en) |
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TW (1) | TW355805B (en) |
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US8094430B2 (en) * | 2006-12-22 | 2012-01-10 | Horowitz Harvey J | Capacitors, couplers, devices including same and methods of manufacturing same |
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Family Cites Families (32)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3308359A (en) | 1965-03-12 | 1967-03-07 | Bruce R Hayworth | Low-inductance capacitor |
FR1464631A (en) | 1965-07-27 | 1967-01-06 | Thomson Houston Comp Francaise | Improvements in capacitor manufacturing |
US3612963A (en) | 1970-03-11 | 1971-10-12 | Union Carbide Corp | Multilayer ceramic capacitor and process |
US3822397A (en) | 1973-05-07 | 1974-07-02 | Sprague Electric Co | A capacitor package with a split metal-plate terminal cover |
US3971970A (en) | 1974-11-27 | 1976-07-27 | P. R. Mallory & Co., Inc. | Electrical component with low impedance at high frequency |
DE2545672C3 (en) | 1975-10-11 | 1978-05-03 | Draloric Electronic Gmbh, 8500 Nuernberg | Multilayer capacitor and process for its manufacture |
US4074340A (en) | 1976-10-18 | 1978-02-14 | Vitramon, Incorporated | Trimmable monolithic capacitors |
US4295183A (en) | 1979-06-29 | 1981-10-13 | International Business Machines Corporation | Thin film metal package for LSI chips |
US4274124A (en) | 1979-12-26 | 1981-06-16 | International Business Machines Corporation | Thick film capacitor having very low internal inductance |
US4328530A (en) | 1980-06-30 | 1982-05-04 | International Business Machines Corporation | Multiple layer, ceramic carrier for high switching speed VLSI chips |
US4346429A (en) | 1980-07-09 | 1982-08-24 | Union Carbide Corporation | Multilayer ceramic capacitor with foil terminal |
FR2507379A1 (en) * | 1981-06-05 | 1982-12-10 | Europ Composants Electron | SERIES CAPACITOR BLOCK AND VOLTAGE MULTIPLIER USING SUCH A CAPACITOR BLOCK |
US4419714A (en) | 1982-04-02 | 1983-12-06 | International Business Machines Corporation | Low inductance ceramic capacitor and method for its making |
US4430690A (en) | 1982-10-07 | 1984-02-07 | International Business Machines Corporation | Low inductance MLC capacitor with metal impregnation and solder bar contact |
JPS60158612A (en) | 1984-01-27 | 1985-08-20 | 富士通株式会社 | Laminated ceramic capacitor |
DE3669614D1 (en) * | 1985-01-17 | 1990-04-19 | Eurofarad | CERAMIC HIGH-FREQUENCY MULTI-LAYER CAPACITOR WITH HIGH CAPACITY. |
US4706162A (en) | 1985-01-22 | 1987-11-10 | Rogers Corporation | Multilayer capacitor elements |
US4814940A (en) | 1987-05-28 | 1989-03-21 | International Business Machines Corporation | Low inductance capacitor |
US4830723A (en) | 1988-06-22 | 1989-05-16 | Avx Corporation | Method of encapsulating conductors |
US4831494A (en) | 1988-06-27 | 1989-05-16 | International Business Machines Corporation | Multilayer capacitor |
US4853826A (en) | 1988-08-01 | 1989-08-01 | Rogers Corporation | Low inductance decoupling capacitor |
US4852227A (en) | 1988-11-25 | 1989-08-01 | Sprague Electric Company | Method for making a multilayer ceramic capacitor with buried electrodes and terminations at a castellated edge |
US4862318A (en) | 1989-04-04 | 1989-08-29 | Avx Corporation | Method of forming thin film terminations of low inductance ceramic capacitors and resultant article |
JPH0442910A (en) | 1990-06-06 | 1992-02-13 | Marcon Electron Co Ltd | Multilayer ceramic capacitor |
JP2878919B2 (en) | 1991-12-30 | 1999-04-05 | 韓國電子通信研究院 | Chip type capacitor for high frequency noise removal |
US5517385A (en) | 1992-11-19 | 1996-05-14 | International Business Machines Corporation | Decoupling capacitor structure |
JPH06260364A (en) * | 1993-03-08 | 1994-09-16 | Masusaku Okumura | Chip component |
FR2707123B1 (en) * | 1993-06-29 | 1995-09-01 | Europ Composants Electron | Quadrupole multilayer ceramic capacitor. |
JPH07201635A (en) | 1993-12-28 | 1995-08-04 | Tdk Corp | Ceramic capacitor |
JPH08172026A (en) | 1994-12-19 | 1996-07-02 | Sumitomo Metal Ind Ltd | Capacitor |
US5880925A (en) * | 1997-06-27 | 1999-03-09 | Avx Corporation | Surface mount multilayer capacitor |
JP2991175B2 (en) | 1997-11-10 | 1999-12-20 | 株式会社村田製作所 | Multilayer capacitors |
-
1997
- 1997-11-10 JP JP9306717A patent/JP2991175B2/en not_active Expired - Lifetime
-
1998
- 1998-03-11 TW TW087103544A patent/TW355805B/en not_active IP Right Cessation
- 1998-03-13 EP EP00117182A patent/EP1087411B1/en not_active Expired - Lifetime
- 1998-03-13 DE DE69830885T patent/DE69830885T2/en not_active Expired - Lifetime
- 1998-03-13 DE DE0915488T patent/DE915488T1/en active Pending
- 1998-03-13 EP EP98104606A patent/EP0915488B1/en not_active Expired - Lifetime
- 1998-03-13 DE DE1085539T patent/DE1085539T1/en active Pending
- 1998-03-13 DE DE69842131T patent/DE69842131D1/en not_active Expired - Lifetime
- 1998-03-13 EP EP00117183A patent/EP1085539B1/en not_active Expired - Lifetime
- 1998-03-13 US US09/042,379 patent/US6072687A/en not_active Expired - Lifetime
- 1998-03-13 DE DE69842195T patent/DE69842195D1/en not_active Expired - Lifetime
- 1998-08-13 DE DE1087411T patent/DE1087411T1/en active Pending
-
1999
- 1999-09-03 US US09/390,861 patent/US6188565B1/en not_active Expired - Lifetime
- 1999-10-08 US US09/415,539 patent/US6226169B1/en not_active Expired - Lifetime
- 1999-12-09 US US09/458,154 patent/US6215647B1/en not_active Expired - Lifetime
-
2001
- 2001-03-13 US US09/805,079 patent/US6430025B2/en not_active Expired - Lifetime
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US9711285B2 (en) | 2014-11-13 | 2017-07-18 | Murata Manufacturing Co., Ltd. | Capacitor with a center outer electrode disposed between first and second outer electrodes |
US9715967B2 (en) | 2014-11-13 | 2017-07-25 | Murata Manufacturing Co., Ltd. | Capacitor with center outer electrode disposed between first and second outer electrodes |
US9214282B1 (en) | 2014-12-08 | 2015-12-15 | Murata Manufacturing Co., Ltd. | Three-terminal capacitor |
Also Published As
Publication number | Publication date |
---|---|
EP0915488A2 (en) | 1999-05-12 |
EP1087411B1 (en) | 2011-03-23 |
DE69830885D1 (en) | 2005-08-25 |
DE69830885T2 (en) | 2006-02-16 |
EP0915488A3 (en) | 2000-05-03 |
DE1087411T1 (en) | 2001-09-06 |
US6430025B2 (en) | 2002-08-06 |
US6215647B1 (en) | 2001-04-10 |
DE69842195D1 (en) | 2011-05-05 |
JP2991175B2 (en) | 1999-12-20 |
EP1085539A2 (en) | 2001-03-21 |
US6188565B1 (en) | 2001-02-13 |
EP0915488B1 (en) | 2005-07-20 |
EP1087411A2 (en) | 2001-03-28 |
DE69842131D1 (en) | 2011-03-24 |
DE1085539T1 (en) | 2001-09-06 |
US6072687A (en) | 2000-06-06 |
JPH11144996A (en) | 1999-05-28 |
EP1085539B1 (en) | 2011-02-09 |
DE915488T1 (en) | 2000-05-04 |
EP1087411A3 (en) | 2005-02-09 |
TW355805B (en) | 1999-04-11 |
US6226169B1 (en) | 2001-05-01 |
EP1085539A3 (en) | 2005-02-09 |
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