US20010039125A1 - Method for making an insulating film - Google Patents

Method for making an insulating film Download PDF

Info

Publication number
US20010039125A1
US20010039125A1 US09/106,007 US10600798A US2001039125A1 US 20010039125 A1 US20010039125 A1 US 20010039125A1 US 10600798 A US10600798 A US 10600798A US 2001039125 A1 US2001039125 A1 US 2001039125A1
Authority
US
United States
Prior art keywords
insulating film
inter
making
layer insulating
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
US09/106,007
Other versions
US6429147B2 (en
Inventor
Masaki Hara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Assigned to SONY CORPORATION reassignment SONY CORPORATION ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: HARA, MASAKI
Publication of US20010039125A1 publication Critical patent/US20010039125A1/en
Application granted granted Critical
Publication of US6429147B2 publication Critical patent/US6429147B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76822Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
    • H01L21/76826Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. by contacting the layer with gases, liquids or plasmas
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76822Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
    • H01L21/76828Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. thermal treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H01L21/76834Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers formation of thin insulating films on the sidewalls or on top of conductors

Definitions

  • This invention relates to a method for making an insulating film particularly suitable for use in making an inter-layer insulating film in a semiconductor device.
  • a method for making an inter-layer insulating film using a fluid source material is often used to level the surface of a substrate by smoothing unevenness made by wiring or the like.
  • Such an inter-layer insulating film contains much moisture (H 2 O) and is highly fluid.
  • a non-fluid cap layer was formed directly on a fluid inter-layer insulating film containing much H 2 O by plasma CVD (for example, 1995 Dry Process Symposium, pp.261-268) to prevent cracks in the fluid inter-layer insulating film containing H 2 O during post-annealing.
  • plasma CVD for example, 1995 Dry Process Symposium, pp.261-268
  • the cap layer was a SiO 2 film made of SiH 4 and N 2 O by plasma CVD because N 2 O was more preferable than O 2 as the source material of oxygen in reducing the number of particles produced during the process.
  • the SiO 2 cap layer made of SiH 4 and N 2 O by plasma CVD invited corrosion of metal wiring and so-called poisoned via (a kind of defects of via holes (connection holes) formed in inter-layer insulating films), among others.
  • a method for making an insulating film configured to form the insulating film on a substrate having an uneven surface by using a fluid source material so as to level the unevenness comprising the steps of:
  • a method for making an insulating film configured to form the insulating film on a substrate having an uneven surface by using a fluid source material so as to level the unevenness comprising the steps of:
  • a method for making an insulating film configured to form the insulating film on a substrate having an uneven surface by using a fluid source material so as to level the unevenness comprising the steps of:
  • the step of annealing the structure may be added after making the first insulating film and prior to plasma processing to previously cure the entirety of the first insulating film to a certain extent in order to ensure that the first insulating film be more effectively cured by subsequent plasma processing.
  • the annealing temperature is not higher than 500° C., about 350° C., for example, when Al alloy wiring is used.
  • the annealing may be done either under vacuum or atmospheric pressure, but can be done more conveniently within a chamber used for the plasma processing.
  • a gas of molecules such as O 2 gas, containing oxygen as its matrix atoms and not containing nitrogen as its matrix atoms.
  • the first insulating film having a fluidity is typically made by low pressure CVD using SiH 4 or organosilane and H 2 O 2 as source materials.
  • the invention having the above-summarized construction configured to execute plasma processing, rapid thermal annealing by using lamp heating or ozone processing after making a first insulating film having a fluidity, H 2 O can be removed from the surface of the first insulating film due to dehydrated condensation, and the film can be hardened. Therefore, even when NH 3 is produced in vapor by plasma while a SiO 2 film is stacked on the first insulating film by plasma CVD using SiH 4 and N 2 O as source material gases, NH 3 can be prevented from being incorporated into the first insulating film. As a result, corrosion of metal wiring or the problem of poisoned via can be prevented.
  • FIGS. 1A through 1E are cross-sectional views for explaining a method for making an inter-layer insulating film according to the first embodiment of the invention
  • FIGS. 2A through 2C are schematic diagrams for explaining effects of O 2 plasma processing executed in the method for making the inter-layer insulating film according to the first embodiment of the invention
  • FIGS. 3A through 3E are cross-sectional views for explaining a method for making an inter-layer insulating film according to the second embodiment of the invention.
  • FIGS. 4A through 4E are cross-sectional views for explaining a method for making an inter-layer insulating film according to the third embodiment of the invention.
  • FIGS. 1A through 1E show the method for making an inter-layer insulating film according to the first embodiment of the invention.
  • an Al alloy wiring 2 is formed on a Si substrate 1 having formed a device and covered with an inter-layer insulating film previously as shown in FIG. 1A.
  • a non-fluid SiO 2 film 3 is formed as a base layer on the Si substrate 1 by plasma CVD using SiH 4 and N 2 O, for example, as source materials.
  • a fluid inter-layer insulating film 4 is formed by low pressure CVD using monomethyl silane (Si(CH 3 )H 3 ) and H 2 O 2 , for example, as source materials.
  • the fluid inter-layer insulating film 4 contains silanol polymer as its major component, and contains much H 2 O in the film (1995 Dry Process Symposium, pp. 261-268).
  • the surface of the fluid inter-layer insulating film 4 is processed with O 2 plasma to cure the surface of the inter-layer insulating film 4 .
  • the O 2 plasma processing promotes hydrated condensation of silanol (Si(OH) 4 ) along the surface of the inter-layer insulating film 4 , and changes the surface of the inter-layer insulating film 4 substantially free from H 2 O.
  • a non-fluid SiO 2 film 5 is formed as a cap layer on the inter-layer insulating film 4 by plasma CVD using SiH 4 and N 2 O, for example, as source materials. Since substantially no H 2 O is contained in the surface of the inter-layer insulating film 4 , NH 3 produced in vapor by plasma is not incorporated into the inter-layer insulating film 4 in the process of stacking the SiO 2 film 5 as the cap layer.
  • the inter-layer insulating film 4 is cured by post-annealing.
  • an Al alloy wiring 1 which is 0.65 ⁇ m height and 0.4 ⁇ m wide, is made on the Si substrate 1 .
  • a SiO 2 film 3 of the thickness of 0.1 ⁇ m is formed as a base layer by plasma CVD, using N 2 O, SiH 4 and N 2 , setting their flow rates to 3000 SCCM, 120 SCCM and 1000 SCCM, respectively, under the reaction pressure of 1.2 Torr (1200 mTorr), setting the substrate temperature to 350° C.
  • a fluid inter-layer insulating film 4 of the thickness of 0.8 ⁇ m is formed by low pressure CVD, using Si(CH 3 )H 3 and vapor phase H 2 O 2 and N 2 , setting their flow rates to 100 SCCM, 0.7 g/min and 500 SCCM, respectively, under the reaction pressure of 1 Torr, setting the substrate temperature to 0° C.
  • a SiO 2 film 5 as a cap layer is stacked to the thickness of 0.3 ⁇ m by plasma CVD, using N 2 O, SiH 4 and N 2 , setting their flow rates to 2500 SCCM, 120 SCCM and 1000 SCCM, the reaction pressure to 0.8 Torr (800 mTorr), and the substrate temperature to 350° C.
  • the product is post-annealed for 30 minutes in a N 2 atmosphere to cure the inter-layer insulating film 4 .
  • the inter-layer insulating film having a triple-layered structure did not contain a detrimental amount of residual gas (NH 3 gas, or the like) which might cause a problem in the process and exhibited good characteristics.
  • FIGS. 2A through 2C show values by TDS (Thermal Desorption Spectroscopy) measurement on samples treated and not treated by O 2 plasma processing after making the fluid inter-layer insulating film 4 by low pressure CVD. Both samples were prepared by making the SiO 2 film 5 after O 2 plasma processing and by thereafter post-annealing for 30 minutes in a N 2 atmosphere at 400° C., and were measured by TDS measurement.
  • the flow rate of O 2 was set to 800 SCCM, the pressure to 250 mTorr, RF power to 500 W, substrate temperature to 0° C., and processing time to 10 minutes.
  • FIGS. 2A, 2B and 2 C are data upon the mass number of ions to be measured being 18 (corresponding to H 2 O), 17 (corresponding to NH 3 and OH) and 16 (corresponding to NH 2 and O), respectively.
  • substantially all H 2 O can be removed from the surface of the inter-layer insulating film 4 by treating the inter-layer insulating film 4 by O 2 plasma processing after making the inter-layer insulating film 4 as a fluid film. Therefore, even when the SiO 2 film 5 is made as a cap layer directly on the inter-layer insulating film 4 by plasma CVD, NH 3 produced in vapor by plasma during the process is never incorporated into the inter-layer insulating film 4 . As a result, corrosion of the Al alloy wiring 2 or the problem of poisoned via do not occur.
  • FIGS. 3A through 3E show a method for making an inter-layer insulating film according to the second embodiment of the invention.
  • the Al alloy wiring 2 is formed on the Si substrate 1 having formed a device and covered with an inter-layer insulating film previously as shown in FIG. 3A,.
  • a non-fluid SiO 2 film 3 is made as a base layer on the Si substrate 1 by plasma CVD using SiH 4 and N 2 O, for example, as source materials.
  • a fluid inter-layer insulating film 4 is made by low pressure CVD using Si(CH 3 )H 3 and H 2 O 2 , for example, as source materials.
  • the steps heretofore are the same as those of the first embodiment.
  • the surface of the inter-layer insulating film 4 is heated by lamp heating, namely by using radiant heat from a lamp heater, to cure the surface of the inter-layer insulating film 4 by rapid thermal annealing in a short time.
  • rapid thermal annealing dehydrated condensation of Si(OH) 4 is promoted along the surface of the inter-layer insulating film 4 , and the surface of the inter-layer insulating film 4 is changed substantially free from H 2 O.
  • a non-fluid SiO 2 film 5 is made as a cap layer on the inter-layer insulating film 4 by plasma CVD using SiH 4 and N 2 O, for example, as source materials.
  • SiH 4 and N 2 O for example, as source materials.
  • the surface of the inter-layer insulating film 4 contains substantially no H 2 O, it does not incorporate NH 3 produced in vapor by plasma during the process of making the SiO 2 film 5 as the cap layer.
  • the inter-layer insulating film 4 is cured by post-annealing.
  • the inter-layer insulating film of a triple-layered structure of the inter-layer insulating film 4 , underlying SiO 2 film 3 as the base layer and overlying SiO 2 film 5 as the cap layer is obtained.
  • an Al alloy wiring 1 which is 0.65 ⁇ m height and 0.4 ⁇ m wide, is made on the Si substrate 1 .
  • a SiO 2 film 3 of the thickness of 0.1 ⁇ m is formed as a base layer by plasma CVD, using N 2 O, SiH 4 and N 2 , setting their flow rates to 3000 SCCM, 120 SCCM and 1000 SCCM, respectively, under the reaction pressure of 1.2 Torr (1200 mTorr), setting the substrate temperature to 350° C.
  • an inter-layer insulating film 4 of the thickness of 0.8 ⁇ m is formed by low pressure CVD, using Si(CH 3 )H 3 and vapor phase H 2 O 2 and N 2 , setting their flow rates to 100 SCCM, 0.7 g/min and 500 SCCM, respectively, under the reaction pressure of 1 Torr, setting the substrate temperature to 0° C.
  • a SiO 2 film 5 as a cap layer is stacked to the thickness of 0.3 ⁇ m by plasma CVD, using N 2 O, SiH 4 and N 2 , setting their flow rates to 2500 SCCM, 120 SCCM and 1000 SCCM, the reaction pressure to 0.8 Torr (800 mTorr), and the substrate temperature to 350° C.
  • the product is post-annealed for 30 minutes in a N 2 atmosphere to cure the inter-layer insulating film 4 .
  • the inter-layer insulating film having a triple-layered structure did not contain a detrimental amount of residual gas (NH 3 gas, or the like) which might cause a problem in the process and exhibited good characteristics.
  • substantially all H 2 O can be removed from the surface of the inter-layer insulating film 4 by treating the surface of the inter-layer insulating film 4 by rapid thermal annealing by lamp heating after making the inter-layer insulating film 4 as a fluid film. Therefore, in the same manner as the first embodiment, even when the SiO 2 film 5 is made as a cap layer directly on the inter-layer insulating film 4 by plasma CVD, NH 3 produced in vapor by plasma during the process is never incorporated into the inter-layer insulating film 4 . As a result, corrosion of the Al alloy wiring 2 or the problem of poisoned via do not occur.
  • FIGS. 4A through 4E show a method for making an inter-layer insulating film according to the third embodiment of the invention.
  • the Al alloy wiring 2 is formed on the Si substrate 1 having formed a device and covered with an inter-layer insulating film previously as shown in FIG. 4A.
  • a non-fluid SiO 2 film 3 is made as a base layer on the Si substrate 1 by plasma CVD using SiH 4 and N 2 O, for example, as source materials.
  • a fluid inter-layer insulating film 4 is made by low pressure CVD using Si(CH 3 )H 3 and H 2 O 2 , for example, as source materials.
  • the steps heretofore are the same as those of the first embodiment.
  • the Si substrate 1 is set in a chamber 6 and heated while introducing O 3 into the chamber to cure the surface of the inter-layer insulating film 4 by O 3 annealing of the inter-layer insulating film 4 .
  • O 3 annealing dehydrated condensation of Si(OH) 4 is promoted along the surface of the inter-layer insulating film 4 , and the surface of the inter-layer insulating film 4 is changed substantially free from H 2 O.
  • a non-fluid SiO 2 film 5 is made as a cap layer on the inter-layer insulating film 4 by plasma CVD using SiH 4 and N 2 O, for example, as source materials.
  • SiH 4 and N 2 O for example, as source materials.
  • the surface of the inter-layer insulating film 4 contains substantially no H 2 O, it does not incorporate NH 3 produced in vapor by plasma during the process of making the SiO 2 film 5 as the cap layer.
  • the inter-layer insulating film 4 is cured by post-annealing.
  • the inter-layer insulating film of a triple-layered structure of the inter-layer insulating film 4 , underlying SiO 2 film 3 as the base layer and overlying SiO 2 film 5 as the cap layer is obtained.
  • an Al alloy wiring 1 which is 0.65 ⁇ m height and 0.4 ⁇ m wide, is made on the Si substrate 1 .
  • a SiO 2 film 3 of the thickness of 0.1 ⁇ m is formed as a base layer by plasma CVD, using N 2 O, SiH 4 and N 2 , setting their flow rates to 3000 SCCM, 120 SCCM and 1000 SCCM, respectively, under the reaction pressure of 1.2 Torr (1200 mTorr), setting the substrate temperature to 350° C.
  • a fluid inter-layer insulating film 4 of the thickness of 0.8 ⁇ m is formed by low pressure CVD, using Si(CH 3 )H 3 and vapor phase H 2 O, and N 2 , setting their flow rates to 100 SCCM, 0.7 g/min and 500 SCCM, respectively, under the reaction pressure of 1 Torr, setting the substrate temperature to 0° C.
  • a SiO 2 film 5 as a cap layer is stacked to the thickness of 0.3 ⁇ m by plasma CVD, using N 2 O, SiH 4 and N 2 , setting their flow rates to 2500 SCCM, 120 SCCM and 1000 SCCM, the reaction pressure to 0.8 Torr (800 mTorr), and the substrate temperature to 350° C.
  • the product is post-annealed for 30 minutes in a N 2 atmosphere to cure the inter-layer insulating film 4 .
  • the inter-layer insulating film having a triple-layered structure did not contain a detrimental amount of residual gas (NH 3 gas, or the like) which might cause a problem in the process and exhibited good characteristics.
  • substantially all H 2 O can be removed from the surface of the inter-layer insulating film 4 by treating the surface of the inter-layer insulating film 4 by O 3 annealing after making the inter-layer insulating film 4 as a fluid film. Therefore, in the same manner as the first embodiment, even when the SiO 2 film 5 is made as a cap layer directly on the inter-layer insulating film 4 by plasma CVD, NH 3 produced in vapor by plasma during the process is never incorporated into the inter-layer insulating film 4 . As a result, corrosion of the Al alloy wiring 2 or the problem of poisoned via do not occur.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

In a method for manufacturing an insulating film using a fluid source material without inviting corrosion of metal wiring or the problem of poisoned via, after making a SiO2 film as a base layer on an Si substrate defining an uneven surface with an Al alloy wiring by plasma CVD using SiH4 and N2O, and further making an inter-layer insualting film having a fluidity on the SiO2 film by low pressure CVD using SiH4 or organosilane and H2O2, O2 plasma processing is applied to the inter-layer insulating film. After that, a SiO2 film as a cap layer is made on the inter-layer insulating film by plasma CVD using SiH4 and N2O. Rapid thermal annealing using lamp heating or O3 annealing may be done in lieu of O2 plasma processing.

Description

    BACKGROUND OF THE INVENTION
  • 1. Field of the Invention [0001]
  • This invention relates to a method for making an insulating film particularly suitable for use in making an inter-layer insulating film in a semiconductor device. [0002]
  • 2. Description of the Related Art [0003]
  • In a process of manufacturing a semiconductor device, a method for making an inter-layer insulating film using a fluid source material is often used to level the surface of a substrate by smoothing unevenness made by wiring or the like. Such an inter-layer insulating film contains much moisture (H[0004] 2O) and is highly fluid.
  • In conventional techniques, a non-fluid cap layer was formed directly on a fluid inter-layer insulating film containing much H[0005] 2O by plasma CVD (for example, 1995 Dry Process Symposium, pp.261-268) to prevent cracks in the fluid inter-layer insulating film containing H2O during post-annealing. Typically used as the cap layer was a SiO2 film made of SiH4 and N2O by plasma CVD because N2O was more preferable than O2 as the source material of oxygen in reducing the number of particles produced during the process.
  • However, the SiO[0006] 2 cap layer made of SiH4 and N2O by plasma CVD invited corrosion of metal wiring and so-called poisoned via (a kind of defects of via holes (connection holes) formed in inter-layer insulating films), among others.
  • OBJECT AND SUMMARY OF THE INVENTION
  • It is therefore an object of the invention to provide a method for making an insulating film free from problems such as corrosion of metal wiring and poisoned via even when a fluid source material is used to make the insulating film. [0007]
  • The Inventor made researches to overcome the above-mentioned problems involved in the conventional techniques as summarized below. [0008]
  • The Inventor has found through various experiments that NH[0009] 3 is produced in vapor by plasma in the process of making a SiO2 film by plasma CVD using SiH4 and N2O as source materials. Under the condition, if the inter-layer insulating film underlying the SiO2 film contains H2O and has a fluidity, then NH3 produced in vapor is incorporated (absorbed) into the underlying inter-layer insulating film. NH3 incorporated into the underlying inter-layer insulating film is released from the film when the inter-layer insulating film is heated or etched in a later process, and probably cause the problems of corrosion of metal wiring and poisoned via.
  • Therefore, in order to prevent these problems, it is important to take measures to prevent that NH[0010] 3 produced in vapor in the process of making the SiO2 film by plasma CVD using SiH4 and N2O as source materials is not incorporated in the underlying inter-layer insulating film. For this purpose, it is effective to remove H2O from the surface of the underlying inter-layer insulating film and to cure the surface prior to the process of making the SiO2 film. The present invention has been made through these researches by the Inventor.
  • According to a first aspect of the invention, there is provided a method for making an insulating film configured to form the insulating film on a substrate having an uneven surface by using a fluid source material so as to level the unevenness, comprising the steps of: [0011]
  • forming a first insulating film having a fluidity on the substrate by using a fluid source material; [0012]
  • applying plasma processing onto the first insulating film; and [0013]
  • forming a second insulating not having a fluidity on the first insulating film after the plasma processing. [0014]
  • According to a second aspect of the invention, there is provided a method for making an insulating film configured to form the insulating film on a substrate having an uneven surface by using a fluid source material so as to level the unevenness, comprising the steps of: [0015]
  • forming a first insulating film having a fluidity on the substrate by using a fluid source material; [0016]
  • applying rapid thermal annealing by lamp heating onto the first insulating film; and [0017]
  • forming a second insulating not having a fluidity on the first insulating film after the rapid thermal annealing. [0018]
  • According to a third aspect of the invention, there is provided a method for making an insulating film configured to form the insulating film on a substrate having an uneven surface by using a fluid source material so as to level the unevenness, comprising the steps of: [0019]
  • forming a first insulating film having a fluidity on the substrate by using a fluid source material; [0020]
  • applying ozone processing onto the first insulating film; and [0021]
  • forming a second insulating not having a fluidity on the first insulating film after the ozone processing. [0022]
  • In the first aspect of the invention, the step of annealing the structure may be added after making the first insulating film and prior to plasma processing to previously cure the entirety of the first insulating film to a certain extent in order to ensure that the first insulating film be more effectively cured by subsequent plasma processing. The annealing temperature is not higher than 500° C., about 350° C., for example, when Al alloy wiring is used. The annealing may be done either under vacuum or atmospheric pressure, but can be done more conveniently within a chamber used for the plasma processing. For plasma processing, it is preferable to use a gas of molecules, such as O[0023] 2 gas, containing oxygen as its matrix atoms and not containing nitrogen as its matrix atoms.
  • In the present invention, the first insulating film having a fluidity is typically made by low pressure CVD using SiH[0024] 4 or organosilane and H2O2 as source materials.
  • According to the invention, having the above-summarized construction configured to execute plasma processing, rapid thermal annealing by using lamp heating or ozone processing after making a first insulating film having a fluidity, H[0025] 2O can be removed from the surface of the first insulating film due to dehydrated condensation, and the film can be hardened. Therefore, even when NH3 is produced in vapor by plasma while a SiO2 film is stacked on the first insulating film by plasma CVD using SiH4 and N2O as source material gases, NH3 can be prevented from being incorporated into the first insulating film. As a result, corrosion of metal wiring or the problem of poisoned via can be prevented.
  • The above, and other, objects, features and advantage of the present invention will become readily apparent from the following detailed description thereof which is to be read in connection with the accompanying drawings.[0026]
  • BRIEF DESCRIPTION OF THE DRAWINGS
  • FIGS. 1A through 1E are cross-sectional views for explaining a method for making an inter-layer insulating film according to the first embodiment of the invention; [0027]
  • FIGS. 2A through 2C are schematic diagrams for explaining effects of O[0028] 2 plasma processing executed in the method for making the inter-layer insulating film according to the first embodiment of the invention;
  • FIGS. 3A through 3E are cross-sectional views for explaining a method for making an inter-layer insulating film according to the second embodiment of the invention; and [0029]
  • FIGS. 4A through 4E are cross-sectional views for explaining a method for making an inter-layer insulating film according to the third embodiment of the invention. [0030]
  • DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
  • Explained below are embodiments of the invention with reference to the drawings. In all figures illustrating the embodiments of the invention, the same or equivalent elements are labeled with common reference numerals. [0031]
  • FIGS. 1A through 1E show the method for making an inter-layer insulating film according to the first embodiment of the invention. [0032]
  • In the embodiment shown here, an [0033] Al alloy wiring 2 is formed on a Si substrate 1 having formed a device and covered with an inter-layer insulating film previously as shown in FIG. 1A.
  • Next, as shown in FIG. 1B, a non-fluid SiO[0034] 2 film 3 is formed as a base layer on the Si substrate 1 by plasma CVD using SiH4 and N2O, for example, as source materials.
  • Next, as shown in FIG. 1C, a fluid [0035] inter-layer insulating film 4 is formed by low pressure CVD using monomethyl silane (Si(CH3)H3) and H2O2, for example, as source materials. The fluid inter-layer insulating film 4 contains silanol polymer as its major component, and contains much H2O in the film (1995 Dry Process Symposium, pp. 261-268).
  • Next, as shown in FIG. 1D, the surface of the fluid inter-layer insulating [0036] film 4 is processed with O2 plasma to cure the surface of the inter-layer insulating film 4. The O2 plasma processing promotes hydrated condensation of silanol (Si(OH)4) along the surface of the inter-layer insulating film 4, and changes the surface of the inter-layer insulating film 4 substantially free from H2O.
  • Next, as shown in FIG. 1E, a non-fluid SiO[0037] 2 film 5 is formed as a cap layer on the inter-layer insulating film 4 by plasma CVD using SiH4 and N2O, for example, as source materials. Since substantially no H2O is contained in the surface of the inter-layer insulating film 4, NH3 produced in vapor by plasma is not incorporated into the inter-layer insulating film 4 in the process of stacking the SiO2 film 5 as the cap layer.
  • After that, the inter-layer [0038] insulating film 4 is cured by post-annealing.
  • As a result, an inter-layer insulating film of a triple-layered structure of the inter-layer [0039] insulating film 4, underlying SiO2 film 3 as the base layer and overlying SiO2 film 5 as the cap layer is obtained.
  • EXAMPLE
  • As shown in FIG. 1A, an [0040] Al alloy wiring 1, which is 0.65 μm height and 0.4 μm wide, is made on the Si substrate 1.
  • Next, as shown in FIG. 1B, a SiO[0041] 2 film 3 of the thickness of 0.1 μm is formed as a base layer by plasma CVD, using N2O, SiH4 and N2, setting their flow rates to 3000 SCCM, 120 SCCM and 1000 SCCM, respectively, under the reaction pressure of 1.2 Torr (1200 mTorr), setting the substrate temperature to 350° C.
  • Next, as shown in FIG. 1C, a fluid [0042] inter-layer insulating film 4 of the thickness of 0.8 μm is formed by low pressure CVD, using Si(CH3)H3 and vapor phase H2O2 and N2, setting their flow rates to 100 SCCM, 0.7 g/min and 500 SCCM, respectively, under the reaction pressure of 1 Torr, setting the substrate temperature to 0° C.
  • Next, as shown in FIG. 1D, heating the Si substrate to 350° C., using a mixed gas of O[0043] 2 and Ar, generating O2 plasma under the pressure of 1.2 Torr and the RF power of 500 W, O2 plasma processing of the inter-layer insulating film 4 is executed for three minutes. The flow rate of O2 is set to 2000 SCCM, and the flow rate of Ar is set to 1000 SCCM. The O2 plasma processing resulted in curing the surface of the inter-layer insulating film 4 and in removing H2O from the surface portion.
  • Next, as shown in FIG. 1E, a SiO[0044] 2 film 5 as a cap layer is stacked to the thickness of 0.3 μm by plasma CVD, using N2O, SiH4 and N2, setting their flow rates to 2500 SCCM, 120 SCCM and 1000 SCCM, the reaction pressure to 0.8 Torr (800 mTorr), and the substrate temperature to 350° C.
  • After that, the product is post-annealed for 30 minutes in a N[0045] 2 atmosphere to cure the inter-layer insulating film 4.
  • The inter-layer insulating film having a triple-layered structure, thus obtained, did not contain a detrimental amount of residual gas (NH[0046] 3 gas, or the like) which might cause a problem in the process and exhibited good characteristics.
  • Here is shown evidential data on the effects obtained by O[0047] 2 plasma processing of the fluid inter-layer insulating film 4. FIGS. 2A through 2C show values by TDS (Thermal Desorption Spectroscopy) measurement on samples treated and not treated by O2 plasma processing after making the fluid inter-layer insulating film 4 by low pressure CVD. Both samples were prepared by making the SiO2 film 5 after O2 plasma processing and by thereafter post-annealing for 30 minutes in a N2 atmosphere at 400° C., and were measured by TDS measurement. For O2 plasma processing, the flow rate of O2 was set to 800 SCCM, the pressure to 250 mTorr, RF power to 500 W, substrate temperature to 0° C., and processing time to 10 minutes. FIGS. 2A, 2B and 2C are data upon the mass number of ions to be measured being 18 (corresponding to H2O), 17 (corresponding to NH3 and OH) and 16 (corresponding to NH2 and O), respectively.
  • Comparing FIG. 2A and 2B, as to samples without O[0048] 2 plasma processing, the ratio of the ionic strength of the mass number 18 relative to the ionic strength of the mass number 17 is much larger than the value when H2O alone exists as a kind of gas, and this strongly indicates that another kind of gas with the mass number 17, NH3, exists. In contrast, as to samples treated by without O2 plasma processing, the ratio of the ionic strength of the mass number 17 relative to the ionic intensity of the mass number 18 is nearer to the value when H2O alone exists as a kind of gas.
  • These phenomena indicate that, during the process of making the SiO[0049] 2 film 3 by plasma CVD, substantially no NH3 produced in vapor by plasma is not incorporated into the inter-layer insulating film 4.
  • This means that O[0050] 2 plasma processing effectively removes H2O from the surface of the fluid inter-layer insulating film 4.
  • As explained above, according to the first embodiment, substantially all H[0051] 2O can be removed from the surface of the inter-layer insulating film 4 by treating the inter-layer insulating film 4 by O2 plasma processing after making the inter-layer insulating film 4 as a fluid film. Therefore, even when the SiO2 film 5 is made as a cap layer directly on the inter-layer insulating film 4 by plasma CVD, NH3 produced in vapor by plasma during the process is never incorporated into the inter-layer insulating film 4. As a result, corrosion of the Al alloy wiring 2 or the problem of poisoned via do not occur.
  • FIGS. 3A through 3E show a method for making an inter-layer insulating film according to the second embodiment of the invention. [0052]
  • In the embodiment shown here, the [0053] Al alloy wiring 2 is formed on the Si substrate 1 having formed a device and covered with an inter-layer insulating film previously as shown in FIG. 3A,.
  • Next, as shown in FIG. 3B, a non-fluid SiO[0054] 2 film 3 is made as a base layer on the Si substrate 1 by plasma CVD using SiH4 and N2O, for example, as source materials.
  • Next, as shown in FIG. 3C, a fluid [0055] inter-layer insulating film 4 is made by low pressure CVD using Si(CH3)H3 and H2O2, for example, as source materials. The steps heretofore are the same as those of the first embodiment.
  • Next, as shown in FIG. 3D, the surface of the inter-layer [0056] insulating film 4 is heated by lamp heating, namely by using radiant heat from a lamp heater, to cure the surface of the inter-layer insulating film 4 by rapid thermal annealing in a short time. By the rapid thermal annealing, dehydrated condensation of Si(OH)4 is promoted along the surface of the inter-layer insulating film 4, and the surface of the inter-layer insulating film 4 is changed substantially free from H2O.
  • Next, as shown in FIG. 3E, a non-fluid SiO[0057] 2 film 5 is made as a cap layer on the inter-layer insulating film 4 by plasma CVD using SiH4 and N2O, for example, as source materials. In this case, since the surface of the inter-layer insulating film 4 contains substantially no H2O, it does not incorporate NH3 produced in vapor by plasma during the process of making the SiO2 film 5 as the cap layer.
  • After that, the inter-layer [0058] insulating film 4 is cured by post-annealing.
  • By the process explained above, the inter-layer insulating film of a triple-layered structure of the inter-layer [0059] insulating film 4, underlying SiO2 film 3 as the base layer and overlying SiO2 film 5 as the cap layer is obtained.
  • EXAMPLE
  • As shown in FIG. 3A, an [0060] Al alloy wiring 1, which is 0.65 μm height and 0.4 μm wide, is made on the Si substrate 1.
  • Next, as shown in FIG. 3B, a SiO[0061] 2 film 3 of the thickness of 0.1 μm is formed as a base layer by plasma CVD, using N2O, SiH4 and N2, setting their flow rates to 3000 SCCM, 120 SCCM and 1000 SCCM, respectively, under the reaction pressure of 1.2 Torr (1200 mTorr), setting the substrate temperature to 350° C.
  • Next, as shown in FIG. 3C, an inter-layer [0062] insulating film 4 of the thickness of 0.8 μm is formed by low pressure CVD, using Si(CH3)H3 and vapor phase H2O2 and N2, setting their flow rates to 100 SCCM, 0.7 g/min and 500 SCCM, respectively, under the reaction pressure of 1 Torr, setting the substrate temperature to 0° C.
  • Next, as shown in FIG. 3D, heating the Si substrate to 350° C. under vacuum, rapid thermal annealing by lamp heating is executed for 60 seconds. At that time, the surface temperature of the [0063] Si substrate 1 was about 500° C. By rapid thermal annealing using lamp heating, the surface of the inter-layer insulating film 4 cured, and the surface portion was changed free from H2O.
  • Next, as shown in FIG. 3E, a SiO[0064] 2 film 5 as a cap layer is stacked to the thickness of 0.3 μm by plasma CVD, using N2O, SiH4 and N2, setting their flow rates to 2500 SCCM, 120 SCCM and 1000 SCCM, the reaction pressure to 0.8 Torr (800 mTorr), and the substrate temperature to 350° C.
  • After that, the product is post-annealed for 30 minutes in a N[0065] 2 atmosphere to cure the inter-layer insulating film 4.
  • The inter-layer insulating film having a triple-layered structure, thus obtained, did not contain a detrimental amount of residual gas (NH[0066] 3 gas, or the like) which might cause a problem in the process and exhibited good characteristics.
  • As explained above, according to the second embodiment, substantially all H[0067] 2O can be removed from the surface of the inter-layer insulating film 4 by treating the surface of the inter-layer insulating film 4 by rapid thermal annealing by lamp heating after making the inter-layer insulating film 4 as a fluid film. Therefore, in the same manner as the first embodiment, even when the SiO2 film 5 is made as a cap layer directly on the inter-layer insulating film 4 by plasma CVD, NH3 produced in vapor by plasma during the process is never incorporated into the inter-layer insulating film 4. As a result, corrosion of the Al alloy wiring 2 or the problem of poisoned via do not occur.
  • FIGS. 4A through 4E show a method for making an inter-layer insulating film according to the third embodiment of the invention. [0068]
  • In the embodiment shown here, the [0069] Al alloy wiring 2 is formed on the Si substrate 1 having formed a device and covered with an inter-layer insulating film previously as shown in FIG. 4A.
  • Next, as shown in FIG. 4B, a non-fluid SiO[0070] 2 film 3 is made as a base layer on the Si substrate 1 by plasma CVD using SiH4 and N2O, for example, as source materials.
  • Next, as shown in FIG. 4C, a fluid [0071] inter-layer insulating film 4 is made by low pressure CVD using Si(CH3)H3 and H2O2, for example, as source materials. The steps heretofore are the same as those of the first embodiment.
  • Next, as shown in FIG. 4D, the [0072] Si substrate 1 is set in a chamber 6 and heated while introducing O3 into the chamber to cure the surface of the inter-layer insulating film 4 by O3 annealing of the inter-layer insulating film 4. By the O3 annealing, dehydrated condensation of Si(OH)4 is promoted along the surface of the inter-layer insulating film 4, and the surface of the inter-layer insulating film 4 is changed substantially free from H2O.
  • Next, as shown in FIG. 4E, a non-fluid SiO[0073] 2 film 5 is made as a cap layer on the inter-layer insulating film 4 by plasma CVD using SiH4 and N2O, for example, as source materials. In this case, since the surface of the inter-layer insulating film 4 contains substantially no H2O, it does not incorporate NH3 produced in vapor by plasma during the process of making the SiO2 film 5 as the cap layer.
  • After that, the inter-layer [0074] insulating film 4 is cured by post-annealing.
  • By the process explained above, the inter-layer insulating film of a triple-layered structure of the inter-layer [0075] insulating film 4, underlying SiO2 film 3 as the base layer and overlying SiO2 film 5 as the cap layer is obtained.
  • EXAMPLE
  • As shown in FIG. 4A, an [0076] Al alloy wiring 1, which is 0.65 μm height and 0.4 μm wide, is made on the Si substrate 1.
  • Next, as shown in FIG. 4B, a SiO[0077] 2 film 3 of the thickness of 0.1 μm is formed as a base layer by plasma CVD, using N2O, SiH4 and N2, setting their flow rates to 3000 SCCM, 120 SCCM and 1000 SCCM, respectively, under the reaction pressure of 1.2 Torr (1200 mTorr), setting the substrate temperature to 350° C.
  • Next, as shown in FIG. 4C, a fluid [0078] inter-layer insulating film 4 of the thickness of 0.8 μm is formed by low pressure CVD, using Si(CH3)H3 and vapor phase H2O, and N2, setting their flow rates to 100 SCCM, 0.7 g/min and 500 SCCM, respectively, under the reaction pressure of 1 Torr, setting the substrate temperature to 0° C.
  • Next, as shown in FIG. 4D, using a mixed gas of O[0079] 2 and He, setting their flow rates to 2 SLM and 500 SCCM , a gas containing O3 by the concentration of 10 wt % is generated within the chamber 6, and the pressure of the gas containing O3 is held in 650 Torr. Under the condition, the Si substrate is heated to 400° C. and undergoes O3 annealing for three minutes. As a result of O3 annealing conducted here, the surface of the inter-layer insulating film 4 cured, and the surface portion was changed free from H2O.
  • Next, as shown in FIG. 4E, a SiO[0080] 2 film 5 as a cap layer is stacked to the thickness of 0.3 μm by plasma CVD, using N2O, SiH4 and N2, setting their flow rates to 2500 SCCM, 120 SCCM and 1000 SCCM, the reaction pressure to 0.8 Torr (800 mTorr), and the substrate temperature to 350° C.
  • After that, the product is post-annealed for 30 minutes in a N[0081] 2 atmosphere to cure the inter-layer insulating film 4.
  • The inter-layer insulating film having a triple-layered structure, thus obtained, did not contain a detrimental amount of residual gas (NH[0082] 3 gas, or the like) which might cause a problem in the process and exhibited good characteristics.
  • As explained above, according to the third embodiment, substantially all H[0083] 2O can be removed from the surface of the inter-layer insulating film 4 by treating the surface of the inter-layer insulating film 4 by O3 annealing after making the inter-layer insulating film 4 as a fluid film. Therefore, in the same manner as the first embodiment, even when the SiO2 film 5 is made as a cap layer directly on the inter-layer insulating film 4 by plasma CVD, NH3 produced in vapor by plasma during the process is never incorporated into the inter-layer insulating film 4. As a result, corrosion of the Al alloy wiring 2 or the problem of poisoned via do not occur.
  • Having described specific preferred embodiments of the present invention with reference to the accompanying drawings, it is to be understood that the invention is not limited to those precise embodiments, and that various changes and modifications may be effected therein by one skilled in the art without departing from the scope or the spirit of the invention as defined in the appended claims. [0084]
  • For example, numerals, structures, gases, sorts of films, processes, wiring materials, substrate materials, and so forth, are only examples, and can be changed appropriately. Namely, although the first to third embodiments have been explained as using an organic source material, Si(CH[0085] 3)H3, as the source material of Si in the process of making the inter-layer insulating film 4, any other source material of Si, such as Si(CH3)2H2, Si(CH3)3H, Si(CH3)4, or the like, may be used where appropriate.

Claims (8)

What is claimed is:
1. A method for making an insulating film configured to form the insulating film on a substrate having an uneven surface by using a fluid source material so as to level the unevenness, comprising the steps of:
forming a first insulating film having a fluidity on said substrate by using a fluid source material;
applying plasma processing onto said first insulating film; and
forming a second insulating not having a fluidity on said first insulating film after said plasma processing.
2. The method for making an insulating film according to
claim 1
further comprising the step of annealing after the step of forming the first insulating film before the step of applying the plasma processing.
3. The method for making an insulating film according to
claim 1
wherein said first insulating film is formed by low pressure CVD using SiH4 or organosilane and H2O2 as source materials.
4. The method for making an insulating film according to
claim 1
wherein a gas of molecules containing oxygen as the matrix atoms thereof and not containing nitrogen as the matrix atoms thereof is used for said plasma processing.
5. A method for making an insulating film configured to form the insulating film on a substrate having an uneven surface by using a fluid source material so as to level the unevenness, comprising the steps of:
forming a first insulating film having a fluidity on said substrate by using a fluid source material;
applying rapid thermal annealing by lamp heating onto said first insulating film; and
forming a second insulating not having a fluidity on said first insulating film after said rapid thermal annealing.
6. The method for making an insulating film according to
claim 5
wherein said first insulating film is formed by low pressure CVD using SiH4 or organosilane and H2O2 as source materials.
7. A method for making an insulating film configured to form the insulating film on a substrate having an uneven surface by using a fluid source material so as to level the unevenness, comprising the steps of:
forming a first insulating film having a fluidity on said substrate by using a fluid source material;
applying ozone processing onto said first insulating film; and
forming a second insulating not having a fluidity on said first insulating film after said ozonization.
8. The method for making an insulating film according to
claim 7
wherein said first insulating film is formed by low pressure CVD using SiH4 or organosilane and H2O2 as source materials.
US09/106,007 1997-06-30 1998-06-29 Method for making an insulating film Expired - Fee Related US6429147B2 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP9-173810 1997-06-30
JP9173810A JPH1126449A (en) 1997-06-30 1997-06-30 Formation of insulating film
JPP09-173810 1997-06-30

Publications (2)

Publication Number Publication Date
US20010039125A1 true US20010039125A1 (en) 2001-11-08
US6429147B2 US6429147B2 (en) 2002-08-06

Family

ID=15967586

Family Applications (1)

Application Number Title Priority Date Filing Date
US09/106,007 Expired - Fee Related US6429147B2 (en) 1997-06-30 1998-06-29 Method for making an insulating film

Country Status (3)

Country Link
US (1) US6429147B2 (en)
JP (1) JPH1126449A (en)
KR (1) KR19990007442A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030180614A1 (en) * 2001-03-30 2003-09-25 Takamitsu Saito Nonaqueous electrolyte cell and its manufacturing method, and positive electrode active material and its manufacturing method
US20040018716A1 (en) * 2001-04-05 2004-01-29 Hideyuki Kitou Semiconductor device and production method therefor
US20040152342A1 (en) * 2003-02-04 2004-08-05 Micron Technology, Inc. Method of eliminating residual carbon from flowable oxide fill
US20060115594A1 (en) * 2003-09-05 2006-06-01 Moffat William A Apparatus for the efficient coating of substrates including plasma cleaning

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6383951B1 (en) * 1998-09-03 2002-05-07 Micron Technology, Inc. Low dielectric constant material for integrated circuit fabrication
KR100564546B1 (en) * 1999-04-07 2006-03-28 삼성전자주식회사 Apparatus and method for deposition low-dielectric-layer on semiconductor device
JP4368498B2 (en) * 2000-05-16 2009-11-18 Necエレクトロニクス株式会社 Semiconductor device, semiconductor wafer and manufacturing method thereof
US6511923B1 (en) * 2000-05-19 2003-01-28 Applied Materials, Inc. Deposition of stable dielectric films
JP2002280463A (en) * 2001-03-16 2002-09-27 Toshiba Corp Semiconductor device and its fabricating method
JP3674561B2 (en) 2001-09-25 2005-07-20 日産自動車株式会社 Shift control device for automatic clutch transmission
JP2007335807A (en) * 2006-06-19 2007-12-27 Toshiba Corp Method for manufacturing semiconductor device
JP2008010441A (en) * 2006-06-27 2008-01-17 Toshiba Corp Forming method of silicon oxide film

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4764248A (en) * 1987-04-13 1988-08-16 Cypress Semiconductor Corporation Rapid thermal nitridized oxide locos process
EP0519079B1 (en) * 1991-01-08 1999-03-03 Fujitsu Limited Process for forming silicon oxide film
JP2538722B2 (en) * 1991-06-20 1996-10-02 株式会社半導体プロセス研究所 Method for manufacturing semiconductor device
EP0572704B1 (en) * 1992-06-05 2000-04-19 Semiconductor Process Laboratory Co., Ltd. Method for manufacturing a semiconductor device including method of reforming an insulating film formed by low temperature CVD
JP3262334B2 (en) * 1992-07-04 2002-03-04 トリコン ホルディングズ リミテッド Method for processing semiconductor wafers
US5610105A (en) * 1992-10-23 1997-03-11 Vlsi Technology, Inc. Densification in an intermetal dielectric film
JP2751820B2 (en) * 1994-02-28 1998-05-18 日本電気株式会社 Method for manufacturing semiconductor device
JPH08181276A (en) * 1994-12-26 1996-07-12 Toshiba Corp Manufacture of semiconductor device
EP0820095A3 (en) * 1996-07-19 1999-01-27 Sony Corporation Method of forming an interlayer film
US5691247A (en) * 1996-12-19 1997-11-25 Tower Semiconductor Ltd. Method for depositing a flow fill layer on an integrated circuit wafer

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030180614A1 (en) * 2001-03-30 2003-09-25 Takamitsu Saito Nonaqueous electrolyte cell and its manufacturing method, and positive electrode active material and its manufacturing method
US7172836B2 (en) 2001-03-30 2007-02-06 Sony Corporation Nonaqueous electrolyte battery and method for manufacturing it, and positive active material, and method for producing it
US20040018716A1 (en) * 2001-04-05 2004-01-29 Hideyuki Kitou Semiconductor device and production method therefor
US20040251553A1 (en) * 2001-04-05 2004-12-16 Hideyuki Kitou Semiconductor device and manufacturing method thereof
US20040152342A1 (en) * 2003-02-04 2004-08-05 Micron Technology, Inc. Method of eliminating residual carbon from flowable oxide fill
WO2004070817A2 (en) * 2003-02-04 2004-08-19 Micron Technology, Inc. Method of eliminating residual carbon from flowable oxide fill material
US20040212036A1 (en) * 2003-02-04 2004-10-28 Micron Technology, Inc. Method of eliminating residual carbon from flowable oxide fill
WO2004070817A3 (en) * 2003-02-04 2004-12-23 Micron Technology Inc Method of eliminating residual carbon from flowable oxide fill material
US7205248B2 (en) 2003-02-04 2007-04-17 Micron Technology, Inc. Method of eliminating residual carbon from flowable oxide fill
US20060115594A1 (en) * 2003-09-05 2006-06-01 Moffat William A Apparatus for the efficient coating of substrates including plasma cleaning
US8252375B2 (en) * 2003-09-05 2012-08-28 Yield Engineering Systems, Inc. Apparatus for the efficient coating of substrates including plasma cleaning
US20130000557A1 (en) * 2003-09-05 2013-01-03 Moffat William A Apparatus for the Efficient Coating of Subtrates Including Plasma Cleaning

Also Published As

Publication number Publication date
KR19990007442A (en) 1999-01-25
US6429147B2 (en) 2002-08-06
JPH1126449A (en) 1999-01-29

Similar Documents

Publication Publication Date Title
EP2657365B1 (en) Method for removal of carbon from an organosilicate material
JP3090476B2 (en) Method of forming silicon fluoride oxide layer using plasma enhanced chemical vapor deposition
US6042994A (en) Nanoporous silica dielectric films modified by electron beam exposure and having low dielectric constant and low water content
US7354873B2 (en) Method for forming insulation film
JP3262334B2 (en) Method for processing semiconductor wafers
US6429147B2 (en) Method for making an insulating film
US9570287B2 (en) Flowable film curing penetration depth improvement and stress tuning
JPH11506872A (en) Electron beam processed film for microelectronic structure
JP2003503849A (en) Method and apparatus for forming a film on a substrate
US6419985B1 (en) Method for producing insulator film
JPH0794505A (en) Formation of insulating film in semiconductor device
JP3502504B2 (en) Method for depositing silicon oxide layer
Fujino et al. Surface Modification of Base Materials for TEOS/O 3 Atmospheric Pressure Chemical Vapor Deposition
US5045346A (en) Method of depositing fluorinated silicon nitride
US5902122A (en) Method of manufacturing an ILD layer by plasma treatment before applying SOG
US5567658A (en) Method for minimizing peeling at the surface of spin-on glasses
EP0794569A2 (en) Amorphous carbon film, formation process thereof, and semiconductor device making use of the film
JPH08203894A (en) Fabrication of semiconductor device
Ito et al. Reduction of water in inorganic spin on glass
JP4064912B2 (en) Method for forming film
JPH01319942A (en) Forming method for insulating film
JP2636715B2 (en) Method for manufacturing semiconductor device
JP2001035843A (en) Method for formation of interlayer dielectric
US20030143847A1 (en) Method of forming low dielectric constant insulating layer and method of manufacturing semiconductor device
KR100332117B1 (en) Method for fabricating intermetal dielectric of semiconductor device

Legal Events

Date Code Title Description
AS Assignment

Owner name: SONY CORPORATION, JAPAN

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNOR:HARA, MASAKI;REEL/FRAME:009288/0165

Effective date: 19980616

REMI Maintenance fee reminder mailed
LAPS Lapse for failure to pay maintenance fees
STCH Information on status: patent discontinuation

Free format text: PATENT EXPIRED DUE TO NONPAYMENT OF MAINTENANCE FEES UNDER 37 CFR 1.362

FP Lapsed due to failure to pay maintenance fee

Effective date: 20060806