US11876364B2 - Multilayer electronic components with soldered through holes - Google Patents

Multilayer electronic components with soldered through holes Download PDF

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Publication number
US11876364B2
US11876364B2 US17/688,469 US202217688469A US11876364B2 US 11876364 B2 US11876364 B2 US 11876364B2 US 202217688469 A US202217688469 A US 202217688469A US 11876364 B2 US11876364 B2 US 11876364B2
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hole
cutout
axis
layer
circumferentially
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US20230283057A1 (en
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Shuai Wang
Chandana J. GAJANAYAKE
David R. Trawick
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Rolls Royce Corp
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Rolls Royce Corp
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Assigned to ROLLS-ROYCE CORPORATION reassignment ROLLS-ROYCE CORPORATION ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: WANG, Shuai, TRAWICK, DAVID R., GAJANAYAKE, Chandana J.
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
    • H01G2/00Details of capacitors not covered by a single one of groups H01G4/00-H01G11/00
    • H01G2/02Mountings
    • H01G2/06Mountings specially adapted for mounting on a printed-circuit support
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02GINSTALLATION OF ELECTRIC CABLES OR LINES, OR OF COMBINED OPTICAL AND ELECTRIC CABLES OR LINES
    • H02G5/00Installations of bus-bars
    • H02G5/005Laminated bus-bars
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
    • H01G4/00Fixed capacitors; Processes of their manufacture
    • H01G4/002Details
    • H01G4/228Terminals
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
    • H01G4/00Fixed capacitors; Processes of their manufacture
    • H01G4/002Details
    • H01G4/228Terminals
    • H01G4/232Terminals electrically connecting two or more layers of a stacked or rolled capacitor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
    • H01G4/00Fixed capacitors; Processes of their manufacture
    • H01G4/38Multiple capacitors, i.e. structural combinations of fixed capacitors

Definitions

  • the present disclosure relates generally to electronic components, and more specifically to features and methods for soldering multilayer electronic components.
  • power electronic converter designs may demand high power density in terms of weight and volume.
  • One commonly adopted approach to reduce the DC link capacitance is to increase the power converter's switching frequency.
  • the alternating current through the DC link capacitors increase accordingly.
  • current crowing occurs in the DC link of conventional bus bars where the electrical current only flows to the surface of copper layers to certain depth, which is termed the skin-depth.
  • film capacitors may be utilized more and more in aerospace power converters.
  • the combination of conventional through-hole rectangle capacitors and conventional multilayer copper bus bar or printed circuit boards create the challenge of reliable soldering.
  • the top most layer of conventional components may be the most assessable for soldering while the inner layers may be difficult to reach with conventional soldering method.
  • the soldering quality of conventional components may be poor where the inner layers are barely attached to the capacitor pins.
  • the present disclosure may comprise one or more of the following features and combinations thereof.
  • a multi-layer bus bar assembly includes a capacitor and a multi-layer bus bar.
  • a capacitor having a body and a first electrical connection pin that extends away from the body along an axis.
  • the multi-layer bus bar that includes a positive rail, a negative rail, and a main insulation layer.
  • the positive rail includes a plurality of first conductive layers and a plurality of first inter-insulation layers. Each of the plurality of first inter-insulation layers is located axially between neighboring first conductive layers included in the plurality of first conductive layers.
  • the negative rail includes a plurality of second conductive layers and a plurality of second inter-insulation layers. Each of the plurality of second inter-insulation layers is located axially between neighboring second conductive layers included in the plurality of second conductive layers.
  • a main insulation layer positioned between the positive rail and the negative rail.
  • the plurality of first conductive layers are formed to assist in the joining of the plurality of first conductive layers with the first electrical connection pin.
  • the plurality of first conductive layers include a first layer and a second layer axially neighboring the first layer.
  • the first layer formed to define a first cutout shaped with a soldering pattern arranged about the axis.
  • the second layer formed to define a second cutout shaped with the soldering pattern arranged around the axis.
  • the soldering pattern includes a discrete first through hole located on the axis and receives the first electrical connection pin and a discrete second through hole spaced apart radially from the first through hole relative to the axis.
  • the second cutout formed in the second conductive layer is circumferentially aligned with the first cutout. As such the second through hole of the first cutout is circumferentially aligned with the second through hole of the second cutout.
  • the second through hole is a slot that extends radially relative to the axis. In some embodiments, the second through hole extends radially along a major axis and circumferentially along a minor axis.
  • the second through hole includes a first wall, a second wall, and a third wall that interconnects the first wall and the second wall.
  • the first wall and second wall diverge as they extend radially away from the axis.
  • the first through hole is circular.
  • the soldering pattern includes a plurality of discrete outer through holes that includes the second through hole. The plurality of discrete outer through holes are spaced apart circumferentially from one another about the first through hole and the axis.
  • the second through hole has an area that is larger than an area of the first through hole.
  • the second cutout formed in the second conductive layer is circumferentially offset from the first cutout.
  • an electrical component assembly includes an electrical connection pin that extends along an axis, a first conductive layer, and a second conductive layer.
  • the first conductive layer is formed to define a first cutout that extends axially through the first conductive layer.
  • the first cutout includes a first through hole arranged around the electrical connection pin and a second through hole located radially outward of the first through hole relative to the axis.
  • the second conductive layer is formed to define a second cutout that extends axially through the second conductive layer.
  • the second cutout includes a third through hole arranged around the electrical connection pin and a fourth through hole located radially outward of the third through hole.
  • the fourth through hole is at least partially circumferentially aligned with the second through hole to allow joining material to flow axially into the fourth through hole and the second through hole.
  • the second cutout is substantially the same as the first cutout and aligned circumferentially relative to the first cutout about the axis.
  • the first through hole extends circumferentially about the axis at a first constant radius and the second through hole extends circumferentially only partway about the axis.
  • the entire second through hole is spaced apart from the first through hole. In some embodiments, the second conductive layer is spaced apart axially from the first conductive layer.
  • the second through hole is a slot that extends radially away from the axis.
  • the second through hole is defined by a first wall and a second wall that diverge away from one another.
  • the first cutout includes a fifth through hole spaced apart circumferentially from the second through hole relative to the axis.
  • a method of making a multi-layer bus bar assembly includes a number of steps.
  • the method includes arranging a first cutout formed in a first electrically conductive layer around an electrical connection pin that extends along an axis, the first cutout having a first through hole that extends circumferentially at least partway around the electrical connection pin relative to the axis and a second through hole located radially outward from the first through hole, arranging a second cutout formed in a second electrically conductive layer around the electrical connection pin, the second cutout having a third through hole that extends circumferentially around the electrical connection pin relative to the axis and a fourth through hole located radially outward from the second portion, applying joining material in the first through hole of the first cutout to cause the joining material to engage the first electrically conductive layer and the electrical connection pin, and applying the joining material in the second through hole of the first cutout to cause a portion of the joining material to pass through the second through hole of the first cutout and enter the fourth through hole of the second
  • the fourth through hole of the second cutout is circumferentially aligned with the second through hole.
  • the second through hole of the first cutout is entirely spaced apart from the first through hole.
  • the second cutout is substantially the same shape as the first cutout and aligned circumferentially with the first cutout relative to the axis.
  • FIG. 1 is an exploded perspective view of a multi-layer electrical component assembly, the illustrative assembly being a multi-layer bus bar assembly having a capacitor and a plurality of conductive layers configured to be soldered with the capacitor;
  • FIG. 2 is top view of the multi-layer bus bar assembly of FIG. 1 showing the capacitor soldered with the plurality of conductive layers;
  • FIG. 3 is a perspective view of an electrical connection pin of the capacitor extending through cutouts formed in the plurality of conductive layers of the multi-layer bus bar assembly and suggesting that the cutouts have a similar solder pattern that is offset for each layer to provide additional surface area and improve the solder joint;
  • FIG. 4 is an exploded view of the plurality of conductive layers of the multi-layer bus bar assembly showing that each layer is formed to define a cutout with the solder pattern whereby the solder pattern is offset circumferentially relative to an axis for each layer;
  • FIG. 5 is an elevation view of another solder pattern for use with the conductive layers of the multi-layer electrical component
  • FIG. 6 is an elevation view of another solder pattern for use with the conductive layers of the multi-layer electrical component
  • FIG. 7 is an exploded view of a plurality of conductive layers of another embodiment of the solder pattern for use with the multi-layer electrical component assembly showing that each layer is formed to define a cutout with the solder pattern whereby all solder patterns are aligned circumferentially relative to an axis for each layer;
  • FIG. 8 is an exploded view of a plurality of conductive layers of another embodiment of the solder pattern for use with the multi-layer electrical component assembly showing that each layer is formed to define a cutout with the solder pattern whereby all solder patterns are aligned circumferentially relative to an axis for each layer.
  • the multi-layer electrical component assembly 10 for use with gas turbine engines is shown in FIG. 1 .
  • the multi-layer electrical component assembly 10 may be, for example, a multi-layer bus bar or printed circuit board (PCB).
  • the multi-layer electrical component assembly 10 includes a plurality of conductive layers 28 having cutouts 32 , 34 , 36 , etc. formed therein to assist in the joining or soldering of the conductive layers 28 with another electrical component such as a connection pin 18 A.
  • Each of the cutouts 32 , 34 , 36 , etc. is shaped as a soldering pattern 26 as shown in FIG. 4 .
  • the soldering pattern 26 includes a first portion 40 arranged around the connection pin 18 A or other electrical component and a second portion 42 located outward of the first portion 40 and configured to allow the solder or other bonding material 31 to be provided between the conductive layers 28 .
  • the illustrative multi-layer electrical component assembly 10 is a multi-layer bus bar assembly as shown in FIG. 1 .
  • the multi-layer electrical component assembly 10 includes a capacitor 12 and a multi-layer bus bar 14 (sometimes called a laminated bus bar) coupled with the capacitor 12 as shown in FIG. 2 .
  • the capacitor 12 is illustratively a film capacitor.
  • the capacitor 12 includes a body 16 having the capacitor internals therein and one or more electrical connection pins 18 A, 18 B, etc. that extend away from the capacitor body 16 .
  • Each electrical connection pin 18 A, 18 B, etc. extends away along a respective axis 15 .
  • the multi-layer bus bar 14 includes a positive rail 22 , a negative rail 24 , and a main insulation layer 25 as shown in FIG. 1 .
  • the positive rail 22 is joined with at least one of the electrical connection pins 18 A of the capacitor 12 .
  • the negative rail 24 is joined with at least one other of the electrical connection pins 18 B of the capacitor 12 .
  • the main insulation layer 25 is non-conductive and located between the positive rail 22 and the negative rail 24 .
  • the positive rail 22 includes a plurality of first conductive layers 28 and a plurality of first inter-insulation layers 30 engaged with the first conductive layers 28 as shown in FIG. 1 .
  • the plurality of first conductive layers 28 is made of a conductive material such as copper, for example.
  • At least one layer of the plurality of first inter-insulation layers 30 is located axially between neighboring first conductive layers 28 to provide a non-conductive insulation between the neighboring first conductive layers 28 .
  • the plurality of first inter-insulation layers 30 are directly engaged with the first conductive layers 28 .
  • the plurality of first conductive layers 28 includes a first conductive layer 28 A, a second conductive layer 28 B, and a third conductive layer 28 C as shown in FIG. 1 .
  • the plurality of first inter-layer insulation layers 30 include a first insulation layer 30 A, a second insulation layer 30 B, and a third insulation layer 30 C.
  • the first insulation layer 30 A is between the first conductive layer 28 A and the main insulation layer 25 .
  • the second insulation layer 30 B is located axially between neighboring conductive layers 28 A, 28 B.
  • the third insulation layer 30 C is located axially between the second conductive layer 28 B and the third conductive layer 28 C.
  • the main insulation layer 25 is engaged with the conductive layer 28 A.
  • the plurality of first conductive layers 28 include any number of layers and the plurality of first inter-insulation layers 30 include a number of layers correlated with the conductive layers 28 .
  • the plurality of first conductive layers 28 are formed to assist in the joining of the plurality of first conductive layers 28 with the first electrical connection pin 18 A.
  • the first conductive layer 28 A is formed to define a first cutout 32 shaped with a soldering pattern 26 arranged about the axis 15 as shown in FIG. 4 .
  • the second conductive layer 28 B is formed to define a second cutout 34 shaped with the same soldering pattern 26 .
  • the third conductive layer 28 C is formed to define a third cutout 36 shaped with the same soldering pattern 26 .
  • the cutouts 32 , 34 , 36 are offset or misaligned circumferentially about the axis 15 relative to one another as shown in FIGS. 3 and 4 .
  • the shape of soldering pattern 26 is the same for each conductive layer 28 A, 28 B, 28 C, but rotated partially around the axis 15 relative to the neighboring conductive layer 28 A, 28 B, 28 C.
  • the cutouts 32 , 34 , 36 are substantially aligned circumferentially about the axis 15 relative to one another.
  • the soldering pattern 26 includes a first portion 40 , a second portion 42 , and a third portion 44 as shown in FIG. 4 .
  • the first portion 40 is aligned on the axis 15 and is sized to receive the electrical connection pin 18 A.
  • the first portion 40 extends circumferentially at least partway around the first electrical connection pin 18 A at a first radial distance relative to the axis 15 .
  • the second portion 42 is located radially outward of the first portion 40 and extends at least partway about the first electrical connection pin 18 A at a second radial distance relative to the axis 15 .
  • the second portion 42 is wedge shaped.
  • the second portion 42 opens into the first portion 40 so that the first portion 40 and the second portion 42 are in fluid communication with one another to form a single opening.
  • the third portion 44 is located radially outward of the first portion 40 opposite the second portion 42 and extends at least partway about the first electrical connection pin 18 A at a third radial distance relative to the axis 15 .
  • the third radial distance is equal to the second radial distance in this embodiment.
  • the third portion 44 is wedge shaped.
  • the third portion 44 opens into the first portion 40 so that the first portion 40 and the third portion 44 are in fluid communication with one another.
  • the second portion 42 extends less than 180 degrees around the axis 15 . In some embodiments, the second portion 42 extends more than 180 degrees around the axis 15 and less than 360 degrees around the axis 15 . In some embodiments, the second portion 42 extends less than 90 degrees around the axis 15 . In some embodiments, the second portion 42 extends less than 45 degrees around the axis 15 . In some embodiments, the second portion 42 extends less than 30 degrees around the axis 15 . In other embodiments, the second portion 42 extends at least 90 degrees around the axis 15 .
  • the cutout 32 includes a first inner wall 46 , a second inner wall 48 , a first outer wall 50 , a second outer wall 52 , a first intermediate wall 54 , a second intermediate wall 56 , a third intermediate wall 58 , and a fourth intermediate wall 60 as shown in FIG. 4 .
  • the first inner wall 46 and the second inner wall 48 are curved and each extend partway circumferentially around the axis 15 at the first radius as shown in FIG. 4 .
  • the first inner wall 46 and the second inner wall 48 cooperate to define the first portion 40 of the soldering pattern 26 .
  • the first inner wall 46 and the second inner wall 48 are configured to be bonded directly with the electrical connection pin 18 A with solder or other joining material 31 .
  • the first outer wall 50 and the second outer wall 52 extend circumferentially partway around the axis 15 at the second radius as shown in FIG. 4 .
  • the first outer wall 50 and the second outer wall 52 are each curved walls and each extend less than 180 degrees around the axis 15 .
  • the first intermediate wall 54 extends between and interconnects the first inner wall 46 and the first outer wall 50 as shown in FIG. 4 .
  • the second intermediate wall 56 extends between and interconnects the second inner wall 48 and the first outer wall 50 .
  • the first intermediate wall 54 and the second intermediate wall 56 diverge away from each other as they extend radially outward away from the axis 15 .
  • the third intermediate wall 58 extends between and interconnects the first inner wall 46 and the second outer wall 52 as shown in FIG. 4 .
  • the fourth intermediate wall 60 extends between and interconnects the second inner wall 48 and the second outer wall 52 .
  • the third intermediate wall 58 and the fourth intermediate wall 60 diverge away from each other as they extend radially outward away from the axis 15 .
  • the solder pattern 26 is the same for each cutout 32 , 34 , 36 of the conductive layers 28 A, 28 B, 28 C respectively.
  • the same solder patterns 26 is rotated circumferentially about the axis 15 for each conductive layers 28 A, 28 B, 28 C so that they are not aligned circumferentially.
  • the circumferential offset provides a stepped feature.
  • Each of the first portions 40 of the conductive layers 28 A, 28 B, 28 C are similarly sized and receive the electrical connection pin 18 A.
  • the second and third portions 42 , 44 of the conductive layers 28 A, 28 B, 28 C form the stepped features.
  • each conductive layers 28 A, 28 B is exposed for the solder or joining material 31 to couple the conductive layers 28 A, 28 B, 28 C with the electrical connection pin 18 A.
  • the second portions 42 are open to each other and open to the first portions 40 to allow the solder or joining material 31 to flow into the other second portions 42 and first portions 40 from one more second portions 42 .
  • FIG. 5 Another embodiment of a cutout 232 for conductive layers and having a solder pattern 226 is shown in FIG. 5 .
  • the cutout 232 is formed in a conductive layer 228 A included in a plurality of conductive layers (not shown) for a multi-layer bus bar 214 .
  • the conductive layers 228 each include a cutout having the same solder pattern 226 , but with the pattern rotated partway around the axis 215 for each layer 228 so that the patterns are misaligned when viewed radially.
  • the soldering pattern 226 includes a first portion 240 , a second portion 242 , and a third portion 244 as shown in FIG. 5 .
  • the first portion 240 is aligned on the axis 215 and is sized to receive the electrical connection pin 18 A.
  • the second portion 242 is located radially outward of the first portion 240 and extends at least partway about the first electrical connection pin 18 A at a second radial distance relative to the axis 215 .
  • the third portion 244 is located radially outward of the first portion 240 opposite the second portion 242 and extends at least partway about the first electrical connection pin 18 A at a third radial distance relative to the axis 215 .
  • the second portion 242 extends about or less than 90 degrees around the axis 215 . In some embodiments, the second portion 242 extends about or less than 70 degrees around the axis 215 . In some embodiments, the second portion 242 extends about or less than 60 degrees around the axis 215 . In some embodiments, the second portion 242 extends about or less than 50 degrees around the axis 215 . In some embodiments, the second portion 242 extends about or less than 45 degrees around the axis 215 . In some embodiments, the second portion 242 extends about or less than 30 degrees around the axis 215 .
  • the cutout 232 includes a first inner wall 246 , a second inner wall 248 , a first outer wall 250 , a second outer wall 252 , a first intermediate wall 254 , a second intermediate wall 256 , a third intermediate wall 258 , and a fourth intermediate wall 260 as shown in FIG. 5 .
  • the first inner wall 246 and the second inner wall 248 are curved and each extend partway circumferentially around the axis 215 at the first radius.
  • the first inner wall 246 and the second inner wall 248 cooperate to define the first portion 240 of the soldering pattern 226 .
  • the first inner wall 246 and the second inner wall 248 are configured to be bonded directly with the electrical connection pin 18 A with solder or other joining material 31 .
  • FIG. 6 Another embodiment of a cutout 332 for conductive layers and having a solder pattern 326 is shown in FIG. 6 .
  • the cutout 332 is formed in a conductive layer 328 A included in a plurality of conductive layers (not shown) for a multi-layer bus bar 314 .
  • the conductive layers 328 each include a cutout having the same solder pattern 326 , but with the pattern rotated partway around the axis 315 for each layer 328 so that the patterns are misaligned when viewed radially.
  • the soldering pattern 326 includes a first portion 340 and a second portion 342 as shown in FIG. 6 .
  • the soldering pattern 326 does not include a third portion.
  • the first portion 340 is aligned on the axis 315 and is sized to receive the electrical connection pin 18 A.
  • the second portion 342 is located radially outward of the first portion 340 and extends at least partway about the first electrical connection pin 18 A at a second radial distance relative to the axis 315 .
  • the second portion 342 extends about or more than 180 degrees around the axis 315 . In other embodiments, the second portion 342 extends about or less than 180 degrees around the axis 315 . In other embodiments, the second portion 342 extends about or less than 90 degrees around the axis 315 . In other embodiments, the second portion 342 extends at least 90 degrees around the axis 315 . In other embodiments, the second portion 342 extends about or less than 70 degrees around the axis 315 . In some embodiments, the second portion 342 extends about or less than 60 degrees around the axis 315 . In some embodiments, the second portion 342 extends about or less than 50 degrees around the axis 315 . In some embodiments, the second portion 342 extends about or less than 45 degrees around the axis 315 . In some embodiments, the second portion 342 extends about or less than 30 degrees around the axis 315 .
  • the cutout 332 includes a first inner wall 346 , a first outer wall 350 , a first intermediate wall 354 , and a second intermediate wall 356 as shown in FIG. 6 .
  • the first inner wall 346 is curved and extends partway circumferentially around the axis 315 at the first radius.
  • the first inner wall 346 defines the first portion 340 of the soldering pattern 326 .
  • the first inner wall 346 is configured to be bonded directly with the electrical connection pin 18 A with solder or other joining material 31 .
  • the first intermediate wall 354 extends between and interconnects the first inner wall 346 and the first outer wall 350 .
  • the second intermediate wall 356 extends between and interconnects the first inner wall 346 and the first outer wall 350 .
  • the first intermediate wall 354 and the second intermediate wall 356 diverge as they extend radially outward.
  • the first intermediate wall 354 and the second intermediate wall 356 are generally linear.
  • FIG. 7 Another embodiment of a multi-layer bus bar 414 for use with the multi-layer electrical component assembly 10 is shown in FIG. 7 .
  • the multi-layer bus bar 414 is substantially the same as the multi-layer bus bar 14 except where the description and drawings diverge from the multi-layer bus bar 14 .
  • the multi-layer bus bar 414 includes a plurality of conductive layers 428 A, 428 B, 428 C, etc.
  • Each conductive layer 428 A, 428 B, 428 C, etc. is formed to define a cutout 432 , 434 , 436 having a solder pattern 426 as shown in FIG. 7 .
  • the solder patterns 426 are not rotated relative to each about the axis 415 .
  • the patterns 426 on different layers are offset circumferentially.
  • the solder patterns 426 on each conductive layer 428 A, 428 B, 428 C, etc. are aligned circumferentially with one another. In other embodiments, the soldering patterns 426 may be partially misaligned with one another.
  • the soldering pattern 426 includes a first portion 440 and a plurality of second portions 442 as shown in FIG. 7 .
  • the first portion 440 is a central through hole 440 and the plurality of second portions 442 are a plurality of secondary holes or slots 442 arranged circumferentially around the axis 415 .
  • the first portion 440 is aligned on the axis 415 and is sized to receive the electrical connection pin 18 A.
  • the second portions 442 are located radially outward of the first portion 440 a second radial distance relative to the axis 415 .
  • the second portions 442 are discrete relative to each other and relative to the first portion 440 as shown in FIG. 7 .
  • the second portions 442 do not open directly to each other and do not open directly into the first portion 440 .
  • each second portion 442 is an elongated slot that extends along a major axis that extends radially away from the axis 415 .
  • the plurality of second portions 442 include eight second portions 442 in the illustrative embodiment. In other embodiments, the plurality of second portions 442 include any number of second portions 442 .
  • Each second portion 442 has an inner end that is located about two times the radius of the first portion 440 .
  • Each second portion 442 is approximately rectangular shaped with curved edges.
  • the second portions 442 are generally equally spaced apart from one another circumferentially about the axis 415 .
  • FIG. 8 Another embodiment of a multi-layer bus bar 514 for use with the multi-layer electrical component assembly 10 is shown in FIG. 8 .
  • the multi-layer bus bar 514 is substantially the same as the multi-layer bus bar 14 except where the description and drawings diverge from the multi-layer bus bar 14 .
  • the multi-layer bus bar 514 includes a plurality of conductive layers 528 A, 528 B, 528 C, etc.
  • Each conductive layer 528 A, 528 B, 528 C, etc. is formed to define a cutout 532 , 534 , 536 having a solder pattern 526 as shown in FIG. 8 .
  • the solder patterns 526 are not rotated relative to each about the axis 515 . In other embodiments, the patterns 526 on different layers are offset circumferentially.
  • the solder patterns 526 on each conductive layer 528 A, 528 B, 528 C, etc. are aligned circumferentially with one another. In other embodiments, the soldering patterns 526 may be partially misaligned with one another.
  • the soldering pattern 526 includes a first portion 540 and a plurality of second portions 542 as shown in FIG. 8 .
  • the first portion 540 is a central through hole 540 and the plurality of second portions 542 are a plurality of secondary holes or slots 542 arranged circumferentially around the axis 515 .
  • the first portion 540 is aligned on the axis 515 and is sized to receive the electrical connection pin 18 A.
  • the second portions 542 are located radially outward of the first portion 540 a second radial distance relative to the axis 515 .
  • the second portions 542 are discrete relative to each other and relative to the first portion 540 as shown in FIG. 8 .
  • the second portions 542 do not open directly to each other and do not open directly into the first portion 540 .
  • each second portion 542 is wedge shaped and generally triangular.
  • the plurality of second portions 542 include eight second portions 542 in the illustrative embodiment. In other embodiments, the plurality of second portions 542 include any number of second portions 542 .
  • Each second portion 542 has an inner end that is located about two times the radius of the first portion 540 .
  • Each second portion 542 is approximately triangular shaped with curved edges.
  • the second portions 542 are generally equally spaced apart from one another circumferentially about the axis 515 .
  • the second portions 542 are each substantially similar in shape and size.
  • a method of making a multi-layer electrical component assembly 10 such as a multi-layer bus bar assembly include arranging a first cutout 32 formed in a first electrically conductive layer 28 A around an electrical connection pin 18 A that extends along an axis 15 .
  • the first cutout 32 has a first portion 40 that extends circumferentially at least partway around the electrical connection pin 18 A relative to the axis 15 and a second portion 42 located radially outward from the first portion 40 .
  • a second cutout 34 formed in a second electrically conductive layer 28 B is arranged around the electrical connection pin 18 A.
  • the second cutout 34 has a portion 40 that extends circumferentially at least partway around the electrical connection pin 18 A relative to the axis 15 and a portion 42 located radially outward from the portion 40 .
  • Joining material 31 is applied in the first portion 40 of the first cutout 32 to cause the joining material 31 to engage the first electrically conductive layer 28 A and the electrical connection pin 18 A.
  • the joining material 31 is applied to the second portion 42 of the first cutout 32 to cause a portion of the joining material 31 to pass through the second portion 42 of the first cutout 32 and enter the portion 42 of the second cutout 34 to allow the joining material 31 to engage the second electrically conductive layer 28 B.
  • the portion 40 of the second cutout 34 is radially open to and fluidly connected with the portion 42 to allow the joining material 31 to be applied to the portion 40 .
  • the second portion 42 of the first cutout 32 has an area that is larger than an area of the first portion 40 .
  • the second cutout 34 is substantially the same shape as the first cutout 32 and rotated circumferentially partway about the axis 15 relative to first cutout 32 .
  • the second cutout 434 , 534 is substantially the same shape as the first cutout 432 , 532 and aligned circumferentially relative to the axis 15 with the first cutout 432 , 532 .
  • the present application provides soldering through hole components to electronic components such as multi-layer laminated bus bars 14 .
  • power electronic converter designs may demand high power density in terms of weight and volume.
  • One commonly adopted approach to reduce the DC link capacitance is to increase the power converter's switching frequency.
  • the alternating current through the DC link capacitors increase accordingly.
  • a conventional bus bar can theoretically be simply a single layer of 1 millimeter copper.
  • multiple insulated thinner layers connected in parallel would be used to obtain the 1 millimeter effective copper thickness.
  • the multilayer laminated bus bar concept is shown in FIG. 1 .
  • the features of the present disclosure can be realized with either laminated bus bar techniques or with printed circuit boards.
  • the multi-layer bus bar 14 may represent one of the future trend for aerospace power converters with higher and higher switching frequencies.
  • Film capacitors 12 in the form of rectangle packages with through-hole pins 18 , as shown in FIGS. 1 and 2 may have the widest convergence of specifications including voltage ratings, unit capacitance, and unit root mean square (rms) current. Film capacitors may also have high power densities. For DC link applications, unique combinations of capacitance and root mean square current may be able to be realized with off-the-shelf models, thus allowing fast production cycle and cost saving. Film capacitors may be utilized more and more in aerospace power converters.
  • the combination of conventional through-hole rectangle capacitors and conventional multilayer copper bus bar or printed circuit boards create the challenge of reliable soldering.
  • the top most layer of conventional components may be the most assessable for soldering while the inner layers may be difficult to reach with conventional soldering method.
  • the soldering quality of conventional components may be poor where the inner layers are barely attached to the capacitor pins. Poor soldering may create high contact resistance which may lead to overheating of the contact area, melting of the insulation, and short circuit in the DC link.
  • the existing conventional method to ease soldering is to pre-heat the printed circuit board and capacitors. However, soldering quality and/or solder penetration into the full thickness of the printed circuit board may be less than desirable.
  • a unique layer by layer pattern 26 is provided on the copper layers 28 to create easy-to-access features as shown in FIGS. 3 and 4 .
  • Each copper layer 28 carries a thermal reliving solder pattern 26 . From one copper layer 28 to the next copper layer 28 , the pattern 26 is skewed by a certain degrees in some embodiments. When stacked up, the coper layers 28 together create a staircase pattern around the capacitor pin 18 A. As a result, each copper layer 28 can be welded or soldered to the capacitor pin 18 A separately and the bonding quality may be improved.
  • Other thermal relieving patterns 226 , 326 for copper layers are shown in FIGS. 5 and 6 .
  • the soldering patterns 426 , 526 include a central through hole 440 , 540 and a plurality of secondary holes or slots 442 , 542 as shown in FIGS. 7 - 9 .
  • the pad is split into two sections to create the continuous copper condition area from the capacitor pin 18 A.
  • the soldering pattern 526 a single section of the copper is kept for the current condition.
  • soldering irons resistance welders or spot welders can be used to the capacitor pin soldering.

Abstract

An electrical assembly, such as a multi-layer bus bar, includes an electrical connection pin and a plurality of electrically conductive layers. Each of the electrically conductive layers is formed to define a cutout therein to receive the electrical connection pin and allow access for joining material to join the electrical connection pin with the plurality of electrically conductive layers. Each of the cutouts is formed to include a first through hole arranged around the electrical connection pin and a second through hole located radially outward of the first through hole.

Description

FIELD OF THE DISCLOSURE
The present disclosure relates generally to electronic components, and more specifically to features and methods for soldering multilayer electronic components.
BACKGROUND
In aerospace applications, power electronic converter designs may demand high power density in terms of weight and volume. One commonly adopted approach to reduce the DC link capacitance is to increase the power converter's switching frequency. However, with increasing switching frequency, the alternating current through the DC link capacitors increase accordingly. With increased frequency, current crowing occurs in the DC link of conventional bus bars where the electrical current only flows to the surface of copper layers to certain depth, which is termed the skin-depth. Moreover, film capacitors may be utilized more and more in aerospace power converters.
The combination of conventional through-hole rectangle capacitors and conventional multilayer copper bus bar or printed circuit boards create the challenge of reliable soldering. The top most layer of conventional components may be the most assessable for soldering while the inner layers may be difficult to reach with conventional soldering method. The soldering quality of conventional components may be poor where the inner layers are barely attached to the capacitor pins.
SUMMARY
The present disclosure may comprise one or more of the following features and combinations thereof.
According to an aspect of the present disclosure, a multi-layer bus bar assembly includes a capacitor and a multi-layer bus bar. A capacitor having a body and a first electrical connection pin that extends away from the body along an axis. The multi-layer bus bar that includes a positive rail, a negative rail, and a main insulation layer. The positive rail includes a plurality of first conductive layers and a plurality of first inter-insulation layers. Each of the plurality of first inter-insulation layers is located axially between neighboring first conductive layers included in the plurality of first conductive layers. The negative rail includes a plurality of second conductive layers and a plurality of second inter-insulation layers. Each of the plurality of second inter-insulation layers is located axially between neighboring second conductive layers included in the plurality of second conductive layers. A main insulation layer positioned between the positive rail and the negative rail.
In the illustrative embodiments, the plurality of first conductive layers are formed to assist in the joining of the plurality of first conductive layers with the first electrical connection pin. The plurality of first conductive layers include a first layer and a second layer axially neighboring the first layer. The first layer formed to define a first cutout shaped with a soldering pattern arranged about the axis. The second layer formed to define a second cutout shaped with the soldering pattern arranged around the axis. The soldering pattern includes a discrete first through hole located on the axis and receives the first electrical connection pin and a discrete second through hole spaced apart radially from the first through hole relative to the axis.
In some embodiments, the second cutout formed in the second conductive layer is circumferentially aligned with the first cutout. As such the second through hole of the first cutout is circumferentially aligned with the second through hole of the second cutout.
In some embodiments, the second through hole is a slot that extends radially relative to the axis. In some embodiments, the second through hole extends radially along a major axis and circumferentially along a minor axis.
In some embodiments, the second through hole includes a first wall, a second wall, and a third wall that interconnects the first wall and the second wall. The first wall and second wall diverge as they extend radially away from the axis.
In some embodiments, the first through hole is circular. The soldering pattern includes a plurality of discrete outer through holes that includes the second through hole. The plurality of discrete outer through holes are spaced apart circumferentially from one another about the first through hole and the axis.
In some embodiments, the second through hole has an area that is larger than an area of the first through hole. In some embodiments, the second cutout formed in the second conductive layer is circumferentially offset from the first cutout.
According to another aspect, an electrical component assembly includes an electrical connection pin that extends along an axis, a first conductive layer, and a second conductive layer. The first conductive layer is formed to define a first cutout that extends axially through the first conductive layer. The first cutout includes a first through hole arranged around the electrical connection pin and a second through hole located radially outward of the first through hole relative to the axis. The second conductive layer is formed to define a second cutout that extends axially through the second conductive layer. The second cutout includes a third through hole arranged around the electrical connection pin and a fourth through hole located radially outward of the third through hole. The fourth through hole is at least partially circumferentially aligned with the second through hole to allow joining material to flow axially into the fourth through hole and the second through hole.
In some embodiments, the second cutout is substantially the same as the first cutout and aligned circumferentially relative to the first cutout about the axis. In some embodiments, the first through hole extends circumferentially about the axis at a first constant radius and the second through hole extends circumferentially only partway about the axis.
In some embodiments, the entire second through hole is spaced apart from the first through hole. In some embodiments, the second conductive layer is spaced apart axially from the first conductive layer.
In some embodiments, the second through hole is a slot that extends radially away from the axis. In some embodiments, the second through hole is defined by a first wall and a second wall that diverge away from one another. In some embodiments, the first cutout includes a fifth through hole spaced apart circumferentially from the second through hole relative to the axis.
According to another aspect, a method of making a multi-layer bus bar assembly includes a number of steps. The method includes arranging a first cutout formed in a first electrically conductive layer around an electrical connection pin that extends along an axis, the first cutout having a first through hole that extends circumferentially at least partway around the electrical connection pin relative to the axis and a second through hole located radially outward from the first through hole, arranging a second cutout formed in a second electrically conductive layer around the electrical connection pin, the second cutout having a third through hole that extends circumferentially around the electrical connection pin relative to the axis and a fourth through hole located radially outward from the second portion, applying joining material in the first through hole of the first cutout to cause the joining material to engage the first electrically conductive layer and the electrical connection pin, and applying the joining material in the second through hole of the first cutout to cause a portion of the joining material to pass through the second through hole of the first cutout and enter the fourth through hole of the second cutout to allow the joining material to engage the second electrically conductive layer.
In some embodiments, the fourth through hole of the second cutout is circumferentially aligned with the second through hole. In some embodiments, the second through hole of the first cutout is entirely spaced apart from the first through hole. In some embodiments, the second cutout is substantially the same shape as the first cutout and aligned circumferentially with the first cutout relative to the axis.
These and other features of the present disclosure will become more apparent from the following description of the illustrative embodiments.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is an exploded perspective view of a multi-layer electrical component assembly, the illustrative assembly being a multi-layer bus bar assembly having a capacitor and a plurality of conductive layers configured to be soldered with the capacitor;
FIG. 2 is top view of the multi-layer bus bar assembly of FIG. 1 showing the capacitor soldered with the plurality of conductive layers;
FIG. 3 is a perspective view of an electrical connection pin of the capacitor extending through cutouts formed in the plurality of conductive layers of the multi-layer bus bar assembly and suggesting that the cutouts have a similar solder pattern that is offset for each layer to provide additional surface area and improve the solder joint;
FIG. 4 is an exploded view of the plurality of conductive layers of the multi-layer bus bar assembly showing that each layer is formed to define a cutout with the solder pattern whereby the solder pattern is offset circumferentially relative to an axis for each layer;
FIG. 5 is an elevation view of another solder pattern for use with the conductive layers of the multi-layer electrical component;
FIG. 6 is an elevation view of another solder pattern for use with the conductive layers of the multi-layer electrical component;
FIG. 7 is an exploded view of a plurality of conductive layers of another embodiment of the solder pattern for use with the multi-layer electrical component assembly showing that each layer is formed to define a cutout with the solder pattern whereby all solder patterns are aligned circumferentially relative to an axis for each layer; and
FIG. 8 is an exploded view of a plurality of conductive layers of another embodiment of the solder pattern for use with the multi-layer electrical component assembly showing that each layer is formed to define a cutout with the solder pattern whereby all solder patterns are aligned circumferentially relative to an axis for each layer.
DETAILED DESCRIPTION OF THE DRAWINGS
For the purposes of promoting an understanding of the principles of the disclosure, reference will now be made to a number of illustrative embodiments illustrated in the drawings and specific language will be used to describe the same.
A multi-layer electrical component assembly 10 for use with gas turbine engines is shown in FIG. 1 . The multi-layer electrical component assembly 10 may be, for example, a multi-layer bus bar or printed circuit board (PCB). The multi-layer electrical component assembly 10 includes a plurality of conductive layers 28 having cutouts 32, 34, 36, etc. formed therein to assist in the joining or soldering of the conductive layers 28 with another electrical component such as a connection pin 18A.
Each of the cutouts 32, 34, 36, etc. is shaped as a soldering pattern 26 as shown in FIG. 4 . The soldering pattern 26 includes a first portion 40 arranged around the connection pin 18A or other electrical component and a second portion 42 located outward of the first portion 40 and configured to allow the solder or other bonding material 31 to be provided between the conductive layers 28.
The illustrative multi-layer electrical component assembly 10 is a multi-layer bus bar assembly as shown in FIG. 1 . However, the features of the present disclosure are applicable to other multi-layer electrical component assemblies such as, for example, printed circuit boards. The multi-layer electrical component assembly 10 includes a capacitor 12 and a multi-layer bus bar 14 (sometimes called a laminated bus bar) coupled with the capacitor 12 as shown in FIG. 2 .
The capacitor 12 is illustratively a film capacitor. The capacitor 12 includes a body 16 having the capacitor internals therein and one or more electrical connection pins 18A, 18B, etc. that extend away from the capacitor body 16. Each electrical connection pin 18A, 18B, etc. extends away along a respective axis 15.
The multi-layer bus bar 14 includes a positive rail 22, a negative rail 24, and a main insulation layer 25 as shown in FIG. 1 . The positive rail 22 is joined with at least one of the electrical connection pins 18A of the capacitor 12. The negative rail 24 is joined with at least one other of the electrical connection pins 18B of the capacitor 12. The main insulation layer 25 is non-conductive and located between the positive rail 22 and the negative rail 24.
The positive rail 22 includes a plurality of first conductive layers 28 and a plurality of first inter-insulation layers 30 engaged with the first conductive layers 28 as shown in FIG. 1 . The plurality of first conductive layers 28 is made of a conductive material such as copper, for example. At least one layer of the plurality of first inter-insulation layers 30 is located axially between neighboring first conductive layers 28 to provide a non-conductive insulation between the neighboring first conductive layers 28. Illustratively, the plurality of first inter-insulation layers 30 are directly engaged with the first conductive layers 28.
As an example, the plurality of first conductive layers 28 includes a first conductive layer 28A, a second conductive layer 28B, and a third conductive layer 28C as shown in FIG. 1 . The plurality of first inter-layer insulation layers 30 include a first insulation layer 30A, a second insulation layer 30B, and a third insulation layer 30C. The first insulation layer 30A is between the first conductive layer 28A and the main insulation layer 25. The second insulation layer 30B is located axially between neighboring conductive layers 28A, 28B. The third insulation layer 30C is located axially between the second conductive layer 28B and the third conductive layer 28C. The main insulation layer 25 is engaged with the conductive layer 28A. In other embodiments, the plurality of first conductive layers 28 include any number of layers and the plurality of first inter-insulation layers 30 include a number of layers correlated with the conductive layers 28.
The plurality of first conductive layers 28 are formed to assist in the joining of the plurality of first conductive layers 28 with the first electrical connection pin 18A. The first conductive layer 28A is formed to define a first cutout 32 shaped with a soldering pattern 26 arranged about the axis 15 as shown in FIG. 4 . The second conductive layer 28B is formed to define a second cutout 34 shaped with the same soldering pattern 26. The third conductive layer 28C is formed to define a third cutout 36 shaped with the same soldering pattern 26.
In the illustrative embodiment, the cutouts 32, 34, 36 are offset or misaligned circumferentially about the axis 15 relative to one another as shown in FIGS. 3 and 4 . In other words, the shape of soldering pattern 26 is the same for each conductive layer 28A, 28B, 28C, but rotated partially around the axis 15 relative to the neighboring conductive layer 28A, 28B, 28C. In other embodiments, the cutouts 32, 34, 36 are substantially aligned circumferentially about the axis 15 relative to one another.
The soldering pattern 26 includes a first portion 40, a second portion 42, and a third portion 44 as shown in FIG. 4 . The first portion 40 is aligned on the axis 15 and is sized to receive the electrical connection pin 18A. The first portion 40 extends circumferentially at least partway around the first electrical connection pin 18A at a first radial distance relative to the axis 15. The second portion 42 is located radially outward of the first portion 40 and extends at least partway about the first electrical connection pin 18A at a second radial distance relative to the axis 15. In the illustrative embodiment, the second portion 42 is wedge shaped. In the illustrative embodiment, the second portion 42 opens into the first portion 40 so that the first portion 40 and the second portion 42 are in fluid communication with one another to form a single opening. The third portion 44 is located radially outward of the first portion 40 opposite the second portion 42 and extends at least partway about the first electrical connection pin 18A at a third radial distance relative to the axis 15. The third radial distance is equal to the second radial distance in this embodiment. In the illustrative embodiment, the third portion 44 is wedge shaped. In the illustrative embodiment, the third portion 44 opens into the first portion 40 so that the first portion 40 and the third portion 44 are in fluid communication with one another.
In the illustrative embodiment, the second portion 42 extends less than 180 degrees around the axis 15. In some embodiments, the second portion 42 extends more than 180 degrees around the axis 15 and less than 360 degrees around the axis 15. In some embodiments, the second portion 42 extends less than 90 degrees around the axis 15. In some embodiments, the second portion 42 extends less than 45 degrees around the axis 15. In some embodiments, the second portion 42 extends less than 30 degrees around the axis 15. In other embodiments, the second portion 42 extends at least 90 degrees around the axis 15.
The cutout 32 includes a first inner wall 46, a second inner wall 48, a first outer wall 50, a second outer wall 52, a first intermediate wall 54, a second intermediate wall 56, a third intermediate wall 58, and a fourth intermediate wall 60 as shown in FIG. 4 . The first inner wall 46 and the second inner wall 48 are curved and each extend partway circumferentially around the axis 15 at the first radius as shown in FIG. 4 . The first inner wall 46 and the second inner wall 48 cooperate to define the first portion 40 of the soldering pattern 26. The first inner wall 46 and the second inner wall 48 are configured to be bonded directly with the electrical connection pin 18A with solder or other joining material 31.
The first outer wall 50 and the second outer wall 52 extend circumferentially partway around the axis 15 at the second radius as shown in FIG. 4 . The first outer wall 50 and the second outer wall 52 are each curved walls and each extend less than 180 degrees around the axis 15.
The first intermediate wall 54 extends between and interconnects the first inner wall 46 and the first outer wall 50 as shown in FIG. 4 . The second intermediate wall 56 extends between and interconnects the second inner wall 48 and the first outer wall 50. The first intermediate wall 54 and the second intermediate wall 56 diverge away from each other as they extend radially outward away from the axis 15.
The third intermediate wall 58 extends between and interconnects the first inner wall 46 and the second outer wall 52 as shown in FIG. 4 . The fourth intermediate wall 60 extends between and interconnects the second inner wall 48 and the second outer wall 52. The third intermediate wall 58 and the fourth intermediate wall 60 diverge away from each other as they extend radially outward away from the axis 15.
As shown in FIG. 4 , the solder pattern 26 is the same for each cutout 32, 34, 36 of the conductive layers 28A, 28B, 28C respectively. The same solder patterns 26 is rotated circumferentially about the axis 15 for each conductive layers 28A, 28B, 28C so that they are not aligned circumferentially. As shown in FIG. 3 , the circumferential offset provides a stepped feature. Each of the first portions 40 of the conductive layers 28A, 28B, 28C are similarly sized and receive the electrical connection pin 18A. The second and third portions 42, 44 of the conductive layers 28A, 28B, 28C form the stepped features. As a result, a portion of each conductive layers 28A, 28B is exposed for the solder or joining material 31 to couple the conductive layers 28A, 28B, 28C with the electrical connection pin 18A. The second portions 42 are open to each other and open to the first portions 40 to allow the solder or joining material 31 to flow into the other second portions 42 and first portions 40 from one more second portions 42.
Another embodiment of a cutout 232 for conductive layers and having a solder pattern 226 is shown in FIG. 5 . The cutout 232 is formed in a conductive layer 228A included in a plurality of conductive layers (not shown) for a multi-layer bus bar 214. Similar to the conductive layers 28, the conductive layers 228 each include a cutout having the same solder pattern 226, but with the pattern rotated partway around the axis 215 for each layer 228 so that the patterns are misaligned when viewed radially.
The soldering pattern 226 includes a first portion 240, a second portion 242, and a third portion 244 as shown in FIG. 5 . The first portion 240 is aligned on the axis 215 and is sized to receive the electrical connection pin 18A. The second portion 242 is located radially outward of the first portion 240 and extends at least partway about the first electrical connection pin 18A at a second radial distance relative to the axis 215. The third portion 244 is located radially outward of the first portion 240 opposite the second portion 242 and extends at least partway about the first electrical connection pin 18A at a third radial distance relative to the axis 215.
In the illustrative embodiment, the second portion 242 extends about or less than 90 degrees around the axis 215. In some embodiments, the second portion 242 extends about or less than 70 degrees around the axis 215. In some embodiments, the second portion 242 extends about or less than 60 degrees around the axis 215. In some embodiments, the second portion 242 extends about or less than 50 degrees around the axis 215. In some embodiments, the second portion 242 extends about or less than 45 degrees around the axis 215. In some embodiments, the second portion 242 extends about or less than 30 degrees around the axis 215.
Similar to the cutout 32, the cutout 232 includes a first inner wall 246, a second inner wall 248, a first outer wall 250, a second outer wall 252, a first intermediate wall 254, a second intermediate wall 256, a third intermediate wall 258, and a fourth intermediate wall 260 as shown in FIG. 5 . The first inner wall 246 and the second inner wall 248 are curved and each extend partway circumferentially around the axis 215 at the first radius. The first inner wall 246 and the second inner wall 248 cooperate to define the first portion 240 of the soldering pattern 226. The first inner wall 246 and the second inner wall 248 are configured to be bonded directly with the electrical connection pin 18A with solder or other joining material 31.
Another embodiment of a cutout 332 for conductive layers and having a solder pattern 326 is shown in FIG. 6 . The cutout 332 is formed in a conductive layer 328A included in a plurality of conductive layers (not shown) for a multi-layer bus bar 314. Similar to the conductive layers 28, the conductive layers 328 each include a cutout having the same solder pattern 326, but with the pattern rotated partway around the axis 315 for each layer 328 so that the patterns are misaligned when viewed radially.
The soldering pattern 326 includes a first portion 340 and a second portion 342 as shown in FIG. 6 . The soldering pattern 326 does not include a third portion. The first portion 340 is aligned on the axis 315 and is sized to receive the electrical connection pin 18A. The second portion 342 is located radially outward of the first portion 340 and extends at least partway about the first electrical connection pin 18A at a second radial distance relative to the axis 315.
In the illustrative embodiment, the second portion 342 extends about or more than 180 degrees around the axis 315. In other embodiments, the second portion 342 extends about or less than 180 degrees around the axis 315. In other embodiments, the second portion 342 extends about or less than 90 degrees around the axis 315. In other embodiments, the second portion 342 extends at least 90 degrees around the axis 315. In other embodiments, the second portion 342 extends about or less than 70 degrees around the axis 315. In some embodiments, the second portion 342 extends about or less than 60 degrees around the axis 315. In some embodiments, the second portion 342 extends about or less than 50 degrees around the axis 315. In some embodiments, the second portion 342 extends about or less than 45 degrees around the axis 315. In some embodiments, the second portion 342 extends about or less than 30 degrees around the axis 315.
The cutout 332 includes a first inner wall 346, a first outer wall 350, a first intermediate wall 354, and a second intermediate wall 356 as shown in FIG. 6 . The first inner wall 346 is curved and extends partway circumferentially around the axis 315 at the first radius. The first inner wall 346 defines the first portion 340 of the soldering pattern 326. The first inner wall 346 is configured to be bonded directly with the electrical connection pin 18A with solder or other joining material 31. The first intermediate wall 354 extends between and interconnects the first inner wall 346 and the first outer wall 350. The second intermediate wall 356 extends between and interconnects the first inner wall 346 and the first outer wall 350. The first intermediate wall 354 and the second intermediate wall 356 diverge as they extend radially outward. The first intermediate wall 354 and the second intermediate wall 356 are generally linear.
Another embodiment of a multi-layer bus bar 414 for use with the multi-layer electrical component assembly 10 is shown in FIG. 7 . The multi-layer bus bar 414 is substantially the same as the multi-layer bus bar 14 except where the description and drawings diverge from the multi-layer bus bar 14. The multi-layer bus bar 414 includes a plurality of conductive layers 428A, 428B, 428C, etc.
Each conductive layer 428A, 428B, 428C, etc. is formed to define a cutout 432, 434, 436 having a solder pattern 426 as shown in FIG. 7 . Unlike the patterns 26, 226, 326, the solder patterns 426 are not rotated relative to each about the axis 415. In other embodiments, the patterns 426 on different layers are offset circumferentially. The solder patterns 426 on each conductive layer 428A, 428B, 428C, etc. are aligned circumferentially with one another. In other embodiments, the soldering patterns 426 may be partially misaligned with one another.
The soldering pattern 426 includes a first portion 440 and a plurality of second portions 442 as shown in FIG. 7 . Illustratively, the first portion 440 is a central through hole 440 and the plurality of second portions 442 are a plurality of secondary holes or slots 442 arranged circumferentially around the axis 415. The first portion 440 is aligned on the axis 415 and is sized to receive the electrical connection pin 18A. The second portions 442 are located radially outward of the first portion 440 a second radial distance relative to the axis 415.
The second portions 442 are discrete relative to each other and relative to the first portion 440 as shown in FIG. 7 . In other words, the second portions 442 do not open directly to each other and do not open directly into the first portion 440. illustratively, each second portion 442 is an elongated slot that extends along a major axis that extends radially away from the axis 415. The plurality of second portions 442 include eight second portions 442 in the illustrative embodiment. In other embodiments, the plurality of second portions 442 include any number of second portions 442.
Each second portion 442 has an inner end that is located about two times the radius of the first portion 440. Each second portion 442 is approximately rectangular shaped with curved edges. The second portions 442 are generally equally spaced apart from one another circumferentially about the axis 415.
Another embodiment of a multi-layer bus bar 514 for use with the multi-layer electrical component assembly 10 is shown in FIG. 8 . The multi-layer bus bar 514 is substantially the same as the multi-layer bus bar 14 except where the description and drawings diverge from the multi-layer bus bar 14. The multi-layer bus bar 514 includes a plurality of conductive layers 528A, 528B, 528C, etc.
Each conductive layer 528A, 528B, 528C, etc. is formed to define a cutout 532, 534, 536 having a solder pattern 526 as shown in FIG. 8 . The solder patterns 526 are not rotated relative to each about the axis 515. In other embodiments, the patterns 526 on different layers are offset circumferentially. The solder patterns 526 on each conductive layer 528A, 528B, 528C, etc. are aligned circumferentially with one another. In other embodiments, the soldering patterns 526 may be partially misaligned with one another.
The soldering pattern 526 includes a first portion 540 and a plurality of second portions 542 as shown in FIG. 8 . Illustratively, the first portion 540 is a central through hole 540 and the plurality of second portions 542 are a plurality of secondary holes or slots 542 arranged circumferentially around the axis 515. The first portion 540 is aligned on the axis 515 and is sized to receive the electrical connection pin 18A. The second portions 542 are located radially outward of the first portion 540 a second radial distance relative to the axis 515.
The second portions 542 are discrete relative to each other and relative to the first portion 540 as shown in FIG. 8 . In other words, the second portions 542 do not open directly to each other and do not open directly into the first portion 540. illustratively, each second portion 542 is wedge shaped and generally triangular. The plurality of second portions 542 include eight second portions 542 in the illustrative embodiment. In other embodiments, the plurality of second portions 542 include any number of second portions 542.
Each second portion 542 has an inner end that is located about two times the radius of the first portion 540. Each second portion 542 is approximately triangular shaped with curved edges. The second portions 542 are generally equally spaced apart from one another circumferentially about the axis 515. The second portions 542 are each substantially similar in shape and size.
A method of making a multi-layer electrical component assembly 10 such as a multi-layer bus bar assembly include arranging a first cutout 32 formed in a first electrically conductive layer 28A around an electrical connection pin 18A that extends along an axis 15. The first cutout 32 has a first portion 40 that extends circumferentially at least partway around the electrical connection pin 18A relative to the axis 15 and a second portion 42 located radially outward from the first portion 40. A second cutout 34 formed in a second electrically conductive layer 28B is arranged around the electrical connection pin 18A.
The second cutout 34 has a portion 40 that extends circumferentially at least partway around the electrical connection pin 18A relative to the axis 15 and a portion 42 located radially outward from the portion 40. Joining material 31 is applied in the first portion 40 of the first cutout 32 to cause the joining material 31 to engage the first electrically conductive layer 28A and the electrical connection pin 18A. The joining material 31 is applied to the second portion 42 of the first cutout 32 to cause a portion of the joining material 31 to pass through the second portion 42 of the first cutout 32 and enter the portion 42 of the second cutout 34 to allow the joining material 31 to engage the second electrically conductive layer 28B.
The portion 40 of the second cutout 34 is radially open to and fluidly connected with the portion 42 to allow the joining material 31 to be applied to the portion 40. The second portion 42 of the first cutout 32 has an area that is larger than an area of the first portion 40. The second cutout 34 is substantially the same shape as the first cutout 32 and rotated circumferentially partway about the axis 15 relative to first cutout 32. In some embodiments, the second cutout 434, 534 is substantially the same shape as the first cutout 432, 532 and aligned circumferentially relative to the axis 15 with the first cutout 432, 532.
The present application provides soldering through hole components to electronic components such as multi-layer laminated bus bars 14. In aerospace applications, power electronic converter designs may demand high power density in terms of weight and volume. One commonly adopted approach to reduce the DC link capacitance is to increase the power converter's switching frequency. However, with increasing switching frequency, the alternating current through the DC link capacitors increase accordingly.
With increased frequency, current crowing occurs in the DC link of conventional bus bars where the electrical current only flows to the surface of copper layers to certain depth, which is termed the skin-depth. As one illustrative example, to obtain 1 millimeter effective copper thickness, a conventional bus bar can theoretically be simply a single layer of 1 millimeter copper. However, at high frequency above 50 kHz, multiple insulated thinner layers connected in parallel would be used to obtain the 1 millimeter effective copper thickness. The multilayer laminated bus bar concept is shown in FIG. 1 . The features of the present disclosure can be realized with either laminated bus bar techniques or with printed circuit boards. The multi-layer bus bar 14 may represent one of the future trend for aerospace power converters with higher and higher switching frequencies.
Film capacitors 12 in the form of rectangle packages with through-hole pins 18, as shown in FIGS. 1 and 2 , may have the widest convergence of specifications including voltage ratings, unit capacitance, and unit root mean square (rms) current. Film capacitors may also have high power densities. For DC link applications, unique combinations of capacitance and root mean square current may be able to be realized with off-the-shelf models, thus allowing fast production cycle and cost saving. Film capacitors may be utilized more and more in aerospace power converters.
The combination of conventional through-hole rectangle capacitors and conventional multilayer copper bus bar or printed circuit boards create the challenge of reliable soldering. The top most layer of conventional components may be the most assessable for soldering while the inner layers may be difficult to reach with conventional soldering method. The soldering quality of conventional components may be poor where the inner layers are barely attached to the capacitor pins. Poor soldering may create high contact resistance which may lead to overheating of the contact area, melting of the insulation, and short circuit in the DC link. For multilayer printed circuit boards with thick copper, the existing conventional method to ease soldering is to pre-heat the printed circuit board and capacitors. However, soldering quality and/or solder penetration into the full thickness of the printed circuit board may be less than desirable.
According to the present disclosure, a unique layer by layer pattern 26 is provided on the copper layers 28 to create easy-to-access features as shown in FIGS. 3 and 4 . Each copper layer 28 carries a thermal reliving solder pattern 26. From one copper layer 28 to the next copper layer 28, the pattern 26 is skewed by a certain degrees in some embodiments. When stacked up, the coper layers 28 together create a staircase pattern around the capacitor pin 18A. As a result, each copper layer 28 can be welded or soldered to the capacitor pin 18A separately and the bonding quality may be improved. Other thermal relieving patterns 226, 326 for copper layers are shown in FIGS. 5 and 6 .
In other embodiments, the soldering patterns 426, 526 include a central through hole 440, 540 and a plurality of secondary holes or slots 442, 542 as shown in FIGS. 7-9 . In the embodiment with soldering pattern 426, the pad is split into two sections to create the continuous copper condition area from the capacitor pin 18A. In the soldering pattern 526, a single section of the copper is kept for the current condition. Besides soldering irons, resistance welders or spot welders can be used to the capacitor pin soldering.
While the disclosure has been illustrated and described in detail in the foregoing drawings and description, the same is to be considered as exemplary and not restrictive in character, it being understood that only illustrative embodiments thereof have been shown and described and that all changes and modifications that come within the spirit of the disclosure are desired to be protected.

Claims (19)

What is claimed is:
1. A multi-layer bus bar assembly comprising,
a capacitor having a body and a first electrical connection pin that extends away from the body along an axis,
a multi-layer bus bar that includes
a positive rail that includes a plurality of first conductive layers and a plurality of first inter-insulation layers, wherein each of the plurality of first inter-insulation layers is located axially between neighboring first conductive layers included in the plurality of first conductive layers,
a negative rail that includes a plurality of second conductive layers and a plurality of second inter-insulation layers, wherein each of the plurality of second inter-insulation layers is located axially between neighboring second conductive layers included in the plurality of second conductive layers, and
a main insulation layer positioned between the positive rail and the negative rail,
wherein the plurality of first conductive layers are formed to assist in the joining of the plurality of first conductive layers with the first electrical connection pin, the plurality of first conductive layers including a first layer and a second layer axially neighboring the first layer, the first layer formed to define a first cutout shaped with a soldering pattern arranged about the axis, and the second layer formed to define a second cutout shaped with the soldering pattern arranged around the axis, and
wherein the soldering pattern includes a discrete first through hole located on the axis and receives the first electrical connection pin and a discrete second through hole spaced apart radially from the first through hole relative to the axis.
2. The multi-layer bus bar assembly of claim 1, wherein the second cutout formed in the second conductive layer is circumferentially aligned with the first cutout such that the second through hole of the first cutout is circumferentially aligned with the second through hole of the second cutout.
3. The multi-layer bus bar assembly of claim 2, wherein the second through hole is a slot that extends radially relative to the axis.
4. The multi-layer bus bar assembly of claim 3, wherein the second through hole extends radially along a major axis and circumferentially along a minor axis.
5. The multi-layer bus bar assembly of claim 2, wherein the second through hole includes a first wall, a second wall, and a third wall that interconnects the first wall and the second wall and the first wall and second wall diverge as they extend radially away from the axis.
6. The multi-layer bus bar assembly of claim 1, wherein the first through hole is circular, the soldering pattern includes a plurality of discrete outer through holes that includes the second through hole, and the plurality of discrete outer through holes are spaced apart circumferentially from one another about the first through hole and the axis.
7. The multi-layer bus bar assembly of claim 1, wherein the second through hole has an area that is larger than an area of the first through hole.
8. The multi-layer bus bar assembly of claim 1, wherein the second cutout formed in the second conductive layer is circumferentially offset from the first cutout.
9. An electrical component assembly comprising
an electrical connection pin that extends along an axis,
a first conductive layer formed to define a first cutout that extends axially through the first conductive layer, and the first cutout includes a first through hole arranged around the electrical connection pin and a second through hole located radially outward of the first through hole relative to the axis,
a second conductive layer formed to define a second cutout that extends axially through the second conductive layer, the second cutout includes a third through hole arranged around the electrical connection pin and a fourth through hole located radially outward of the third through hole, and the fourth through hole is at least partially circumferentially aligned with the second through hole to allow joining material to flow axially into the fourth through hole and the second through hole,
wherein the first through hole extends circumferentially about the axis at a first constant radius and the second through hole extends circumferentially only partway about the axis.
10. The electrical assembly of claim 9, wherein the second cutout is substantially the same as the first cutout and aligned circumferentially relative to the first cutout about the axis.
11. The electrical assembly of claim 9, wherein the entire second through hole is spaced apart from the first through hole.
12. The electrical assembly of claim 9, wherein the second conductive layer is spaced apart axially from the first conductive layer.
13. The electrical assembly of claim 9, wherein the second through hole is a slot that extends radially away from the axis.
14. The electrical assembly of claim 9, wherein the second through hole is defined by a first wall and a second wall that diverge away from one another.
15. The electrical assembly of claim 9, wherein the first cutout includes a fifth through hole spaced apart circumferentially from the second through hole relative to the axis.
16. A method of making a multi-layer bus bar assembly, the method comprising
arranging a first cutout formed in a first electrically conductive layer around an electrical connection pin that extends along an axis, the first cutout having a first through hole that extends circumferentially at least partway around the electrical connection pin relative to the axis and a second through hole located radially outward from the first through hole,
arranging a second cutout formed in a second electrically conductive layer around the electrical connection pin, the second cutout having a third through hole that extends circumferentially around the electrical connection pin relative to the axis and a fourth through hole located radially outward from the second portion,
applying joining material in the first through hole of the first cutout to cause the joining material to engage the first electrically conductive layer and the electrical connection pin, and
applying the joining material in the second through hole of the first cutout to cause a portion of the joining material to pass through the second through hole of the first cutout and enter the fourth through hole of the second cutout to allow the joining material to engage the second electrically conductive layer.
17. The method of claim 16, wherein the fourth through hole of the second cutout is circumferentially aligned with the second through hole.
18. The method of claim 16, wherein the second through hole of the first cutout is entirely spaced apart from the first through hole.
19. The method of claim 16, wherein the second cutout is substantially the same shape as the first cutout and aligned circumferentially with the first cutout relative to the axis.
US17/688,469 2022-03-07 2022-03-07 Multilayer electronic components with soldered through holes Active 2042-04-02 US11876364B2 (en)

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