US11228321B2 - System and method for processing polar code - Google Patents
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- US11228321B2 US11228321B2 US16/784,050 US202016784050A US11228321B2 US 11228321 B2 US11228321 B2 US 11228321B2 US 202016784050 A US202016784050 A US 202016784050A US 11228321 B2 US11228321 B2 US 11228321B2
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/033—Theoretical methods to calculate these checking codes
- H03M13/036—Heuristic code construction methods, i.e. code construction or code search based on using trial-and-error
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/27—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques
- H03M13/2703—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes using interleaving techniques the interleaver involving at least two directions
- H03M13/2707—Simple row-column interleaver, i.e. pure block interleaving
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/63—Joint error correction and other techniques
- H03M13/635—Error control coding in combination with rate matching
- H03M13/6356—Error control coding in combination with rate matching by repetition or insertion of dummy data, i.e. rate reduction
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0071—Use of interleaving
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0057—Block codes
Definitions
- the disclosure relates generally to wireless communications and, more particularly, to systems and methods for processing a Polar code.
- a Polar code is an encoding technique that can achieve a Shannon limit and has low coding-decoding complexity.
- the Polar code is a linear block code.
- a construction sequence having a plurality of indexes are provided, and respective index locations of a plurality of information bits that are to be processed by the generator matrix G N are determined based on the indexes.
- an index of the construction sequence is herein referred to as a “construction sequence index.”
- a rate matching technique is typically performed to discard one or more encoded bits (e.g., one or more bits of the Polar code output).
- exemplary embodiments disclosed herein are directed to solving the issues relating to one or more of the problems presented in the prior art, as well as providing additional features that will become readily apparent by reference to the following detailed description when taken in conjunction with the accompany drawings.
- exemplary systems, methods, devices and computer program products are disclosed herein. It is understood, however, that these embodiments are presented by way of example and not limitation, and it will be apparent to those of ordinary skill in the art who read the present disclosure that various modifications to the disclosed embodiments can be made while remaining within the scope of the invention.
- a method for channel coding includes: receiving, by a Polar code encoder, a plurality of information bits; encoding, by the Polar code encoder, the plurality of information bits using a construction sequence to generate a plurality of encoded information bits, wherein the construction sequence comprising a plurality of construction sequence indexes, wherein the encoding comprises placing the plurality of information bits on respective indexes according to at least one of a plurality of subsets of the construction sequence indexes; and outputting the plurality of encoded information bits.
- a method for channel coding includes: receiving, by a Polar code encoder, a plurality of information bits; encoding, by the Polar code encoder, the plurality of information bits using a construction sequence comprising a first plurality of construction sequence indexes and a sequence comprising a second plurality of sequence indexes to generate a plurality of encoded information bits, wherein the second plurality of sequence indexes correspond to a subset of a Polar code output not to be transmitted, and wherein the encoding comprises: generating a fully filled first dummy sequence by selecting a first subset of the second plurality of sequence indexes that are each within a first index range; generating a fully filled second dummy sequence by selecting a second subset of the second plurality of sequence indexes that are each within a second index range; and placing the plurality of information bits on respective indexes based on a difference between the construction sequence and a combination of the fully filled first and second dummy sequences; and outputting the plurality
- a method in another embodiment, includes: grouping a plurality of Polar code output into a plurality of subsets of encoded bits; interleaving each of the plurality of subsets of encoded bits; and combining the plurality of subsets of encoded bits as an interleaved output to be transmitted.
- FIG. 1 illustrates an exemplary cellular communication network in which techniques disclosed herein may be implemented, in accordance with an embodiment of the present disclosure.
- FIG. 2 illustrates block diagrams of an exemplary base station and a user equipment device, in accordance with some embodiments of the present disclosure.
- FIG. 3 illustrates a flow chart of an exemplary method to determine respective indexes to place information bits based on a transmission requirement, in accordance with some embodiments of the present disclosure.
- FIG. 4 illustrates a flow chart of an exemplary method to perform an interleaving technique on a Polar code output, in accordance with some embodiments of the present disclosure.
- FIG. 1 illustrates an exemplary wireless communication network 100 in which techniques disclosed herein may be implemented, in accordance with an embodiment of the present disclosure.
- Such an exemplary network 100 includes a base station 102 (hereinafter “BS 102 ”) and a user equipment device 104 (hereinafter “UE 104 ”) that can communicate with each other via a communication link 110 (e.g., a wireless communication channel), and a cluster of notional cells 126 , 130 , 132 , 134 , 136 , 138 and 140 overlaying a geographical area 101 .
- the BS 102 and UE 104 are contained within a respective geographic boundary of cell 126 .
- Each of the other cells 130 , 132 , 134 , 136 , 138 and 140 may include at least one base station operating at its allocated bandwidth to provide adequate radio coverage to its intended users.
- the BS 102 may operate at an allocated channel transmission bandwidth to provide adequate coverage to the UE 104 .
- the BS 102 and the UE 104 may communicate via a downlink radio frame 118 , and an uplink radio frame 124 respectively.
- Each radio frame 118 / 124 may be further divided into sub-frames 120 / 127 which may include data symbols 122 / 128 .
- the BS 102 and UE 104 are described herein as non-limiting examples of “communication nodes,” generally, which can practice the methods disclosed herein. Such communication nodes may be capable of wireless and/or wired communications, in accordance with various embodiments of the invention.
- FIG. 2 illustrates a block diagram of an exemplary wireless communication system 200 for transmitting and receiving wireless communication signals, e.g., OFDM/OFDMA signals, in accordance with some embodiments of the invention.
- the system 200 may include components and elements configured to support known or conventional operating features that need not be described in detail herein.
- system 200 can be used to transmit and receive data symbols in a wireless communication environment such as the wireless communication environment 100 of FIG. 1 , as described above.
- the System 200 generally includes a base station 202 (hereinafter “BS 202 ”) and a user equipment device 204 (hereinafter “UE 204 ”).
- the BS 202 includes a BS (base station) transceiver module 210 , a BS antenna 212 , a BS processor module 214 , a BS memory module 216 , and a network communication module 218 , each module being coupled and interconnected with one another as necessary via a date communication bus 220 .
- the UE 204 includes a UE (user equipment) transceiver module 230 , a UE antenna 232 , a UE memory module 234 , and a UE processor module 236 , each module being coupled and interconnected with one another as necessary via a data communication bus 240 .
- the BS 202 communicates with the UE 204 via a communication channel 250 , which can be any wireless channel or other medium known in the art suitable for transmission of data as described herein.
- system 200 may further include any number of modules other than the modules shown in FIG. 2 .
- modules other than the modules shown in FIG. 2 .
- Those skilled in the art will understand that the various illustrative blocks, modules, circuits, and processing logic described in connection with the embodiments disclosed herein may be implemented in hardware, computer-readable software, firmware, or any practical combination thereof. To clearly illustrate this interchangeability and compatibility of hardware, firmware, and software, various illustrative components, blocks, modules, circuits, and steps are described generally in terms of their functionality. Whether such functionality is implemented as hardware, firmware, or software depends upon the particular application and design constraints imposed on the overall system. Those familiar with the concepts described herein may implement such functionality in a suitable manner for each particular application, but such implementation decisions should not be interpreted as limiting the scope of the present invention.
- the UE transceiver module 230 may be referred to herein as an “uplink” transceiver module 230 that includes a RF transmitter and receiver circuitry that are each coupled to the antenna 232 .
- a duplex switch (not shown) may alternatively couple the uplink transmitter or receiver to the uplink antenna in time duplex fashion.
- the BS transceiver module 210 may be referred to herein as a “downlink” transceiver module 210 that includes RF transmitter and receiver circuitry that are each coupled to the antenna 212 .
- a downlink duplex switch may alternatively couple the downlink transmitter or receiver to the downlink antenna 212 in time duplex fashion.
- the operations of the two transceiver modules 210 and 230 are coordinated in time such that the uplink receiver is coupled to the uplink antenna 232 for reception of transmissions over the wireless transmission link 250 at the same time that the downlink transmitter is coupled to the downlink antenna 212 .
- the UE transceiver module 230 and the BS transceiver module 210 are configured to communicate via the wireless data communication link 250 , and cooperate with a suitably configured RF antenna arrangement 212 / 232 that can support a particular wireless communication protocol and modulation scheme.
- the UE transceiver module 210 and the BS transceiver module 210 are configured to support industry standards such as the Long Term Evolution (LTE) and emerging 5G standards, and the like. It is understood, however, that the invention is not necessarily limited in application to a particular standard and associated protocols. Rather, the UE transceiver module 230 and the BS transceiver module 210 may be configured to support alternate, or additional, wireless data communication protocols, including future standards or variations thereof.
- each of the BS transceiver module 210 and the UE transceiver module 230 includes a Polar encoder module, 211 and 231 .
- the Polar encoder module is configured to perform a Polar coding by applying the aforementioned G N matrix on a Polar code input to generate a Polar code output. As will be discussed below, such Polar code input and output may be processed by at least one of various disclosed techniques so as to satisfy respective application demands.
- the BS 202 may be an evolved node B (eNB), a serving eNB, a target eNB, a femto station, or a pico station, for example.
- the UE 204 may be embodied in various types of user devices such as a mobile phone, a smart phone, a personal digital assistant (PDA), tablet, laptop computer, wearable computing device, etc.
- PDA personal digital assistant
- the processor modules 214 and 236 may be implemented, or realized, with a general purpose processor, a content addressable memory, a digital signal processor, an application specific integrated circuit, a field programmable gate array, any suitable programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof, designed to perform the functions described herein.
- a processor may be realized as a microprocessor, a controller, a microcontroller, a state machine, or the like.
- a processor may also be implemented as a combination of computing devices, e.g., a combination of a digital signal processor and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a digital signal processor core, or any other such configuration.
- the steps of a method or algorithm described in connection with the embodiments disclosed herein may be embodied directly in hardware, in firmware, in a software module executed by processor modules 214 and 236 , respectively, or in any practical combination thereof.
- the memory modules 216 and 234 may be realized as RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, a hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art.
- memory modules 216 and 234 may be coupled to the transceiver modules 210 and 230 , respectively, such that the transceiver modules 210 and 230 can read information from, and write information to, memory modules 216 and 234 , respectively.
- the memory modules 216 and 234 may also be integrated into their respective transceiver modules 210 and 230 .
- the memory modules 216 and 234 may each include a cache memory for storing temporary variables or other intermediate information during execution of instructions to be executed by transceiver modules 210 and 230 , respectively.
- Memory modules 216 and 234 may also each include non-volatile memory for storing instructions to be executed by the transceiver modules 210 and 230 , respectively.
- the network communication module 218 generally represents the hardware, software, firmware, processing logic, and/or other components of the base station 202 that enable bi-directional communication between the BS transceiver module 210 and other network components and communication nodes configured to communication with the base station 202 .
- network communication module 218 may be configured to support internet or WiMAX traffic.
- network communication module 218 provides an 802.3 Ethernet interface such that the BS transceiver module 210 can communicate with a conventional Ethernet based computer network.
- the network communication module 218 may include a physical interface for connection to the computer network (e.g., Mobile Switching Center (MSC)).
- MSC Mobile Switching Center
- the present disclosure provides various embodiments of systems and methods to process a Polar code input and/or a Polar code output.
- a construction sequence having a plurality of construction sequence indexes that is used to place a plurality of information bits into respective indexes prior to being Polar encoded i.e., processing the Polar code input
- plural subsets of the plurality of construction sequence indexes may meet respective criteria.
- a method to determine respective indexes to place information bits based on a transmission requirement is disclosed.
- a novel interleaving technique to process the Polar code output is disclosed.
- a disclosed construction sequence used to place a plurality of information bits into respective indexes prior to being Polar encoded, has a plurality of construction sequence indexes.
- respective index locations of the plurality information bits can be determined based on the disclosed construction sequence.
- the plurality of construction sequence indexes of the disclosed construction sequence include at least one of a first subset, a second subset, a third subset, a fourth subset, a fifth subset, and a sixth subset that may each meet a respective criterion, which are respectively discussed below.
- the first subset of the construction sequence indexes is generated by ranking a first plurality of construction sequence indexes based on respective associated reliability values.
- the respective reliability values may be generated by a monotonic function.
- a monotonic function is used to generate 16 respective reliability values ⁇ 0, 1, 1.18, 2.18, 1.41, 2.41, 2.60, 3.60, 1.68, 2.68, 2.87, 3.87, 3.09, 4.09, 4.28, 5.28 ⁇ for the construction sequence indexes of first subset ⁇ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 ⁇ , respectively.
- the construction sequence indexes are ranked from the smallest to the largest as ⁇ 0, 1, 2, 4, 8, 3, 5, 6, 9, 10, 12, 7, 11, 13, 14, 15 ⁇ .
- the first 8 construction sequence indexes i.e., ⁇ 9, 10, 12, 7, 11, 13, 14, 15 ⁇
- the 8 largest reliability values are used to place the 8 information bits, according to some embodiments.
- the second subset of the construction sequence indexes includes at least a first construction sequence index, “i,” and a second construction sequence index, “j,” that meet a respective criterion: an equivalent binary number of the first construction sequence index comprises a first bit and an equivalent binary number of the second construction sequence indexes comprises a second bit, wherein the first and second bits are logically inverted to each other, and remaining bits of the equivalent binary number of the first construction sequence index are each identical to a corresponding one of remaining bits of the equivalent binary number of the second construction sequence index.
- the first construction index i and second construction index j are formed as a pair, and the first construction index i is arranged either before or after the second construction index j.
- all the remaining construction sequence indexes in the second subset may meet such a criterion.
- all the remaining construction sequence indexes in the second subset are formed as one or more pairs that each follows the same order of the first and second construction indexes.
- the equivalent binary number of the first construction sequence index i is expressed as: (a, b, c, 0) and the equivalent binary number of the second construction sequence index j is expressed as: (a, b, c, 1)
- the last bit of the equivalent binary numbers of the first and second construction sequence indexes are logically inverted to each other and other (i.e., remaining) bits (e.g., bits “a,” “b,” and “c”) are the same.
- a number of the same bits is not limited to 3 as provided in the current example.
- the number of the same bits respectively contained in the equivalent binary numbers of the first and second construction sequence indexes can be any number while remaining within the scope of the present disclosure.
- the third subset of the construction sequence indexes includes at least a first construction sequence index, “i,” and a second construction sequence index, “j,” that meet a respective criterion: an equivalent binary number of the first construction sequence index comprises respective first and second bits and an equivalent binary number of the second construction sequence indexes comprises respective first and second bits, wherein the first bit of the equivalent binary number of the first construction sequence index and the first bit of the equivalent binary number of the second construction sequence index are logically inverted to each other, and the second bit of the equivalent binary number of the first construction sequence index and the second bit of the equivalent binary number of the second construction sequence index are logically inverted to each other, and remaining bits of the equivalent binary number of the first construction sequence index are each identical to a corresponding one of remaining bits of the equivalent binary number of the second construction sequence index.
- the first construction index i and second construction index j are formed as a pair, and the first construction index i is arranged either before or after the second construction index j. Further, in some embodiments, all the remaining construction sequence indexes in the third subset may meet such a criterion. In other words, all the remaining construction sequence indexes in the third subset are formed as one or more pairs that each follows the same order of the first and second construction indexes.
- the equivalent binary number of the first construction sequence index i is expressed as: (a, 1, 0, b, c) and the equivalent binary number of the second construction sequence index j is expressed as: (a, 0, 1, b, c)
- the second and third bits of the equivalent binary numbers of the first and second construction sequence indexes are logically inverted to each other, respectively, and other bits (e.g., bits “a,” “b,” and “c”) are the same.
- bits “a,” “b,” and “c” are the same.
- a number of the same bits is not limited to 3 as provided in the current example.
- the number of the same bits respectively contained in the equivalent binary numbers of the first and second construction sequence indexes can be any number while remaining within the scope of the present disclosure.
- the fourth subset of the construction sequence indexes includes at least a first group of construction sequence indexes and a second group of construction sequence indexes that meet a third criterion: the first group is offset from the second group by a constant value.
- the first group of construction sequence indexes are ⁇ 1, 3, 2, 4 ⁇
- the second group of construction sequence indexes are ⁇ 5, 7, 6, 8 ⁇ .
- each construction sequence index of the first group is offset from the corresponding construction sequence index of the second group by a constant value: 4.
- the fifth subset of the construction sequence indexes is generated based on a plurality of sub-sequences, and wherein each construction sequence index of the fifth subset are each selected from a sub-construction sequence index of one of the plurality of sub-sequences. Detailed steps to generate the fifth subset of the construction sequence indexes are described in the below example.
- a first step is to select first construction sequence indexes from the sub-sequences S1 and S2, respectively, to form a first construction sequence index of the fifth subset of the construction sequence indexes, which is 3 in the current example.
- a second step is to delete the selected construction sequence index, 3, from the sub-sequences S1 and S2, respectively, to generate two updated sub-sequences: S1′ and S2′.
- a third step is to select first construction sequence indexes from the updated sub-sequences S1′ and S2′, respectively, to form a second construction sequence index of the fifth subset of the construction sequence indexes.
- the first construction sequence indexes of the updated sub-sequences S1′ is 2
- the first construction sequence indexes of the updated sub-sequences S2′ is 1.
- a trial process may be performed to test (e.g., simulate) whether using 2 or 1 may yield better performance (e.g., a lower block error ratio (BLER), etc.), according to some embodiments.
- the construction sequence index that yields better performance is then selected as the second construction sequence index of the fifth subset.
- the fifth subset may be generated.
- the sixth subset of the construction sequence indexes is generated based on a plurality of pre-defined sequences: S1, S2, S3, S4, and S5, which will be provided below.
- the n 1 th to the n 2 th construction sequence indexes of the disclosed construction sequence indexes are identical to the n 1 th to the n 2 th sequence indexes of any one of the five pre-defined sequences S1 to S5.
- the sixth subset of the construction sequence indexes is generated based on one common pre-defined sequence selected from the plurality of pre-defined sequences: S1, S2, S3, S4, and S5.
- the n 1 th to the n 2 th construction sequence indexes of the disclosed construction sequence indexes are each identical to the n 1 th to the n 2 th sequence indexes of the common pre-defined sequence
- the (n 1 +n) th to the (n 2 +n) th construction sequence indexes of the disclosed construction sequence indexes are also each identical to the n 1 th to the n 2 th sequence indexes of the common pre-defined sequence.
- the sixth subset of the construction sequence indexes is generated based on one common pre-defined sequence selected from the plurality of pre-defined sequences: S1, S2, S3, S4, and S5, and all the other construction sequence indexes (excluding the sixth subset) in the disclosed construction sequence indexes are generated based on another different pre-defined sequence selected from S1 to S5.
- the n 1 th to the n 2 th construction sequence indexes of the disclosed construction sequence indexes are each identical to the n 1 th to the n 2 th sequence indexes of the common pre-defined sequence
- the (n 1 +n) th to the (n 2 +n) th construction sequence indexes of the disclosed construction sequence indexes are also each identical to the n 1 th to the n 2 th sequence indexes of the common pre-defined sequence
- all the remaining construction sequence indexes of the disclosed construction sequence indexes are each identical to another pre-defined sequence different from the common pre-defined sequence.
- the pre-defined sequence S1 includes: [0,1,2,4,8,16,32,3,5,64,9,6,17,10,18,128,12,33,65,20,256,34,24,36,7,129,66,512,11,40,68,130,19,13,48,14,72,257,21,132,35,258,26,513,80,37,25,22,136,260,264,38,514,96,67,41,144,28,69,42,5 16,49,74,272,160,520,288,528,192,544,70,44,131,81,50,73,15,320,133,52,23,134,384,76,137,82, 56,27,97,39,259,84,138,145,261,29,43,98,515,88,140,30,146,71,262,265,161,576,45,100,640,51, 148,46,75,266,273,517,104,162,53,19
- the pre-defined sequence S4 includes: [0,1,2,4,8,16,32,3,5,6,64,9,10,128,17,12,18,512,33,20,34,256,65,24,36,7,40,11,66,13,129,19,68, 130,48,14,21,132,72,257,35,22,25,136,37,80,258,513,26,38,67,144,41,96,260,514,28,69,42,160, 49,516,15,131,70,264,44,73,50,192,23,520,74,52,133,81,272,76,27,528,134,288,39,82,137,56,97,259,544,138,29,84,145,43,30,140,261,98,320,265,71,576,146,45,88,51,161,100,515,262,148,46, 273,640,75,266,53,162,104,152,517,384,
- the 0 th to the 30 th construction sequence indexes of the disclosed construction sequence indexes are [0,1,2,4,8,16,3,5,9,6,17,10,18,12,20,24,7,11,19,13,14,21,26,25,22,28,15,23,27,29,30,31], which are each identical to the 0 th to the 30 th sequence indexes of the pre-defined sequence S1, for example.
- the 65 th to the 127 th construction sequence indexes of the disclosed construction sequence indexes are [64,65,66,68,72,80,96,67,69,70,73,74,81,76,82,97,84,98,88,71,100,75,104,77,83,112,78,85,99,8 6,89,101,90,105,102,92,106,113,79,108,114,116,87,91,120,103,93,107,94,109,115,110,117,118, 121,122,124,95,111,119,123,125,126,127], which are each identical to the 65 th to the 127 th sequence indexes of the pre-defined sequence S2, for example.
- the 0 th to the 127 th construction sequence indexes of the disclosed construction sequence indexes are each identical to the 0 th to the 127 th sequence indexes of the pre-defined sequence S1 (i.e., the common pre-defined sequence), and the 128 th to the 255 th construction sequence indexes of the disclosed construction sequence indexes are also each identical to the 0 th to the 127 th sequence indexes of the pre-defined sequence S1 (128 minus 0 is the given offset n, 128) sequence indexes of the common pre-defined sequence S1.
- a method to determine respective indexes to place information bits based on a transmission requirement is disclosed.
- information bits with K bits may be processed by the Polar encoder to generate the Polar code output.
- a subset of the Polar code output may not be transmitted, and such a subset of the Polar code output may be each associated with a sequence index.
- the disclosed method is directed to determining respective indexes in the construction sequence where the K information bits can be placed using a virtual code rate, which is 1, in order to meet the above-mentioned transmission requirement. After the K information bits are placed in respective indexes, those K information bits can be processed by the Polar encoder to generate a corresponding Polar code output.
- the disclosed method may be implemented by performing the operations as illustrated in a flow chart of an exemplary method 300 of FIG. 3 .
- the method 300 stars with operation 302 in which a construction sequence “S” is provided.
- the construction sequence S includes a plurality of construction sequence indexes with a number of N that is a power of 2.
- the method 300 continues to operation 304 in which a sequence “S_nr” is provided.
- the second sequence S_nr includes a plurality of sequence indexes, wherein the plurality of sequence indexes correspond to a subset of the Polar code output that is not to be transmitted.
- the method 300 continues to operation 306 in which a partially filled first dummy sequence “O_idx1” and a partially filled second dummy sequence “O_idx2” are respectively generated.
- the partially filled first dummy sequence is generated by selecting a first subset of the plurality of sequence indexes of S_nr that are each within a first index range “0 to N/2 ⁇ 1,” and the partially filled second dummy sequence is generated by selecting a second subset of the plurality of sequence indexes of S_nr that are each within a second index range “N/2 to N ⁇ 1.”
- the construction sequence S may be divided into first and second candidate sequences S1 and S2 based on the first and second index ranges, respectively, according to some embodiments.
- an order of the first candidate sequence S1 may follow an order of the construction sequence S
- an order of the second candidate sequence S2 may also follow the order of the construction sequence S.
- the method 300 continues to operation 310 in which a fully filled second dummy sequence is generated by filling the partially filled second dummy sequence with other construction sequence indexes, different from the second subset of the plurality of construction sequence indexes of S_nr, in the second candidate sequence until a respective number of the fully filled second dummy sequence meets a second threshold “n ⁇ ” derived based on a second density evolution function.
- an order of using the indexes in the second candidate sequence S2 to fill the partially filled second dummy sequence may follow the order of the construction sequence S, i.e., starting with the use of a less reliable construction sequence index at each operation of filling.
- the method 300 continues to operation 312 in which the Polar code input to be processed by the Polar code encoder is provided.
- the Polar code input includes a plurality of information bits that are placed on respective indexes based on a difference between the construction sequence S and a combination “O_idx” of the fully filled first and second dummy sequences.
- a number of the sequence indexes contained in the combination O_inx may be N ⁇ K, wherein K is the bit number of information bits prior to being processed by the Polar encoder.
- the construction sequence S may be provided as ⁇ 0, 1, 2, 4, 8, 3, 5, 6, 9, 10, 12, 7, 11, 13, 14, 15 ⁇ and the sequence S_nr may be provided as ⁇ 3, 7, 12, 14 ⁇ , wherein the construction sequence S and the sequence S_nr are constituted by respective construction sequence indexes and sequence indexes, as shown above.
- the first index range 0 to 7 and the second index range 8 to 15 are provided, respectively, which causes the construction sequence S to be divided into two candidate sequences S1, ⁇ 0, 1, 2, 3, 4, 5, 6, 7 ⁇ , and S2, ⁇ 8, 9, 10, 11, 12, 13, 14, 15 ⁇ .
- the partially filled first dummy sequence is generated by selecting ⁇ 3, 7 ⁇ from the second construction sequence S_nr since ⁇ 3, 7 ⁇ are each within the first index range 0 to 7.
- the partially filled second dummy sequence is generated by selecting ⁇ 12, 14 ⁇ from the sequence S_nr since ⁇ 12, 14 ⁇ are each within the second index range 8 to 15.
- the fully filled first dummy sequence is generated by filling the partially filled first dummy sequence ⁇ 3,7 ⁇ with other construction sequence indexes of the candidate sequence S1 until the number of construction sequence indexes contained in the first dummy sequence O_idx1 reaches n+, which is 5 based on the above density evolution function.
- O_idx1 ⁇ 3, 7, 0, 1, 2 ⁇ .
- the fully filled second dummy sequence is generated by filling the partially filled second dummy sequence ⁇ 12, 14 ⁇ with other construction sequence indexes of the candidate sequence S2 until the number of construction sequence indexes contained in the second dummy sequence O_idx2 reaches n ⁇ , which is 6 based on the above density evolution function.
- O_idx2 ⁇ 12, 14, 8, 9, 10, 11 ⁇ .
- the difference between the construction sequence S and the combination O_idx is ⁇ 4, 5, 6, 13, 15 ⁇ , which corresponds to indexes to place the information bits.
- the Polar code input to be processed by the Polar encoder is provided.
- each subset has a respective number of encoded bits, represented by “m i ,” wherein “i” represents the group index.
- the method 400 continues to operation 406 in which the plurality of subsets are each interleaved by an interleaving method.
- the interleaving method may be performed using a random number generator, a bit reversal order (BRO) function, a stagger and combination method, a ranking method, and/or a column-row interleaving method, which will be each discussed in further detail below using a respective example.
- BRO bit reversal order
- the operation 406 may include interleaving an initial one of the plurality of subsets of encoded bits by an initial interleaving pattern (which is used to refer the relationship before or after being interleaved, e.g., if the interleaving pattern is ⁇ 4,2,3,1,0 ⁇ and the encoded bits before interleaver is ⁇ x 0 ,x 1 ,x 2 ,x 3 ,x 4 ⁇ (x N are defined as encoded bits in the background), then after being interleaved, the bits are ⁇ x 4 ,x 2 ,x 3 ,x 1 ,x 0 ⁇ ); and interleaving remaining ones of the plurality of subsets of encoded bits by respectively adding an offset present between each of the remaining ones and the interleaving pattern of initial the plurality of subsets of encoded bits or circularly shifting the interleaving pattern of the initial plurality of subsets of encoded bits
- an initial interleaving pattern which is used to refer the relationship before or after being interlea
- a second subset (i.e., the remaining one) ⁇ x4, x5, x6, x7 ⁇ may be interleaved by the same random number generator to generate an interleaved second subset.
- the second interleaving pattern may be generated by adding an offset between the first and second interleaving patterns, which is 4 in the current example.
- the interleaved second subset is ⁇ x4, x6, x5, x7 ⁇ .
- the indexes of a first subset ⁇ 0, 1, 2, 3 ⁇ are each transformed into an equivalent binary number, ⁇ 00, 01, 10, 11 ⁇ , reversed to become ⁇ 00, 10, 01, 11 ⁇ , and then transformed back to an equivalent decimal number, ⁇ 0, 2, 1, 3 ⁇ , which is a first interleaved pattern and the interleaved first subset is ⁇ x0, x2, x1, x3 ⁇ .
- a second subset (i.e., the remaining one) ⁇ x4, x5, x6, x7 ⁇ may be interleaved by the same BRO method to generate an interleaved second subset.
- the second interleaving pattern may be generated by adding an offset between the first and second interleaving patterns, which is 4 in the current example.
- the interleaved second subset is ⁇ x4, x6, x5, x7 ⁇ .
- an interleaved subset is generated as ⁇ x2, x4, x3, x5 ⁇ by placing the first encoded bit of Q2 as a first encoded bit of the interleaved subset, placing the first encoded bit of Q3 as a second encoded bit of the interleaved subset, placing the second encoded bit of Q2 as a third encoded bit of the interleaved subset, placing the second encoded bit of Q3 as a fourth encoded bit of the interleaved subset, and so on.
- Q1 the staggered and combined Q2 and Q3, and Q4 are combined to generate the interleaved encoded bits ⁇ x0, x1, x2, x4, x3, x5, x6, x7 ⁇ .
- the first interleaved pattern is generated by ranking the metric values of the first encoded bit subset indexes from the smallest to the largest, which is shown as ⁇ 0, 1, 2, 4, 8, 3, 5, 6, 9, 10, 12, 7, 11, 13, 14, 15 ⁇ .
- the interleaved first subset may be generated by ranking the metric values of the encoded bit subset indexes from the largest to the smallest while remaining within the scope of the present disclosure.
- an interleaved second pattern may be generated by either adding an offset (e.g., 16) between the first and second subsets, or applying the same ranking method.
- the written sequence indexes of the first subset are read from the column-row interleaver either by row or column of the column-row interleaver.
- the read-out encoded bits of the first subset are ⁇ x0, x4, x2, x6, x1, x5, x3, x7 ⁇ .
- Such read-out sequence indexes may constitute an interleaved first subset.
- an interleaved second subset may be generated by either adding an offset (e.g., 8) between the first and second subsets, or applying the same column-row interleaving method.
- the column indexes of the column-row interleaver are interleaved using the above-described a stagger and combination method or a ranking method.
- any reference to an element herein using a designation such as “first,” “second,” and so forth does not generally limit the quantity or order of those elements. Rather, these designations can be used herein as a convenient means of distinguishing between two or more elements or instances of an element. Thus, a reference to first and second elements does not mean that only two elements can be employed, or that the first element must precede the second element in some manner.
- any of the various illustrative logical blocks, modules, processors, means, circuits, methods and functions described in connection with the aspects disclosed herein can be implemented by electronic hardware (e.g., a digital implementation, an analog implementation, or a combination of the two), firmware, various forms of program or design code incorporating instructions (which can be referred to herein, for convenience, as “software” or a “software module), or any combination of these techniques.
- electronic hardware e.g., a digital implementation, an analog implementation, or a combination of the two
- firmware various forms of program or design code incorporating instructions
- software or a “software module”
- IC integrated circuit
- DSP digital signal processor
- ASIC application specific integrated circuit
- FPGA field programmable gate array
- the logical blocks, modules, and circuits can further include antennas and/or transceivers to communicate with various components within the network or within the device.
- a general purpose processor can be a microprocessor, but in the alternative, the processor can be any conventional processor, controller, or state machine.
- a processor can also be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other suitable configuration to perform the functions described herein.
- Computer-readable media includes both computer storage media and communication media including any medium that can be enabled to transfer a computer program or code from one place to another.
- a storage media can be any available media that can be accessed by a computer.
- such computer-readable media can include RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to store desired program code in the form of instructions or data structures and that can be accessed by a computer.
- module refers to software, firmware, hardware, and any combination of these elements for performing the associated functions described herein. Additionally, for purpose of discussion, the various modules are described as discrete modules; however, as would be apparent to one of ordinary skill in the art, two or more modules may be combined to form a single module that performs the associated functions according embodiments of the invention.
- memory or other storage may be employed in embodiments of the invention.
- memory or other storage may be employed in embodiments of the invention.
- any suitable distribution of functionality between different functional units, processing logic elements or domains may be used without detracting from the invention.
- functionality illustrated to be performed by separate processing logic elements, or controllers may be performed by the same processing logic element, or controller.
- references to specific functional units are only references to a suitable means for providing the described functionality, rather than indicative of a strict logical or physical structure or organization.
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Abstract
Description
n−=αR 2+Δ1
n+=β(2R−R 2)+Δ2
wherein R is K/M; Δ1 and Δ2 are related to K and M; α and β are each a pre-defined constant; and M represents a number of bits to be transmitted.
0 | 1 | 2 | 3 | ||
x0 | x1 | x2 | x3 | ||
x4 | x5 | x6 | x7 | ||
wherein values along the first row of the column-row interleaver each represents a column index of the column-row interleaver. In some embodiments, the sequence indexes are written into the column-row interleaver either by row or column of the column-row interleaver. In the above example, the sequence indexes of the first subset are written into the column-row interleaver by rows. Next, in some embodiments, the column indexes of the column-row interleaver are interleaved using the above-described BRO method. As such, the column-row interleaver may become:
0 | 2 | 1 | 3 | ||
x0 | x2 | x1 | x3 | ||
x4 | x6 | x5 | x7 | ||
Next, in some embodiments, the written sequence indexes of the first subset are read from the column-row interleaver either by row or column of the column-row interleaver. For example, when the written sequence indexes are read by column, the read-out encoded bits of the first subset are {x0, x4, x2, x6, x1, x5, x3, x7}. Such read-out sequence indexes may constitute an interleaved first subset. Similarly, an interleaved second subset may be generated by either adding an offset (e.g., 8) between the first and second subsets, or applying the same column-row interleaving method. In some embodiments, the column indexes of the column-row interleaver are interleaved using the above-described a stagger and combination method or a ranking method.
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Citations (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2009041783A1 (en) | 2007-09-28 | 2009-04-02 | Samsung Electronics Co., Ltd. | Method and apparatus of improved circular buffer rate matching for turbo-coded mimo-ofdm wireless systems |
CN103023618A (en) | 2013-01-11 | 2013-04-03 | 北京邮电大学 | Random code length polar encoding method |
CN104219019A (en) | 2013-05-31 | 2014-12-17 | 华为技术有限公司 | Coding method and coding device |
US20160352419A1 (en) | 2015-05-27 | 2016-12-01 | John P. Fonseka | Constrained interleaving for 5G wireless and optical transport networks |
US20170019214A1 (en) * | 2014-03-31 | 2017-01-19 | Huawei Technologies Co., Ltd. | Polar code hybrid automatic repeat request method and apparatus, and wireless communications apparatus |
CN107026709A (en) | 2016-02-01 | 2017-08-08 | 中兴通讯股份有限公司 | A kind of data packet coding processing method and processing device, base station and user equipment |
US20170331590A1 (en) * | 2016-05-13 | 2017-11-16 | Mediatek Inc. | Coded bit puncturing for polar codes |
US20170366206A1 (en) * | 2016-06-17 | 2017-12-21 | Huawei Technologies Co., Ltd. | Systems and methods for rate matching when using general polar codes |
US20170364399A1 (en) * | 2016-06-17 | 2017-12-21 | Huawei Technologies Co., Ltd. | Systems and methods for rate matching via a heterogeneous kernel when using general polar codes |
US20170366205A1 (en) * | 2016-06-17 | 2017-12-21 | Huawei Technologies Co., Ltd. | Systems and methods for piece-wise rate matching when using polar codes |
US20180048418A1 (en) * | 2016-08-10 | 2018-02-15 | Yiqun Ge | Methods and systems for blind detection with polar code |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102742157B (en) * | 2010-01-15 | 2015-10-21 | 意法爱立信有限公司 | The data flow control mechanism of sampling rate converter |
CN104079370B (en) * | 2013-03-27 | 2018-05-04 | 华为技术有限公司 | channel decoding method and device |
CN107017892B (en) * | 2017-04-06 | 2019-06-11 | 华中科技大学 | A kind of verification cascade polarization code encoding method and system |
-
2017
- 2017-08-11 CN CN201780093860.6A patent/CN111034074B/en active Active
- 2017-08-11 WO PCT/CN2017/097085 patent/WO2019028829A1/en active Application Filing
-
2020
- 2020-02-06 US US16/784,050 patent/US11228321B2/en active Active
Patent Citations (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2009041783A1 (en) | 2007-09-28 | 2009-04-02 | Samsung Electronics Co., Ltd. | Method and apparatus of improved circular buffer rate matching for turbo-coded mimo-ofdm wireless systems |
CN103023618A (en) | 2013-01-11 | 2013-04-03 | 北京邮电大学 | Random code length polar encoding method |
CN104219019A (en) | 2013-05-31 | 2014-12-17 | 华为技术有限公司 | Coding method and coding device |
US20160079999A1 (en) | 2013-05-31 | 2016-03-17 | Huawei Technologies Co., Ltd. | Coding method and coding device |
US20170019214A1 (en) * | 2014-03-31 | 2017-01-19 | Huawei Technologies Co., Ltd. | Polar code hybrid automatic repeat request method and apparatus, and wireless communications apparatus |
US20160352419A1 (en) | 2015-05-27 | 2016-12-01 | John P. Fonseka | Constrained interleaving for 5G wireless and optical transport networks |
CN107026709A (en) | 2016-02-01 | 2017-08-08 | 中兴通讯股份有限公司 | A kind of data packet coding processing method and processing device, base station and user equipment |
US20170331590A1 (en) * | 2016-05-13 | 2017-11-16 | Mediatek Inc. | Coded bit puncturing for polar codes |
US20170366206A1 (en) * | 2016-06-17 | 2017-12-21 | Huawei Technologies Co., Ltd. | Systems and methods for rate matching when using general polar codes |
US20170364399A1 (en) * | 2016-06-17 | 2017-12-21 | Huawei Technologies Co., Ltd. | Systems and methods for rate matching via a heterogeneous kernel when using general polar codes |
US20170366205A1 (en) * | 2016-06-17 | 2017-12-21 | Huawei Technologies Co., Ltd. | Systems and methods for piece-wise rate matching when using polar codes |
US20180048418A1 (en) * | 2016-08-10 | 2018-02-15 | Yiqun Ge | Methods and systems for blind detection with polar code |
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