US10510748B2 - Transistor for increasing a range of a swing of a signal - Google Patents
Transistor for increasing a range of a swing of a signal Download PDFInfo
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- US10510748B2 US10510748B2 US15/638,351 US201715638351A US10510748B2 US 10510748 B2 US10510748 B2 US 10510748B2 US 201715638351 A US201715638351 A US 201715638351A US 10510748 B2 US10510748 B2 US 10510748B2
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- 239000003990 capacitor Substances 0.000 claims abstract description 481
- 230000003071 parasitic effect Effects 0.000 claims abstract description 307
- 239000000758 substrate Substances 0.000 claims description 11
- 239000002184 metal Substances 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 16
- 101100102849 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) VTH1 gene Proteins 0.000 description 2
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
- H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
- H01L27/0629—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with diodes, or resistors, or capacitors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
Definitions
- the present invention relates to a transistor, and particularly to a transistor for increasing a range of a swing of a signal.
- a swing of the signal will cross all parasitic junction capacitors existing between a doping area of a drain (a source) of the transistor and a substrate for forming the transistor. Because the parasitic junction capacitor having the minimum capacitance value may also have a maximum voltage drop, a corresponding parasitic diode is easily turned on, resulting in the swing of the signal being significantly limited. Because the swing of the signal is significantly limited, power delivered by the signal is also significantly limited. Therefore, how to design a transistor which can increase a range of the swing of the signal becomes an important issue.
- An embodiment of the present invention provides a transistor for increasing a range of a swing of a signal.
- the transistor includes a first doping well, a second doping well, a first doping area, a second doping area, a gate area, and at least one compensation capacitor.
- the first doping well is formed in a structure layer.
- the second doping well is formed in the structure layer, and the second doping well is formed between the first doping well and the structure layer.
- the first doping area is formed in the first doping well for transmitting the signal.
- the second doping area is formed in the first doping well, wherein the first doping area, the second doping area, and the second doping well have a first conductivity type, and the first doping well has a second conductivity type.
- the gate area is used for making a channel be formed between the first doping area and the second doping area.
- the at least one compensation capacitor is electrically connected between the first doping area and the first doping well, or the first doping well and the second doping well, or the second doping well and a first reference potential.
- a first parasitic junction capacitor exists between the first doping area and the first doping well, a second parasitic junction capacitor exists between the first doping well and the second doping well, and a third parasitic junction capacitor exists between the second doping well and the structure layer; and the at least one compensation capacitor is used for adjusting a voltage drop of the first parasitic junction capacitor, a voltage drop of the second parasitic junction capacitor, or a voltage drop of the third parasitic junction capacitor.
- the transistor includes a first doping well, a second doping well, a first doping area, a second doping area, a gate area, and at least one compensation capacitor.
- the first doping well is formed in a structure layer.
- the second doping well is formed in the structure layer, and the second doping well is formed between the first doping well and the structure layer.
- the first doping area is formed in the first doping well.
- the second doping area is formed in the first doping well, wherein the first doping area, the second doping area, and the second doping well have a first conductivity type, and the first doping well has a second conductivity type.
- the gate area is used for making a channel be formed between the first doping area and the second doping area.
- the at least one compensation capacitor is electrically connected between the first doping area and the first doping well, or the first doping well and the second doping well, or the second doping well and a first reference potential.
- a first parasitic junction capacitor exists between the first doping area and the first doping well, a second parasitic junction capacitor exists between the first doping well and the second doping well, and a third parasitic junction capacitor exists between the second doping well and the structure layer.
- an N th parasitic junction capacitor of the first parasitic junction capacitor, the second parasitic junction capacitor, and the third parasitic junction capacitor has a minimum capacitance value
- an M th parasitic junction capacitor of the first parasitic junction capacitor, the second parasitic junction capacitor, and the third parasitic junction capacitor has a capacitance value different from the minimum capacitance value of the N th parasitic junction capacitor.
- the at least one compensation capacitor includes a first compensation capacitor electrically connected between the first doping area and the first doping well; when N is 2, the at least one compensation capacitor includes a second compensation capacitor electrically connected between the first doping well and the second doping well; or when N is 3, the at least one compensation capacitor includes a third compensation capacitor electrically connected between the second doping well and the first reference potential.
- the transistor includes a first doping well, a second doping well, a first doping area, a second doping area, a gate area, and at least one compensation capacitor.
- the first doping well is formed in a structure layer.
- the second doping well is formed in the structure layer, and the second doping well is formed between the first doping well and the structure layer.
- the first doping area is formed in the first doping well.
- the second doping area is formed in the first doping well, wherein the first doping area, the second doping area, and the second doping well have a first conductivity type, and the first doping well has a second conductivity type.
- the gate area is used for making a channel be formed between the first doping area and the second doping area.
- the at least one compensation capacitor is electrically connected between the first doping well and the second doping well, or the second doping well and a first reference potential.
- FIG. 1 is a diagram illustrating a transistor for increasing a range of a swing of a signal according to a first embodiment of the present invention.
- FIG. 2 is a diagram illustrating a circuit structure corresponding to FIG. 1 .
- FIG. 3 is a diagram illustrating the first voltage swing being equal to the difference between the first threshold and the first reverse bias, the second voltage swing being equal to the difference between the second threshold and the second reverse bias, and the third voltage swing being equal to the difference between the third threshold and the third reverse bias.
- FIG. 4 is a diagram illustrating a transistor for increasing a range of a swing of a signal according to a second embodiment of the present invention.
- FIG. 5 is a diagram illustrating the transistor including the first compensation capacitor.
- FIG. 6 is a diagram illustrating the transistor including the second compensation capacitor.
- FIG. 7 is a diagram illustrating the transistor including the third compensation capacitor.
- FIG. 8 is a diagram illustrating a circuit structure corresponding to FIG. 4 .
- FIG. 9 is a diagram illustrating a transistor 600 for increasing a range of a swing of a signal according to a third embodiment of the present invention.
- FIG. 10 is a diagram illustrating the transistor including the fourth compensation capacitor.
- FIG. 1 is a diagram illustrating a transistor 100 for increasing a range of a swing of a signal according to a first embodiment of the present invention.
- the transistor 100 includes a first doping well 102 , a second doping well 104 , a structure layer 106 , a first doping area 108 , a second doping area 110 , a gate area 112 , a first light doping area 114 , a second light doping area 116 , and a third doping area 118 , wherein the structure layer 106 includes a substrate, and the structure layer 106 is used for receiving a first reference potential (e.g. ground GND).
- a first reference potential e.g. ground GND
- the first doping area 108 can be a source of the transistor 100 and the second doping area 110 can be a drain of the transistor 100 , or the first doping area 108 can be the drain of the transistor 100 and the second doping area 110 can be the source of the transistor 100 .
- the first doping well 102 and the second doping well 104 are formed in the structure layer 106 , and the second doping well 104 is formed between the first doping well 102 and the structure layer 106 . For example, as shown in FIG.
- the first doping well 102 is formed in the second doping well 104 ; and the first doping area 108 , the second doping area 110 , the first light doping area 114 , and the second light doping area 116 are formed in the first doping well 102 , wherein the first doping area 108 is used for transmitting a signal SI.
- the first light doping area 114 is formed in a side of the first doping area 108 (wherein the side of the first doping area 108 is near the gate area 112 ), and the second light doping area 116 is formed in a side of the second doping area 110 (wherein the side of the second doping area 110 is near the gate area 112 ).
- the third doping area 118 is formed in the structure layer 106 for surrounding the first doping area 108 and the second doping area 110 , and electrically connected to the second doping well 104 , wherein the first doping area 108 , the second doping area 110 , the first light doping area 114 , the second light doping area 116 , the second doping well 104 , and the third doping area 118 have a first conductivity type, and the first doping well 102 and the structure layer 106 have a second conductivity type.
- the first conductivity type could be an N-type conductivity type
- the second conductivity type could be a P-type conductivity type.
- the first conductivity type could be a P-type conductivity type
- the second conductivity type could be an N-type conductivity type.
- doping concentrations of the first light doping area 114 and the second light doping area 116 are less than doping concentrations of the first doping area 108 and the second doping area 110 , wherein the first light doping area 114 and the second light doping area 116 is used for preventing from a short channel effect existing between the first doping area 108 and the second doping area 110 .
- a first parasitic junction capacitor 120 and a first parasitic diode 121 exist between the first doping area 108 and the first doping well 102
- a second parasitic junction capacitor 122 and a second parasitic diode 123 exist between the first doping well 102 and the second doping well 104
- a third parasitic junction capacitor 124 and a third parasitic diode 125 exist between the second doping well 104 and the structure layer 106
- the transistor 100 can be a complementary metal-oxide-semiconductor (CMOS) transistor (but the present invention is not limited to the transistor 100 being a CMOS transistor)
- a capacitance value of the first parasitic junction capacitor 120 is greater than a capacitance value of the second parasitic junction capacitor 122
- the capacitance value of the second parasitic junction capacitor 122 is greater than a capacitance value of the third parasitic junction capacitor 124 .
- CMOS complementary metal-oxide-semiconductor
- the capacitance value of the first parasitic junction capacitor 120 and a first threshold VTH 1 of the first parasitic diode 121 are determined by a cross-sectional area and the doping concentration of the first doping area 108 , and a cross-sectional area and a doping concentrations of the first doping well 102 ;
- the capacitance value of the second parasitic junction capacitor 122 and a second threshold VTH 2 of the second parasitic diode 123 are determined by the cross-sectional area and the doping concentrations of the first doping well 102 , and a cross-sectional area and a doping concentration of the second doping well 104 ;
- the capacitance value of the third parasitic junction capacitor 124 and a third threshold VTH 3 of the third parasitic diode 125 are determined by the cross-sectional area and the doping concentration of the second doping well 104 , and a cross-sectional area and a doping concentration of the structure layer 106 .
- a sum of a voltage drop of the first parasitic junction capacitor 120 , a voltage drop of the second parasitic junction capacitor 122 , and a voltage drop of the third parasitic junction capacitor 124 is substantially equal to a swing of the signal SI.
- the capacitance value of the first parasitic junction capacitor 120 is greater than the capacitance value of the second parasitic junction capacitor 122
- the capacitance value of the second parasitic junction capacitor 122 is greater than the capacitance value of the third parasitic junction capacitor 124
- the voltage drop of the third parasitic junction capacitor 124 is greater than the voltage drop of the first parasitic junction capacitor 120 and the voltage drop of the second parasitic junction capacitor 122 . Therefore, in the embodiment of FIG. 1 , when the first doping area 108 transmits the signal SI, the gate area 112 can receive a proper voltage VG to make a channel 113 be formed between the first doping area 108 and the second doping area 110 to turn on the transistor 100 , the first doping well 102 receives a first voltage VNEG, and the second doping well 104 receives a second voltage VPEG through the third doping area 118 , wherein a voltage polarity of the first voltage VNEG is opposite to a voltage polarity of the second voltage VPEG, and a voltage VS applied to the first doping area 108 and a voltage VD applied to the second doping area 110 are approximately equal to 1 ⁇ 2 VG.
- the voltage VG is a positive voltage
- the first voltage VNEG is a negative voltage
- the second voltage VPEG is a positive voltage
- a circuit structure corresponding to FIG. 1 can be referred to FIG. 2 . As shown in FIG.
- the second voltage VPEG received by the second doping well 104 and the first reference potential e.g.
- a first voltage swing VSW 1 tolerable to the first parasitic diode 121 is equal to a difference between the first threshold VTH 1 and the first reverse bias VR 1 ;
- a second voltage swing VSW 2 tolerable to the second parasitic diode 123 is equal to a difference between the second threshold VTH 2 and the second reverse bias VR 2 ;
- the third reverse bias VR 3 is across the third parasitic diode 125 , a third voltage swing VSW 3 tolerable to the third parasitic diode 125 is equal to a difference between the third threshold VTH 3 and the third reverse bias VR 3 .
- the first reverse bias VR 1 , the second reverse bias VR 2 , and the third reverse bias VR 3 can increase the first voltage swing VSW 1 , the second voltage swing VSW 2 , and the third voltage swing VSW 3 respectively
- the first voltage VNEG received by the first doping well 102 and the second voltage VPEG received by the second doping well 104 can effectively prevent the first parasitic diode 121 , the second parasitic diode 123 , and the third parasitic diode 125 from being turned on when the first doping area 108 transmits the signal SI. That is, the transistor 100 can increase a range of the swing of the signal SI.
- FIG. 4 is a diagram illustrating a transistor 400 for increasing a range of a swing of a signal according to a second embodiment of the present invention.
- the transistor 400 further has a first compensation capacitor 126 , a second compensation capacitor 128 , a third compensation capacitor 130 , the first doping well 102 is electrically connected to a low reference potential VP, and the second doping well 104 is electrically connected to a high reference potential VN, wherein the first compensation capacitor 126 is electrically connected between the first doping area 108 and the first doping well 102 for compensating the first parasitic junction capacitor 120 ; the second compensation capacitor 128 is electrically connected between the first doping well 102 and the second doping well 104 for compensating the second parasitic junction capacitor 122 ; the third compensation capacitor 130 is electrically connected between the second doping well 104 and the first reference potential (e.g.
- the first compensation capacitor 126 , the second compensation capacitor 128 , and the third compensation capacitor 130 are capacitor devices, such as metal-insulator-metal (MIM) capacitors.
- the compensation capacitor could be a compensation capacitor device having equivalent capacitance value.
- a capacitance value of the first compensation capacitor 126 , a capacitance value of the second compensation capacitor 128 , and a capacitance value of the third compensation capacitor 130 are determined at least by the capacitance value of the first parasitic junction capacitor 120 , the capacitance value of the second parasitic junction capacitor 122 , and the capacitance value of the third parasitic junction capacitor 124 . That is, the capacitance value of the first compensation capacitor 126 can be determined according to equation (1):
- C j is the capacitance value of the first compensation capacitor 126
- ⁇ s is a dielectric constant
- N A is a receptor concentration of the first doping area 108 and the first doping well 102
- N D is a donor concentration of the first doping area 108 and the first doping well 102
- V bi is a built-in potential
- V R is an external voltage.
- the capacitance value of the second compensation capacitor 128 and the capacitance value of the third compensation capacitor 130 can be also determined according to equation (1), so further description thereof is omitted for simplicity.
- the capacitance value of the first compensation capacitor 126 , the capacitance value of the second compensation capacitor 128 , and the capacitance value of the third compensation capacitor 130 can be further determined by the swing of the signal SI. Because an inverse relationship exists between a voltage drop of a parasitic junction capacitor and a capacitance value of the parasitic junction capacitor, the first compensation capacitor 126 of the transistor 400 can be utilized to compensate the first parasitic junction capacitor 120 , utilize the second compensation capacitor 128 to compensate the second parasitic junction capacitor 122 , and utilize the third compensation capacitor 130 to compensate the third parasitic junction capacitor 124 to reduce differences between the voltage drop of the first parasitic junction capacitor 120 , the voltage drop of the second parasitic junction capacitor 122 , and the voltage drop of the third parasitic junction capacitor 124 .
- the first compensation capacitor 126 , the second compensation capacitor 128 , and the third compensation capacitor 130 of the transistor 400 can be utilized to compensate the first parasitic junction capacitor 120 , the second parasitic junction capacitor 122 , and the third parasitic junction capacitor 124 respectively, simultaneously adjust the voltage drop of the first parasitic junction capacitor 120 , the voltage drop of the second parasitic junction capacitor 122 , and the voltage drop of the third parasitic junction capacitor 124 distributed according to the signal SI, and reduce the differences between the voltage drop of the first parasitic junction capacitor 120 , the voltage drop of the second parasitic junction capacitor 122 , and the voltage drop of the third parasitic junction capacitor 124 to prevent the first parasitic diode 121 , the second parasitic diode 123 , and the third parasitic diode 125 from being turned on.
- the first compensation capacitor 126 , the second compensation capacitor 128 , and the third compensation capacitor 130 of the transistor 400 can be utilized to increase the range of the swing of the signal SI.
- the present invention is not limited to the transistor 400 simultaneously needing to have the first compensation capacitor 126 , the second compensation capacitor 128 , and the third compensation capacitor 130 . That is, a number of compensation capacitors of the transistor 400 can be adjusted according to the voltage drop of the first parasitic junction capacitor 120 , the voltage drop of the second parasitic junction capacitor 122 , and the voltage drop of the third parasitic junction capacitor 124 .
- the transistor 400 can only include at least one compensation capacitor or any two compensation capacitors of the first compensation capacitor 126 , the second compensation capacitor 128 , and the third compensation capacitor 130 to compensate at least one corresponding parasitic junction capacitor or any two corresponding parasitic junction capacitors, simultaneously adjust the voltage drop of the first parasitic junction capacitor 120 , the voltage drop of the second parasitic junction capacitor 122 , and the voltage drop of the third parasitic junction capacitor 124 , and reduce the differences between the voltage drop of the first parasitic junction capacitor 120 , the voltage drop of the second parasitic junction capacitor 122 , and the voltage drop of the third parasitic junction capacitor 124 .
- FIGS. 5-7 Other embodiments of the present invention are shown in FIGS. 5-7 , wherein FIG.
- FIG. 5 is a diagram illustrating the transistor 400 including the first compensation capacitor 126
- FIG. 6 is a diagram illustrating the transistor 400 including the second compensation capacitor 128
- FIG. 7 is a diagram illustrating the transistor 400 including the third compensation capacitor 130 .
- a circuit structure corresponding to FIG. 4 can be referred to FIG. 8 .
- At least one of the first compensation capacitor 126 , the second compensation capacitor 128 , and the third compensation capacitor 130 is used for making at least two of a sum of the capacitance value of the first parasitic junction capacitor 120 and the capacitance value of the first compensation capacitor 126 , a sum of the capacitance value of the second parasitic junction capacitor 122 and the capacitance value of the second compensation capacitor 128 , and a sum of the capacitance value of the third parasitic junction capacitor 124 and the capacitance value of the third compensation capacitor 130 be substantially equal to each other.
- the capacitance value of the first parasitic junction capacitor 120 is greater than the capacitance value of the second parasitic junction capacitor 122 , and the capacitance value of the second parasitic junction capacitor 122 is greater than the capacitance value of the third parasitic junction capacitor 124 , the first parasitic junction capacitor 120 is not compensated, the sum of the capacitance value of the second parasitic junction capacitor 122 and the capacitance value of the second compensation capacitor 128 is substantially equal to the capacitance value of the first parasitic junction capacitor 120 , and the sum of the capacitance value of the third parasitic junction capacitor 124 and the capacitance value of the third compensation capacitor 130 is also substantially equal to the capacitance value of the first parasitic junction capacitor 120 .
- the capacitance value of the second compensation capacitor 128 compensates the capacitance value of the second parasitic junction capacitor 122 and the third compensation capacitor 130 compensates the capacitance value of the third parasitic junction capacitor 124 to make the sum of the capacitance value of the second parasitic junction capacitor 122 and the capacitance value of the second compensation capacitor 128 and the sum of the capacitance value of the third parasitic junction capacitor 124 and the capacitance value of the third compensation capacitor 130 be substantially equal to the capacitance value of the first parasitic junction capacitor 120 .
- a capacitance value of an N th compensation capacitor corresponding to the N th parasitic junction capacitor is substantially equal to a difference between the capacitance value of the M th parasitic junction capacitor and the capacitance value of the N th parasitic junction capacitor.
- the capacitance value of the first compensation capacitor 126 is substantially equal to a difference between the capacitance value of the M th parasitic junction capacitor and the capacitance value of the first parasitic junction capacitor 120 ; when N is 2, the capacitance value of the second compensation capacitor 128 is substantially equal to a difference between the capacitance value of the M th parasitic junction capacitor and the capacitance value of the second parasitic junction capacitor 122 ; when N is 3, the capacitance value of the third compensation capacitor 130 is substantially equal to a difference between the capacitance value of the M th parasitic junction capacitor and the capacitance value of the third parasitic junction capacitor 124 .
- the capacitance value of the first compensation capacitor 126 corresponding to the first parasitic junction capacitor 120 is substantially equal to a difference (X-Y) between the capacitance value X of the third parasitic junction capacitor 124 and the capacitance value Y of the first parasitic junction capacitor 120 .
- the N th compensation capacitor is not limited to being a physically single capacitor, that is, the N th compensation capacitor can also be an N th compensation capacitor device composed of one electronic device or a plurality of electronic devices connected to each other, wherein as long as a capacitance value of the N th compensation capacitor is substantially equal to an equivalent capacitance value of the N th compensation capacitor device.
- FIG. 9 is a diagram illustrating a transistor 600 for increasing a range of a swing of a signal according to a third embodiment of the present invention.
- the structure layer 106 of the transistor 600 further includes a third doping well 132
- the transistor 600 further has a fourth compensation capacitor 134 .
- a fourth parasitic junction capacitor 136 and a fourth parasitic diode 137 exist between the third doping well 132 and the structure layer 106
- the third doping well 132 is formed in the substrate and between the second doping well 104 and the substrate.
- the second doping well 104 is formed in the third doping well 132 , wherein the third doping well 132 has the second conductivity type, a second reference potential VFREF is electrically connected to the third doping well 132 , the first reference potential (e.g. the ground GND) is electrically connected to the structure layer 106 , the fourth compensation capacitor 134 is electrically connected between the third doping well 132 and the first reference potential, and the fourth compensation capacitor 134 is used for compensating the fourth parasitic junction capacitor 136 .
- VFREF is electrically connected to the third doping well 132
- the first reference potential e.g. the ground GND
- the fourth compensation capacitor 134 is electrically connected between the third doping well 132 and the first reference potential
- the fourth compensation capacitor 134 is used for compensating the fourth parasitic junction capacitor 136 .
- the transistor 600 has the fourth compensation capacitor 134 , the capacitance value of the first compensation capacitor 126 , the capacitance value of the second compensation capacitor 128 , the capacitance value of the third compensation capacitor 130 , and a capacitance value of the fourth compensation capacitor 134 are determined at least by the capacitance value of the first parasitic junction capacitor 120 , the capacitance value of the second parasitic junction capacitor 122 , the capacitance value of the third parasitic junction capacitor 124 , and a capacitance value of the fourth parasitic junction capacitor 136 .
- the capacitance value of the first compensation capacitor 126 , the capacitance value of the second compensation capacitor 128 , the capacitance value of the third compensation capacitor 130 , and the capacitance value of the fourth compensation capacitor 134 are further additionally determined according to the swing of the signal SI. That is, when the first doping area 108 transmits the signal SI, the first compensation capacitor 126 , the second compensation capacitor 128 , the third compensation capacitor 130 , and the fourth compensation capacitor 134 of the transistor 600 can be utilized to compensate the first parasitic junction capacitor 120 , the second parasitic junction capacitor 122 , the third parasitic junction capacitor 124 , and the fourth parasitic junction capacitor 136 respectively.
- the first compensation capacitor 126 , the second compensation capacitor 128 , the third compensation capacitor 130 , and the fourth compensation capacitor 134 can also simultaneously adjust the voltage drop of the first parasitic junction capacitor 120 , the voltage drop of the second parasitic junction capacitor 122 , the voltage drop of the third parasitic junction capacitor 124 , and a voltage drop of the fourth parasitic junction capacitor 136 distributed according to the signal SI.
- the first compensation capacitor 126 , the second compensation capacitor 128 , the third compensation capacitor 130 , and the fourth compensation capacitor 134 can also reduce the differences between the voltage drop of the first parasitic junction capacitor 120 , the voltage drop of the second parasitic junction capacitor 122 , the voltage drop of the third parasitic junction capacitor 124 , and the voltage drop of the fourth parasitic junction capacitor 136 to prevent the first parasitic diode 121 , the second parasitic diode 123 , the third parasitic diode 125 , and the fourth parasitic diode 137 from being turned on.
- the present invention is not limited to the transistor 600 simultaneously needing to have the first compensation capacitor 126 , the second compensation capacitor 128 , the third compensation capacitor 130 , and the fourth compensation capacitor 134 . That is, a number of compensation capacitors of the transistor 600 can be adjusted according to the voltage drop of the first parasitic junction capacitor 120 , the voltage drop of the second parasitic junction capacitor 122 , the voltage drop of the third parasitic junction capacitor 124 , and the voltage drop of the fourth parasitic junction capacitor 136 .
- the transistor 600 can only include at least one compensation capacitor or any two compensation capacitors of the first compensation capacitor 126 , the second compensation capacitor 128 , the third compensation capacitor 130 , and the fourth compensation capacitor 134 to compensate at least one corresponding parasitic junction capacitor or any two corresponding parasitic junction capacitors; the transistor 600 can only include the above mentioned at least one compensation capacitor or any two compensation capacitors to simultaneously adjust the voltage drop of the first parasitic junction capacitor 120 , the voltage drop of the second parasitic junction capacitor 122 , the voltage drop of the third parasitic junction capacitor 124 , and the voltage drop of the fourth parasitic junction capacitor 136 ; and the transistor 600 can only include the above mentioned at least one compensation capacitor or any two compensation capacitors to reduce the differences between the voltage drop of the first parasitic junction capacitor 120 , the voltage drop of the second parasitic junction capacitor 122 , the voltage drop of the third parasitic junction capacitor 124 , and the voltage drop of the fourth parasitic junction capacitor 136 .
- Another embodiment of the transistor 600 is shown in FIG. 10 ,
- embodiments of the present invention can also further include a fourth doping well and a fifth compensation capacitor, a fifth doping well and a sixth compensation capacitor, a sixth doping well and a seventh compensation capacitor, and so on. Relationships between the above mentioned doping wells and compensation capacitors described by a parameter I are shown as follows:
- the transistor 600 can further include an I th doping well, the I th doping well formed between an (I ⁇ 1) th doping well and the substrate, wherein the I th doping well has a conductivity type different from a conductivity type of the (I ⁇ 1) th doping well, an (I ⁇ 1) th reference potential is electrically connected to the I th doping well, an (I+1) th parasitic junction capacitor exists between the I th doping well and the structure layer 106 , and a capacitance value of the at least one compensation capacitor is determined at least by the capacitance value of the first parasitic junction capacitor 120 , the capacitance value of the second parasitic junction capacitor 122 , the capacitance value of the third parasitic junction capacitor 124 , the capacitance value of the fourth parasitic junction capacitor 136 , and a capacitance value of the (I+1) th parasitic junction capacitor.
- the at least one compensation capacitor includes an (I+1) th compensation capacitor electrically connected between the I th doping well and the (I ⁇ 1) th reference potential, wherein the (I+1) th compensation capacitor is used for compensating the (I+1) th parasitic junction capacitor, and I is an integer greater than or equal to 4, or can be also an integer group (wherein integers included in the integer group are consecutive, and greater than or equal to 4).
- I is an integer greater than or equal to 4
- the transistor 600 can further include a fourth doping well and a fifth compensation capacitor; when I is an integer group including 4, 5, the transistor 600 can further include the fourth doping well and the fifth compensation capacitor, a fifth doping well and a sixth compensation capacitor, and so on.
- the fourth parasitic junction capacitor 136 has a minimum capacitance value
- another one (an M th parasitic junction capacitor) of the first parasitic junction capacitor 120 , the second parasitic junction capacitor 122 , the third parasitic junction capacitor 124 , the fourth parasitic junction capacitor 136 has a capacitance value (e.g.
- a capacitance value of an N th compensation capacitor corresponding to the N th parasitic junction capacitor is substantially equal to a difference between the capacitance value of the M th parasitic junction capacitor and the capacitance value of the N th parasitic junction capacitor.
- the N th compensation capacitor is not limited to a physically single capacitor, can also be an N th compensation capacitor device formed by one electrical device or a plurality electrical devices connected to each other, wherein an equivalent capacitance value of the N th compensation capacitor is substantially equal to an equivalent capacitance value of the N th compensation capacitor device.
- the embodiment of the present invention when the transistor transmits the signal, applies different predetermined voltages to different doping wells respectively to increase a reverse bias across each parasitic junction diode, or utilizes the at least one compensation capacitor to compensate at least one parasitic junction capacitor to make voltage drop differences between at least one parasitic junction capacitor be reduced, so compared to the prior art, the embodiments of the present invention can increase the range of the swing of the signal.
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Abstract
Description
Claims (22)
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Application Number | Priority Date | Filing Date | Title |
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TW105129675A TWI595653B (en) | 2016-09-13 | 2016-09-13 | Transistor for increasing a range of a swing of a signal |
TW105129675A | 2016-09-13 | ||
TW105129675 | 2016-09-13 |
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US11515434B2 (en) * | 2019-09-17 | 2022-11-29 | Taiwan Semiconductor Manufacturing Company, Ltd. | Decoupling capacitor and method of making the same |
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US20180076194A1 (en) | 2018-03-15 |
TW201810661A (en) | 2018-03-16 |
TWI595653B (en) | 2017-08-11 |
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