US10177952B1 - Distributed processing software based modem - Google Patents
Distributed processing software based modem Download PDFInfo
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- US10177952B1 US10177952B1 US15/782,651 US201715782651A US10177952B1 US 10177952 B1 US10177952 B1 US 10177952B1 US 201715782651 A US201715782651 A US 201715782651A US 10177952 B1 US10177952 B1 US 10177952B1
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/0003—Software-defined radio [SDR] systems, i.e. systems wherein components typically implemented in hardware, e.g. filters or modulators/demodulators, are implented using software, e.g. by involving an AD or DA conversion stage such that at least part of the signal processing is performed in the digital domain
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/26—Systems using multi-frequency codes
- H04L27/2601—Multicarrier modulation systems
- H04L27/2647—Arrangements specific to the receiver only
- H04L27/2649—Demodulators
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/0002—Modulated-carrier systems analog front ends; means for connecting modulators, demodulators or transceivers to a transmission line
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L41/00—Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
- H04L41/04—Network management architectures or arrangements
- H04L41/044—Network management architectures or arrangements comprising hierarchical management structures
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L67/00—Network arrangements or protocols for supporting network services or applications
- H04L67/01—Protocols
- H04L67/10—Protocols in which an application is distributed across nodes in the network
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L67/00—Network arrangements or protocols for supporting network services or applications
- H04L67/01—Protocols
- H04L67/10—Protocols in which an application is distributed across nodes in the network
- H04L67/1001—Protocols in which an application is distributed across nodes in the network for accessing one among a plurality of replicated servers
- H04L67/1031—Controlling of the operation of servers by a load balancer, e.g. adding or removing servers that serve requests
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/0012—Modulated-carrier systems arrangements for identifying the type of modulation
Definitions
- a purpose built device known as a modulator/demodulator or as commonly known as a “modem” is utilized to accept user information, modulate the user data into a format known as a waveform and transmit over a medium.
- a modem contains the ability to receive a modulated waveform and demodulate the waveform to the original user data at the receiving end.
- the combined collection of a modulator, transmission medium, and demodulator is known in the art as a communications path.
- a modem is a purpose built device using specialized parts with specialized software and/or firmware to create a modem.
- SDM software defined modem
- PCB printed circuit board
- the described invention uses an “all software” approach for the creation of a modem within the distributed computing fabric known as “cloud computing” that is supported with commercial off the shelf (COTS) hardware know as High Performance Computing (HPC) servers.
- HPC High Performance Computing
- the HPC architectures are now being supported by the distributed processing companies such as Amazon Web Services (AWS), Google Cloud Computing, Microsoft's Azure, etc.
- the architectures being supported by the cloud computing companies are also known to support or enable software defined networking (SDN).
- SDN software defined networking
- This disclosure relates to methods of describing a modulator and/or demodulator (modem) that is created using a high-level programming language such as OpenCL, C, C++, etc. and implementing the high-level programming language as an application on a cloud-based HPC platform within a distributed computing architecture.
- the described methods provide the description of how an all software modem can be created using a high-level computing language, and supported in a cloud-based architecture for the creation of a communications waveform using an all-digital computing device.
- the described method can be utilized to provide similar or higher performance in every aspect of a hardware or dedicated (purpose built) modem or a software defined modem (SDM) using the processing resources available within a cloud-based processing architecture.
- SDM software defined modem
- the described approach can perform the waveform processing in real time.
- a typical communications modem that supports a communications link for satellite, tactical radio, or terrestrial communications is comprised of a user data interface and accepts user data in the form of a digital stream utilizing various synchronous and asynchronous formats and protocols.
- the modulator portion of the modem accepts the user data and performs the process of modulating the data into a signal that is suitable for the transmission medium.
- the actual process of the transformation from the user data to the modulated signal is carried out by a purpose-built piece of hardware consisting of discrete components, logic devices, and low-level programming language to provide the directives for the hardware to accomplish the steps required to create the final waveform to be transmitted over the transmission medium.
- the demodulator portion of the modem performs the reverse process—again, all carried out by a purpose built piece of hardware consisting of discrete components, logic devices, and low-level programming language to provide the directives for the hardware to accomplish the steps required to accept a waveform over the transmission medium and perform the steps to return the user data.
- the present disclosure covers how the steps required to accomplish the modulation of user data in the form of Ethernet frames and IP packets may be accomplish in an all-digital cloud computing environment using COTS processing hardware without the need of any purpose-built hardware.
- the entire modulation and demodulation process that comprises a modem may be accomplished in an all software modem using cloud computing fabric that would be used for a SDN network.
- This disclosure relates to, but is not limited to, providing an all-digital software only modem using the resources distributed processing resources of cloud computing.
- a typical communications modem that supports a communications link for satellite, tactical radio, or terrestrial link is comprised of a network user interface and accepts user data in the form of a digital stream utilizing various synchronous and asynchronous protocols.
- the modulator portion of the modem accepts the user data and performs the process of modulating the data into a format that is suitable for the transmission medium.
- the actual process of the transformation from the user data to the modulated stream is carried out by a purpose-built piece of hardware consisting of discrete components, logic devices, and low-level programming language to provide the directives for the hardware to accomplish the steps required to create the final waveform to be transmitted over the transmission medium.
- the demodulator portion of the modem performs the reverse process—again, all carried out by a purpose-built piece of hardware consisting of discrete components, logic devices, and low-level programming language to provide the directives for the hardware to accomplish the steps required to accept a waveform over the transmission medium and perform the steps to return the user data back to the digital stream.
- the disclosed invention uses the described techniques and results in one or more descriptions to support the creation and manipulation of an all software digital modem using the distributed nature of the cloud computing fabric using the resources available today and planned for the future.
- the cloud computing fabric is also utilized to provide resources for software defined networking.
- Particular implementations described herein are and may use, but is not limited to programs, computer programming languages, microprocessors, Application Specific Integrated Circuits (ASICs), Field Programmable Gate Arrays (FPGAs), and combinations of CPUs and FPGAs to form High Performance Computing (HPC) servers.
- ASICs Application Specific Integrated Circuits
- FPGAs Field Programmable Gate Arrays
- HPC High Performance Computing
- aspects of this disclosure relate to a method and system for creating an all software digital modem using the distributed processing resources of cloud computing.
- FIG. 1 shows the prior art using purpose built modulator and demodulator hardware for supporting a waveform.
- FIG. 2 shows the prior art using purpose built combination modulator and demodulator (modem) hardware for supporting a waveform.
- FIG. 3 shows the prior art of a modem's components to support the modulation and demodulation capabilities with purpose built hardware.
- FIG. 4 shows the cloud computing fabric containing servers (processors), storage, applications, etc.
- FIG. 5 shows the next generation HPC server technology containing a CPU/GPU and hardware acceleration card.
- FIG. 6 shows the described invention with all modem processes (PROC 1 , PROC 2 , and PROC 3 ) being supported by a single cloud computing server.
- FIG. 7 shows the described invention with all modem processes (PROC 1 , PROC 2 , and PROC 3 ) being supported by a multiple cloud computing server lower left (PROC 1 ), lower center server (PROC 2 ), and lower right server (PROC 3 ).
- FIG. 8 shows the described invention with all modem processes (PROC 1 , PROC 2 , PROC 3 , and PROCn) being supported by a single cloud computing server and passed to an edge device for converting the digital stream of modulated signal created in the cloud computing environment passed to an edge processing device.
- FIG. 9 shows the described invention with all modem processes (PROC 1 , PROC 2 , and PROC 3 ) being supported by a multiple cloud computing server lower left (PROC 1 ), lower center server (PROC 2 ), and lower right server (PROC 3 ), and several applications/processes being supported on other servers for PROC 4 and PROC 5 ) and passed to an edge device for converting the digital stream of modulated signal created in the cloud computing environment for transmission over the medium.
- all modem processes PROC 1 , PROC 2 , and PROC 3
- FIG. 9 shows the described invention with all modem processes (PROC 1 , PROC 2 , and PROC 3 ) being supported by a multiple cloud computing server lower left (PROC 1 ), lower center server (PROC 2 ), and lower right server (PROC 3 ), and several applications/processes being supported on other servers for PROC 4 and PROC 5 ) and passed to an edge device for converting the digital stream of modulated signal created in the cloud computing environment for transmission over the medium.
- FIG. 10 shows the described invention with all modem processes (PROC 1 to PROC 5 for the forward return path) being supported by a multiple cloud computing servers with flows between each of the processes residing on multiple servers distributed throughout the cloud.
- FIG. 11 shows the described invention with all modem processes (PROC 1 to PROC 5 for the forward path and PROCA to PROCC for the return path) being supported by multiple cloud computing servers with flows between each of the processes residing on multiple servers distributed throughout the cloud.
- FIG. 1 illustrates the prior art of a particular implementation of a communications transmission system wherein the forward path (transmitting station to a receiving station) where transmit station contains a transmit modulator and the receiver contains a receiving demodulator.
- the modem in the prior art is a purpose-built device, typically a dedicated “box” that transmits and is called a modulator.
- the modulator outputs either an intermediate frequency (IF) that may be unconverted to a radio frequency (RF) or directly output from the modulator as a radio frequency, possibly power amplified, and transmitted through free-space, to an airborne, or satellite repeating relay.
- the receive modem in the prior art is a purpose-built device, typically a dedicated “box” that receives and is called a demodulator.
- the demodulator receives (inputs) either an intermediate frequency (IF) that may be down converted from a radio frequency (RF) or directly input from the receive antenna as a radio frequency signal.
- FIG. 2 Is an alternate embodiment, of the prior art where the modulator and demodulator are combined in a single device known as a modulator/demodulator also known as a modem.
- a modulator/demodulator also known as a modem.
- each station may contain a modem that provides both transmit and receive capability, modulation and demodulation, respectively.
- the modem at each station may provide a full-duplex communications path.
- FIG. 3 shows the prior art with each component of a purpose-built modem using specialized hardware that comprises both the transmit or modulation path, and the receive or demodulation path.
- the individual processing modules as specialized hardware devices and processing modules written in a low-level specialized hardware description language (HDL) is shown.
- the top row of boxes show the various stages that are required to accept user data which is in many cases, but not limited to Ethernet (frames) and IP (packets).
- the user data is then accepted as bytes of data into an Application Specific Integrated Circuit (ASIC), FPGA using a HDL language, where it is framed into a suitable transport frame with header information (control bytes, sequence number, type information, etc.) and error checking is added.
- ASIC Application Specific Integrated Circuit
- FPGA Forward Error Correction
- this function is a dedicated hardware device or an ASIC.
- the data is then taken from a parallel format to a serial format by a firmware function such as an ASIC or FPGA using a HDL language.
- the next section accepts the serial data stream and then performs the mapping of the bits into symbols to create a waveform constellation as modulated data.
- the modulated data is then filtered (pulse shaped) with a digital filter implemented in an ASIC or FPGA using a HDL language.
- the output then flows to a Digital to Analog Converter (DAC) or to a digital output stream to another stage of processing via Ethernet (frames) and IP (packets).
- DAC Digital to Analog Converter
- IP packets
- the receive (demodulation) chain performs the reverse functionality as the transmit (modulation) chain.
- ADC Analog to Digital Converter
- the input on the bottom row, right side show the first step is to perform gain control and is performed by a hardware device to add amplification or attenuation.
- the next step is to perform the demodulation of the incoming stream into de-mapped data bits. This step is performed by an ASIC or FPGA using a HDL language.
- the next step is to pass the stream to a FEC decoder.
- FEC decoding is a hardware intensive function and it typically carried out by an ASIC or FPGA using a HDL language.
- the next step is to verify the integrity of the data via error checking and is performed by an ASIC, FPGA using a HDL language, or a system processor.
- the next step is to de-frame the frames and remove any control and error checking overhead bits and pass to the user the recovered digital stream.
- the entire configuration of the modem is controlled by a system controller.
- the system processor is a dedicated hardware device that controls the entire modem.
- the system controller (control processor) manages the entire unit's health, status, configuration, setup, error checking and in many cases performs the user interface.
- FIG. 3 can also be used to describe a new technique called Software Defined Modem (SDM) or Software Defined Radio (SDR). Similar to a dedicated modem, the SDR technology supported by GNU Radio and companies such as Ettus Research, these are dedicated hardware boards that are purpose built to support many types of waveforms, but ultimately rely on a dedicated/purpose built piece of processing hardware to support waveform processing.
- SDM Software Defined Modem
- SDR Software Defined Radio
- FIG. 4 shows the high-level representation of cloud computing environment. As shown, the cloud computing or distributed processing architecture has moved all processing, applications, and storage into the cloud. Companies such as Amazon Web Services (AWS), Microsoft Azure, Google Cloud Computing, etc. are developing massive infrastructures as depicted in FIG. 4 , and is commonly called a SDN.
- AWS Amazon Web Services
- Azure Microsoft Azure
- Google Cloud Computing etc. are developing massive infrastructures as depicted in FIG. 4 , and is commonly called a SDN.
- FIG. 5 shows the next generation server/processor architecture.
- the cloud computing providers are adding hardware assisted modules to their servers, e.g. Amazon Web Services F1 architecture as well Microsoft's Azure.
- These new HPC architectures with hardware assist now offer the hardware acceleration capabilities to support real-time high-speed processing for SDN environments.
- OpenCL a new computing language has been introduced called OpenCL. OpenCL has been introduced to allow the code to be written in a high level of abstraction that is hardware agnostic, and can take advantage of hardware acceleration technology in servers in a distributed computing environment.
- OpenCL has been introduced to allow the code to be written in a high level of abstraction that is hardware agnostic, and can take advantage of hardware acceleration technology in servers in a distributed computing environment.
- the described invention uses OpenCL, but any high-level language capable of supporting the combined processing of a CPU/GPU with hardware assistance would be covered by covered by the described invention.
- FIG. 6 shows the novelty of the invention where all processes that are supported by purpose built software, firmware, FPGA HDL firmware, and an ASIC are being supported entirely by a the HPC server inside the cloud computing environment.
- the processes shown on FIG. 6 PROC 1 , PROC 2 , and PROC 3 are representations of the various modem processes. It should be noted the PROC 1 , PROC 2 , PROC 3 , . . . PROCn (processes and/or applications) are functional blocks or algorithms running on the CPU ( ⁇ 86) or any one of the hardware acceleration units, such as FPGA, GPU, or DSP, that combined constitute the implementation of a communications waveform. The functional blocks are targeted for particular HPC resource according to the performance profiling of the waveform, which identifies algorithms that need to be hardware accelerated to achieve performance comparable to purpose bunt hardware.
- the process representing the modem processes/applications are as follows:
- Ethernet frames
- IP packets
- PROC 1 application/process
- PROC 1 provides the framing into a suitable transport frame with header information (control bytes, sequence number, type information, etc.) and error checking is added.
- PROC 2 data is encoded with Forward Error Correction (FEC) information for bit error correction at the receiver.
- FEC Forward Error Correction
- This function replaces the dedicated hardware device or an ASIC and is entirely supported by a high-level software language (i.e. OpenCL) and by the HPC architecture.
- PROC 3 the data is then taken from a parallel format to a serial format.
- OpenCL high-level software language
- PROCn (where n is the nth order process of a multiple processing architecture) then accepts the serial data stream and then performs the mapping of the bits into symbols to create a waveform constellation as modulated data.
- PROCn+1 function replaces the digital filter implemented in an ASIC or FPGA using a HDL language and is entirely supported by a high-level software language (OpenCL) and is supported by the HPC architecture.
- OpenCL high-level software language
- FIG. 8 is an alternate embodiment, an edge device can be placed on the edge of the cloud computing architecture, and egresses to a conversation device where it is then converted from an entirely digital format to an analog format suitable for transmission.
- DAC Digital to Analog Converter
- FIG. 8 is an alternate embodiment, an edge device can be placed on the edge of the cloud computing architecture, and egresses to a conversation device where it is then converted from an entirely digital format to an analog format suitable for transmission.
- the receive (demodulation) chain performs the reverse functionality as the transmit (modulation) chain.
- the PROCn processes can be any function that is desired in any order for providing the various stages of waveform processing within the cloud computing environment.
- the receive section can operate with a previously digitized waveform from another source in the cloud computing environment.
- the input on the bottom row, right side shows the first step is to perform gain control and is performed by a hardware device to add amplification or attenuation. This function replaces the gain/attenuation control provided by a hardware device, and is replaced by an application/process by a high-level software language (OpenCL) and is supported by the HPC architecture.
- OpenCL high-level software language
- the next step is to perform the demodulation of the incoming stream into de-mapped data bits. This step is performed by an ASIC or FPGA using a HDL language, and is replaced by an application/process, a high-level software language (OpenCL) and is supported by the HPC architecture.
- the next step is to pass the stream to a FEC decoder.
- FEC decoding is a hardware intensive function and it typically carried out by an ASIC or FPGA using a HDL language, and is replaced by an application/process, a high-level software language (OpenCL) and is supported by the HPC architecture.
- the next step is to verify the integrity of the data via error checking and is performed by an ASIC, FPGA using a HDL language, or a system processor, and is replaced by an application/process, a high-level software language (OpenCL) and is supported by the HPC architecture.
- the next step is to de-frame the frames and remove any control and error checking overhead bits and pass to the user as digital stream, and is typically provided by an ASIC or FPGA using an HDL language or a system processor, and is replaced by an application/process, a high-level software language (OpenCL) and is supported by the HPC architecture.
- OpenCL high-level software language
- FIG. 8 shows an alternate embodiment, an edge device Analog to Digital Converter (ADC) has accepted an incoming analog waveform and digitized the signal or the signal was received over a digital stream such as Ethernet (frames) and IP (packets) before passing the digitized waveform into the cloud computing environment.
- ADC Analog to Digital Converter
- FIG. 7 shows an alternate embodiment where the processes may be supported by a separate processor (hardware or virtual) in them physical location or different location, using the same HPC architecture or different architecture, and same or different CPU architectures.
- FIG. 9 represents an edge device supporting the distributed processing of FIG. 7 . It is noteworthy, the architectures of FIGS. 4, 6, 7, 8, 9, 10, and 11 showing the processing of the waveform may be completely flexible.
- FIG. 10 shows the novelty of the invention where all processes are distributed throughout the cloud computing environment.
- Flow 1 represents the user network data entering the network containing the cloud computing architecture. It may be assumed user data is encapsulated as Ethernet (frames) and IP (packets).
- PROC 1 provides the framing into a suitable transport frame with header information (control bytes, sequence number, type information, etc.) and error checking is added.
- FIG. 10 shows the novelty of the invention where all processes are distributed throughout the cloud computing environment.
- Flow 1 represents the user network data entering the network containing the cloud computing architecture. It may be assumed user data is encapsulated as Ethernet (frames) and IP (packets).
- PROC 1 provides the framing into a suitable transport frame with header information (control bytes, sequence number, type information, etc.) and error checking is added.
- FIG. 10 shows the novelty of the invention where all processes are distributed throughout the cloud computing environment.
- Flow 1 represents the user network data entering the network containing the cloud computing architecture. It may
- Flow 2 directs the formatted network data from PROC 1 to process PROC 2 provides the Forward Error Correction (FEC) information for data recover at the distant end.
- FEC Forward Error Correction
- Flow 3 directs the waveform with FEC information from PROC 2 to process PROC 3 where the data is then taken from a parallel format to a serial format.
- Flow 4 directs the waveform data in serial format from PROC 3 to process PROC 4 then accepts the waveform data and then performs the mapping of the bits into symbols to create a waveform constellation as modulated data.
- Flow 5 directs the modulated data from PROC 4 to process PROC 5 then accepts the modulated data and then performs proper filtering and pulse shaping.
- Flow 6 directs the pulse shaped waveform data from PROC 5 to an edge device where it is accepted and transmitted to over an IF or RF radio link.
- Each of the processes PROC 1 to PROCn are shown as representations of the ability to process a waveform and is not meant to show the exact sequence or process how any one waveform would be processed.
- additional process such as encryption, decryption, and transport security (TRANSEC) may exist as a module that would be represented as an PROCn process.
- TRANSEC transport security
- the entire waveform creation, processing, manipulation, etc. that is traditionally supported by a purpose built device or a semi-purpose built hardware platform to support a software defined modem (SDM) or software defined radio (SDR) that relies on purpose or semi-purpose built hardware can be entirely replaced by a cloud computing application implemented in a high-level coding language such as, but not limited to OpenCL or starting with an ISO C99 high-level programming language such as C, C++, etc. and converting to OpenCL (or similar language).
- a purpose built modulator, demodulator, or modem can be created or represented as a high-level programming language and supported on a HPC server inside a cloud computing environment.
- the entire architecture may be supported as a 100% digital waveform representation that is supported by a single hardware server with all processes being brought to bear on the waveform to form a modulator, demodulator, modulator/demodulator (Modem) or passed server to server and a process (one or more) acts on the waveform as it traverses the cloud computing environment.
- the PROC 1 , PROC 2 , PROC 3 , PROCn are functional blocks or algorithms running on the CPU (x86) or any one of the hardware acceleration units, such as FPGA, GPU, or DSP, that combined constitute the implementation of a communications waveform.
- the functional blocks are targeted for particular HPC resource according to the performance profiling of the waveform, which identifies algorithms that need to be hardware accelerated to achieve real-time processing and performance comparable to purpose built hardware.
- the entire waveform creation, processing, manipulation, etc. that is traditionally supported by a purpose built device or a semi-purpose built hardware platform to support an SDM or SDR can be entirely replaced with a cloud computing application implemented in a high-level coding language such as, but not limited to OpenCL or starting with C, C++, etc. and converting to OpenCL (or similar language) and each processing function.
- a high-level coding language such as, but not limited to OpenCL or starting with C, C++, etc. and converting to OpenCL (or similar language) and each processing function.
- Any and all functions that could be supported by a propose built modulator, demodulator, or demodulator can be created or represented as a high-level programming language and supported on a HPC device inside a cloud computing environment.
- an edge device may be used to perform the conversion to and from an analog format.
- the resulting all-digital waveform would be converted from all-digital to an analog format by the edge device by a hardware device known as a Digital to Analog Convert (DAC).
- DAC Digital to Analog Convert
- ADC Analog to Digital Converter
- the interface between the final cloud computing module and the edge device requires a framing format that provides for ensuring the messages being sent between the cloud computing environment and the edge device are:
- a user requires data to be passed to an end satellite station.
- a flow is created to encapsulate the user data for transport over the network as Ethernet frames and/or IP packets to the data center.
- the IP cores processes
- All components that comprise a complete digital modem are established and initialized and digital sampled I/Q waveform data connection is established to a satellite teleport with all-digital I/Q capability.
- the end user of the required data is located at the end of a satellite link.
- a repeating relay satellite enables communications between the satellite teleport and end satellite receiving station.
- the all software digital modem (created by the cloud computing IP cores application/process) is enabled and a communications path is established to the end user and the data is transferred.
- a return path may be established from the end user satellite terminal where a communications path back from the remote satellite terminal, over the satellite, to the satellite earth station, and the digital I/Q waveform stream is received, demodulated, decoded, error checked, possibly decrypted, and passed to the original data user.
- a user requires data to be passed to an end tactical radio user.
- a flow is created to encapsulate and transport user data to the data center.
- the IP cores applications/processes
- All components that comprise a complete digital modem are established and initialized and digital I/Q waveform connection is established to a tactical radio base station with all-digital I/Q waveform capability.
- the end user of the required data is located at the end of tactical radio link.
- a line of site communications path allows communications between the base station and end radio user.
- the all software digital modem (created by the cloud computing IP cores applications/processes) is enabled and a communications path is established to the end user and the data is transferred.
- a return path may be established from the end user tactical radio where a communications path back from the remote tactical radio (hand held user), over free space, to the tactical radio base station, and the digital I/Q stream is received, demodulated, decoded, error checked, possibly decrypted, and passed to the original data user.
- a user requires data to be passed to an end satellite station.
- a flow is created to encapsulate and transport the user data as Ethernet frames and/or IP packets over the network to the data center.
- the IP cores applications/processes
- All components that comprise a complete digital modem are established and initialized and digital I/Q waveform data connection is established to an edge device supporting satellite communications via digital sampled I/Q data capability.
- the end user of the required data is located at the end of a satellite link.
- a repeating relay satellite enables communications between the edge device supporting satellite capabilities and end satellite receiving station.
- the all software digital modem (created by the cloud computing IP cores) is enabled and a communications path is established to the end user and the data is transferred.
- a return path may be established from the end user satellite terminal where a communications path back from the remote satellite terminal, over the satellite, to the edge device with satellite capabilities, and the digital I/Q stream is received, demodulated, decoded, error checked, possibly decrypted, and passed to the original data user.
- a user requires data to be passed to an end tactical radio user.
- a flow is created to encapsulate and transport the user data as Ethernet frames and/or IP packets over the network to the data center.
- the IP cores applications/processes
- All components that comprise a complete digital modem are established and initialized and digital I/Q waveform data connection is established to an edge device supporting a tactical radio with all-digital sampled I/Q capability.
- the end user of the required data is located at the end of tactical radio link.
- a line of site communications path allows communications between the edge device supporting tactical radio capabilities and end radio user.
- the all software digital modem (created by the cloud computing IP cores) is enabled and a communications path is established to the end user and the data is transferred.
- a return path may be established from the end user tactical radio where a communications path back from the remote tactical radio (hand held user), over free space, to the edge device supporting tactical radio capabilities, and the digital I/Q stream is received, demodulated, decoded, error checked, possibly decrypted, and passed to the original data user.
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Priority Applications (11)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US15/782,651 US10177952B1 (en) | 2017-06-22 | 2017-10-12 | Distributed processing software based modem |
JP2020520187A JP7096885B2 (ja) | 2017-06-22 | 2018-06-20 | ソフトウェアベースのクラウドコンピューティングモジュレータ/デモジュレータモデム |
CN201880042181.0A CN111052696A (zh) | 2017-06-22 | 2018-06-20 | 基于软件的云计算调制器/解调器即调制解调器 |
AU2018288793A AU2018288793A1 (en) | 2017-06-22 | 2018-06-20 | Software based cloud computing modulator/demodulator modem |
EP18820675.9A EP3643027B1 (en) | 2017-06-22 | 2018-06-20 | Software based cloud computing modulator/demodulator modem |
CA3067390A CA3067390C (en) | 2017-06-22 | 2018-06-20 | Software based cloud computing modem |
PCT/US2018/038397 WO2018236942A1 (en) | 2017-06-22 | 2018-06-20 | MODEMER / COMPUTER MODULATOR / COMPUTER CLOUD ON SOFTWARE |
US16/213,569 US10397038B2 (en) | 2017-06-22 | 2018-12-07 | High performance computing (HPC) based modulator/demodulator modem |
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JP2022024129A JP7130159B2 (ja) | 2017-06-22 | 2022-02-18 | ソフトウェアベースのクラウドコンピューティングモジュレータ/デモジュレータモデム |
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US10790920B2 (en) | 2018-12-21 | 2020-09-29 | Kratos Integral Holdings, Llc | System and method for processing signals using feed forward carrier and timing recovery |
US10841145B1 (en) | 2019-06-17 | 2020-11-17 | Envistacom, Llc | Multi-rotational waveform utilizing a plurality of transmission waveforms and transmission paths |
US11863284B2 (en) | 2021-05-24 | 2024-01-02 | Kratos Integral Holdings, Llc | Systems and methods for post-detect combining of a plurality of downlink signals representative of a communication signal |
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CN112584372B (zh) * | 2019-09-30 | 2022-05-03 | 深圳市优克联新技术有限公司 | 资源分配的方法、装置、电子设备及存储介质 |
WO2022174045A1 (en) * | 2021-02-12 | 2022-08-18 | Envistacom, Llc | Virtualized medium access ecosystem architecture and methods |
CN115174404B (zh) * | 2022-05-17 | 2024-06-21 | 南京大学 | 一种基于sdn组网的多设备联邦学习系统 |
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WO2018236942A1 (en) | 2018-12-27 |
JP2022065130A (ja) | 2022-04-26 |
JP7130159B2 (ja) | 2022-09-02 |
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IL271520A (en) | 2020-02-27 |
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CA3067390A1 (en) | 2018-12-27 |
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JP7096885B2 (ja) | 2022-07-06 |
CN111052696A (zh) | 2020-04-21 |
AU2018288793A1 (en) | 2020-01-16 |
US20180375709A1 (en) | 2018-12-27 |
US20190327122A1 (en) | 2019-10-24 |
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EP3643027B1 (en) | 2022-12-28 |
EP3643027A4 (en) | 2020-06-17 |
IL271520B (en) | 2020-08-31 |
CA3067390C (en) | 2021-06-01 |
US10397038B2 (en) | 2019-08-27 |
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