UA98770U - Shaper of periodic sequence of two pulse code series with programmable time parameters - Google Patents
Shaper of periodic sequence of two pulse code series with programmable time parametersInfo
- Publication number
- UA98770U UA98770U UAU201411402U UAU201411402U UA98770U UA 98770 U UA98770 U UA 98770U UA U201411402 U UAU201411402 U UA U201411402U UA U201411402 U UAU201411402 U UA U201411402U UA 98770 U UA98770 U UA 98770U
- Authority
- UA
- Ukraine
- Prior art keywords
- input
- output
- flip
- inputs
- flop
- Prior art date
Links
Landscapes
- Manipulation Of Pulses (AREA)
Abstract
Shaper of periodic sequence of two pulse code series with programmable time parameters includes: reversible binary counter adjusted to the mode subtraction, which has input supply pulse synchronization input adjustment on mode summation / subtraction, entry permit regime counting, entry permit simultaneous parallel downloads and inputs supply data entry asynchronous installation in zero state, the output overflow; D-trigger synchronous with asynchronous input settings in the zero state; inverter; the first and second elements OR; the first and second elements I; chain. Introduced: first and second JK-flip-flops with asynchronous input settings in the zero state; third and fourth elements And, with the release of the first JK-flip-flop is connected to the input mode permits counting meter, inverter input, the output of which is connected to the input of the fourth item I; counter overflow output connected to its input permission boot mode, the second input of the first element OR, the first inputs of the third and fourth elements I; inverted output of the second JK-flip-flop is connected to a second input and the third element, whose input is connected to the inverse inputs J and K of the second JK-flip-flop; direct access to the second JK-flip-flop is connected to the first input of the second OR element, the second input is connected to the output of the fourth item I; OR output of the second element, which forms the generator output, connected to the inverse inputs J and K of the first JK-flip-flop; JK- clock inputs of flip-flops is connected to the input shaper; asynchronous inputs settings in the zero state JK-flipflops connected to the output of the second element I.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| UAU201411402U UA98770U (en) | 2014-10-20 | 2014-10-20 | Shaper of periodic sequence of two pulse code series with programmable time parameters |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| UAU201411402U UA98770U (en) | 2014-10-20 | 2014-10-20 | Shaper of periodic sequence of two pulse code series with programmable time parameters |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| UA98770U true UA98770U (en) | 2015-05-12 |
Family
ID=53674635
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| UAU201411402U UA98770U (en) | 2014-10-20 | 2014-10-20 | Shaper of periodic sequence of two pulse code series with programmable time parameters |
Country Status (1)
| Country | Link |
|---|---|
| UA (1) | UA98770U (en) |
-
2014
- 2014-10-20 UA UAU201411402U patent/UA98770U/en unknown
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