UA94655C2 - Circular buffer based on rate matching - Google Patents
Circular buffer based on rate matchingInfo
- Publication number
- UA94655C2 UA94655C2 UAA200910812A UAA200910812A UA94655C2 UA 94655 C2 UA94655 C2 UA 94655C2 UA A200910812 A UAA200910812 A UA A200910812A UA A200910812 A UAA200910812 A UA A200910812A UA 94655 C2 UA94655 C2 UA 94655C2
- Authority
- UA
- Ukraine
- Prior art keywords
- bits
- parity
- circular buffer
- systematic
- randomized
- Prior art date
Links
Abstract
Systems and methodologies are described that facilitate employing circular buffer based rate matching. Encoded block(s) that include systematic, parity 1, and parity 2 bits can be generated using turbo code. Bit type can be identified to separate bits into distinct groups. Systematic bits can be interleaved together to generate a randomized sequence of systematic bits, parity 1 bits can be interleaved together to yield a randomized sequence of parity 1 bits, and parity 2 bits can be interleaved together to output a randomized sequence of parity 2 bits. The randomized sequences of parity 1 bits and parity 2 bits can be interlaced together in an alternating manner. The randomized sequence of systematic bits can be inserted into a circular buffer, and upon inserting the entire sequence, the interlaced parity bits can be inserted into the circular buffer (e.g., until reaching capacity). Bits inserted into the circular buffer are transmitted.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US90840207P | 2007-03-27 | 2007-03-27 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| UA94655C2 true UA94655C2 (en) | 2011-05-25 |
Family
ID=41615790
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| UAA200910812A UA94655C2 (en) | 2007-03-27 | 2008-03-27 | Circular buffer based on rate matching |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN101641896A (en) |
| UA (1) | UA94655C2 (en) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102244521A (en) * | 2010-05-11 | 2011-11-16 | 中国电子科技集团公司第三十六研究所 | Blind identification method for coding parameter of return-to-zero Turbo code |
| CN101895374B (en) | 2010-07-20 | 2012-09-05 | 华为技术有限公司 | Method and device for velocity matching |
| US9231893B2 (en) * | 2013-05-15 | 2016-01-05 | Mediatek Inc. | Processing circuits of telecommunications devices and related methods |
| KR102126404B1 (en) * | 2016-08-12 | 2020-06-24 | 텔레호낙티에볼라게트 엘엠 에릭슨(피유비엘) | Rate matching methods for LDPC codes |
| US10348329B2 (en) * | 2017-02-13 | 2019-07-09 | Qualcomm Incorporated | Low density parity check (LDPC) circular buffer rate matching |
| US11595982B2 (en) * | 2019-05-13 | 2023-02-28 | Qualcomm Incorporated | Intra-device collision handling |
| CN113807186A (en) * | 2021-08-18 | 2021-12-17 | 南京理工大学 | Radar target identification method based on multi-channel multiplexing convolutional neural network |
-
2008
- 2008-03-27 UA UAA200910812A patent/UA94655C2/en unknown
- 2008-03-27 CN CN200880009880A patent/CN101641896A/en active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| CN101641896A (en) | 2010-02-03 |
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