UA106260U - Generator of a single three-pulse code group with programmable gap between pulses in the group - Google Patents

Generator of a single three-pulse code group with programmable gap between pulses in the group

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Publication number
UA106260U
UA106260U UAU201509061U UAU201509061U UA106260U UA 106260 U UA106260 U UA 106260U UA U201509061 U UAU201509061 U UA U201509061U UA U201509061 U UAU201509061 U UA U201509061U UA 106260 U UA106260 U UA 106260U
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UA
Ukraine
Prior art keywords
input
pulses
group
generator
elements
Prior art date
Application number
UAU201509061U
Other languages
Russian (ru)
Ukrainian (uk)
Inventor
Микола Григорович Коробков
Олена Миколаївна Коробкова
Васілій Грігорьєвіч Рубанов
Вячеслав Сергійович Харченко
Original Assignee
Національний Аерокосмічний Університет Ім. М.Є. Жуковського "Харківський Авіаційний Інститут"
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by Національний Аерокосмічний Університет Ім. М.Є. Жуковського "Харківський Авіаційний Інститут" filed Critical Національний Аерокосмічний Університет Ім. М.Є. Жуковського "Харківський Авіаційний Інститут"
Priority to UAU201509061U priority Critical patent/UA106260U/en
Publication of UA106260U publication Critical patent/UA106260U/en

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Abstract

A generator of periodic sequence of three-pulse code groups with predefined number of pulses, programmable gap between pulses in a group contains two reversible binary counters, each of which has an input feed clock pulses, the input to the debug mode of addition/subtraction, the enable input synchronous parallel load and inlet flow data, the enable input of the counting mode, the input of asynchronous setting to zero state, the output of the overflow; the first and second elements OR, and inverter; chain, consisting of series-connected resistor and capacitor; a synchronous D-trigger with the input of asynchronous setting to zero state, the first and second two-input AND elements. Introduced: the third reversible binary counter which has an input feed clock pulses, the input to the debug mode of addition/subtraction, the enable input synchronous parallel load and inlet flow data , the enable input of the counting mode, the input of asynchronous setting to zero state, the output of the overflow; decoder; third, fourth and fifth OR elements, the second inverter; AND-NOT element.
UAU201509061U 2015-09-21 2015-09-21 Generator of a single three-pulse code group with programmable gap between pulses in the group UA106260U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
UAU201509061U UA106260U (en) 2015-09-21 2015-09-21 Generator of a single three-pulse code group with programmable gap between pulses in the group

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
UAU201509061U UA106260U (en) 2015-09-21 2015-09-21 Generator of a single three-pulse code group with programmable gap between pulses in the group

Publications (1)

Publication Number Publication Date
UA106260U true UA106260U (en) 2016-04-25

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
UAU201509061U UA106260U (en) 2015-09-21 2015-09-21 Generator of a single three-pulse code group with programmable gap between pulses in the group

Country Status (1)

Country Link
UA (1) UA106260U (en)

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