UA106259U - Generator of a single three-pulse code group with programmable gap between pulses in the group - Google Patents

Generator of a single three-pulse code group with programmable gap between pulses in the group

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Publication number
UA106259U
UA106259U UAU201509059U UAU201509059U UA106259U UA 106259 U UA106259 U UA 106259U UA U201509059 U UAU201509059 U UA U201509059U UA U201509059 U UAU201509059 U UA U201509059U UA 106259 U UA106259 U UA 106259U
Authority
UA
Ukraine
Prior art keywords
input
group
pulses
generator
zero state
Prior art date
Application number
UAU201509059U
Other languages
Russian (ru)
Ukrainian (uk)
Inventor
Микола Григорович Коробков
Олена Миколаївна Коробкова
Васілій Грігорьєвіч Рубанов
Вячеслав Сергійович Харченко
Original Assignee
Національний Аерокосмічний Університет Ім. М.Є. Жуковського "Харківський Авіаційний Інститут"
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by Національний Аерокосмічний Університет Ім. М.Є. Жуковського "Харківський Авіаційний Інститут" filed Critical Національний Аерокосмічний Університет Ім. М.Є. Жуковського "Харківський Авіаційний Інститут"
Priority to UAU201509059U priority Critical patent/UA106259U/en
Publication of UA106259U publication Critical patent/UA106259U/en

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Abstract

A generator of a single three-pulse code group with programmable gap between pulses in the group, a multiple of the period of the clock pulses that are fed to the input of the shaper with the output of an external generator, contains two reversible binary counters, each of which has an input feed clock pulses, the input to the debug mode of addition/subtraction, the enable input synchronous parallel load and inlet flow data, the enable input of the counting mode, the input of asynchronous setting to zero state, the output of the overflow; the first and second OR elements, and inverter; chain, consisting of series-connected resistor and capacitor; a synchronous D-trigger with the input of asynchronous setting to zero state, the first and second two-input AND elements. introduced: two-digit subtraction counter which has an input feed clock pulses, the enable input of the counting mode, the input of asynchronous setting to zero state; the third OR element; a second inverter; AND-NOT element.
UAU201509059U 2015-09-21 2015-09-21 Generator of a single three-pulse code group with programmable gap between pulses in the group UA106259U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
UAU201509059U UA106259U (en) 2015-09-21 2015-09-21 Generator of a single three-pulse code group with programmable gap between pulses in the group

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
UAU201509059U UA106259U (en) 2015-09-21 2015-09-21 Generator of a single three-pulse code group with programmable gap between pulses in the group

Publications (1)

Publication Number Publication Date
UA106259U true UA106259U (en) 2016-04-25

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Family Applications (1)

Application Number Title Priority Date Filing Date
UAU201509059U UA106259U (en) 2015-09-21 2015-09-21 Generator of a single three-pulse code group with programmable gap between pulses in the group

Country Status (1)

Country Link
UA (1) UA106259U (en)

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