UA103640U - Shaper single three impulse code series of programmable duration of the pause between pulses in the series - Google Patents

Shaper single three impulse code series of programmable duration of the pause between pulses in the series

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Publication number
UA103640U
UA103640U UAU201505923U UAU201505923U UA103640U UA 103640 U UA103640 U UA 103640U UA U201505923 U UAU201505923 U UA U201505923U UA U201505923 U UAU201505923 U UA U201505923U UA 103640 U UA103640 U UA 103640U
Authority
UA
Ukraine
Prior art keywords
series
pulses
pause
zero state
input
Prior art date
Application number
UAU201505923U
Other languages
Russian (ru)
Ukrainian (uk)
Inventor
Микола Григорович Коробков
Олена Миколаївна Коробкова
Васілій Грігорьєвіч Рубанов
Вячеслав Сергійович Харченко
Original Assignee
M E Zhukovsky Nat Aerospace University Kharkiv Aviat Inst
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by M E Zhukovsky Nat Aerospace University Kharkiv Aviat Inst filed Critical M E Zhukovsky Nat Aerospace University Kharkiv Aviat Inst
Priority to UAU201505923U priority Critical patent/UA103640U/en
Publication of UA103640U publication Critical patent/UA103640U/en

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Abstract

Shaper single three impulse code series of programmable duration of the pause between pulses in the series include: two reversible binary counters, each of which has an input supply pulse synchronization input adjustment on mode summation / subtraction, entry permit simultaneous parallel downloads and inputs supply data entry permission counting mode, asynchronous input settings in the zero state, the output overflow; the first and second elements OR; inverter; chain consisting of series connected resistor and capacitor; synchronous D-flip-flop with asynchronous input settings in the zero state, the first and second elements two-imput I. Introduced: two-charge counter that has an input supply synchronization pulses, entry permit counting mode, asynchronous input settings in the zero state; the third element OR; a second inverter; NAND element.
UAU201505923U 2015-06-15 2015-06-15 Shaper single three impulse code series of programmable duration of the pause between pulses in the series UA103640U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
UAU201505923U UA103640U (en) 2015-06-15 2015-06-15 Shaper single three impulse code series of programmable duration of the pause between pulses in the series

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
UAU201505923U UA103640U (en) 2015-06-15 2015-06-15 Shaper single three impulse code series of programmable duration of the pause between pulses in the series

Publications (1)

Publication Number Publication Date
UA103640U true UA103640U (en) 2015-12-25

Family

ID=55172162

Family Applications (1)

Application Number Title Priority Date Filing Date
UAU201505923U UA103640U (en) 2015-06-15 2015-06-15 Shaper single three impulse code series of programmable duration of the pause between pulses in the series

Country Status (1)

Country Link
UA (1) UA103640U (en)

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