TWM648760U - Digital circuit for multiple antenna remote radio head and radio unit - Google Patents
Digital circuit for multiple antenna remote radio head and radio unit Download PDFInfo
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Abstract
Description
本新型是關於無線通訊系統中的遠距射頻頭端與射頻單元內部的一種數位電路。 The new invention relates to a digital circuit inside a long-distance radio frequency head end and radio frequency unit in a wireless communication system.
在無線通訊的應用如無線通訊基地台(Base Station)或是衛星通訊(Satellite Communications)地面站(Ground Station)系統中具有遠距射頻頭端(Remote Radio Head,RRH)或射頻單元(Radio Unit,RU)來做前端的射頻(Radio Frequency,RF)類比信號處理及數位信號處理,並分別透過射頻類比電路(RF Analog Circuit)以及數位電路(Digital Circuit)來執行其功能。由於現在的基地台或是衛星通訊地面站多使用多天線(Multiple Antenna)技術,其遠距射頻頭端或射頻單元中的射頻類比電路部分會包含多個射頻(RF)元件與多個射頻積體電路(RF Integrated Circuit,RFIC)或整合成一個射頻積體電路,使得每一路的天線能夠對應一組射頻類比電路之支路(RF Chain);而現有技術在數位電路的部分則是採用單晶片(Single Chip)架構。例如:2015年12月10日公告之世界智慧財產權組織專利公報第WO2015188145A1號中披露之用於遠距射頻頭端的數位電路即為單晶片架構之系統單晶片(System on a Chip,SOC),並使用一積體電路(Integrated Circuit,IC),來做為其數位電路之實施例。 In wireless communication applications such as wireless communication base station (Base Station) or satellite communication (Satellite Communications) ground station (Ground Station) system, there is a remote radio head (RRH) or radio unit (Radio Unit). RU) performs front-end Radio Frequency (RF) analog signal processing and digital signal processing, and performs its functions through RF Analog Circuit and Digital Circuit respectively. Since most current base stations or satellite communication ground stations use multiple antenna (Multiple Antenna) technology, the radio frequency analog circuit part in the long-range radio frequency head end or radio frequency unit will contain multiple radio frequency (RF) components and multiple radio frequency products. RF Integrated Circuit (RFIC) or integrated into a radio frequency integrated circuit, so that each antenna can correspond to a group of radio frequency analog circuit branches (RF Chain); while the existing technology uses a single radio frequency analog circuit in the digital circuit part. Single Chip architecture. For example: the digital circuit used for the long-range radio frequency headend disclosed in the World Intellectual Property Organization Patent Bulletin No. WO2015188145A1 announced on December 10, 2015 is a system on a chip (SOC) with a single-chip architecture, and An integrated circuit (IC) is used as an embodiment of the digital circuit.
由於現有技術在數位電路部分採用單晶片架構,其數位電路可由可程式化(Programmable)數位電路,例如現場可程式化邏輯閘陣列(Field Programmable Gate Array,FPGA)、系統單晶片(SOC)、微控制器(Micro-Controller,MCU)、微處理器(Micro-Processor Unit,MPU)、數位信號處理器(Digital Signal Processor,DSP)、圖形處理器(Graphics Processing Unit,GPU)、中央處理器(Central Processing Unit,CPU)等;或是固定式數位電路,例如特定應用積體電路(Application Specific Integrated Circuit,ASIC)來實現。然而,若是單晶片數位電路使用可程式化數位電路,雖具備可程式化修改與更新之優點,但其電路性能例如功耗與運算速度卻易劣於特定應用積體電路。反之,若是單晶片數位電路使用固定式數位電路,因其電路架構已經固定,缺乏未來可程式化修改與更新之彈性。尤其,像是在基地台系統的應用中,因電信商通常會要求基地台具有較長之使用壽命,如10年以上之壽命,因此隨著國際通訊標準的更新,其數位電路可能會需要修改或是更新。 Since the existing technology adopts a single-chip architecture in the digital circuit part, the digital circuit can be composed of programmable digital circuits, such as field programmable gate array (FPGA), system on chip (SOC), micro Controller (Micro-Controller, MCU), microprocessor (Micro-Processor Unit, MPU), digital signal processor (Digital Signal Processor, DSP), graphics processor (Graphics Processing Unit, GPU), central processing unit (Central Processing Unit (CPU), etc.; or fixed digital circuits, such as Application Specific Integrated Circuit (ASIC). However, if a single-chip digital circuit uses a programmable digital circuit, although it has the advantage of programmable modification and update, its circuit performance, such as power consumption and computing speed, is likely to be inferior to application-specific integrated circuits. On the contrary, if a single-chip digital circuit uses a fixed digital circuit, its circuit structure has been fixed and lacks the flexibility of future programmable modifications and updates. Especially in the application of base station systems, telecommunications companies usually require base stations to have a long service life, such as more than 10 years. Therefore, as international communication standards are updated, their digital circuits may need to be modified. Or update.
另一方面,由於單晶片數位電路為一體式架構,當晶片內部任一處有損壞時,易造成整顆單晶片無法正常運作,使得整個系統故障。且若需要維修,必需要換掉整顆單晶片,而無法僅針對其內部受損之處做更換。 On the other hand, since the single-chip digital circuit has an integrated structure, if any part of the chip is damaged, it will easily cause the entire single-chip to fail to operate normally, causing the entire system to malfunction. And if repairs are needed, the entire single chip must be replaced, and only the internal damage cannot be replaced.
此外,因為單晶片數位電路需要將所有的數位運算功能整合在一顆晶片上,使得其電路結構較為複雜,所需的研發人力與成本也較高,通常只有少數大的晶片設計公司才有能力提供單晶片數位電路產品,也因此其電路成本容易較高。 In addition, because single-chip digital circuits need to integrate all digital computing functions on one chip, the circuit structure is relatively complex, and the required R&D manpower and cost are also high. Usually only a few large chip design companies have the ability to do so. We provide single-chip digital circuit products, so the circuit costs tend to be higher.
基於上述,現有的單晶片數位電路,仍存在缺乏彈性、壽命較短、穩定性較低、維修不易、以及成本較高等缺點,仍待加以改進。 Based on the above, existing single-chip digital circuits still have shortcomings such as lack of flexibility, short lifespan, low stability, difficult maintenance, and high cost, which still need to be improved.
為解決上述現有技術之缺點,本揭示內容之數位電路採用多晶片(Multi-Chip)架構,由可程式化數位電路及/或固定式數位電路之多晶片數位電路所構成。透過將遠距射頻頭端與射頻單元所需之數位電路功能做適當的切割,並分配至可程式化數位電路及/或固定式數位電路之晶片中,使其多晶片架構能共同協作達成所需之功能。 In order to solve the above shortcomings of the prior art, the digital circuit of the present disclosure adopts a multi-chip architecture, which is composed of multi-chip digital circuits of programmable digital circuits and/or fixed digital circuits. By properly cutting the digital circuit functions required by the long-range radio frequency head end and radio frequency unit and allocating them to programmable digital circuits and/or fixed digital circuit chips, their multi-chip architecture can work together to achieve the desired results. Required functions.
本揭示內容之一態樣提供了一種用於射頻單元之數位電路,包含一個或複數個可程式化數位電路,及一個或複數個固定式數位電路,其中至少一個可程式化數位電路或固定式數位電路包含一前傳介面(Fronthaul Interface)模組,其它可程式化數位電路及/或固定式數位電路,包含一個或複數個通訊信號處理模組;其中可程式化數位電路與固定式數位電路可置於同一片印刷電路板(Printed Circuit Board,PCB)上或不同片印刷電路板上。每個通訊信號處理模組包含逆快速傅立葉轉換(Inverse Fast Fourier Transform,IFFT)、加入循環字首(Cyclic Prefix Addition,CP Addition)、波峰係數削減(Crest Factor Reduction,CFR)、數位預失真(Digital Pre-distortion,DPD)、數位升頻器(Digital Up Converter,DUC)、以及數位類比轉換器(Digital to Analog Converter,DAC)、類比數位轉換器(Analog to Digital Converter,ADC)、數位降頻器(Digital Down Converter,DDC)、移除循環字首(Cyclic Prefix Removal,CP Removal)、快速傅立葉轉換(Fast Fourier Transform,FFT)、物理隨機接入信道(Physical Random Access Channel,PRACH)之處理、自動增益控制(Automatic Gain Control,AGC)、同相與正交(In-phase and Quadrature,I/Q)信號之壓縮(Compression)與解壓縮(Decompression)、天線校正(Antenna Calibration)、以及正交頻分多工(Orthogonal Frequency Division Multiplexing,OFDM)相位補償(Phase Compensation)其中至少一種或多種之組合。 One aspect of the present disclosure provides a digital circuit for a radio frequency unit, including one or a plurality of programmable digital circuits, and one or a plurality of fixed digital circuits, wherein at least one programmable digital circuit or fixed The digital circuit includes a fronthaul interface (Fronthaul Interface) module, and other programmable digital circuits and/or fixed digital circuits, including one or a plurality of communication signal processing modules; among which the programmable digital circuit and the fixed digital circuit can Placed on the same printed circuit board (PCB) or on different printed circuit boards. Each communication signal processing module includes Inverse Fast Fourier Transform (IFFT), Cyclic Prefix Addition (CP Addition), Crest Factor Reduction (CFR), and Digital Predistortion (Digital Prefix Addition). Pre-distortion (DPD), Digital Up Converter (DUC), Digital to Analog Converter (DAC), Analog to Digital Converter (ADC), Digital Down Converter (Digital Down Converter, DDC), remove cyclic prefix (Cyclic Prefix Removal, CP Removal), fast Fourier Transform (Fast Fourier Transform, FFT), physical random access channel (Physical Random Access Channel, PRACH) processing, Automatic Gain Control (AGC), In-phase and Quadrature (I/Q) signal compression (Compression) and decompression (Decompression), Antenna correction (Antenna) Calibration), and orthogonal frequency division multiplexing (Orthogonal Frequency Division Multiplexing, OFDM) phase compensation (Phase Compensation) at least one or a combination of more.
本揭示內容之另一態樣提供了一種用於射頻單元之數位電路,包含複數個可程式化數位電路,其中至少一個可程式化數位電路包含一前傳介面模組,其它可程式化數位電路包含一個或複數個通訊信號處理模組;其中複數個可程式化數位電路可置於同一片印刷電路板上或不同片印刷電路板上。每個通訊信號處理模組包含逆快速傅立葉轉換(IFFT)、加入循環字首(CP Addition)、波峰係數削減(CFR)、數位預失真(DPD)、數位升頻器(DUC)、數位類比轉換器(DAC)、類比數位轉換器(ADC)、數位降頻器(DDC)、移除循環字首(CP Removal)、快速傅立葉轉換(FFT)、物理隨機接入信道之處理、自動增益控制、同相與正交信號之壓縮與解壓縮、天線校正、以及正交頻分多工相位補償其中至少一種或多種之組合。 Another aspect of the present disclosure provides a digital circuit for a radio frequency unit, including a plurality of programmable digital circuits, where at least one programmable digital circuit includes a fronthaul interface module, and other programmable digital circuits include One or a plurality of communication signal processing modules; wherein a plurality of programmable digital circuits can be placed on the same printed circuit board or on different printed circuit boards. Each communication signal processing module includes inverse fast Fourier transform (IFFT), CP Addition, crest factor reduction (CFR), digital predistortion (DPD), digital upconverter (DUC), and digital analog conversion (DAC), analog-to-digital converter (ADC), digital downconverter (DDC), cyclic prefix removal (CP Removal), fast Fourier transform (FFT), physical random access channel processing, automatic gain control, At least one or a combination of at least one or more of in-phase and quadrature signal compression and decompression, antenna correction, and orthogonal frequency division multiplexing phase compensation.
本揭示內容之另一態樣提供了一種用於射頻單元之數位電路,包含複數個固定式數位電路,其中至少一個固定式數位電路包含一前傳介面模組,其它固定式數位電路包含一個或複數個通訊信號處理模組;其中複數個固定式數位電路可置於同一片印刷電路板上或不同片印刷電路板上。每個通訊信號處理模組包含逆快速傅立葉轉換(IFFT)、加入循環字首(CP Addition)、波峰係數削減(CFR)、數位預失真(DPD)、數位升頻器(DUC)、數位類比轉換器(DAC)、類比數位轉換器(ADC)、數位降頻器(DDC)、移除 循環字首(CP Removal)、快速傅立葉轉換(FFT)、物理隨機接入信道之處理、自動增益控制、同相與正交信號之壓縮與解壓縮、天線校正、以及正交頻分多工相位補償其中至少一種或多種之組合。 Another aspect of the present disclosure provides a digital circuit for a radio frequency unit, including a plurality of fixed digital circuits, wherein at least one fixed digital circuit includes a fronthaul interface module, and the other fixed digital circuits include one or more A communication signal processing module; a plurality of fixed digital circuits can be placed on the same printed circuit board or on different printed circuit boards. Each communication signal processing module includes inverse fast Fourier transform (IFFT), CP Addition, crest factor reduction (CFR), digital predistortion (DPD), digital upconverter (DUC), and digital analog conversion converter (DAC), analog-to-digital converter (ADC), digital downconverter (DDC), remove Cyclic prefix (CP Removal), Fast Fourier Transform (FFT), physical random access channel processing, automatic gain control, compression and decompression of in-phase and quadrature signals, antenna correction, and orthogonal frequency division multiplexing phase compensation At least one or a combination of more of them.
本揭示內容之另一態樣提供了一種用於遠距射頻頭端之數位電路,包含一個或複數個可程式化數位電路,及一個或複數個固定式數位電路,其中至少一個可程式化數位電路或固定式數位電路包含一通用公共射頻介面(Common Public Radio Interface,CPRI)模組,其它可程式化數位電路及/或固定式數位電路包含一個或複數個類比數位轉換器(ADC)及數位類比轉換器(DAC)模組;其中可程式化數位電路與固定式數位電路可置於同一片印刷電路板上或不同片印刷電路板上。 Another aspect of the present disclosure provides a digital circuit for a long-range radio frequency headend, including one or a plurality of programmable digital circuits, and one or a plurality of fixed digital circuits, at least one of which is programmable. The circuit or fixed digital circuit includes a Common Public Radio Interface (CPRI) module, and other programmable digital circuits and/or fixed digital circuits include one or more analog-to-digital converters (ADCs) and digital Analog converter (DAC) module; the programmable digital circuit and the fixed digital circuit can be placed on the same printed circuit board or on different printed circuit boards.
根據上述,本揭示內容之遠距射頻頭端與射頻單元數位電路具備可程式化修改與更新之彈性並兼具固定式數位電路較佳之電路性能例如低功耗與較快之運算速度。且由於是採用多晶片架構,其穩定性與壽命易優於單晶片架構,例如在多天線架構的射頻單元應用中,尤其當天線數較多時,即使某些天線支路的數位電路晶片出現損壞時,雖可能會使得性能有所減損,但整個系統還是可能足以正常運作,可延長使用壽命。且當某些晶片出現損壞時,也僅需替換損壞之晶片即可,而不需替換掉全部的數位電路晶片,因此易於維修。再者,由於多晶片架構中的各別晶片其電路複雜度相對較低,使得技術開發門檻較低,關鍵技術不易掌握在少數大公司手上,有機會使整體電路成本降低。此外,本揭示內容之數位電路特別適合用於天線數較多之無線通訊系統如大型多輸入多輸出天線(Massive MIMO)基地台。由於大型多輸入多輸出天線基地台在相同的資料傳送速率 條件下,隨著天線數目的增加,可有效降低發射功率(Transmit Power),且降低之發射功率與天線數目成正比,也就是說當天線數目越多則所需之發射功率可降低越多,因此透過適當之設計可減少基地台所需之功耗(Power Consumption),達到節能減碳之綠色技術功效。 According to the above, the long-range radio frequency headend and radio frequency unit digital circuits of the present disclosure have the flexibility of programmable modification and update, and have the better circuit performance of fixed digital circuits, such as low power consumption and faster computing speed. And because it adopts a multi-chip architecture, its stability and lifespan are easily better than that of a single-chip architecture. For example, in the application of radio frequency units with multi-antenna architectures, especially when the number of antennas is large, even if the digital circuit chips of some antenna branches appear When damaged, although the performance may be reduced, the entire system may still be able to operate normally and extend the service life. And when some chips are damaged, only the damaged chips need to be replaced instead of replacing all digital circuit chips, so it is easy to repair. Furthermore, since the circuit complexity of individual chips in a multi-chip architecture is relatively low, the threshold for technology development is low, and key technologies are not easily in the hands of a few large companies, which can potentially reduce overall circuit costs. In addition, the digital circuit disclosed in this disclosure is particularly suitable for use in wireless communication systems with a large number of antennas, such as large-scale multiple-input multiple-output antennas (Massive MIMO) base stations. Since large multiple-input multiple-output antenna base stations operate at the same data transfer rate Under certain conditions, as the number of antennas increases, the transmit power (Transmit Power) can be effectively reduced, and the reduced transmit power is proportional to the number of antennas. That is to say, the greater the number of antennas, the more the required transmit power can be reduced. Therefore, through appropriate design, the power consumption required by the base station can be reduced to achieve the green technology effect of energy saving and carbon reduction.
10:使用遠距射頻頭端之無線通訊基地台 10: Wireless communication base station using long-range radio frequency headend
11a至11c:電纜 11a to 11c: Cable
12,102:通用公共射頻介面 12,102: Universal public radio frequency interface
100a至100c:天線 100a to 100c: Antenna
110:遠距射頻頭端 110: Long-distance radio frequency headend
120,220,320:支撐架 120,220,320: Support frame
130:基頻單元 130: Base frequency unit
20:使用射頻單元之無線通訊基地台 20: Wireless communication base station using radio frequency unit
21a至21c,31,42,52,63,72,82,91,1132:前傳介面 21a to 21c,31,42,52,63,72,82,91,1132: Prequel interface
200a至200c,300:射頻單元 200a to 200c, 300: RF unit
230,310:分佈單元 230,310: Distribution unit
30:使用射頻單元之衛星通訊地面站 30: Satellite communication ground station using radio frequency unit
40,103,1130a至1130n:類比介面 40,103,1130a to 1130n: analog interface
41,50,51,60a至60n,61a至61n,62,70,71,80,81,90,101,1131a至1131n:數位介面 41,50,51,60a to 60n,61a to 61n,62,70,71,80,81,90,101,1131a to 1131n: digital interface
400,500,600,700,800,900,1100:射頻單元數位電路 400,500,600,700,800,900,1100: RF unit digital circuit
410,510,610,810,820,910,1010,1110:可程式化數位電路 410,510,610,810,820,910,1010,1110: Programmable digital circuit
411,511,611,711,811,911,1111:前傳介面模組 411,511,611,711,811,911,1111: Front pass interface module
420,520,620,630a至630n,710,720,1020,1120a至1120n:固定式數位電 路 420,520,620,630a to 630n,710,720,1020,1120a to 1120n: fixed digital electronics road
421,521,621,721,821,912:波束成型及/或預編碼模組 421,521,621,721,821,912: Beamforming and/or precoding module
422,522,631,722,822,920:逆快速傅立葉轉換(IFFT) 422,522,631,722,822,920: Inverse Fast Fourier Transform (IFFT)
423,523,632,723,823,921:加入循環字首(CP Addition) 423,523,632,723,823,921: Add cycle prefix (CP Addition)
424:波峰係數削減(CFR) 424: Crest Factor Reduction (CFR)
425:數位預失真(DPD) 425: Digital predistortion (DPD)
426,1121:數位升頻器(DUC) 426,1121:Digital upconverter (DUC)
427,1021,1122:數位類比轉換器(DAC) 427,1021,1122:Digital-to-analog converter (DAC)
428,524,633,724,824,922:快速傅立葉轉換(FFT) 428,524,633,724,824,922: Fast Fourier Transform (FFT)
429,525,634,725,825,923:移除循環字首(CP Removal) 429,525,634,725,825,923: Remove cycle prefix (CP Removal)
430,1123:數位降頻器(DDC) 430,1123:Digital downconverter (DDC)
431,1022,1124:類比數位轉換器(ADC) 431,1022,1124:Analog-to-digital converter (ADC)
440a至440n,540a至540n,740a至740n,840a至840n,913a至913n:通訊信號處理模組 440a to 440n, 540a to 540n, 740a to 740n, 840a to 840n, 913a to 913n: communication signal processing module
1000:遠距射頻頭端數位電路 1000: Long-distance radio frequency head-end digital circuit
1011:通用公共射頻介面(CPRI)模組 1011: Common Common Radio Frequency Interface (CPRI) module
1030a至1030n:數位類比轉換器與類比數位轉換器模組 1030a to 1030n: Digital-to-analog converters and analog-to-digital converter modules
1112:波束成型模組 1112: Beam forming module
為讓本揭示內容與實施例能更明顯易懂,所附圖式之說明如下: In order to make the present disclosure and embodiments more understandable, the accompanying drawings are described as follows:
〔圖1〕繪示一種具有遠距射頻頭端之基地台之示意圖。 [Figure 1] shows a schematic diagram of a base station with a long-range radio frequency head end.
〔圖2〕繪示一種具有射頻單元之基地台之示意圖。 [Figure 2] shows a schematic diagram of a base station with a radio frequency unit.
〔圖3〕繪示一種具有射頻單元之衛星通訊地面站之示意圖。 [Figure 3] shows a schematic diagram of a satellite communication ground station with a radio frequency unit.
〔圖4〕為根據本揭示內容之一實施例繪示一種射頻單元數位電路之示意圖。 [Fig. 4] is a schematic diagram of a digital circuit of a radio frequency unit according to an embodiment of the present disclosure.
〔圖5〕為根據本揭示內容之另一實施例繪示一種射頻單元數位電路之示意圖。 [Fig. 5] is a schematic diagram illustrating a digital circuit of a radio frequency unit according to another embodiment of the present disclosure.
〔圖6〕為根據本揭示內容之另一實施例繪示一種射頻單元數位電路之示意圖。 [Fig. 6] is a schematic diagram of a digital circuit of a radio frequency unit according to another embodiment of the present disclosure.
〔圖7〕為根據本揭示內容之另一實施例繪示一種射頻單元數位電路之示意圖。 [Fig. 7] is a schematic diagram of a digital circuit of a radio frequency unit according to another embodiment of the present disclosure.
〔圖8〕為根據本揭示內容之另一實施例繪示一種射頻單元數位電路之示意圖。 [Fig. 8] is a schematic diagram of a digital circuit of a radio frequency unit according to another embodiment of the present disclosure.
〔圖9〕為根據本揭示內容之另一實施例繪示一種射頻單元數位電路之示意圖。 [Fig. 9] is a schematic diagram of a digital circuit of a radio frequency unit according to another embodiment of the present disclosure.
〔圖10〕為根據本揭示內容之一實施例繪示一種遠距射頻頭端數位電路之示意圖。 [Fig. 10] is a schematic diagram of a long-range radio frequency head-end digital circuit according to an embodiment of the present disclosure.
〔圖11〕為根據本揭示內容之一實施例繪示一種應用於衛星通訊地面站之射頻單元數位電路之示意圖。 [Fig. 11] is a schematic diagram of a digital circuit of a radio frequency unit used in a satellite communication ground station according to an embodiment of the present disclosure.
下文係舉實施例配合所附圖式作詳細說明,但所提供之實施例並非用以限制本文所涵蓋的範圍。任何由元件重新組合之結構,所產生具有均等功效的裝置,皆為本文所涵蓋的範圍。此外,圖式僅以說明為目的,並未依照原尺寸作圖。為便於理解,下述說明中相同元件將以相同之符號標示來說明。 The following is a detailed description with examples and accompanying drawings, but the examples provided are not intended to limit the scope of this article. Any structure that is reassembled of components to produce a device with equal efficacy is within the scope of this article. In addition, the drawings are for illustrative purposes only and are not drawn to original size. To facilitate understanding, the same elements will be identified with the same symbols in the following description.
關於本文中所使用『可程式化數位電路』其定義之範圍為:任何可透過程式語言,修改或更新之數位電路。例如:現場可程式化邏輯閘陣列(FPGA)、系統單晶片(SOC)、微控制器(MCU)、微處理器(MPU)、數位信號處理器(DSP)、圖形處理器(Graphics Processing Unit,GPU)、中央處理器(Central Processing Unit,CPU)、以上多種之組合、以及其它任何可用程式語言修改或更新之數位電路,皆在本文所定義之可程式化數位電路涵蓋範圍內。 As used in this article, the definition of "programmable digital circuit" is: any digital circuit that can be modified or updated through programming language. For example: Field Programmable Gate Array (FPGA), System on Chip (SOC), Microcontroller (MCU), Microprocessor (MPU), Digital Signal Processor (DSP), Graphics Processing Unit, GPU), Central Processing Unit (Central Processing Unit, CPU), combinations of the above, and any other digital circuits that can be modified or updated with programming languages, are all within the scope of programmable digital circuits defined in this article.
關於本文中所使用『固定式數位電路』其定義之範圍為:任何無法透過程式語言,修改或更新之數位電路。例如特定應用積體電路(ASIC)、以及其它任何無法用程式語言修改或更新之數位電路,皆在本文所定義之固定式數位電路涵蓋範圍內。 As for the term "fixed digital circuit" used in this article, the scope of the definition is: any digital circuit that cannot be modified or updated through programming language. For example, application specific integrated circuits (ASICs) and any other digital circuits that cannot be modified or updated using programming languages are within the scope of fixed digital circuits defined in this article.
關於本文中所使用『雙向傳輸』其意思為:若A將信號或資 料雙向傳輸至B,則代表A可將信號或資料傳送至B及/或B可將信號或資料傳送至A。 Regarding the "two-way transmission" used in this article, it means: if A transmits signals or data Two-way transmission of data to B means that A can send signals or data to B and/or B can send signals or data to A.
關於本文中所使用『射頻單元(Radio Unit,RU)』為一廣義之射頻單元,其範圍包含任何具有天線、射頻類比電路、以及數位電路之系統。例如由開放式無線接入網路(Open Radio Access Network,O-RAN)組織所訂定之開放式射頻單元(Open Radio Unit,O-RU)也在本文所定義之射頻單元範圍內。其它組合像是開放式射頻單元(O-RU)加上開放式分佈單元(Open Distributed Unit,O-DU)等組合式系統,以及像是衛星通訊地面站具有天線、射頻類比電路、以及數位電路之系統,亦在本文所定義之射頻單元範圍內。 As used in this article, "Radio Unit (RU)" is a broad radio frequency unit, and its scope includes any system with antennas, radio frequency analog circuits, and digital circuits. For example, the Open Radio Unit (O-RU) specified by the Open Radio Access Network (O-RAN) organization is also within the scope of the radio frequency unit defined in this article. Other combinations include combined systems such as Open RF Unit (O-RU) plus Open Distributed Unit (O-DU), and satellite communication ground stations with antennas, RF analog circuits, and digital circuits. The system is also within the scope of the radio frequency unit defined in this article.
關於本文中所使用『分佈單元(Distributed Unit,DU)』為一廣義之分佈單元,其範圍包含任何透過一介面與射頻單元相連,並具有一數位電路包含關於實體層(Physical Layer,PHY)相關運算之系統。例如由開放式無線接入網路(O-RAN)組織所訂定之開放式分佈單元(Open Distributed Unit,O-DU)也在本文所定義之分佈單元範圍內。其它組合像是開放式分佈單元加上開放式中央單元(Open Central Unit,O-CU)等組合式系統,以及像是衛星通訊地面站後端包含實體層相關運算之系統,亦在本文所定義之分佈單元範圍內。 As used in this article, "Distributed Unit (DU)" is a generalized distributed unit, and its scope includes any device connected to the radio frequency unit through an interface and having a digital circuit, including related to the physical layer (Physical Layer, PHY). The system of calculation. For example, the Open Distributed Unit (O-DU) defined by the Open Radio Access Network (O-RAN) organization is also within the scope of the distributed unit defined in this article. Other combinations, such as combined systems such as open distributed units plus open central units (Open Central Unit, O-CU), and systems such as satellite communication ground stations that include physical layer related operations in the back end, are also defined in this article within the range of the distribution unit.
關於本文中所使用『前傳介面』為一廣義之前傳介面,其範圍包含任何可連接射頻單元與分佈單元之介面。例如由開放式無線接入網路組織所訂定之前傳介面(Fronthaul Interface)採用增強型通用公共射頻介面(evolved Common Public Radio Interface,eCPRI)協定(Protocol),並包含控制 平面(Control Plane,C-Plane)、使用者平面(User Plane,U-Plane)、同步平面(Synchronization Plane,S-Plane)、以及管理平面(Management Plane,M-Plane),亦在本文所定義之前傳介面範圍內。衛星通訊地面站連接前端射頻單元與後端分佈單元之介面,亦在本文所定義之前傳介面範圍內。 The "fronthaul interface" used in this article is a generalized fronthaul interface, and its scope includes any interface that can connect the radio frequency unit and the distribution unit. For example, the Fronthaul Interface specified by the Open Wireless Access Network Organization adopts the Enhanced Common Public Radio Interface (eCPRI) protocol and includes control Plane (Control Plane, C-Plane), user plane (User Plane, U-Plane), synchronization plane (Synchronization Plane, S-Plane), and management plane (Management Plane, M-Plane) are also defined in this article within the scope of the previously uploaded interface. The interface between the satellite communication ground station that connects the front-end radio frequency unit and the back-end distribution unit is also within the scope of the fronthaul interface defined in this article.
請參考圖1,圖1繪示一種使用遠距射頻頭端之無線通訊基地台之示意圖。如圖1所示,無線通訊基地台(Base Station)10包含天線(Antenna)100a至100c、遠距射頻頭端(RRH)110、支撐架120、基頻單元(Baseband Unit,BBU)130、電纜(Cable)11a至11c、以及通用公共射頻介面(CPRI)12。
Please refer to Figure 1, which is a schematic diagram of a wireless communication base station using a long-range radio frequency headend. As shown in Figure 1, a wireless communication base station (Base Station) 10 includes antennas (Antenna) 100a to 100c, a long-range radio frequency head (RRH) 110, a
支撐架120,主要作為支撐之用,上面裝置有天線100a至100c與遠距射頻頭端110。天線100a至100c用以接收與傳送無線電波訊號,並透過電纜11a至11c將類比高頻訊號雙向傳輸至遠距射頻頭端110。遠距射頻頭端110包含有射頻類比電路以及數位電路,其中射頻類比電路主要執行包含射頻類比信號的升降頻、濾波(Filtering)、以及信號的放大與衰減等類比信號處理;而在數位電路的部分為本揭示內容之核心,主要是做數位信號處理之運算,可參考圖10為一遠距射頻頭端數位電路實施例之說明。遠距射頻頭端110透過通用公共射頻介面12將數位資料雙向傳輸至基頻單元130,其中基頻單元130執行基地台所需之功能包含實體層(PHY)、媒體存取控制(Media Access Control,MAC)、無線電連結控制(Radio Link Control,RLC)、資料匯聚通訊協定(Packet Data Convergence Protocol,PDCP)、以及無線資源控制(Radio Resource Control,RRC)等功能。
The
請參考圖2,圖2繪示一種使用射頻單元之無線通訊基地台之
示意圖。不同於圖1之遠距射頻頭端,射頻單元(RU)200a至200c將天線、射頻類比電路、以及數位電路整合在一起,可以降低或避免遠距射頻頭端之電纜損失。並且由於射頻單元與天線高度整合在一起,更適合應用於天線數量較多之多天線架構例如大型多輸入多輸出天線(Massive MIMO),因此現代第五代(5G)行動通訊基地台多使用射頻單元之無線通訊基地台。如圖2所示,無線通訊基地台20包含射頻單元(RU)200a至200c、支撐架220、分佈單元(DU)230、以及前傳介面21a至21c。
Please refer to Figure 2. Figure 2 illustrates a wireless communication base station using a radio frequency unit.
Schematic diagram. Different from the long-range radio frequency head end in Figure 1, the radio frequency units (RU) 200a to 200c integrate antennas, radio frequency analog circuits, and digital circuits, which can reduce or avoid cable losses in the long-distance radio frequency head end. And because the radio frequency unit and the antenna are highly integrated, it is more suitable for use in multi-antenna architectures with a large number of antennas, such as large multiple-input multiple-output antennas (Massive MIMO). Therefore, modern fifth-generation (5G) mobile communication base stations mostly use radio frequency The wireless communication base station of the unit. As shown in Figure 2, the wireless
支撐架220,主要作為支撐之用,上面裝置有射頻單元200a至200c,其中各射頻單元200a至200c內包含天線、射頻類比電路、以及數位電路。天線用以接收與傳送無線電波訊號,射頻類比電路主要執行包含射頻類比信號的升降頻、濾波、信號的放大與衰減等類比信號處理,而數位電路的部分為本揭示內容之核心,主要是做數位信號處理之運算,可參考圖4至圖9射頻單元數位電路實施例之說明。射頻單元200a至200c透過前傳介面21a至21c,將數位資料雙向傳輸至分佈單元230,其中分佈單元230執行基地台所需包含高實體層(High Physical Layer,High-PHY)、媒體存取控制(Media Access Control,MAC)、以及無線電連結控制(Radio Link Control,RLC)等功能。
The
請參考圖3,圖3繪示一種使用射頻單元之衛星通訊地面站(Ground Station)之示意圖。如圖3所示,衛星通訊地面站30包含射頻單元(RU)300、支撐架320、分佈單元(DU)310以及前傳介面31。
Please refer to Figure 3, which is a schematic diagram of a satellite communication ground station (Ground Station) using a radio frequency unit. As shown in FIG. 3 , the satellite
支撐架320,主要作為支撐之用,上面裝置有射頻單元300,其中射頻單元300包含天線、射頻類比電路、以及數位電路。天線用以接收
與傳送無線電波訊號,射頻類比電路主要執行包含射頻類比信號的升降頻、濾波、信號的放大與衰減等類比信號處理,而數位電路的部分為本揭示內容之核心,主要是做數位信號處理之運算,可參考圖11為一衛星通訊地面站之射頻單元數位電路實施例之說明。射頻單元300透過前傳介面31,將數位資料雙向傳輸至分佈單元310,其中分佈單元可執行衛星通訊地面站所需之實體層(PHY)相關運算。
The
請參考圖4,圖4為根據本揭示內容之一實施例繪示一種射頻單元數位電路之示意圖。如圖4所示,射頻單元數位電路400包含可程式化數位電路410、固定式數位電路420、類比介面40、數位介面41、以及前傳介面42。
Please refer to FIG. 4 , which is a schematic diagram of a digital circuit of a radio frequency unit according to an embodiment of the present disclosure. As shown in FIG. 4 , the radio frequency unit
可程式化數位電路410包含一前傳介面模組411,其中前傳介面模組411為一前傳介面之傳送與接收器,能夠將射頻單元之資料透過前傳介面42傳送至分佈單元以及接收分佈單元透過前傳介面42傳送至射頻單元之資料。
The programmable
固定式數位電路420包含波束成型(Beamforming)及/或預編碼(Precoding)模組421,以及複數個通訊信號處理模組440a至440n。
The fixed
波束成型及/或預編碼模組421,包含波束成型及/或預編碼兩個部分,其中波束成型主要是做上行(Uplink)與下行(Downlink)之波束成型運算,而預編碼則是用來計算出下行各天線所需傳送之信號。
The beamforming and/or
各通訊信號處理模組440a至440n,包含傳送與接收兩個部份,其中傳送的部分包含逆快速傅立葉轉換(Inverse Fast Fourier Transform,IFFT)422、加入循環字首(Cyclic Prefix Addition,CP Addition)423、波峰係
數削減(Crest Factor Reduction,CFR)424、數位預失真(Digital Pre-distortion,DPD)425、數位升頻器(Digital Up Converter,DUC)426、以及數位類比轉換器(Digital to Analog Converter,DAC)427。首先頻域(Frequency Domain)信號會透過逆快速傅立葉轉換422以及加入循環字首423做正交頻分多工(Orthogonal Frequency Division Multiplexing,OFDM)之調變運算,將頻域信號轉換為時域(Time Domain)信號,然後透過波峰係數削減424將信號的大小限制在所設定之動態範圍內,再透過數位預失真425補償類比電路中因功率放大器(Power Amplifier)造成之非線性失真。最後透過數位升頻器426提高信號取樣頻率及/或移頻,並藉由數位類比轉換器427將數位信號轉換成類比信號,再傳送至射頻單元內的射頻類比電路。
Each communication
各通訊信號處理模組440a至440n,其中在接收的部分包含類比數位轉換器(Analog to Digital Converter,ADC)431、數位降頻器(Digital Down Converter,DDC)430、移除循環字首(Cyclic Prefix Removal,CP Removal)429、以及快速傅立葉轉換(Fourier Transform,FFT)428。首先射頻類比電路之類比信號,會透過類比數位轉換器431轉換成數位信號,再透過數位降頻器430降低信號取樣頻率及/或移頻之處理,最後透過移除循環字首429與快速傅立葉轉換428來做正交頻分多工之解調運算,將時域信號轉換為頻域信號。
Each communication
可程式化數位電路410及/或固定式數位電路420亦可包含以下模組:物理隨機接入信道(PRACH)之處理、自動增益控制(AGC)、正交頻分多工相位補償(OFDM Phase Compensation)、天線校正(Antenna Calibration)、以及同相與正交(I/Q)信號之壓縮與解壓縮。其中物理隨機接
入信道之處理主要是做物理隨機接入信道之相關濾波(Filtering)處理;自動增益控制則用來達到自動增益調節之功能;正交頻分多工相位補償,提供補償正交頻分多工相位之運算;天線校正,用來使得傳送端與接收端之天線與射頻電路之增益能夠一致;同相與正交信號之壓縮與解壓縮,用來使得前傳介面所需傳送與接收之資料可以減少。為使圖4之圖示簡潔,因此未將這些模組繪入,但這些模組亦可包含於圖4之數位電路內。
The programmable
如圖4所示,可程式化數位電路410與固定式數位電路420之間透過一數位介面41來雙向傳輸資料,其中數位介面41可透過如JESD204(A/B/C)、低電壓差分訊號(Low-Voltage Differential Signaling,LVDS)、PCIe(Peripheral Component Interconnect Express)等介面或其它介面來實現;而類比介面40則為一類比信號之介面,可作為射頻類比電路與固定式數位電路420之間的雙向傳輸介面。
As shown in Figure 4, data is transmitted bidirectionally between the programmable
請參考圖5,圖5為根據本揭示內容之一實施例繪示一種射頻單元數位電路之示意圖。如圖5所示,射頻單元數位電路500包含可程式化數位電路510、固定式數位電路520、數位介面50、數位介面51、以及前傳介面52。
Please refer to FIG. 5 , which is a schematic diagram of a digital circuit of a radio frequency unit according to an embodiment of the present disclosure. As shown in FIG. 5 , the radio frequency unit
可程式化數位電路510包含一前傳介面模組511,其中前傳介面模組511為一前傳介面之傳送與接收器,能夠將射頻單元之資料透過前傳介面52傳送至分佈單元以及接收分佈單元透過前傳介面52傳送至射頻單元之資料。
The programmable
固定式數位電路520包含波束成型及/或預編碼模組521以及複數個通訊信號處理模組540a至540n。
The fixed
不同於圖4,圖5之各通訊信號處理模組540a至540n,包含傳送與接收兩個部份,其中傳送的部分只包含逆快速傅立葉轉換(IFFT)522、以及加入循環字首(CP Addition)523,其它如波峰係數削減、數位預失真、數位升頻器、以及數位類比轉換器等數位電路則可整合至射頻單元之射頻類比電路中;而接收的部分只包含快速傅立葉轉換(FFT)524、以及移除循環字首(CP Removal)525,其它如類比數位轉換器、以及數位降頻器等數位電路則可整合至射頻單元之射頻類比電路中。
Different from Figure 4, each communication
可程式化數位電路510及/或固定式數位電路520亦可包含以下模組:物理隨機接入信道之處理、自動增益控制、正交頻分多工相位補償、天線校正、以及同相與正交信號之壓縮與解壓縮。為使圖5之圖示簡潔,因此未將這些模組繪入,但這些模組亦可包含於圖5之數位電路內。
The programmable
如圖5所示,可程式化數位電路510與固定式數位電路520之間透過一數位介面51來雙向傳輸資料,而固定式數位電路520可透過數位介面50雙向傳輸資料至整合在射頻類比電路中之數位電路,其中數位介面51與數位介面50可透過如JESD204(A/B/C)、低電壓差分訊號、PCIe等介面或其它介面來實現。
As shown in Figure 5, the programmable
請參考圖6,圖6為根據本揭示內容之一實施例繪示一種射頻單元數位電路之示意圖。如圖6所示,射頻單元數位電路600包含可程式化數位電路610、固定式數位電路620、固定式數位電路630a至630n、數位介面60a至60n、數位介面61a至61n、數位介面62、以及前傳介面63。
Please refer to FIG. 6 , which is a schematic diagram of a digital circuit of a radio frequency unit according to an embodiment of the present disclosure. As shown in Figure 6, the radio frequency unit
可程式化數位電路610包含一前傳介面模組611,其中前傳介面模組611為一前傳介面之傳送與接收器,能夠將射頻單元之資料透過前傳
介面63傳送至分佈單元以及接收分佈單元透過前傳介面63傳送至射頻單元之資料。
The programmable
固定式數位電路620包含波束成型及/或預編碼模組621。
Fixed
各固定式數位電路630a至630n包含傳送與接收兩個部份,其中傳送的部分包含逆快速傅立葉轉換(IFFT)631、及加入循環字首(CP Addition)632;而接收的部分包含快速傅立葉轉換(FFT)633、及移除循環字首(CP Removal)634。其它如波峰係數削減、數位預失真、數位升頻器、數位類比轉換器、類比數位轉換器、以及數位降頻器等數位電路則可整合至射頻單元之射頻類比電路中。
Each fixed
可程式化數位電路610及/或固定式數位電路620及/或固定式數位電路630a至630n亦可包含以下模組:物理隨機接入信道之處理、自動增益控制、正交頻分多工相位補償、天線校正、以及同相與正交信號之壓縮與解壓縮。為使圖6之圖示簡潔,因此未將這些模組繪入,但這些模組亦可包含於圖6之數位電路內。
The programmable
如圖6所示,可程式化數位電路610與固定式數位電路620之間透過一數位介面62來雙向傳輸資料;固定式數位電路620與固定式數位電路630a至630n之間透過數位介面61a至61n雙向傳輸資料;而固定式數位電路630a至630n透過數位介面60a至60n雙向傳輸資料至整合在射頻類比電路中之數位電路。其中數位介面62、數位介面61a至61n、以及數位介面60a至60n可透過如JESD204(A/B/C)、低電壓差分訊號、PCIe等介面或其它介面來實現。
As shown in Figure 6, data is transmitted bidirectionally between the programmable
請參考圖7,圖7為根據本揭示內容之一實施例繪示一種射頻
單元數位電路之示意圖。如圖7所示,射頻單元數位電路700包含固定式數位電路710、固定式數位電路720、數位介面70、數位介面71、以及前傳介面72。
Please refer to FIG. 7 , which illustrates a radio frequency device according to an embodiment of the present disclosure.
Schematic diagram of unit digital circuit. As shown in FIG. 7 , the radio frequency unit
固定式數位電路710包含一前傳介面模組711,其中前傳介面模組711為一前傳介面之傳送與接收器,能夠將射頻單元之資料透過前傳介面72傳送至分佈單元以及接收分佈單元透過前傳介面72傳送至射頻單元之資料。
The fixed
固定式數位電路720包含波束成型及/或預編碼模組721以及複數個通訊信號處理模組740a至740n。
The fixed
圖7之各通訊信號處理模組740a至740n,包含傳送與接收兩個部份,其中傳送的部分包含逆快速傅立葉轉換(IFFT)722、以及加入循環字首(CP Addition)723;而接收的部分包含快速傅立葉轉換(FFT)724、以及移除循環字首(CP Removal)725。其它如波峰係數削減、數位預失真、數位升頻器、數位類比轉換器、類比數位轉換器、以及數位降頻器等數位電路則可整合至射頻單元之射頻類比電路中。
Each communication
固定式數位電路710及/或固定式數位電路720亦可包含以下模組:物理隨機接入信道之處理、自動增益控制、正交頻分多工相位補償、天線校正、以及同相與正交信號之壓縮與解壓縮。為使圖7之圖示簡潔,因此未將這些模組繪入,但這些模組亦可包含於圖7之數位電路內。
The fixed
如圖7所示,固定式數位電路710與固定式數位電路720之間透過一數位介面71來雙向傳輸資料,而固定式數位電路720可透過數位介面70雙向傳輸資料至整合在射頻類比電路中之數位電路,其中數位介面70與
數位介面71可透過如JESD204(A/B/C)、低電壓差分訊號、PCIe等介面或其它介面來實現。
As shown in Figure 7, the fixed
請參考圖8,圖8為根據本揭示內容之一實施例繪示一種射頻單元數位電路之示意圖。如圖8所示,射頻單元數位電路800包含可程式化數位電路810、可程式化數位電路820、數位介面80、數位介面81、以及前傳介面82。
Please refer to FIG. 8 , which is a schematic diagram of a digital circuit of a radio frequency unit according to an embodiment of the present disclosure. As shown in FIG. 8 , the radio frequency unit
可程式化數位電路810包含一前傳介面模組811,其中前傳介面模組811為一前傳介面之傳送與接收器,能夠將射頻單元之資料透過前傳介面82傳送至分佈單元以及接收分佈單元透過前傳介面82傳送至射頻單元之資料。
The programmable
可程式化數位電路820包含波束成型及/或預編碼模組821以及複數個通訊信號處理模組840a至840n。
The programmable
圖8之各通訊信號處理模組840a至840n,包含傳送與接收兩個部份,其中傳送的部分包含逆快速傅立葉轉換(IFFT)822、以及加入循環字首(CP Addition)823;而接收的部分包含快速傅立葉轉換(FFT)824、以及移除循環字首(CP Removal)825。其它如波峰係數削減、數位預失真、數位升頻器、數位類比轉換器、類比數位轉換器、以及數位降頻器等數位電路則可整合至射頻單元之射頻類比電路中。
Each communication
可程式化數位電路810及/或可程式化數位電路820亦可包含以下模組:物理隨機接入信道之處理、自動增益控制、正交頻分多工相位補償、天線校正、以及同相與正交信號之壓縮與解壓縮。為使圖8之圖示簡潔,因此未將這些模組繪入,但這些模組亦可包含於圖8之數位電路內。
The programmable
如圖8所示,可程式化數位電路810與可程式化數位電路820之間透過一數位介面81來雙向傳輸資料,而可程式化數位電路820可透過數位介面80雙向傳輸資料至整合在射頻類比電路中之數位電路,其中數位介面81與數位介面80可透過如JESD204(A/B/C)、低電壓差分訊號、PCIe等介面或其它介面來實現。
As shown in Figure 8, the programmable
請參考圖9,圖9為根據本揭示內容之一實施例繪示一種射頻單元數位電路之示意圖。如圖9所示,射頻單元數位電路900包含可程式化數位電路910、數位介面90、以及前傳介面91。圖9雖僅包含一可程式化數位電路910,然而由於其它數位電路如波峰係數削減、數位預失真、數位升頻器、數位類比轉換器、類比數位轉換器、以及數位降頻器等模組可整合至射頻單元之射頻類比電路晶片中,因此亦屬於本揭示內容之多晶片數位電路架構範圍內,且為使圖9之圖示簡潔,因此未將整合至射頻類比電路內的數位電路繪入。
Please refer to FIG. 9 , which is a schematic diagram of a digital circuit of a radio frequency unit according to an embodiment of the present disclosure. As shown in FIG. 9 , the radio frequency unit
可程式化數位電路910包含一前傳介面模組911、波束成型及/或預編碼模組912、以及複數個通訊信號處理模組913a至913n。
The programmable
前傳介面模組911為一前傳介面之傳送與接收器,能夠將射頻單元之資料透過前傳介面91傳送至分佈單元以及接收分佈單元透過前傳介面91傳送至射頻單元之資料。
The
各通訊信號處理模組913a至913n,包含傳送與接收兩個部份,其中傳送的部分包含逆快速傅立葉轉換(IFFT)920、以及加入循環字首(CP Addition)921;而接收的部分包含快速傅立葉轉換(FFT)922、以及移除循環字首(CP Removal)923。
Each communication
可程式化數位電路910亦可包含以下模組:物理隨機接入信道之處理、自動增益控制、正交頻分多工相位補償、天線校正、以及同相與正交信號之壓縮與解壓縮。為使圖9之圖示簡潔,因此未將這些模組繪入,但這些模組亦可包含於圖9之數位電路內。
The programmable
可程式化數位電路910透過數位介面90雙向傳輸資料至整合在射頻類比電路中之數位電路,其中數位介面90可透過如JESD204(A/B/C)、低電壓差分訊號、PCIe等介面或其它介面來實現。
The programmable
請參考圖10,圖10為根據本揭示內容之一實施例繪示一種遠距射頻頭端數位電路之示意圖。如圖10所示,遠距射頻頭端數位電路1000包含可程式化數位電路1010、固定式數位電路1020、類比介面103、數位介面101、以及通用公共射頻介面(CPRI)102。
Please refer to FIG. 10 , which is a schematic diagram of a long-range radio frequency head-end digital circuit according to an embodiment of the present disclosure. As shown in Figure 10, the long-range radio frequency head-end
可程式化數位電路1010包含一通用公共射頻介面(CPRI)模組1011,其中通用公共射頻介面模組1011為一通用公共射頻介面之傳送與接收器,能夠將遠距射頻頭端之資料透過通用公共射頻介面102傳送至基頻單元以及接收基頻單元透過通用公共射頻介面102傳送至遠距射頻頭端之資料。
The programmable
固定式數位電路1020包含數位類比轉換器與類比數位轉換器模組1030a至1030n,其中各數位類比轉換器與類比數位轉換器模組1030a至1030n包含數位類比轉換器(DAC)1021及類比數位轉換器(ADC)1022。
The fixed
如圖10所示,可程式化數位電路1010與固定式數位電路1020之間透過一數位介面101來雙向傳輸資料,其中數位介面101可透過如JESD204(A/B/C)、低電壓差分訊號、PCIe等介面或其它介面來實現;而類
比介面103則為一類比信號之介面,可作為射頻類比電路與固定式數位電路1020之間的雙向傳輸介面。
As shown in Figure 10, data is transmitted bidirectionally between the programmable
請參考圖11,圖11為根據本揭示內容之一實施例繪示一種衛星通訊系統射頻單元數位電路之示意圖,其中該射頻單元之數位電路可應用至如衛星通訊地面站(Ground Station)與衛星上之衛星通訊中繼器(Repeater)等系統。如圖11所示,射頻單元數位電路1100包含可程式化數位電路1110、固定式數位電路1120a至1120n、類比介面1130a至1130n、數位介面1131a至1131n、以及前傳介面1132。
Please refer to FIG. 11. FIG. 11 is a schematic diagram illustrating a digital circuit of a radio frequency unit of a satellite communication system according to an embodiment of the present disclosure. The digital circuit of the radio frequency unit can be applied to, for example, a satellite communication ground station (Ground Station) and a satellite. Satellite communication repeater (Repeater) and other systems. As shown in Figure 11, the radio frequency unit
可程式化數位電路1110包含前傳介面模組1111及波束成型模組1112,其中前傳介面模組1111為一前傳介面之傳送與接收器,能夠將射頻單元之資料透過前傳介面1132傳送至分佈單元以及接收分佈單元透過前傳介面1132傳送至射頻單元之資料;波束成型模組1112主要是提供傳送與接收之波束成型運算。
The programmable
各固定式數位電路1120a至1120n,包含傳送與接收兩個部份,其中傳送的部分包含數位升頻器(DUC)1121、以及數位類比轉換器(DAC)1122;而接收的部分包含數位降頻器(DDC)1123、以及類比數位轉換器(ADC)1124。此外,固定式數位電路1120a至1120n亦可整合至射頻類比電路之中,此數位電路架構亦屬於本揭示內容之範圍。
Each fixed
如圖11所示,可程式化數位電路1110與固定式數位電路1120a至1120n之間透過數位介面1131a至1131n來雙向傳輸資料,其中數位介面1131a至1131n可透過如JESD204(A/B/C)、低電壓差分訊號、PCIe等介面或其它介面來實現;而類比介面1130a至1130n則為類比信號之介面,可作為
射頻類比電路與固定式數位電路1120a至1120n之間的雙向傳輸介面。
As shown in Figure 11, data are transmitted bidirectionally between the programmable
40:類比介面 40: Analog interface
41:數位介面 41:Digital interface
42:前傳介面 42: Prequel interface
400:射頻單元數位電路 400: Radio frequency unit digital circuit
410:可程式化數位電路 410: Programmable digital circuits
411:前傳介面模組 411: Prequel interface module
420:固定式數位電路 420: Fixed digital circuit
421:波束成型及/或預編碼模組 421: Beamforming and/or precoding module
422:逆快速傅立葉轉換(IFFT) 422: Inverse Fast Fourier Transform (IFFT)
423:加入循環字首(CP Addition) 423: Add cycle prefix (CP Addition)
424:波峰係數削減(CFR) 424: Crest Factor Reduction (CFR)
425:數位預失真(DPD) 425: Digital predistortion (DPD)
426:數位升頻器(DUC) 426: Digital upconverter (DUC)
427:數位類比轉換器(DAC) 427:Digital-to-analog converter (DAC)
428:快速傅立葉轉換(FFT) 428: Fast Fourier Transform (FFT)
429:移除循環字首(CP Removal) 429: Remove cycle prefix (CP Removal)
430:數位降頻器(DDC) 430: Digital downconverter (DDC)
431:類比數位轉換器(ADC) 431:Analog-to-digital converter (ADC)
440a至440n:通訊信號處理模組 440a to 440n: Communication signal processing module
Claims (10)
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