TWM625090U - Optical sensing package - Google Patents

Abstract

An optical sensing package at least comprises: a photosensitive chip; and a chip packaging layer, which provides partial fixation for the photosensitive chip to form a first window, so that a front surface of the photosensitive chip receives the sensing light through the first window. Thereby, the photosensitive chip can be packaged with the molding compound of the packaging process and the light-receiving window of the photosensitive chip can be defined, wherein the planar size of the package body is close to that of the photosensitive chip, so as to improve the size and thickness defects of the conventional packaging technology. In addition, the electrical connection output and input of the photosensitive chip and the light-emitting chip can be completed by means of conductors and re-wiring, realizing the packaging of the array of electrical connection points, reducing the volume of the optical sensing package, and realizing light-receiving and receiving. Glowing or time-of-flight sensing effects.

Description

Optical sensing package

The present invention relates to an optical sensing package, and in particular, to an optical sensing package that uses a chip encapsulation layer to surround the side of the photosensitive chip and defines a first window for the photosensitive chip to receive sensing light.

Today's smart phones, tablets or other handheld devices are equipped with optical modules, such as Time Of Flight (TOF) sensors, to achieve gesture detection, three-dimensional (3D) imaging or proximity detection, or camera focusing, etc. Features. In operation, the TOF sensor emits near-infrared light into the scene, and uses the time-of-flight information of the light to measure the distance of objects in the scene. The advantages of the TOF sensor are that the calculation amount of depth information is small, the anti-interference is strong, and the measurement range is long, so it has gradually been favored.

The core components of the TOF sensor include: a light source, especially an infrared Vertical Cavity Surface Emitting Laser (VCSEL); a light sensor, especially a Single Photon Avalanche Diode (Single Photon Avalanche Diode, SPAD); and Time to Digital Converter (TDC). SPAD is a photodetector avalanche diode with single-photon detection capability, which can generate current as long as there is a weak light signal. The VCSEL in the TOF sensor transmits a pulse wave to the scene, the SPAD receives the pulse wave reflected from the object to be measured, the TDC records the time interval between the transmitted pulse wave and the received pulse wave, and uses the time of flight to calculate the depth information of the object to be measured .

FIG. 1 shows a schematic diagram of a conventional TOF optical sensing module 300 . As shown in FIG. 1 , the TOF optical sensing module 300 includes a cap 310 , a light-emitting unit 320 , a sensor chip 330 and a substrate 350 . The substrate 350 is, for example, a printed circuit board. The light emitting unit 320 and the sensor chip 330 are disposed on the substrate 350 through an adhesive material. The light emitting unit 320 and the sensor chip 330 are electrically connected to the substrate 350 . At least one sensing pixel 341 and/or at least one reference pixel 331 are formed on the sensor wafer 330 . The cap 310 has an emission window 314 and a reception window 312 and is disposed above the substrate 350 to accommodate the light emitting unit 320 and the sensor chip 330 on the substrate 350 in a chamber 315 of the cap 310 . The light-emitting unit 320 emits the measuring light L1 through the emission window 314 to reach the object (not shown), and the sensing pixel 341 receives the sensing light L3 reflected by the object through the receiving window 312 . After the measurement light L1 is reflected by the cap 310 , the reference light L2 is generated and travels toward the reference pixel 331 . By calculating the time difference between the sensing pixel 341 and the reference pixel 331 receiving light, the distance information can be converted.

In the above-mentioned optical sensing module 300 , the sensing pixels 341 , the reference pixels 331 and the light emitting units 320 are disposed above the substrate 350 by a conventional pick and place method. Next, the sensing pixels 341 , the reference pixels 331 and the light emitting units 320 are electrically connected to the substrate 350 by bonding wires 351 , and then the electrical connection points are pulled out from one side of the substrate 350 to the circuit board. Then, the bonding wire 351 is fixed by using the encapsulant 352 . Next, the cap 310 is assembled on the substrate 350 . Since the sensing pixels 341 , the reference pixels 331 and the light emitting units 320 are arranged in a pick-and-place manner, it is easy to generate placement errors (eg, several tens of micrometers) during production. Furthermore, when assembling the cap 310 , the alignment of the receiving window 312 with the corresponding sensing pixel 341 and/or the emitting window 314 and the corresponding light emitting unit 320 also has production problems in assembly accuracy. More importantly, due to the pick-and-place arrangement and the wire-bonding electrical connection method, the geometric size and thickness of the conventional package are not easily reduced. The area ratio is about 30% to 35%, that is to say, if we want to keep up with the requirements of the trend of light, thin and short electronic products, it is required that the relevant electronic components also have the characteristics of light, thin and short packages and modules. On the other hand, when the gap between the sensing pixel 341 and the light emitting unit 320 is reduced in order to reduce the volume of the optical sensing module 300, the wire bonding process is bound to be severely challenged, and such traditional packaging is The separate manufacturing process of one element is another issue in terms of cost.

Therefore, an object of the present invention is to provide an optical sensing package which utilizes the technology of wafer level packaging and helps to reduce the volume of the optical sensing package.

In order to achieve the above purpose, the present invention provides an optical sensing package, which at least comprises: a photosensitive chip; and a chip packaging layer, which provides partial fixation to multiple sides of the photosensitive chip to form a first window, so that a photosensitive chip can be The front side receives the sensing light through the first window.

In the above-mentioned optical sensing package, the chip encapsulation layer can surround multiple sides of the photosensitive chip and partially cover the front surface of the photosensitive chip, and the chip encapsulation layer can include: a molding compound layer surrounding these sides of the photosensitive chip; a plurality of The conductor runs through the molding compound layer; and a window defining layer is located on the molding compound layer and the photosensitive chip, and has a plurality of first wires and an insulating material covering the first wires, wherein the plurality of first wires on the front side of the photosensitive chip are The electrical contacts are respectively electrically connected to a plurality of contacts on a back surface of the chip packaging layer through the first wires and the conductors, wherein the window defining layer has a first window. The above-mentioned optical sensing package may further include a light-emitting chip, which is disposed on one side of the photosensitive chip, and is surrounded and fixed by a molding compound layer. The window definition layer is further located on the light-emitting chip, and further has a plurality of second wires, the light-emitting chip is electrically connected to the photosensitive chip, wherein the window definition layer further has a second window to expose a part of the light-emitting chip for emitting measurement light.

With the above embodiments, the photosensitive chip can be encapsulated by the molding compound of the packaging process and the light-receiving window of the photosensitive chip can be defined, the window definition layer can be used to define the light-receiving window of the photosensitive chip, and the conductors can be used to match the re-wiring method. To complete the electrical connection output and input of the photosensitive chip and the light-emitting chip, realize the packaging of the array of electrical connection points, reduce the volume of the optical sensing package, and use the rewiring layer to redefine the controlled light-emitting range and light-receiving range.

In order to make the above-mentioned content of the present invention more obvious and easy to understand, preferred embodiments are given below, and are described in detail as follows in conjunction with the accompanying drawings.

The present invention mainly adopts wafer-level packaging technology to manufacture an optical sensing package, wherein the plane size of the package is close to the plane size of the photosensitive chip, which can improve the size and thickness shortcomings of the above-mentioned conventional packaging technology. It is also different from the arrangement and wire bonding of individual chips in the prior art. Instead, the wafer-level batch manufacturing process can be used to reduce costs in mass production, and through integrated optical manufacturing, the arrangement of light-emitting chips and photosensitive chips can be greatly improved. Accuracy (even to micron-level accuracy) completely solves the problems encountered in the prior art, and the details are as follows.

2A to 2B are schematic structural diagrams showing partial steps of an example of a manufacturing method of an optical sensing package according to a preferred embodiment of the present invention. As shown in FIG. 2A , during manufacture, a plurality of photosensitive chips 20 are firstly arranged on a handling wafer 10 at intervals, so that a gap G is formed between adjacent photosensitive chips 20 . Of course, in order to allow the processing wafer 10 to be peeled off and reused, a peeling layer (not shown in the figure) can also be provided between the photosensitive chip 20 and the processing wafer 10. As those skilled in the art should understand, in this figure not expressly stated. Next, the gap G is filled with molding compound to form a molding compound layer 40 . In one example, the molding compound layer 40 can be formed by thermocompression molding, but the present invention is of course not limited to this. In another example, the molding compound can also overflow over the photosensitive wafer 20, and then the molding compound on the photosensitive wafer 20 can be left behind, or the molding compound on the surface of the photosensitive wafer 20 can be removed by grinding, for example. Then, a window defining layer 60 is formed over the photosensitive wafer 20 and the molding compound layer 40, which has a first window 64 (also called a sensing window) that transmits light. In this example, the molding compound of the molding compound layer 40 is an opaque material and is located in the gap G, and the window definition layer 60 partially covers the photosensitive wafer 20, and can be filled with a light-transmitting material (such as an organic or inorganic dielectric material). A transparent layer is formed in the first window 64 as a light transmission medium. Of course, an optical lens 66 with a focusing function can also be formed on the material surface of the first window 64, such as a curved mirror and a diffractive optical element (Diffraction Optical Element, DOE). , filter elements or other optical elements, etc. In the case where the molding compound is only filled in the gap G, the window definition layer 60 may be made of another material (which may be an opaque molding compound, other opaque organic materials, other opaque inorganic materials, or other opaque inorganic materials). A combination of light-transmitting organic and inorganic materials) or a redistribution layer (RDL) above the photosensitive wafer 20, wherein the RDL includes a metal material for forming wires and an insulating material for covering the wires. In the case where the molding compound overflows over the photosensitive wafer 20 from the gap G, the window defining layer 60 may be formed of the molding compound, that is, the molding compound layer 40 provides the first window 64 . In yet another example, a conductor 50 that penetrates the molding compound layer 40 in the gap G may be further included, for example, through molding via (TMV). Conductor 50 is located between handle wafer 10 and window definition layer 60 . A first redistribution (not shown) may be disposed on the surface of the handle wafer 10 , and a second redistribution (not shown) may be disposed in the window definition layer 60 . The purpose of rearranging the electrical connections is achieved by constructing a new wire connection, such as a fan-out wire connection, by the first rewiring, the second rewiring and the conductor 50 .

After the encapsulation is completed, a physical or chemical process (eg, using a laser to irradiate the above-mentioned peeling layer) can be used to peel off the handle wafer 10 , as shown in FIG. 2B , and dicing along the dicing line CL to generate a plurality of optical sensing packages body. Conductors 50 can provide a conductive path from the electrical connection points (not shown) near the front side of the photosensitive chip 20 to the electrical connection points (not shown) near the backside of the photosensitive chip 20, so that through surface mount technology (not shown) Surface Mount Technology, SMT) disposes the optical sensing package on a motherboard (not shown). Therefore, part or all of the components of the optical sensing package can be placed on the processing wafer 10 by using the wafer-level chip-scale packaging process, so as to reduce the packaging area or volume.

2C and 2D are schematic structural diagrams of partial steps of a manufacturing method of another example of an optical sensing package according to a preferred embodiment of the present invention. As shown in FIGS. 2C and 2D , the manufacturing method is similar to that of FIG. 2A or 2B. The light-emitting chip 70 can be further arranged beside the photosensitive chip 20 and in the gap G by the precise alignment effect of the wafer-level manufacturing technology. The plastic layer 40 is filled in the gap G to fix the photosensitive chip 20 and the light-emitting chip 70 , so as to realize a light, thin, short, and small-sized integrated optical device. In addition, the conductor 50, the window definition layer 60 and the RDL are used to complete the electrical connection of the light-emitting chip 70, so as to solve the problem of difficult wiring and overflow of glue, and the molding compound layer 40 is used to configure a light-transmitting The second window 65 (also called the emission window) and the transparent layer filling the second window 65 serve as a light transmission medium. Of course, an optical lens 67 similar to the optical lens 66 can also be disposed above the second window 65 and the transparent layer to control the emission angle and light-emitting characteristics of the light-emitting chip 70 . In another embodiment, the optical sensing package may further include a light-emitting driving module (not shown) for controlling the operation of the light-emitting chip 70 . It can be understood that the light-emitting driving module can be integrated with the photosensitive chip 20 , or can be separated from the photosensitive chip 20 and the light-emitting chip 70 and electrically connected together by wires, so there is no particular limitation here.

FIG. 3 shows a schematic diagram of an optical sensing package according to a preferred embodiment of the present invention. 2A to FIG. 2D have the same reference numerals, and the components have the same functions, and are not repeated here. As shown in FIG. 3 , the optical sensing package 100 at least includes a photosensitive chip 20 and a chip packaging layer 30 . The function of the optical sensing package 100 is not particularly limited to the measurement of the time-of-flight of light, and may be a function of single light receiving, or a function of transmitting and receiving. The chip encapsulation layer 30 surrounds a plurality of side surfaces 22 of the photosensitive wafer 20 , partially covers a front surface 24 of the photosensitive wafer 20 , and has a first window 64 , so that the front surface 24 of the photosensitive wafer 20 partially exposes the chip encapsulation layer 30 and passes through the first window 64 Sensing light L3 from a target (not shown) is received. The chip encapsulation layer 30 provides partial fixation to the outer surface of the photosensitive chip 20 , forms a first window 64 matching the photosensitive function of the photosensitive chip 20 , and provides a certain protection to the photosensitive chip 20 . Optionally, a transparent layer may be formed in the first window 64 to serve as a light transmission medium while protecting the surface of the photosensitive wafer 20 . In another embodiment, of course, the above-mentioned optical lens 66, DOE, filter element or other optical element, etc. can also be formed on the surface of the transparent layer of the first window 64, and similar arrangements are arranged above the second window 65 and the transparent layer. Optical lens 67 of optical lens 66 . Since the wafer-level packaging technology is used, no wire bonding process is required, and the area ratio A1/A2 of the area A1 of the photosensitive chip 20 and the area A2 of the entire optical sensing package 100 can be less than 1 and greater than or equal to 0.5, 0.6, 0.7 or 0.8 and so on.

The chip encapsulation layer 30 includes a molding compound layer 40, a conductor 50, and a window definition layer 60 (with an RDL inside it). The molding compound layer 40 surrounds the side surface 22 of the photosensitive die 20 to hold the photosensitive die 20 in place and provide a connection with the photosensitive die. 20 flush planes. In this example, due to the fixation of the molding compound layer 40 , it is not necessary for the package substrate to support the photosensitive chip 20 upward, so that the overall thickness of the optical sensing package 100 can be reduced to achieve thinning. Conductors 50 run through molding compound layer 40 to provide vertical electrical connections. The window definition layer 60 is located on the molding compound layer 40 and the photosensitive wafer 20, and has a plurality of first wires 61 and an insulating material 63 covering the first wires 61. The first wires 61 provide electrical connections in the horizontal and vertical directions . The electrical contacts 23 on the front surface 24 of the photosensitive chip 20 are electrically connected to the contacts 52 on the back surface of the optical sensing package 100 through the first wires 61 and the conductors 50 respectively (represented by arrows). There are many embodiments of the contact, which are not particularly limited. In one example, the contact includes a solder pad or a solder ball, which may be in a Ball Grid Array (BGA) or a Land Grid Array (LGA). In another example, an additional RDL (not shown in the figure) may also be disposed on the backside of the optical sensing package 100 to redistribute the solder pads or solder balls of the package. In this way, using RDL to cooperate with TMV does not require a wire bonding process, which can reduce the package area or volume. At the same time, because the metal material in the RDL can also isolate light, in addition to using the RDL insulating material to configure the first window 64, you can also The first window 64 is configured by using the metal material of the RDL to control the light-receiving range of the photosensitive wafer 20 .

The side surface of the light-emitting chip 70 is also surrounded and fixed by the molding compound layer 40 . In actual production, the light-emitting chip 70 and the photosensitive chip 20 can be disposed on the processing wafer 10 (see FIG. 2C ) by the precise alignment effect of the wafer-level manufacturing technology, and then the molding compound layer 40 is used to fix the light-emitting The wafer 70 and the photosensitive wafer 20 . Next, a window defining layer 60 is formed on the photosensitive wafer 20 , the light-emitting wafer 70 and the molding compound layer 40 . The window definition layer 60 may have a plurality of second wires 62 to provide electrical connection paths for the light-emitting chip 70 to the outside world. The insulating material 63 of the window definition layer 60 is disposed between the second wire 62 and the first wire 61 and covers the second wire 62 and the first wire 61 . Therefore, in this example, the window definition layer 60 also includes the redistribution layer and the first wires 61 and the second wires 62 disposed therein, so the conductors 50 , the first wires 61 and the second wires 62 can The photosensitive chip 20 and the light-emitting chip 70 are electrically connected to the outside world. In FIG. 3 , the light-emitting chip 70 is electrically connected to the photosensitive chip 20 through the second wires 62 . The advantage of this configuration is that the size of the light-emitting chip 70 is usually much smaller than the size of the photosensitive chip 20 . It is more convenient to manage the connection points on the photosensitive wafer 20 uniformly. The second window 65 of the window definition layer 60 exposes a part of the light-emitting chip 70 to emit the measuring light L1, and the light-emitting range of the light-emitting chip 70 can be controlled, so that the measuring light L1 hits the target object to be measured within the light-emitting range to generate a sense of light. Metering L3.

In one embodiment, the photosensitive wafer 20 has: a photosensitive structure, such as a photodiode, an avalanche diode (Avalanche Photo Diode, APD), etc.; a collimation structure (not shown) located above the photosensitive structure, wherein the collimation The structure may include optical elements such as microlenses, filter layers, optical apertures, etc.; and a sensing circuit for processing electrical signals from the photosensitive structure. The photosensitive wafer 20 may be fabricated using, for example, a Complementary Metal-Oxide Semiconductor (CMOS) process, such as a Front Side Illumination (FSI) or Back Side Illumination (BSI) process, or or other semiconductor processes, the present invention is not limited to this. The material of the photosensitive wafer 20 may include semiconductor materials, such as silicon, germanium, gallium nitride, silicon carbide, gallium arsenide, gallium phosphide, indium phosphide, indium arsenide, indium antimonide, silicon germanium alloy, phosphorus arsenide Gallium alloy, arsenic aluminum indium alloy, arsenic aluminum gallium alloy, arsenic indium gallium alloy, phosphorus indium gallium alloy, phosphorus indium arsenic gallium alloy, or a combination of the above materials. The pixel substrate may further include one or more electrical components (eg, integrated circuits). The integrated circuit may be an analog or digital circuit, which may be implemented as active elements, passive elements, conductive and dielectric layers, etc. formed within a wafer and electrically connected according to the wafer's electrical design and function. In addition, the light-emitting chip 70 may have VCSELs or light-emitting diodes (LEDs), such as infrared LEDs.

4 to 8 are schematic views showing several variations of the optical sensing package of FIG. 3 . As shown in FIG. 4 , this example is similar to FIG. 3 , except that the optical sensing package 100 further includes a retaining wall 80 , which can be disposed on the window definition layer by wafer-level molding or assembly. 60 , the retaining wall body 80 has a first middle window 84 and a second middle window 85 . The first middle window 84 and the second middle window 85 communicate with the first window 64 and the second window 65 respectively, and serve as the light confinement structure for the sensing light L3 and the measuring light L1, further limiting the angle of light emission and light receiving, and avoiding Stray light enters the photosensitive wafer 20 . The material of the retaining wall body 80 may be the same as or different from the material of the molding compound layer 40 .

As shown in FIG. 5 , this example is similar to FIG. 4 , except that the optical sensing package 100 further includes a first optical element 91 located above the first middle window 84 . In another embodiment, the optical sensing package 100 further includes a second optical element 92 located above the second middle window 85 , the first optical element 91 may be an optical lens component required by the photosensitive chip 20 , and the second optical element 91 The optical element 92 may be an optical lens assembly required by the light-emitting wafer 70, and the above-mentioned optical lens assembly includes, but is not limited to, a light-transmitting element or an optical device with special optical functions, such as a filter element for a specific wavelength, etc. Condensing lens or DOE, etc., or a combination of multiple optical functions. The first optical element 91 covering the first middle window 84 or the second optical element 92 covering the second middle window 85 can be disposed on the blocking wall body 80 by assembling, as a light processing structure for the sensing light L3 and the measuring light L1 . Thereby, the first optical element 91 or the second optical element 92 provides a cap-like structure to protect the photosensitive wafer 20 or the light-emitting wafer 70 as a whole, and provide the required optical processing function to realize an assembled optical device.

It can be understood that the photosensitive wafer 20 may further have a reference pixel. The second optical element 92 reflects a part of the measurement light L1 to generate the reference light, the reference pixel receives the reference light, and the optical sensing package 100 and the target are determined according to the time difference between the light-receiving time of the reference pixel and the light-receiving time of the sensing pixel distance of things.

As shown in FIG. 6 , this example is similar to FIG. 3 , except that the optical sensing package 100 further includes a cap 90 , which is disposed on the window defining layer 60 by an assembly method, and is partially located in the first window 64 and the second window 60 . On the window 65, there are light confinement structures and light guide structures for the sensing light L3 and the measuring light L1. The cap 90 includes a body 93 as a light confinement structure, and a first optical element 91 and a second optical element 92 as a light guide structure and connected to the body 93 . The first optical element 91 and the second optical element 92 seal the first upper window 94 and the second upper window 96 of the main body 93 . Thereby, an encapsulation protective cover can be formed as the main body 93 by means of injection molding. The optical lens assembly is first completed or assembled in the encapsulated protective cover to form the cap 90, and then the cap 90 is pasted along the arrow direction with adhesive. Assembled to the window definition layer 60 . The above-mentioned assembly process can be performed in a wafer-level or wafer-level manner.

As shown in FIG. 7 , this example is similar to FIG. 3 except that the light emitting chip 70 is disposed on the window defining layer 60 , and the light emitting chip 70 is electrically connected to the photosensitive chip 20 through the RDL (not shown) in the window defining layer 60 . Although in the structure shown in FIG. 7 , the regions where the light-emitting wafer 70 and the photosensitive wafer 20 are projected on the horizontal plane do not overlap, in another example, the regions where the light-emitting wafer 70 and the photosensitive wafer 20 are projected on the horizontal plane may partially overlap. , thereby reducing the lateral size of the optical sensing package 100 .

As shown in FIG. 8 , this example is similar to FIG. 7 , with the difference that a cap 90 similar to FIG. 6 is provided, and the cap 90 is disposed on the window definition layer 60 , which has the advantages of integration of FIGS. 7 and 6 .

Except that the process of disposing the photosensitive chip and the light-emitting chip on the processing wafer is a pick-and-place process that is not a wafer-level process, the new model can adopt a wafer-level manufacturing method, especially above the photosensitive chip and the light-emitting chip. Manufacturing corresponding optical elements, such as the aforementioned curved mirror, DOE, filter element, or other optical components, etc., can avoid the relative error problem during assembly, and can also solve the assembly and cost problems of individual optical elements.

With the optical sensing package of the above-mentioned embodiments, the area or volume of the package can be effectively reduced, whether by manufacturing the integrated optical element or by assembling the independent optical element. In addition, the molding compound can be used to fix the photosensitive chip, and the rewiring layer can also be used to complete the electrical connection output and input of the photosensitive chip and the light-emitting chip. Since no wire bonding process is required, it can solve the problem of glue overflow of the photosensitive chip. The problem. In addition, BGA or LGA packaging can be implemented to reduce the volume of the optical sensing package to meet the requirements of light, thin and short electronic devices. It is also possible to use the blocking wall body and the cap to cooperate with the optical element to provide an encapsulated optical sensing package to realize the effect of light-receiving, light-receiving or time-of-flight sensing.

The specific embodiments proposed in the detailed description of the preferred embodiments are only used to facilitate the description of the technical content of the present invention, rather than limiting the present invention to the above-mentioned embodiments in a narrow sense, without exceeding the spirit of the present invention and the scope of the patent application. In this case, all the changes and implementations made belong to the scope of the present invention.

A1: Area A2: Area CL: cutting line G: Gap L1: Metering light L2: Reference light L3: Sensing light 10: Handling Wafers 20: Photosensitive wafer 22: Side 23: Electrical contacts 24: Front 30: Chip encapsulation layer 40: Molding compound layer 50: Conductor 52: Contact 60: Window Definition Layer 61: First wire 62: Second wire 63: Insulation material 64: The first window 65: Second window 66: Optical lens 67: Optical lens 70: Luminous chip 80: Retaining wall 84: The first middle window 85: Second middle window 90: cap 91: First Optical Element 92: Second Optics 93: Ontology 94: The first upper window 96: Second upper window 100: Optical sensing package 300:TOF optical sensing module 310: Cap 312: Receive window 314: Launch window 315: Chamber 320: Lighting unit 330: Sensor Chip 331: reference pixel 341: Sensing Pixels 350: Substrate 351: Wire 352: Encapsulant

[FIG. 1] shows a schematic diagram of a conventional optical sensing module. [ FIG. 2A ] and [ FIG. 2B ] are schematic structural diagrams showing partial steps of a manufacturing method of an example of an optical sensing package according to a preferred embodiment of the present invention. [ FIG. 2C ] and [ FIG. 2D ] are schematic structural diagrams showing partial steps of a manufacturing method of another example of an optical sensing package according to a preferred embodiment of the present invention. [ FIG. 3 ] A schematic diagram showing an optical sensing package according to a preferred embodiment of the present invention. [ FIG. 4 ] to [ FIG. 8 ] are schematic views showing several variations of the optical sensing package of [ FIG. 3 ].

A1: Area

A2: Area

L1: Metering light

L3: Sensing light

20: Photosensitive wafer

22: Side

23: Electrical contacts

24: Front

30: Chip encapsulation layer

40: Molding compound layer

50: Conductor

52: Contact

60: Window Definition Layer

61: First wire

62: Second wire

63: Insulation material

64: The first window

65: Second window

66: Optical lens

67: Optical lens

70: Luminous chip

100: Optical sensing package

Claims (22)

An optical sensing package, comprising at least: a photosensitive chip; and A chip encapsulation layer provides partial fixation of the photosensitive chip to form a first window, so that a front surface of the photosensitive chip receives the sensing light through the first window. The optical sensing package of claim 1, wherein the chip encapsulation layer surrounds a plurality of side surfaces of the photosensitive chip, and partially covers the front surface of the photosensitive chip. The optical sensing package as claimed in claim 1, wherein an area ratio of the photosensitive chip to the optical sensing package is less than 1 and greater than or equal to 0.5. The optical sensing package as claimed in claim 2, wherein the chip packaging layer comprises: A layer of molding compound surrounds the sides of the photosensitive wafer. The optical sensing package as claimed in claim 1, further comprising a transparent layer disposed in the first window, wherein the transparent layer can transmit light. The optical sensing package as claimed in claim 5, further comprising an optical lens disposed on the transparent layer. The optical sensing package as claimed in claim 1, further comprising a blocking wall disposed on the chip package layer and having a first middle window as a light confinement structure for the sensing light. The optical sensing package as claimed in claim 7, further comprising a first optical element disposed on the retaining wall and covering the first middle windows respectively, serving as a light processing structure for the sensing light. The optical sensing package as claimed in claim 1, further comprising a cap disposed on the chip package layer and partially above the first window, serving as a light confinement structure and a light guide structure for the sensing light. The optical sensing package as claimed in claim 1, further comprising a light-emitting chip, disposed on one side of the photosensitive chip, and surrounded and fixed by the chip packaging layer. The optical sensing package as claimed in claim 2, wherein the chip packaging layer comprises: a layer of molding compound surrounding the sides of the photosensitive wafer; a plurality of conductors extending through the molding compound layer; and A window defining layer is located on the molding compound layer and the photosensitive chip, and has a plurality of first wires and an insulating material covering the first wires. The optical sensing package as claimed in claim 11, wherein a plurality of electrical contacts on the front surface of the photosensitive chip are electrically connected to a rear surface of the chip packaging layer through the first wires and the conductors, respectively. a plurality of joints, wherein the window definition layer has the first window. The optical sensing package as claimed in claim 11, further comprising: A light-emitting chip, disposed on one side of the photosensitive chip, surrounded and fixed by the molding compound layer, wherein the window defining layer is further located on the light-emitting chip, and further has a plurality of second wires, the light-emitting chip is electrically connected to the light-emitting chip The photosensitive chip, wherein the window definition layer further has a second window to expose a part of the light-emitting chip to emit measurement light. The optical sensing package as claimed in claim 13, further comprising a transparent layer disposed in the first window and the second window, wherein the transparent layer is transparent to light, and the molding compound layer is not transparent to light. The optical sensing package as claimed in claim 13, further comprising a blocking wall disposed on the window definition layer and having a first middle window and a second middle window as the sensing light and the measuring Light confinement structures. The optical sensing package as claimed in claim 15, further comprising a first optical element and a second optical element, disposed on the retaining wall and covering the first middle window and the second middle window, respectively, As the light processing structure of the sensing light and the measuring light. The optical sensing package as claimed in claim 15, further comprising a cap disposed on the window definition layer and partially above the first window and the second window, serving as the sensing light and the measuring light light confinement structure and light guiding structure. The optical sensing package according to claim 1, further comprising: A light-emitting chip for emitting measurement light and disposed on the chip packaging layer. The optical sensing package as claimed in claim 18, further comprising a cap disposed on the chip packaging layer and covering the first window, serving as a light confinement structure and a light guide for the sensing light and the measuring light reference structure. The optical sensing package of claim 19, wherein the cap comprises: a body as the light confinement structure; and A first optical element is connected to the body and serves as the light guiding structure. The optical sensing package as claimed in claim 20, wherein the cap further comprises a second optical element connected to the body and serving as the light guiding structure. The optical sensing package as claimed in claim 1, wherein an area ratio of the photosensitive chip to the optical sensing package is less than 1 and greater than or equal to 0.8.

Images