TWM621178U - Power factor correction circuit - Google Patents
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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Abstract
提供了一種功率因素校正電路,包括輸入整流濾波電路、輸出恒壓控制電路、功率傳輸電路、以及輸出整流濾波電路,其中:輸入整流濾波電路的第一端子連接到功率傳輸電路的第一端子和輸出整流濾波電路的第一端子、第二端子連接到輸出恒壓控制電路的第一端子和輸出整流濾波電路的第二端子;輸出恒壓控制電路的第二端子連接到功率傳輸電路的第二端子和輸出整流濾波電路的第三端子、第三端子連接到輸出整流濾波電路的第四端子;輸出恒壓控制電路包括恒壓開關控制晶片,恒壓開關控制晶片包括內置金屬氧化物半導體場效應電晶體(Metal-Oxide-Semiconductor Field-Effect Transistor,MOSFET)。 A power factor correction circuit is provided, including an input rectification filter circuit, an output constant voltage control circuit, a power transmission circuit, and an output rectification filter circuit, wherein: the first terminal of the input rectification filter circuit is connected to the first terminal of the power transmission circuit and The first terminal and the second terminal of the output rectification filter circuit are connected to the first terminal of the output constant voltage control circuit and the second terminal of the output rectification filter circuit; the second terminal of the output constant voltage control circuit is connected to the second terminal of the power transmission circuit The third terminal and the third terminal of the terminal and the output rectification filter circuit are connected to the fourth terminal of the output rectification filter circuit; the output constant voltage control circuit includes a constant voltage switch control chip, and the constant voltage switch control chip includes a built-in metal oxide semiconductor field effect Transistor (Metal-Oxide-Semiconductor Field-Effect Transistor, MOSFET).
Description
本創作涉及電路領域,尤其涉及一種功率因素校正電路。 This creation relates to the field of circuits, in particular to a power factor correction circuit.
目前,功率因素校正(Power Factor Correction,PFC)電路普遍採用外置MOSFET架構。圖2示出了採用外置MOSFET架構的功率因素校正電路的電路圖。從圖2可以看出,在用於控制外置MOSFET的導通與關斷的控制晶片的晶片供電電壓由其外部的週邊電路提供時,需要額外的退磁檢測繞組來感測功率電感的退磁情況並將表徵功率電感的退磁情況的退磁檢測信號提供給控制晶片的退磁檢測引腳(即,ZCD腳)。由於退磁檢測繞組和外置MOSFET的使用,使得圖2所示的功率因素校正電路的控制晶片的週邊電路成本偏高。 Currently, Power Factor Correction (PFC) circuits generally use an external MOSFET architecture. Figure 2 shows a circuit diagram of a power factor correction circuit using an external MOSFET architecture. It can be seen from Figure 2 that when the chip supply voltage of the control chip used to control the on and off of the external MOSFET is provided by its external peripheral circuit, an additional demagnetization detection winding is needed to sense the demagnetization of the power inductor and The demagnetization detection signal that characterizes the demagnetization of the power inductor is provided to the demagnetization detection pin (ie, ZCD pin) of the control chip. Due to the use of the demagnetization detection winding and the external MOSFET, the peripheral circuit cost of the control chip of the power factor correction circuit shown in FIG. 2 is relatively high.
鑒於上述問題,本創作提供了一種功率因素校正電路。 In view of the above problems, this author provides a power factor correction circuit.
根據本創作實施例的功率因素校正電路,包括輸入整流濾波電路、輸出恒壓控制電路、功率傳輸電路、以及輸出整流濾波電路,其中:輸入整流濾波電路的第一端子連接到功率傳輸電路的第一端子和輸出整流濾波電路的第一端子、第二端子連接到輸出恒壓控制電路的第一端子和輸出整流濾波電路的第二端子;輸出恒壓控制電路的第二端子連接到功率傳輸電路的第二端子和輸出整流濾波電路的第三端子、第三端子連接到輸出整流濾波電路的第四端子;輸出恒壓控制電路包括恒壓開關控制晶片,恒壓開關控制晶片包括內置MOSFET。 The power factor correction circuit according to this creative embodiment includes an input rectification filter circuit, an output constant voltage control circuit, a power transmission circuit, and an output rectification filter circuit, wherein: the first terminal of the input rectification filter circuit is connected to the first terminal of the power transmission circuit One terminal and the first terminal and the second terminal of the output rectification filter circuit are connected to the first terminal of the output constant voltage control circuit and the second terminal of the output rectification filter circuit; the second terminal of the output constant voltage control circuit is connected to the power transmission circuit The second terminal of the output rectification filter circuit and the third terminal and the third terminal are connected to the fourth terminal of the output rectification filter circuit; the output constant voltage control circuit includes a constant voltage switch control chip, and the constant voltage switch control chip includes a built-in MOSFET.
與圖2所示的功率因素校正電路相比,根據本創作實施例的功率因素校正電路將MOSFET集成到了恒壓開關控制晶片內部,無需用於感測功率傳輸電路(例如,功率電感)的功率傳輸情況的功率傳輸檢測電路(例如,退磁檢測繞組)。由於省去了外置MOSFET和退磁檢測繞組,根據本創作實施例的功率因素校正電路的恒壓開關控制晶片的週邊電路成本較低。 Compared with the power factor correction circuit shown in FIG. 2, the power factor correction circuit according to this creative embodiment integrates the MOSFET into the constant voltage switch control chip, and does not need to be used to sense the power of the power transmission circuit (for example, power inductor) Power transmission detection circuit for transmission conditions (for example, demagnetization detection winding). Because the external MOSFET and the demagnetization detection winding are omitted, the peripheral circuit cost of the constant voltage switch control chip of the power factor correction circuit according to the present creative embodiment is lower.
102:輸入整流濾波電路 102: Input rectifier filter circuit
104:輸出恒壓控制電路 104: Output constant voltage control circuit
106:功率傳輸電路 106: Power Transmission Circuit
108:輸出整流濾波電路 108: output rectifier filter circuit
C1:濾波電容 C1: filter capacitor
C2:輸出濾波電容 C2: output filter capacitor
C3:晶片供電電容 C3: Chip power supply capacitor
C4、R1、R2、R3:輸出恒壓設置網路 C4, R1, R2, R3: output constant voltage setting network
C5、C6、R4:環路補償網路 C5, C6, R4: loop compensation network
COMP:環路補償設定腳 COMP: loop compensation setting pin
CS:輸出電流設定腳 CS: Output current setting pin
D1、D2、D3、D4:整流橋 D1, D2, D3, D4: rectifier bridge
D5:防浪湧二極體 D5: Anti-surge diode
D6:輸出整流二極體 D6: Output rectifier diode
DRAIN:內部MOS電晶體汲極腳 DRAIN: Internal MOS transistor drain pin
F1:保險絲 F1: Fuse
GND:晶片基準地腳 GND: chip reference ground
INV:輸出電壓設定腳 INV: Output voltage setting pin
L1:功率電感 L1: Power inductor
R5:輸出電流設置電阻 R5: Output current setting resistance
U1:恒壓開關控制晶片 U1: Constant voltage switch control chip
VDD:晶片供電輸入腳、晶片供電電壓 VDD: chip power supply input pin, chip power supply voltage
VIN:直流輸入電壓 VIN: DC input voltage
從下面結合附圖對本創作的具體實施方式的描述中可以更好地理解本創作,其中: This creation can be better understood from the following description of the specific implementation of this creation in conjunction with the accompanying drawings, in which:
圖1示出了根據本創作實施例的功率因素校正電路的電路圖; Fig. 1 shows a circuit diagram of a power factor correction circuit according to an embodiment of the present creation;
圖2示出了採用外置MOSFET架構的功率因素校正電路的電路圖。 Figure 2 shows a circuit diagram of a power factor correction circuit using an external MOSFET architecture.
下面將詳細描述本創作的各個方面的特徵和示例性實施例。在下面的詳細描述中,提出了許多具體細節,以便提供對本創作的全面理解。但是,對於本領域技術人員來說很明顯的是,本創作可以在不需要這些具體細節中的一些細節的情況下實施。下面對實施例的描述僅僅是為了通過示出本創作的示例來提供對本創作的更好的理解。本創作決不限於下面所提出的任何具體配置,而是在不脫離本創作的精神的前提下覆蓋了元素和部件的任何修改、替換和改進。在附圖和下面的描述中,沒有示出公知的結構和技術,以便避免對本創作造成不必要的模糊。另外,需要說明的是,這裡使用的用語“A與B連接”可以表示“A與B直接連接”也可以表示“A與B經由一個或多個其他元件間接連接”。 The features and exemplary embodiments of various aspects of the present creation will be described in detail below. In the following detailed description, many specific details are proposed in order to provide a comprehensive understanding of this creation. However, it is obvious to those skilled in the art that this creation can be implemented without some of these specific details. The following description of the embodiments is only to provide a better understanding of the present creation by showing an example of the present creation. This creation is by no means limited to any specific configuration proposed below, but covers any modification, replacement and improvement of elements and components without departing from the spirit of this creation. In the drawings and the following description, well-known structures and technologies are not shown in order to avoid unnecessary obscurity of the present creation. In addition, it should be noted that the term "A and B are connected" used herein can mean "A and B are directly connected" or "A and B are indirectly connected via one or more other elements."
鑒於採用外置MOSFET架構的功率因素校正電路的上述缺點,提供了根據本創作實施例的功率因素校正電路。 In view of the above-mentioned shortcomings of the power factor correction circuit adopting the external MOSFET structure, the power factor correction circuit according to the present creative embodiment is provided.
圖1示出了根據本創作實施例的功率因素校正電路的電路圖。如圖1所示,根據本創作實施例的功率因素校正電路包括輸入整流
濾波電路102、輸出恒壓控制電路104、功率傳輸電路106、以及輸出整流濾波電路108,其中:
Fig. 1 shows a circuit diagram of a power factor correction circuit according to an embodiment of the present creation. As shown in Figure 1, the power factor correction circuit according to this creative embodiment includes input rectification
The
輸入整流濾波電路102的第一端子連接到功率傳輸電路106的第一端子和輸出整流濾波電路108的第一端子、第二端子連接到輸出恒壓控制電路104的第一端子和輸出整流濾波電路108的第二端子;
The first terminal of the input
輸出恒壓控制電路104的第一端子連接到輸入整流濾波電路102的第二端子和輸出整流濾波電路108的第二端子、第二端子連接到功率傳輸電路106的第二端子和輸出整流濾波電路108的第三端子、第三端子連接到輸出整流濾波電路108的第四端子;功率傳輸電路106的第一端子連接到輸入整流濾波電路102的第一端子和輸出整流濾波電路108的第一端子、第二端子連接到輸出恒壓控制電路104的第二端子和輸出整流濾波電路108的第三端子;並且
The first terminal of the output constant
輸出整流濾波電路108的第一端子連接到輸入整流濾波電路102的第一端子和功率傳輸電路106的第一端子、第二端子連接到輸入整流濾波電路102的第二端子和輸出恒壓控制電路104的第一端子、第三端子連接到功率傳輸電路106的第二端子和輸出恒壓控制電路104的第二端子、第四端子連接到輸出恒壓控制電路104的第三端子。
The first terminal of the output
如圖1所示,在根據本創作實施例的功率因素校正電路中,輸出恒壓控制電路104包括恒壓開關控制晶片U1,恒壓開關控制晶片U1包括內置MOSFET(圖中未示出)。
As shown in FIG. 1, in the power factor correction circuit according to this creative embodiment, the output constant
與圖2所示的功率因素校正電路相比,根據本創作實施例的功率因素校正電路將MOSFET集成到了恒壓開關控制晶片內部,無需用於感測功率傳輸電路(例如,功率電感)的功率傳輸情況的功率傳輸檢測電路(例如,退磁檢測繞組)。由於省去了外置MOSFET和退磁檢測繞組,根據本創作實施例的功率因素校正電路的恒壓開關控制晶片的週邊電路成本較低。 Compared with the power factor correction circuit shown in FIG. 2, the power factor correction circuit according to this creative embodiment integrates the MOSFET into the constant voltage switch control chip, and does not need to be used to sense the power of the power transmission circuit (for example, power inductor) Power transmission detection circuit for transmission conditions (for example, demagnetization detection winding). Because the external MOSFET and the demagnetization detection winding are omitted, the peripheral circuit cost of the constant voltage switch control chip of the power factor correction circuit according to the present creative embodiment is lower.
如圖1所示,在一些實施例中,輸入整流濾波電路102
包括保險絲F1、整流橋(包括整流二極體D1、D2、D3、D4)、以及濾波電容C1。這裡,輸入整流濾波電路102的交流(Alternate Current,AC)輸入可以為普通交流電輸入。
As shown in Figure 1, in some embodiments, the input
如圖1所示,在一些實施例中,輸出恒壓控制電路104包括恒壓開關控制晶片U1,其中,恒壓開關控制晶片U1包括晶片供電輸入腳(即,VDD腳)、內部MOSFET汲極腳(即,DRAIN腳)、輸出電流設定腳(即,CS腳)、輸出電壓設定腳(即,INV腳)、環路補償設定腳(即,COMP腳)、以及晶片基準地腳(即,GND腳)。
As shown in FIG. 1, in some embodiments, the output constant
如圖1所示,在一些實施例中,輸出恒壓控制電路104還包括輸出電流設置電阻R5,其中,恒壓開關控制晶片U1的輸出電流設定腳(即,CS腳)經由輸出電路設置電阻R5接地。
As shown in FIG. 1, in some embodiments, the output constant
如圖1所示,在一些實施例中,輸出恒壓控制電路104還包括輸出恒壓設置網路,該輸出恒壓設置網路包括R1、R2、R3、C4,其中,該輸出恒壓設置網路的第一端子連接到輸出恒壓控制電路104的第三端子、第二端子連接到恒壓開關控制晶片U1的輸出電壓設定腳(即,INV腳)、第三端子連接到輸出恒壓控制電路104的第一端子。
As shown in FIG. 1, in some embodiments, the output constant
如圖1所示,在一些實施例中,輸出恒壓控制電路104還包括環路補償網路,該環路補償網路包括R4、C5、C6,其中,該環路補償網路的第一端子連接到恒壓開關控制晶片U1的環路補償設定腳(即,COMP腳)、第二端子連接到輸出恒壓控制電路104的第一端子。
As shown in FIG. 1, in some embodiments, the output constant
如圖1所示,在一些實施例中,輸出恒壓控制電路104還包括晶片供電電容C3,該晶片供電電容的第一端子連接到恒壓開關控制晶片U1的晶片供電輸入腳、第二端子連接到輸出恒壓控制電路104的第一端子。
As shown in FIG. 1, in some embodiments, the output constant
如圖1所示,在一些實施例中,功率傳輸電路106包括功率電感L1。
As shown in FIG. 1, in some embodiments, the
如圖1所示,在一些實施例中,輸出整流濾波電路108
包括防浪湧二極體D5、輸出整流二極體D6、以及輸出濾波電容C2。
As shown in Figure 1, in some embodiments, the output
根據本創作實施例的功率因素校正電路的工作過程可以分成以下階段: The working process of the power factor correction circuit according to this creative embodiment can be divided into the following stages:
第一階段:AC輸入電壓經過整流濾波產生直流輸入電壓VIN;直流輸入電壓VIN通過防浪湧二極體D5給輸出濾波電容C2充電,回路D5→C2可以抑制AC輸入電壓的尖峰電壓;當恒壓開關控制晶片U1的晶片供電輸入腳(即,VDD腳)處的晶片供電電壓VDD達到恒壓開關控制晶片U1的啟動電壓時,恒壓開關控制晶片U1開始工作。這裡,恒壓開關控制晶片U1的晶片供電電壓VDD可以是恒壓開關控制晶片U1的週邊電路提供的外部直流電壓。 The first stage: AC input voltage is rectified and filtered to generate DC input voltage VIN; DC input voltage VIN charges output filter capacitor C2 through anti-surge diode D5, loop D5→C2 can suppress the spike voltage of AC input voltage; When the chip supply voltage VDD at the chip power supply input pin (ie, VDD pin) of the voltage switch control chip U1 reaches the starting voltage of the constant voltage switch control chip U1, the constant voltage switch control chip U1 starts to work. Here, the chip supply voltage VDD of the constant voltage switch control chip U1 may be an external DC voltage provided by the peripheral circuit of the constant voltage switch control chip U1.
第二階段:恒壓開關控制晶片U1控制其內部的MOS電晶體導通;直流輸入電壓VIN通過回路C1→L1→DRAIN(即,恒壓開關控制晶片U1的內部MOSFET汲極腳)→CS(即,恒壓開關控制晶片U1的輸出電流設定腳)→R5→C1給功率電感L1儲能;恒壓開關控制晶片U1基於其INV腳處的電壓值調節其COMP腳處的電壓值,並基於其COMP腳連接的環路補償網路的回應控制其CS腳連接的輸出電流設置電阻R5兩端的電壓值,從而控制功率電感L1的儲能;恒壓開關控制晶片U1通過調節其COMP腳處的電壓值來實現功率因素校正電路的寬電壓輸入;當AC輸入電壓恒定時,在直流輸入電壓VIN的每個週期內,恒壓開關控制晶片U1控制其COMP處的電壓值保持恒定,使得恒壓開關控制晶片U1在“第二階段”的工作時間在直流輸入電壓VIN的每個週期內保持恒定,進而使得輸出電流設置電阻R5兩端的電壓值隨著直流輸入電壓VIN的正弦變化而呈正弦變化,實現功率因素校正功能。 The second stage: the constant voltage switch control chip U1 controls the conduction of its internal MOS transistor; the DC input voltage VIN passes through the loop C1→L1→DRAIN (ie, the internal MOSFET drain pin of the constant voltage switch control chip U1)→CS (ie , The output current setting pin of the constant voltage switch control chip U1)→R5→C1 stores energy for the power inductor L1; the constant voltage switch control chip U1 adjusts the voltage value at its COMP pin based on the voltage value at its INV pin, and based on it The response of the loop compensation network connected to the COMP pin controls the output current connected to the CS pin to set the voltage across the resistor R5, thereby controlling the energy storage of the power inductor L1; the constant voltage switch control chip U1 adjusts the voltage at its COMP pin Value to realize the wide voltage input of the power factor correction circuit; when the AC input voltage is constant, the constant voltage switch control chip U1 controls the voltage value at COMP to remain constant during each cycle of the DC input voltage VIN, so that the constant voltage switch The operating time of the control chip U1 in the "second stage" is kept constant during each cycle of the DC input voltage VIN, so that the voltage across the output current setting resistor R5 changes sinusoidally with the sinusoidal change of the DC input voltage VIN. Realize the power factor correction function.
第三階段:功率電感L1存儲的能量通過回路L1→D6→C2→C1→L1釋放到輸出濾波電容C2;恒壓開關控制晶片U1通過其內部檢測電路檢測到功率電感L1存儲的能量釋放結束後,重新開始第二階段的工作。第二階段和第三階段的工作迴圈進行,以確保恒壓開關控制晶片 U1的INV腳處的電壓值維持在內部設定的閾值,從而保持輸出濾波電容C2兩端的輸出電壓恒定;在此期間,隨著輸入直流電壓VIN或者輸出負載電流的改變,恒壓開關控制晶片U1會通過其INV腳採樣輸出電壓,基於採樣的輸出電壓控制其COMP腳處的電壓值改變,並結合COMP腳連接的環路補償網路的回應調節CS腳連接的輸出電流設置電阻R5兩端的電壓值,從而動態調節功率因素校正電路的工作狀態,確保輸出濾波電容C2兩端的輸出電壓保持恒定。同時,恒壓開關控制晶片U1還限制輸出電流設置電阻R5兩端的電壓值的上限閾值,限制功率因素校正電路輸出的最大功率,防止功率因素校正電路的過功率損壞。 The third stage: the energy stored in the power inductor L1 is released to the output filter capacitor C2 through the loop L1→D6→C2→C1→L1; the constant voltage switch control chip U1 detects through its internal detection circuit after the energy stored in the power inductor L1 is released. , Restart the second phase of work. The second and third stages of the work cycle are carried out to ensure that the constant voltage switch controls the chip The voltage value at the INV pin of U1 is maintained at the internally set threshold, so as to keep the output voltage at both ends of the output filter capacitor C2 constant; during this period, as the input DC voltage VIN or the output load current changes, the constant voltage switch controls the chip U1 It will sample the output voltage through its INV pin, control the voltage value change at its COMP pin based on the sampled output voltage, and combine the response of the loop compensation network connected to the COMP pin to adjust the output current connected to the CS pin to set the voltage across the resistor R5 Value, thereby dynamically adjusting the working state of the power factor correction circuit to ensure that the output voltage at both ends of the output filter capacitor C2 remains constant. At the same time, the constant voltage switch control chip U1 also limits the upper threshold of the voltage value across the output current setting resistor R5, limits the maximum power output by the power factor correction circuit, and prevents the power factor correction circuit from overpower damage.
第四階段:當恒壓開關控制晶片U1的VDD腳處的晶片供電電壓VDD降低、AC輸入電壓關斷導致直流輸入電壓VIN下降、或者恒壓開關控制晶片U1觸發內部供電的強制關斷時,恒壓開關控制晶片U1的內部供電電壓隨之降低;當恒壓開關控制晶片U1的內部供電電壓低於其最低工作電壓閾值時,恒壓開關控制晶片U1停止工作;當恒壓開關控制晶片U1的VDD腳處的晶片供電電壓VDD升高、AC輸入電壓再次接通、或者保護復位解除時,恒壓開關控制晶片U1重新返回第一階段並迴圈進行第一階段到第四階段的工作。 The fourth stage: When the chip supply voltage VDD at the VDD pin of the constant voltage switch control chip U1 decreases, the AC input voltage is turned off causing the DC input voltage VIN to drop, or the constant voltage switch control chip U1 triggers the forced shutdown of the internal power supply, The internal power supply voltage of the constant voltage switch control chip U1 decreases accordingly; when the internal power supply voltage of the constant voltage switch control chip U1 is lower than its minimum operating voltage threshold, the constant voltage switch control chip U1 stops working; when the constant voltage switch control chip U1 When the chip supply voltage VDD at the VDD pin rises, the AC input voltage is turned on again, or the protection reset is released, the constant voltage switch control chip U1 returns to the first stage and loops back to the first stage to the fourth stage.
本創作可以以其他的具體形式實現,而不脫離其精神和本質特徵。當前的實施例在所有方面都被看作是示例性的而非限定性的,本創作的範圍由所附權利要求而非上述描述定義,並且落入權利要求的含義和等同物的範圍內的全部改變都被包括在本創作的範圍中。 This creation can be realized in other concrete forms without departing from its spirit and essential characteristics. The current embodiment is regarded as illustrative rather than restrictive in all aspects, and the scope of this creation is defined by the appended claims rather than the foregoing description, and falls within the meaning of the claims and the scope of equivalents. All changes are included in the scope of this creation.
102:輸入整流濾波電路 102: Input rectifier filter circuit
104:輸出恒壓控制電路 104: Output constant voltage control circuit
106:功率傳輸電路 106: Power Transmission Circuit
108:輸出整流濾波電路 108: output rectifier filter circuit
C1:濾波電容 C1: filter capacitor
C2:輸出濾波電容 C2: output filter capacitor
C3:晶片供電電容 C3: Chip power supply capacitor
C4、R1、R2、R3:輸出恒壓設置網路 C4, R1, R2, R3: output constant voltage setting network
C5、C6、R4:環路補償網路 C5, C6, R4: loop compensation network
COMP:環路補償設定腳 COMP: loop compensation setting pin
CS:輸出電流設定腳 CS: Output current setting pin
D1、D2、D3、D4:整流橋 D1, D2, D3, D4: rectifier bridge
D5:防浪湧二極體 D5: Anti-surge diode
D6:輸出整流二極體 D6: Output rectifier diode
DRAIN:內部MOS電晶體汲極腳 DRAIN: Internal MOS transistor drain pin
F1:保險絲 F1: Fuse
GND:晶片基準地腳 GND: chip reference ground
INV:輸出電壓設定腳 INV: Output voltage setting pin
L1:功率電感 L1: Power inductor
R5:輸出電流設置電阻 R5: Output current setting resistance
U1:恒壓開關控制晶片 U1: Constant voltage switch control chip
VDD:晶片供電輸入腳、晶片供電電壓 VDD: chip power supply input pin, chip power supply voltage
VIN:直流輸入電壓 VIN: DC input voltage
Claims (9)
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CN202121128749.6U CN216290673U (en) | 2021-05-25 | 2021-05-25 | Power factor correction circuit |
CN202121128749.6 | 2021-05-25 |
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Publication Number | Publication Date |
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TWM621178U true TWM621178U (en) | 2021-12-11 |
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TW110210595U TWM621178U (en) | 2021-05-25 | 2021-09-07 | Power factor correction circuit |
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TW (1) | TWM621178U (en) |
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2021
- 2021-05-25 CN CN202121128749.6U patent/CN216290673U/en active Active
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