TWM618989U - Sensing pixel circuit - Google Patents

Abstract

A sensing pixel circuit includes a reset unit, a sensing unit and a first transistor. The reset unit is coupled between a bias signal and a node. The sensing unit is coupled between an enable signal and the node. The first transistor includes a first terminal, a control terminal and a second terminal. The first terminal is coupled with a voltage source. The control terminal is coupled with the node. The sensing unit adjusts a voltage on the node according to a received illumination. The first transistor outputs an amplified signal through the second terminal to a data line according to the voltage on the node.

Description

Sensing pixel circuit

This creation is about a sensing pixel circuit, especially a sensing pixel circuit that uses a lower leakage component as a reset switch.

In the existing optical fingerprint sensor, the sensing pixel array includes a plurality of sensing pixel circuits for respectively generating a plurality of sensing signals. Each sensing pixel circuit usually uses a transistor (such as a thin-film transistor (TFT)) as a reset element. When the sensing pixel circuit generates a sensing signal, a special integrated circuit (IC) can be used to correct the error caused by the leakage current. However, in practical applications, due to the production variation, the leakage current characteristics of each transistor in the multiple sensing pixel circuits are not the same. Therefore, the multiple sensing signals are caused by the leakage current. Errors are difficult to accurately correct.

Especially when the optical fingerprint sensor is operated under low light intensity sensing conditions, since the magnitude of the leakage current may be quite close to the magnitude of the sensing current (for example, the proportion of the leakage current in the sensing current reaches a threshold value), The effect of leakage current is even more obvious, leading to loss of sensing signals or reading errors in special integrated circuits. In some cases, the optical fingerprint sensor may generate wrong fingerprint patterns or fingerprint recognition results due to leakage current.

In order to solve the above problems, the present invention provides a sensing pixel circuit, which includes a reset unit, a sensing unit and a first transistor. The reset unit is coupled between the bias signal and the node. The sensing unit is coupled between the enabling signal and the node. The first transistor has a first terminal coupled to the voltage source, a control terminal coupled to the node, and a second terminal. The sensing unit changes the voltage of the node according to the received light, and the first transistor outputs an amplified signal to the data line through the second terminal according to the voltage of the node.

The present invention replaces the existing reset transistor with a lower leakage component, reduces the leakage current of the sensing pixel circuit on the reset path, and thereby improves the loss of signal or reading error caused by the leakage of the sensing signal.

FIG. 1 is a schematic diagram of a sensing pixel circuit 1 and its operation timing. The sensing pixel circuit 1 can be used for an optical fingerprint sensor (not shown in Figure 1) including a sensing pixel array, where the optical fingerprint sensor is, for example, integrated under a screen in a display panel (in-display) optical fingerprint sensor. The sensing pixel array includes M rows*N columns of sensing pixel circuits for generating M*N sensing signals respectively, where M and N are integers greater than zero. The N sensing pixel circuits in each row are connected to a scan line, so that the optical fingerprint sensor selects or enables the N sensing pixel circuits in the same row through the scan line. The M sensing pixel circuits in each column are connected to a data line, so that the optical fingerprint sensor can read the sensing generated by the M sensing pixel circuits in the same row through the data line. Test signal. Therefore, by sequentially enabling the sensing pixel circuit and reading the sensing signal through the scan line and the data line, a fingerprint pattern including M*N pixel resolution can be obtained.

The sensing pixel circuit 1 includes a reset transistor T ₁₁ , an amplification transistor T ₂₁ , a scanning transistor T ₃₁ and a sensing diode D _sensing1 . Sensing diode _D sensing1 parasitic capacitance _C sensing1 to said amplifying transistor T and the parasitic capacitance ₂₁ is represented by C _TFT1. The sensing diode D _{sensing1 is,} for example, a photodiode. The circuit structure of the sensing pixel circuit 1 is shown in Figure 1. In operation, the pixel sensing circuit 1 sequentially performs three-stage operations of reset, integration, and readout to sense a single pixel of the fingerprint.

In the reset phase, when a reset signal V _reset1 is at a high voltage, the reset transistor T _{11 is} turned on. At this time, a readout signal V _g1 sets its voltage to a value through the conduction path of the reset transistor T ₁₁ Reset voltage V _set1 . The anode of the sensing diode D _sensing1 is coupled to the fixed bias signal V _Bias . When the reset signal V _reset1 switches to a low voltage, the reset transistor T _{11 is} turned off, and the read signal V _g1 should be maintained at the reset voltage V _set1 under ideal conditions, and the reset phase is completed.

In the light integration phase, the reset transistor T _{11 is} turned off and the sensing diode D _sensing1 is turned on by the light to generate a photocurrent. The photocurrent is a reverse current that flows from _{the cathode of the sensing diode D sensing1} to the anode pair. The capacitor C _{sensing1 is} discharged, so that the sensing signal V _g1 decreases. The greater the photocurrent, the greater the drop in _{the readout signal V g1.}

In the readout phase, the amplifying transistor T _{21 is} between the amplifying transistor T ₂₁ and the scanning transistor T ₃₁ according to its transconductance (usually expressed in gm), the voltage source V _DD1 and the readout signal V _g1 Generate an amplified signal V _amp1 . In detail, _{the variation of the read signal V g1} is related to the magnitude of the photocurrent, and the amplifying transistor T ₂₁ amplifies the photocurrent according to the variation of the read signal V _g1 to a multiple of its transconductance to generate a current in the form of Amplify the signal V _amp1 . When the scan signal V _scan1 is at a high voltage, the scan transistor T _{31 is} turned on. At this time, the amplified signal V _amp1 is transmitted to a data line DL1 through the conduction path of the scan transistor T _31. In this way, the special integrated circuit of the optical fingerprint sensor (not shown in Figure 1) can read the amplified signal V _{amp1 corresponding to the signal V g1} through the data line DL1 for subsequent signal calibration and fingerprint recognition operate.

In short, the sensing pixel circuit 1 sequentially performs reset, illumination integration, and readout stages, so that a complete sensing pixel array operation is completed row by row in this way.

Sensing pixel circuit of FIG. 2 is a graph of a read signal V _{g1, V} reset1 a timing chart of the reset signal and the scan signal V _scan1. In the present embodiment, the size (Magnitude) is a high voltage when the reset signal and the scan signal _V reset1 V _scan1 is 8 volts, the reset signal and the scan signal _V reset1 V _scan1 size when a low voltage is -8 V, In addition, the reset voltage V _{set1 has} a magnitude of 5 volts, but it is not limited to this. It can be seen from Figure 2 that _{the voltage difference between the read signal V g1} during the reset phase and the integration phase is less than 1 volt (equivalent to a voltage difference of less than 20%). When the voltage drop of the read signal V _g1 due to the leakage current is too high, the sensing signal may be lost or a read error may occur.

Figure 3 is a schematic diagram of the measurement results of the current versus voltage characteristic curve of the reset transistor. As shown in Figure 3, when the reset signal V _reset1 is at a low voltage (for example, -8 volts) and the reset transistor T ₁₁ is turned off, there is still a certain amount of leakage current when the reset transistor T _{11 is turned off.} through the reset transistor T ₁₁ and the parasitic capacitance (e.g., C _TFT1 and C _sensing1) charge, thus resulting in voltage sense signal V _g1 is thus increased, this may increase the integration phase offset sense illumination measured diode _D sensing1 incurred The discharge effect formed by the photocurrent causes the distortion of the light sensing reading. Furthermore, Figure 3 only shows the simulation curve of the current-to-voltage characteristics of a single reset transistor. Due to process variations, each reset transistor in the multiple sensing pixel circuits in practical applications is The leakage current characteristics are not the same. Experiments have found that the magnitude of the leakage current varies from ten times to one hundred times, such as 10 pico-ampere, 1 pico-ampere, 1 pico-ampere to 0.1 pico-ampere, and so on. For the above reasons, it is difficult to accurately predict and correct errors caused by the leakage current of the reset transistor for different sensing signals.

FIG. 4 is a schematic diagram of the ideal voltage, analog voltage, ideal error, and analog error of _{the read signal V g1 of the sensing pixel circuit 1 in FIG. 1.} As shown in Figure 4, as the integration time increases, the difference between the ideal voltage and the analog voltage becomes larger, and the difference between the ideal error (such as zero error) and the analog error becomes larger. If the typical illumination integration phase is 32 milliseconds (milliseconds), experiments have found that until the end of the illumination integration phase, the accumulated error can reach 43%. Based on the above reasons, the error caused by the leakage current of the reset transistor should be a non-negligible factor.

FIG. 5 is a schematic diagram of a sensing pixel circuit 5 and its operation timing according to the first embodiment of the invention. The sensing pixel circuit 5 can replace the sensing pixel circuit 1 in FIG. 1. As shown in FIG. 5, the sensing pixel circuit 5 includes a reset unit 52 and a sensing unit 54, an amplifying transistor T ₁₅ and a scanning Transistor T ₂₅ . As shown in FIG. 5, the reset unit 52 includes a reset diode D _reset5 , and the parasitic capacitance of the reset diode D _reset5 is represented _{by C reset5.} The sensing unit 54 includes a sensing diode D _sensing5 , and the parasitic capacitance of the sensing diode D _sensing5 is represented _{by C sensing5.} The parasitic capacitance of the amplifying transistor T ₁₅ is represented _{by C TFT5.} In one embodiment, the sensing diode D _sensing5 is a photodiode, and the reset diode D _reset5 is a PN junction diode.

As shown in FIG. 5, the reset unit 52 is coupled between the bias signal V _Bias and the node N1, and the sensing unit 54 is coupled between the enable signal V _pulse5 and the node N1. The first terminal of the amplifying transistor T ₁₅ is coupled to the voltage source V _DD5 , and the control terminal of the amplifying transistor T ₁₅ is coupled to the node N1. The sensing unit 54 changes the voltage of the node N1 (ie the read signal V _g5 ) according to the received light, and the amplifying transistor T ₁₅ outputs the amplified signal V _amp5 to the data according to the voltage of the node N1 (ie the read signal V _g5) Line DL5.

Structurally, the cathode of the reset diode D _reset5 is coupled to a bias signal V _Bias , the anode of the reset diode D _reset5 is coupled to the control terminal of the _{amplifying transistor T 15, and the reset diode} D _{reset5 is} used to reset the voltage of a readout signal V _g5 according to the bias signal V _Bias. The reset diode D _{reset5 is} connected in parallel with the parasitic capacitance C _reset5 , which is equivalent to the charge storage capacity _{of the reset diode D reset5.}

The cathode of the sensing diode D _sensing5 is coupled to the control terminal of the _{amplifying transistor T 15 , and the anode of the sensing diode D sensing 5} is coupled to the uniform energy signal V _pulse5 . In other words, the reset diode D _{reset5 is} connected in series with the sensing diode D _sensing5 . The sensing diode D _{sensing5 is} connected in parallel with the parasitic capacitance C _sensing5 , which is equivalent to the charge storage capability of the _{sensing diode D sensing5.} The sensing diode D _{sensing5 is} used to be illuminated to generate a photocurrent, and the photocurrent is used to adjust the magnitude of the _{read signal Vg5.} Specifically, when the sensing diode _D sensing5 illuminated light to generate a photocurrent, photocurrent _C sensing5 discharging the parasitic capacitance, so that the readout signal V _g5 decreased.

In one embodiment, the polarity of the reset diode D _reset5 and the sense diode D _sensing5 may be reversed, so that the direction of the photocurrent is opposite. Specifically, an anode coupled to the reset _reset5 diode D and the cathode of the sensing diode _D sensing5 is connected to the control terminal of the amplifying transistor T _15, the reset diode D is connected to an anode coupled to the bias signal _reset5 V _Bias , the cathode of the sensing diode D _sensing5 is coupled to the enabling signal V _pulse5 . In this configuration, when the sensing diode _D sensing5 illuminated light to generate a photocurrent, photocurrent _C sensing5 charging the parasitic capacitance, so that the readout signal V _g5 rises.

The control end of the amplifying transistor T ₁₅ is coupled to the read signal V _g5 , the first end of the amplifying transistor T ₁₅ is coupled to a voltage source V _DD5 , and the second end of the amplifying transistor T _{15 is coupled to an amplifier} Signal V _amp5 . C _TFT5 parasitic capacitance of the amplifying transistor T and a control terminal connected in parallel a first end _15, which is equivalent to an enlarged capacity of the charge storage transistor T _15. The amplifier transistor T _{15 is used to generate an amplified signal V amp5} at its second end (or output end) _{based on the read signal V g5 at} its control end (or input end), its own transconductance and the voltage source V _DD5 . The control end of the scanning transistor T ₂₅ is coupled to a scan signal V _scan5 , the first end of the scanning transistor T _{25 is coupled to the second end of the amplifying transistor T 15} , and the second end of the scanning transistor T ₂₅ is coupled Connect to a data line DL5. The scanning transistor T _{25 is} used to transmit the amplified signal V _amp5 to the data line DL5 according to the scanning signal V _scan5. In one embodiment, the amplifying transistor T ₁₅ and the scanning transistor T ₂₅ are N-type thin film transistors, _{the control terminals of the amplifying transistor T 15} and the scanning transistor T ₂₅ are gates, and the amplifying transistor T ₁₅ The first end of the scanning transistor T ₂₅ is a drain, and the second end of the _{amplifying transistor T 15} and the scanning transistor T _{25 are a source.}

In operation, the pixel sensing circuit 5 sequentially performs three-stage operations such as reset, light integration, and readout, so as to sense a single pixel of the fingerprint. In the reset phase, when the enable signal V _pulse5 is at a high voltage and is higher than the bias signal V _Bias , the reset diode D _reset5 and the sensing diode D _sensing5 are turned on in a forward bias, and the signal is read at this time The magnitude of V _g5 is the partial voltage of the reset diode D _reset5 and the sensing diode D _sensing5 to the enable signal V _pulse5 and the bias signal V _Bias. For example, assuming that _{the resistances of the reset diode D reset5} and the sensing diode D _sensing5 are proportional to their area, and can be expressed as A _reset5 and A _sensing5 , respectively, the magnitude of the sensing signal V _g5 can be expressed by the following equation.

In one embodiment, if the polarity of the reset diode D _reset5 and the sense diode D _sensing5 are opposite, in the reset phase, when the enable signal V _pulse5 is at a low voltage and is lower than the bias signal V _Bias At this time, the reset diode D _reset5 and the sensing diode D _sensing5 are turned on in a forward direction.

When the enable signal V _{pulse5 is} switched to a low voltage, the reset diode D _reset5 and the sensing diode D _sensing5 are reverse-biased off, the read signal V _g5 should remain unchanged under ideal conditions, and the reset is now complete. stage.

In other words, when the sensing diode D _sensing5 is operating in the forward bias during the reset phase (that is, the non-photosensitive phase), it can be reset; and the sensing diode D _{sensing5 is} in the light integration (ie, the photosensitive phase). The operation is in reverse bias, and the reverse current is used as the photosensitive signal (ie, the read signal V _g5 ).

Regarding the detailed operation method of the illumination integration and readout stage, please refer to the related description in FIG. 1, which will not be repeated here.

It is worth noting that the first embodiment of the present invention uses a reset diode D _reset5 with a lower leakage current as a reset switch to replace the reset transistor T _{11 in} FIG. 1. In this way, this creation can reduce _{the error caused by the leakage current of the read signal V g5} , that is, reduce the voltage drop caused by the leakage current in the read signal V _g5 , thereby reducing the loss of the sensing signal or The probability of a read error.

Figure 6 is the current versus voltage characteristic curve of the reset diode D _{reset5 in Figure 5.} As shown in FIG. 6, the reset diode _D reset5 leakage current when reverse biased closed stable compared to the reset transistor, the reset means the leakage current when the diode in the reverse bias off _D reset5 The current magnitude can be stably maintained at about 0.1 pico-ampere (pA), and the line segment S1 in the current versus voltage characteristic curve shown in Figure 6 basically passes through the leakage of the _{reset diode D reset5} The current is not affected by a gradual increase in the reverse bias voltage (for example, a gradual change from -1V to -5V).

In contrast, as shown in Figure 3, when the reset transistor is used, the leakage current through the reset transistor is larger when the reverse bias is turned off, and the leakage current through the reset transistor will increase with the reverse bias voltage. Increase (for example, gradually change from -1V to -5V) and gradually increase. In addition, the reset transistors of the multiple sensing pixel circuits are affected by the process variation, resulting in each of the multiple sensing pixel circuits. The leakage current characteristics of the transistors are not the same, so it is difficult to be accurately calibrated.

As in the embodiments in FIG. 5 and FIG. 6 of this disclosure, _{the leakage current of the reset diode D reset5} is relatively stable and not affected by the reverse bias voltage. Furthermore, since _{the current characteristics of the sensing diode D sensing5} and the reset diode D _reset5 match, the current characteristics of one can be observed to equivalently infer the current characteristics of the other, which is helpful for estimating the leakage current. The resulting error can be compensated or corrected. In other words, this creation uses a reset diode with a lower leakage current to replace the reset transistor to reduce the voltage drop caused by the leakage current as much as possible, so that the error of the sensing signal is minimized. In this way, when the optical fingerprint sensor is operated under low light intensity (light intensity) sensing conditions, even if the read signal V _g5 is very weak, the optical fingerprint sensor can still be used through the back-end reading circuit with an algorithm. Signal processing (such as amplification, compensation and correction, etc.) to achieve high-precision, high-resolution, low-light intensity small signal reading. Since the error of the sensing signal is minimized, when the back-end reading circuit is combined with an algorithm for signal processing, the error of the sensing signal is not easily amplified, which can prevent the read signal V _g5 from deviating from the dynamic range of the signal processing.

In one embodiment, the sensing diode D _sensing5 and the reset diode D _reset5 are both photodiodes. The advantage of this embodiment is that two photodiodes with the same area are manufactured at the same time, and the semiconductor manufacturing process does not need to be changed (meaning that the sensing pixel circuits 1 and 5 can be applied to the same semiconductor manufacturing process), so that leakage current can be reduced. It can also avoid additional manufacturing costs.

Furthermore, experiments have found that if the positions of the two photodiodes are very close, both the sensing diode D _sensing5 and the reset diode D _reset5 will affect the change of the read signal V _g5. Specifically, under the same light intensity, the size of the photocurrent generated by the two photodiodes in close proximity is almost the same, that is, the unit photocurrent corresponding to the unit light intensity is divided by the two photodiodes, making the reading The light sensing dynamic range of the output signal V _{g5 is correspondingly reduced.} Therefore, in one embodiment, the sensing diode D _sensing5 can be arranged in the sensing area, and the reset diode D _reset5 can be arranged in the non-sensing area, so as to prevent the irradiated light of the sensing area from being reset The diode D _reset5 absorbs and maintains the dynamic range of light sensing. In one embodiment, the reset diode D _reset5 implemented with a PN junction diode can also be arranged in the non-sensing area.

FIG. 7 is a schematic diagram of a sensing pixel circuit 7 according to the second embodiment of the present creation. The sensing pixel circuit 7 can replace the sensing pixel circuit 1 of FIG. 1, and includes a reset diode D _reset7 , an amplification transistor T ₁₇ , a scanning transistor T ₂₇ and a sensing diode D _sensing7 . The parasitic capacitance of the reset diode D _{reset7 is represented by C reset7} , the parasitic capacitance of the sensing diode D _sensing7 is represented by C _sensing7 , and the parasitic capacitance of the amplifying transistor T ₁₇ is represented _{by C TFT7.}

In the sensing pixel circuit 7, the reset diode D _{reset7 is} used to reset the voltage of a read signal V _g7 according to a bias signal V _Bias. When the sensing diode D _sensing7 is turned on by the unanimous energy signal V _pulse7 , the sensing diode D _sensing7 is illuminated to generate a photocurrent I _Photo , and the photocurrent I _Photo discharges the parasitic capacitance C _{sensing7 to} make the sense signal V _g7 drops. The amplifier transistor T _{17 is used to generate an amplified signal V amp7} at its second end (or output end) _{according to the read signal V g7 at} its control end (or input end), its own transconductance and a voltage source V _DD7 . Transistor T ₂₇ for scanning according to a scan signal _V scan7, _V amp7 the amplified signal is transmitted to a data line DL7.

In operation, the pixel sensing circuit 7 sequentially performs three-stage operations such as reset, light integration, and readout, so as to sense a single pixel of the fingerprint. In the reset phase, when the enable signal V _pulse7 is at a high voltage and is higher than the bias signal V _Bias , the reset diode D _reset7 and the sensing diode D _sensing7 are turned on in a forward bias, and the signal is read at this time The size of V _g7 is the partial pressure of the reset diode D _reset7 and the sense diode D _sensing7. Regarding the detailed operation method of the illumination integration and readout stage, please refer to the related description in FIG. 1, which will not be repeated here.

In the second embodiment, the sensing diode D _sensing7 and the reset diode D _reset7 are both photodiodes, and the sensing pixel circuit 7 further includes a light shield M _reset7 . Considering the limitations of circuit area and layout, when the sensing diode D _sensing7 and the reset diode D _reset7 must be arranged adjacently, a light-shielding element _{can be provided between the light-emitting source and the reset diode D reset7} M _reset7 to prevent the unit photocurrent corresponding to the unit light intensity from being shared by the two photodiodes. Specifically, when the area of the sensing diode D _sensing7 and the reset diode D _reset7 are the same, they generate the same photocurrent under the same light intensity. If the reset diode D _reset7 has the same photocurrent under the non-shading design, the light sensing dynamic range of the _{output signal V g7 will be smaller.} Therefore, the second embodiment of the present creation further proposes that the reset diode D _{sensing7 is} designed as a shading design, and only the _{photocurrent change of the sensing diode D sensing7} is sensed when the light is illuminated, so that the dynamic range of light sensing can be optimized. For example, when the illumination integration time is 32 milliseconds and the unit photocurrent corresponding to the unit light intensity is 1 picoampere, _{the voltage drop of the output signal V g5} in Fig. 5 is 0.1732 volts, and the output signal V _{g7 in Fig. 7} The voltage drop is 0.4307 volts. Thus, the light shielding member is provided in the case of _M reset7, the sensing only changes in diode current _D sensing7 light illumination, the light may be optimized so sensed dynamic between the sources, and a reset diode _D reset7 Scope. In one embodiment, the reset diode D _reset7 may be a PN junction diode.

FIG. 8 is a schematic diagram of a cross-sectional stacked structure of a sensing pixel circuit 8 according to the second embodiment of the invention. The sensing pixel circuit 8 can be equivalent to the sensing pixel circuit 7 in FIG. 7. The sensing pixel circuit 8 includes a gate layer 800, an insulating layer 811, a doped semiconductor layer 801, an active layer 802, a source/drain layer 803, a sensing diode 804, and a reset 2极体805. In one embodiment, the sensing pixel circuit 8 further includes at least one of a metal layer 806, a first focusing layer 807, a second focusing layer 808, and a light shielding layer 810; for example, the light shielding element of FIG. 7 It may be at least one of the metal layer 806, the first focusing layer 807, the second focusing layer 808, and the light shielding layer 810. A pinhole 812 is formed in the first focusing layer 807, and a pinhole 809 is formed in the second focusing layer 808. In one embodiment, the light shielding layer 810 is a black matrix (BM).

Structurally, a transistor (such as the amplifying transistor T ₁₇ or the scanning transistor T _{27 in} FIG. 7) includes a gate layer 800, an insulating layer 811, a doped semiconductor layer 801, an active layer 802, and a source/drain layer 803, and the transistor can be disposed on a film substrate (not shown in FIG. 8). The film substrate is parallel to the XY plane formed by the X direction and the Y direction, and multiple layers in the sensing pixel circuit 8 are sequentially stacked from the film substrate toward the Z direction. Specifically, the sensing diode 804 and the reset diode 805 are disposed on the transistor, the metal layer 806 is disposed on the sensing diode 804 and the reset diode 805, and the first focusing layer 807 is disposed on the metal layer 806, the second focusing layer 808 is disposed on the first focusing layer 807, and the light shielding layer 810 is disposed on the second focusing layer 808. In one embodiment, a light source (not shown in FIG. 8) is disposed on the light-shielding layer 810.

In the second embodiment, the projection of the reset diode 805 on the XY plane and the projection of at least one of the metal layer 806, the first focusing layer 807, the second focusing layer 808, and the light shielding layer 810 on the XY plane overlap. The metal layer 806, the first focusing layer 807, the second focusing layer 808, and the light shielding layer 810 can be made of opaque materials to prevent the reset diode 805 from absorbing enough light to generate photocurrent.

In one embodiment, the projection of the sensing diode 804 on the XY plane and the projection of the metal layer 806 and the light shielding layer 810 on the XY plane do not overlap. In one embodiment, the projection of the sensing diode 804 on the XY plane overlaps the pinholes 809 and 812. In one embodiment, the center of the sensing diode 804 and the pinholes 809 and 812 are aligned in the Z direction to realize the light collimation and focusing structure.

FIG. 9 is a partial schematic diagram of a sensing pixel array 9 according to the third embodiment of the present creation. The sensing pixel array 9 includes a plurality of gate switch circuits, a plurality of sensing pixel circuits, a plurality of data lines DL11, DL12, and a plurality of scan lines SL. Assuming that the sensing pixel array includes M rows*N rows (column) sensing pixel circuits, which are used to generate M*N sensing signals (such as V _g11 , V _g12, etc.) respectively, where M, N is an integer greater than zero. The N sensing pixel circuits in each column are connected to a scan line SL, and are connected to a gate switch circuit through the scan line SL to receive the uniform energy signal V _pulse . The N sensing pixel circuits in each column are connected to a power circuit (not shown in FIG. 9) through a power line (not shown in FIG. 9) to receive the voltage source V _DD and the bias signal V _Bias . The M sensing pixel circuits in each row are connected to a data line (such as DL11 or DL12), and are connected to a special integrated circuit (not shown in FIG. 9) through the data line.

The gate switch circuit includes a pull-up transistor and a pull-down transistor; in one embodiment, the pull-up transistor is a P-type transistor, and the pull-down transistor is an N-type transistor. The gate of the pull-up transistor is coupled to a gate control signal V _GOA , the drain of the pull-up transistor is coupled to a high voltage V _High (for example, 8 volts), and the source of the pull-up transistor is coupled to Scan line SL. The gate of the pull-down transistor is coupled to the gate control signal V _GOA , the drain of the pull-down transistor is coupled to a low voltage V _Low (for example, -8 volts), and the source of the pull-down transistor is coupled to the scan line SL . The gate switch circuit is used to _{set the enable signal V pulse} transmitted by the scan line SL to a high voltage V _High or a low voltage V _{Low according to the gate control signal V GOA} . In one embodiment, the gate switch circuit is a gate on array (GOA) switch circuit.

In the sensing pixel array 9, each sensing pixel circuit has the same circuit structure, which is a 2D2T structure; that is, each sensing pixel circuit includes two diodes and two transistors. For example, a sensing pixel circuit includes a reset diode, a sensing diode, an amplifying transistor (such as _Ta11 or T _a12 ), and a scanning transistor (such as T _s11 or T _s12 ) .

In operation, multiple sensing pixel circuits sequentially perform three-stage operations such as reset, illuminance integration, and readout to sense a single pixel of the fingerprint. In the reset phase, when the enable signal V _pulse is at a high voltage and is higher than the bias signal V _Bias , the reset diode and the sense diode are turned on in a forward bias to generate a plurality of reset currents I _Reset , At this time, the magnitudes of the multiple readout signals V _g11 and V _g12 are the partial pressures of the reset diode and the sense diode.

_{A total current I Total} flowing through the pull-up transistor is the sum of a plurality of reset currents I _Reset ; for example, assuming that N sensing pixel circuits in a row are connected to the gate switch circuit through the scan line SL, then flow through The total current I _Total of the pull-up transistor is N times I _Reset , that is, I _Total =N*I _Reset . It is worth noting that the reset current I _Reset and the total current I _Total of the reset diode during forward-bias conduction should be designed within a safe allowable range to prevent the sensing pixel circuit and the gate switch circuit from encountering overcurrent ( overcurrent) and damaged.

In the light integration phase, the reset diode is turned off and the sensing diode is turned on by the light to generate a photocurrent, and the photocurrent discharges the parasitic capacitance, causing the readout signals V _g11 and V _{g12 to} decrease. The greater the photocurrent, the greater the drop in _{the readout signals V g11} and V _g12.

In the readout phase, the amplifying transistors _Ta11 and _{Ta12 are} based on their own transconductance, voltage source V _DD and readout signals V _g11 , V _g12 , in the amplifying transistors _Ta11 , _Ta12 and scanning transistors T _s11 , producing an amplified signal V _a11 between T _s12, V _a12. When the scan signal V _scan is at a high voltage, the scan transistors T _s11 and T _{s12 are} turned on. At this time, the amplified signals V _a11 and V _{a12 are} transmitted to the data lines DL11 and DL12 through the conduction paths of the scan transistors T _s11 and T _s12.

In short, the multiple sensing pixel circuits of the sensing pixel array 9 sequentially perform resetting, illuminating integration, and readout stages, so that a complete sensing pixel array operation is completed row by row.

_{Fig. 10 shows the readout signal V g11} (or V _g12 ), the enable signal V _pulse , the gate control signal V _GOA and the scan signal V _scan of the sensing pixel circuit in Fig. 9 according to the third embodiment of the present invention. Timing diagram. In the previous read phase, the gate control signal V _GOA and the scan signal V _{scan are} at a high voltage (for example, 8 volts), and the enable signal V _pulse is at a low voltage (for example, zero volts). In the current reset phase, the gate control signal V _GOA and the scan signal V _{scan are} at a low voltage (for example, -8 volts), and the enable signal V _{pulse is} switched to a high voltage (for example, 8 volts), so that the signal V _{g11 is read out} rise. In a rising period ΔT of the enable signal V _pulse , for example, 0.632 microseconds (microseconds), the enable signal V _pulse and the read signal V _g11 reach the saturation voltage almost at the same time. Therefore, it can be seen that the reset diode is conducting forward bias The rising rate of the reset current I _Reset is almost the same as the rising rate of the voltage of the enable signal V _{pulse. In this case, the reset current I Reset} of the reset diode when it is turned on in a forward bias can be regarded as 1/N times the _{total current I Total , that is, I Reset} =(1/N)*I _Total .

In summary, the first embodiment of the invention replaces the existing reset transistor with a lower leakage element (such as a PN diode or an optical diode) to reduce the leakage current of the sensing pixel circuit on the reset path. , Thereby improving the loss of the sensed signal or reading errors caused by the leakage of electricity. The second embodiment of the present invention further proposes that the reset diode is designed to be light-shielding, and only the change in the photocurrent of the diode is sensed during illumination, so that the dynamic range of light sensing can be optimized.

Although the content of this creation has been disclosed in the above implementation, it is not used to limit the content of this creation. Anyone who is familiar with this technique can make various changes and modifications without departing from the spirit and scope of this creation content. Therefore, this creation The scope of protection of the content shall be subject to the scope of the attached patent application.

1,5,7: sensing pixel circuit 52: reset unit 54: sensing unit N1: node 800: gate layer 801: doped semiconductor layer 802: active layer 803: source/drain layer 806: metal layer 807: first focus layer 808: second focus 809,812: pinhole 811: insulating layer 9: sensing pixel array _{C reset5, C reset7, C sensing1} , C sensing5: a parasitic capacitance _{C sensing7, C TFT1, C TFT5} , C _TFT7 : parasitic capacitance D _reset5 , D _reset7 , 805: reset diode D _sensing1 , D _sensing5 , D _sensing7 , 804: sensing diode DL1, DL11, DL12, DL5, DL7: data line M _reset7 , 810: Light-shielding element PL: power line SL: scanning line T ₁₁ : reset transistor T ₁₅ , T ₂₁ , _Ta11 , _Ta12 : amplifying transistor T ₃₁ , T ₂₅ , T _s11 , T _s12 : scanning transistor ΔT: rising Time period V _g1 , V _g5 , V _g7 , V _g11 , V _g12 : read out signals V _amp1 , V _amp5 , V _amp7 , V _a11 , V _a12 : amplified signal V _set1 : reset voltage V _reset1 , V _reset5 , V _reset7 : Reset signal V _Bias : Bias signal V _pulse , V _pulse5 , V _pulse7 : Switch signal V _DD , V _DD1 , V _DD5 , V _DD7 : Voltage source V _High : High voltage V _Low : Low voltage V _scan , V _scan5 ,V _scan7 : scan signal V _GOA : gate signal X, Y, Z: direction S1: line segment

In order to make the above and other purposes, features, advantages and embodiments of this creation more obvious and understandable, the description of the attached drawings is as follows: Figure 1 is a schematic diagram of a sensing pixel circuit and its operation timing. FIG. 2 is a simulation timing diagram of the readout signal and the scan signal of the sensing pixel circuit of FIG. 1. FIG. Figure 3 is a schematic diagram of the simulation curve of the current versus voltage characteristics of the reset transistor. FIG. 4 is a schematic diagram of the simulation curve, the ideal curve, the simulation error curve, and the ideal error curve of the readout signal of the sensing pixel circuit in FIG. 1. FIG. FIG. 5 is a schematic diagram of a sensing pixel circuit and its operation timing according to the first embodiment of the invention. Figure 6 is a simulation curve of the current versus voltage characteristics of the reset diode in Figure 5. Figure 7 is a schematic diagram of a pixel sensing circuit according to the second embodiment of the present creation. FIG. 8 is a schematic diagram of a cross-sectional stacked structure of a sensing pixel circuit according to the second embodiment of the invention. Figure 9 is a partial schematic diagram of a sensing pixel array according to the third embodiment of the present creation. FIG. 10 is a timing diagram of the readout signal, enable signal, gate control signal, and scan signal of the sensing pixel circuit in FIG. 9 according to the third embodiment of the present creation.

5: Sensing pixel circuit

52: reset unit

54: Sensing unit

N1: Node

_{C reset5, C sensing5, C TFT5} : parasitic capacitance

D _reset5 : reset the diode

D _sensing5 : sensing diode

DL5: Data line

T ₁₅ : Amplified transistor

T ₂₅ : Scanning transistor

V _g5 : read out the signal

V _Bias : Bias signal

V _pulse5 : enable signal

V _DD5 : voltage source

V _scan5 : scan signal

V _amp5 : Amplify the signal

Claims (14)

A sensing pixel circuit, including: A reset unit, coupled between a bias signal and a node; A sensing unit coupled between the consistent energy signal and the node; and A first transistor having a first terminal coupled to a voltage source, a control terminal coupled to the node, and a second terminal; The sensing unit changes a voltage of the node according to the received light, and the first transistor outputs an amplified signal to a data line through the second terminal according to the voltage of the node. The sensing pixel circuit according to claim 1, further comprising a second transistor, and the second transistor includes: A control terminal, coupled to a scan signal; A first end coupled to the second end of the first transistor; and A second end, coupled to the data line, Wherein, the second transistor selectively transmits the amplified signal generated by the first transistor to the data line according to the scan signal. The sensing pixel circuit according to claim 2, wherein The reset unit includes a reset diode, and the reset diode includes: An anode coupled to the control terminal of the first transistor; and A cathode coupled to the bias signal; and The sensing unit includes a sensing diode, and the sensing diode includes: An anode coupled to the uniform energy signal generated by the optical fingerprint sensor; and A cathode coupled to the control terminal of the amplifying transistor; When the enabling signal is a high voltage and higher than the bias signal, the reset diode and the sense diode are turned on in a forward bias, and the magnitude of the voltage at the node is equal to the reset voltage. The partial pressure of the enabling signal and the reset signal of the polar body and the sensing diode; When the sensing diode is illuminated to generate a photocurrent, the photocurrent discharges a parasitic capacitance of the sensing diode, so that the voltage at the node drops. The sensing pixel circuit according to claim 2, wherein The reset unit includes a reset diode, and the reset diode includes: A cathode coupled to the control terminal of the amplifying transistor; and An anode coupled to the reset signal; and The sensing unit includes a sensing diode, and the sensing diode includes: A cathode, coupled to the uniform energy signal; and An anode coupled to the control terminal of the first transistor; When the enable signal is a low voltage and is lower than the bias signal, the reset diode and the sense diode are turned on in a forward bias, and the magnitude of the voltage at the node is equal to the reset voltage. The partial pressure of the enabling signal and the reset signal of the polar body and the sensing diode; When the sensing diode is illuminated to generate a photocurrent, the photocurrent charges a parasitic capacitance of the sensing diode, causing the voltage of the node to rise. The sensing pixel circuit according to claim 1, wherein the reset unit includes a reset diode, and the reset diode is a P-N junction diode. The sensing pixel circuit according to claim 1, wherein the reset unit includes a reset diode, and the reset diode is a light junction diode. The sensing pixel circuit according to claim 1, further comprising a shading element disposed between the reset unit and a light-emitting source of an optical fingerprint sensor. The sensing pixel circuit according to claim 7, wherein the light shielding element is at least one of a metal layer, a first focusing layer, a second focusing layer, and a light shielding layer. The sensing pixel circuit according to claim 8, wherein the sensing unit and the reset unit are disposed on the first transistor, and the metal layer is disposed on the sensing unit and the reset unit, The first focusing layer is disposed on the metal layer, the second focusing layer is disposed on the first focusing layer, and the light shielding layer is disposed on the second focusing layer. The sensing pixel circuit according to claim 8, wherein the light shielding layer is a black matrix. The sensing pixel circuit according to claim 7, wherein the projection of the reset unit on a plane and at least one of the metal layer, the first focusing layer, the second focusing layer, and the light shielding layer are The projections on this plane overlap. The sensing pixel circuit according to claim 11, wherein the projection of the sensing unit on the plane and the projection of the metal layer and the light shielding layer on the plane do not overlap. The sensing pixel circuit according to claim 11, wherein a first pinhole is formed in the first focusing layer, a second pinhole is formed in the second focusing layer, and the sensing diode is on the plane The projection on the plane overlaps the projections of the first pinhole and the second pinhole on the plane. The pixel sensing circuit according to claim 1, further comprising an optical fingerprint sensor, and the optical fingerprint sensor includes: A sensing pixel array, including: Multiple gate switch circuits; Multiple sensing pixel circuits are arranged in M columns and N rows, where M and N are integers greater than zero; Multiple data lines; Multiple power cords; and Multiple scan lines; The N sensing pixel circuits in each column are connected to one of the plurality of scan lines, and are connected to one of the plurality of gate switch circuits through one of the plurality of scan lines to receive the enable Signal The N sensing pixel circuits in each row are connected to the multiple power lines and receive the voltage source and the reset signal.

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