TWM580254U - Semiconductor structure having 3D inductor - Google Patents

Abstract

A semiconductor structure having 3D inductor includes a first transverse inductor, a longitudinal inductor and a second transverse inductor. The first longitudinal inductor is formed on a first substrate, the second transverse inductor and the longitudinal inductor are formed on a second substrate. The longitudinal inductor is connected to the first transverse inductor by bonding the second substrate to the first substrate, such that a 3D inductor is formed from the first transverse inductor, the longitudinal inductor and the second transverse inductor.

Description

Semiconductor structure with three-dimensional inductance

This creation relates to a semiconductor structure, particularly a semiconductor structure having a three-dimensional inductance.

Conventional inductors are mostly planar inductors formed on the surface of a semiconductor structure. However, in order to generate sufficient inductance, the planar inductor size must be increased, making it difficult to reduce the size of the semiconductor structure and failing to meet the needs of today's semiconductor structure miniaturization.

The purpose of the present invention is to provide a semiconductor structure having a three-dimensional inductance, which is connected to the radial transverse inductance of the two substrates by longitudinal inductance to form a three-dimensional inductor.

A semiconductor structure having a three-dimensional inductor includes: a first substrate having a first conductive pad and a second conductive pad; a first lateral inductance on the first substrate, the first lateral inductance The first inductive portion is radially arranged on the first substrate, wherein the first inductive portion is connected to the first conductive pad, and the other first inductive portion is connected to the second Each of the first inductive portions has a first outer end and a first inner end; a longitudinal inductance is located on the first lateral inductance, the longitudinal inductance has a support layer, a plurality of outer inductance portions, and a plurality Inner inductance part, the The support layer has a plurality of outer openings and a plurality of inner openings, the outer inductor portions are located at the outer openings, the inner inductor portions are located at the inner openings; a second lateral inductance is located at the longitudinal inductor, the second The lateral inductor has an insulating layer and a plurality of second inductor portions, the insulating layer has a plurality of openings arranged radially, the second inductor portions are located at the openings and arranged radially, and each of the second inductor portions has a second outer end and a second inner end, wherein the two outer ends of the outer inductor portion are respectively connected to the first outer end of the first inductor portion and the second outer end of the second inductor portion, each of the inner side The first inner end of the first inductor portion and the second inner end of the second inductor portion are respectively connected to the two ends of the inductor portion, and the outer inductor portion and the inner inductor portion of the second inductor portion are respectively connected Connecting the two adjacent first inductance portions; and a second substrate located on the second lateral inductance.

The first transverse inductance is formed on the first substrate and the second lateral inductance and the longitudinal inductance are formed on the second substrate. After the vertical inductance and the first lateral inductance are joined, the first lateral inductance is obtained. The longitudinal inductance and the second lateral inductance form a three-dimensional inductance, and the three-dimensional inductance is formed to increase the cross-sectional area and increase the inductance thereof.

Referring to FIG. 1 , which is a preferred embodiment of the present invention, a method 10 for fabricating a semiconductor structure having a three-dimensional inductance includes the steps of: “forming a first lateral inductance on a first substrate” 11 and “forming a second lateral direction”. The inductor is on the second substrate 12, "forms the longitudinal inductance in the second lateral inductance" 13 and the "joining the longitudinal inductance and the first lateral inductance" 14 . However, the present invention does not limit the formation of the first lateral inductance on the first substrate 11 and The order of "forming the second lateral inductance on the second substrate" 12 is.

Referring to FIGS. 2, 3 and 5, first, a first lateral electricity is formed on a first substrate 100. The first substrate 100 has a first conductive pad 110 and a second conductive pad 120. The first conductive pad 110 and the second conductive pad 120 are exposed on the surface of the first substrate 100. The first inductive portion 210 has a plurality of first inductive portions 210. The first inductive portions 210 are radially formed on the first substrate 100, and one of the first inductive portions 210 is connected to the first via pads 110. And connecting the other first inductive portion 210 to the second via pad 120, wherein the first inductive portion 210 is formed by etching a metal layer on the first substrate 100, or After a patterned photoresist is formed on a substrate 100, metal deposition is performed by the patterned photoresist to form the first inductor portions 210, which is not limited in the present invention.

Referring to FIGS. 2 and 3, each of the first inductive portions 210 has a first outer end 211 and a first inner end 212. Preferably, one of the first outer ends 211 has a width WO1 greater than the first inner end. One of the widths WI1, and one of the first outer ends 211 of the two adjacent ends 211 is larger than the distance DI1 of the two adjacent first inner ends 212. In this embodiment, the first inductive portions 210 The width decreases from the first outer end 211 toward the first inner end 212.

Referring to FIGS. 2, 3 and 5, the first inductive portions 210 are annularly arranged on the first substrate 100, and two adjacent first inductive portions 210 are respectively connected to the first guide. In the embodiment, the two adjacent first inductive portions 210 are respectively connected to the first guiding pad 110 and the second via the first outer end 211 Guide pad 120.

Referring to FIGS. 4 and 5 , after the first lateral inductor 200 is formed, a protective layer 300 may be formed on the first lateral inductor 200. The protective layer 300 covers the first substrate 100 and the first lateral inductor 200. The protective layer 300 has a plurality of first exposed openings 310 and a plurality of second exposed openings 320. The first exposed openings 310 expose the first outer ends 211 of the first inductive portions 210, and the second exposed openings 320 exposes the first inner end 212 of the first inductive portions 210.

Referring to FIGS. 6-9, a second lateral inductor 500 is formed on a second substrate 400. The second lateral inductor 500 has a plurality of second inductor portions 510 and an insulating layer 520 (the sixth and seventh figures are omitted). The insulating layer 520 is formed on the second substrate 400 and has a plurality of openings 521. The openings 521 are radially arranged, and the second inductive portions 510 are formed in the openings 521. The second inductive portion 510 is also arranged in a radial manner. The insulating layer 520 can be a dry film photoresist. After being attached to the second substrate 400, the openings 521 are formed by a patterning process, and then metal deposition is performed to form. The second inductive portions 510 are in the openings 521 .

Referring to FIG. 7 , each of the second inductive portions 510 has a second outer end 511 and a second inner end 512 . Preferably, one of the second outer ends 511 has a width WO2 greater than the second inner end 512 . a width WI2, and a spacing DO2 of the two adjacent second outer ends 511 is greater than a spacing DI2 of the two adjacent second inner ends 512. In this embodiment, the width of the second inductive portion 510 is The second outer end 511 is tapered toward the second inner end 512.

Referring to FIGS. 10-12, after forming the second lateral inductor 500, a longitudinal inductor 600 is formed on the second lateral inductor 500. The longitudinal inductor 600 has a plurality of outer inductor portions 610 and a plurality of inner inductor portions 620. A support layer 630 (the insulating layer 520 and the support layer 630 are omitted in FIG. 10). The support layer 630 is formed on the second lateral inductor 500 and has a plurality of outer openings 631 and a plurality of inner openings 632. Preferably, The support layer 630 is also a dry film photoresist. After being attached to the second lateral inductor 500, the outer openings 631 and the inner openings 632 are formed by a patterning process, and the outer openings 631 reveal the second openings 631. The second outer end 511 of the inductive portion 510, the inner opening 632 exposes the second inner end 512 of the second inductive portion 510, and then metal deposition is performed to form the outer inductive portion 610 on the outer opening 631 The outer inductors 610 are connected to the second outer ends 511 of the second inductors 510, and the inner inductors 620 are formed in the inner openings 632 to connect the inner inductors 620. The second inductive portions 510 The second inner end 512.

Referring to FIG. 12 , in the embodiment, the height HO of one of the outer inductor portions 610 is substantially equal to the height HI of the inner inductor portion 620 , and the height of the outer inductor portion 610 and the inner inductor portion 620 is greater than the height. The height of the second inductive portion 510 is preferably between 10 and 80 μm, and the height of the second inductive portion 510 is between 3 and 40 μm. between.

In other embodiments, the support layer 630 is formed by laminating two layers of dry film photoresist, and the first layer of dry film photoresist is attached to the second lateral inductor 500 for photoresist patterning and metal deposition processes. Forming the outer inductor portion 610 and the inner inductor portion 620, and then attaching a second layer of dry film photoresist to the first layer of dry film photoresist, and performing photoresist patterning and metal deposition processes again to form The outer inductor portions 610 in the two-layer dry film photoresist are connected to each other, and the inner inductor portions 620 formed in the two-layer dry film photoresist are connected to each other.

Referring to FIGS. 13 and 14, after forming the longitudinal inductor 600, a solder layer 700 may be formed on the longitudinal inductor 600. The solder layer 700 has a plurality of outer joint portions 710 and a plurality of inner joint portions 720. The joint portion 710 is connected to the outer inductor portions 610 , and the inner joint portions 720 are connected to the inner inductor portions 620 .

Referring to FIGS. 15-20 (only the first lateral inductor 200, the longitudinal inductor 600, and the second lateral inductor 500 are shown in FIGS. 15, 16 and 18), the first lateral inductor 200 is formed on the first substrate 100. After the second lateral inductor 500 and the longitudinal inductor 600 are formed on the second substrate 400, the second substrate 400 is flip-chip bonded to the first substrate 100 to bond the vertical inductor 600 and the first lateral inductor 200. The outer inductor portion 610 and the inner inductor portion 620 are respectively connected to the first outer end 211 and the first inner end 212 of the first inductor portion 210. Referring to FIG. 17, each of the outer inductor portions The first outer end 211 of the first inductive portion 210 and the second outer end 511 of the second inductive portion 510 are respectively connected to the two ends of the first inductive portion 210. Referring to FIG. 19, the two ends of the inner inductive portion 620 are respectively respectively The first inner end 212 of the first inductive portion 210 and the second inner end 512 of the second inductive portion 510 are connected.

Referring to FIG. 15, preferably, the first lateral inductor 200 has N+1 first inductive portions 210, and the second lateral inductor 500 has N second inductive portions 510 having N outer sides. The inductor portion 610 and the N inner inductor portions 620, the first inductor portion 210 connected to the first conductive pad 110 is not connected to any outer inductor portion (as shown in FIG. 17), and the second lead pad is connected. The first inductive portion 210 of the 120 is not connected to any of the inner inductive portions (as shown in FIG. 19), the first inductive portion 210, the second inductive portions 510, the outer inductive portions 610, and the inner sides. The inductor portion 620 forms a three-dimensional inductor, and the current flows from the first conductive pad 110 , and flows through the first inductor portion 210 , the outer inductor portion 610 , the inner inductor portion 620 , and the second inductor portion 510 . After that, the second guiding pad 120 flows out.

Referring to FIGS. 15 and 16, preferably, a first overlap area OA1 between the first inductor portion 210 and the second inductor portion 510 connected to the outer inductor portion 610 is greater than the same inner inductor portion 620. A second overlap area OA2 between the first inductor portion 210 and the second inductor portion 510.

When the solder layer 700 on the vertical inductor 600 is bonded to the first lateral inductor 200, each of the outer joint portions 710 is configured to connect the outer inductor portion 610 and the first outer end 211 of the first inductor portion 210 ( As shown in FIG. 17 , each of the inner joint portions 720 is configured to connect the inner inductor portion 620 and the first inner end portion 212 of the first inductor portion 210 (as shown in FIG. 19 ), and the connection is the same. The outer inductor portion 610 and the inner inductor portion 620 of the two inductor portions 510 are respectively connected to the adjacent first inductor portions 210 (as shown in FIG. 20).

Referring to FIGS. 15 , 17 and 19 , the present invention provides a semiconductor structure having a three-dimensional inductance by the manufacturing method 10 , the semiconductor structure including the first substrate 100 and the first lateral inductance on the first substrate 100 . 200, the longitudinal inductor 600 on the first lateral inductor 200, the second lateral inductor 500 on the longitudinal inductor 600, and the second substrate on the second lateral inductor 500 400. Preferably, the protective layer 300 is located between the first substrate 100 and the vertical inductor 600.

In this embodiment, the first substrate 100 is a circuit wafer, the second substrate 400 is a germanium wafer, and a plurality of second lateral inductors 500 and a plurality of longitudinal inductors 600 are formed on the germanium wafer, and are ground and cut. The germanium wafer has a second lateral inductance 500 and a longitudinal inductance 600, and finally the longitudinal inductance 600 and the first lateral inductance 200 are bonded to form the semiconductor structure having a three-dimensional inductance.

In the present invention, the semiconductor inductor technology is used to connect the longitudinal inductors to the radial lateral inductances on different substrates to form a three-dimensional inductance, thereby enabling the micro-finished semiconductor structure to have a higher inductance.

The scope of protection of this creation is subject to the definition of the scope of the patent application, and any changes and modifications made by those skilled in the art without departing from the spirit and scope of this creation are within the scope of protection of this creation. .

10‧‧‧Methods for manufacturing semiconductor structures

11‧‧‧ forming a first lateral inductance on the first substrate

12‧‧‧ forming a second lateral inductance on the second substrate

13‧‧‧ Forming a longitudinal inductance in the second transverse inductance

14‧‧‧Joining the longitudinal inductance and the first transverse inductance

100‧‧‧First substrate

110‧‧‧First lead pad

120‧‧‧Second guide pad

200‧‧‧First transverse inductance

210‧‧‧First Inductance Department

211‧‧‧ first lateral end

212‧‧‧First inner end

300‧‧ ‧ protective layer

310‧‧‧First exposed opening

320‧‧‧Second exposed opening

400‧‧‧second substrate

500‧‧‧second transverse inductance 510‧‧‧Second Inductance Department

511‧‧‧ second outer end 512‧‧‧second inner end

520‧‧‧Insulation 521‧‧‧ openings

600‧‧‧ longitudinal inductance 610‧‧‧Outer Inductance Department

620‧‧‧Inside inductance department 630‧‧‧Support layer

631‧‧‧Outside opening 632‧‧‧ inside opening

700‧‧‧ solder layer 710‧‧‧Outer joint

720‧‧‧Intermediate joint DI1‧‧‧ spacing

DI2‧‧‧ spacing DO1‧‧‧ spacing

DO2‧‧‧ spacing H‧‧‧ Height

HI‧‧‧ height HO‧‧‧ Height

OA1‧‧‧ first overlapping area OA2‧‧‧second overlap area

WI1‧‧‧Width WI2‧‧‧Width

WO1‧‧‧Width WO2‧‧‧Width

Figure 1 is a flow chart of a method of fabricating a semiconductor structure in accordance with a preferred embodiment of the present invention.

Figure 2 is a perspective view of a semiconductor structure in accordance with a preferred embodiment of the present invention.

Figure 3: View from the top of Figure 2.

Figure 4: A schematic representation of the semiconductor structure in accordance with a preferred embodiment of the present invention.

Fig. 5 is a cross-sectional view taken along line A-A of Fig. 4.

Figure 6 is a perspective view of the semiconductor structure in accordance with a preferred embodiment of the present invention.

Figure 7: View from the top of Figure 6.

Figure 8 is a cross-sectional view of the semiconductor structure in accordance with a preferred embodiment of the present invention.

Figure 9 is a cross-sectional view of the semiconductor structure in accordance with a preferred embodiment of the present invention.

Figure 10 is a perspective view of the semiconductor structure in accordance with a preferred embodiment of the present invention.

Figure 11 is a cross-sectional view of the semiconductor structure in accordance with a preferred embodiment of the present invention.

Figure 12 is a cross-sectional view of the semiconductor structure in accordance with a preferred embodiment of the present invention.

Figure 13 is a schematic top view of the semiconductor structure in accordance with a preferred embodiment of the present invention.

Fig. 14 is a cross-sectional view taken along line B-B of Fig. 13.

Figure 15 is a perspective view of the semiconductor structure in accordance with a preferred embodiment of the present invention.

Figure 16 is a schematic top view of the semiconductor structure in accordance with a preferred embodiment of the present invention.

Figure 17 is a cross-sectional view taken along line C-C of Figure 16.

Figure 18: A schematic representation of the semiconductor structure in accordance with a preferred embodiment of the present invention.

Figure 19 is a cross-sectional view taken along line D-D of Figure 18.

Figure 20: Schematic cross-sectional view taken along line E-E of Figure 18.

Claims (9)

A semiconductor structure having a three-dimensional inductor includes: a first substrate having a first conductive pad and a second conductive pad; a first lateral inductance on the first substrate, the first lateral inductance having a plurality of first inductive portions, the first inductive portions are radially arranged on the first substrate, wherein the first inductive portion is connected to the first conductive pad, and the other first inductive portion is connected to the second conductive portion Each of the first inductive portions has a first outer end and a first inner end; a longitudinal inductance is located on the first lateral inductance, the longitudinal inductance has a support layer, a plurality of outer inductance portions, and a plurality of The inner inductor portion has a plurality of outer openings and a plurality of inner openings, wherein the outer inductor portions are located at the outer openings, and the inner inductor portions are located at the inner openings; and a second lateral inductor is located at the inner inductor The second lateral inductor has an insulating layer and a plurality of second inductor portions, the insulating layer has a plurality of radially arranged openings, and the second inductor portions are located at the openings and arranged radially Each of the second inductive portions has a second outer end and a second inner end, wherein the two ends of the outer inductive portion are respectively connected to the first outer end of the first inductive portion and the second inductive portion The two outer ends of the second inductive portion are respectively connected to the first inner end of the first inductive portion and the second inner end of the second inductive portion, and the outer inductors of the second inductive portion are connected And the inner inductance portion respectively connect the two adjacent first inductance portions; and a second substrate located on the second lateral inductance. The semiconductor structure having a three-dimensional inductance as described in claim 1, wherein the two adjacent first inductance portions are respectively connected to the first conductive pad and the second conductive pad. The semiconductor structure having a three-dimensional inductance as described in claim 1, wherein the two adjacent first inductance portions are respectively connected to the first conductive pad and the second conductive pad via the first outer end. The semiconductor structure having a three-dimensional inductor according to claim 1, wherein a first overlap area between the first inductor portion and the second inductor portion connected to the outer inductor portion is greater than the same inner inductor a second overlapping area between the first inductor portion and the second inductor portion. The semiconductor structure having a three-dimensional inductance according to claim 1, wherein one of the first outer ends has a width greater than a width of the first inner end, and one of the second outer ends has a width greater than the second inner end One width. The semiconductor structure having a three-dimensional inductance according to claim 1, wherein a spacing between two adjacent ones of the first outer ends is greater than a spacing between two adjacent ones of the first inner ends. The semiconductor structure having a three-dimensional inductor according to claim 1, wherein a height of one of the outer inductor portions is substantially equal to a height of the inner inductor portion, and the height of the outer inductor portion is greater than the second inductor portion. a height. The semiconductor structure having a three-dimensional inductance according to claim 1, further comprising a solder layer having a plurality of outer joint portions and a plurality of inner joint portions, each of the outer joint portions connecting the outer inductor portion And the first outer end of the first inductor portion, the inner joint portion connecting the inner inductor portion and the first inner end of the first inductor portion. The semiconductor structure having a three-dimensional inductor according to claim 1, further comprising a protective layer between the first substrate and the longitudinal inductor, the protective layer having a plurality of first exposed openings and a plurality of second exposed openings, the first exposed openings exposing the first outer ends of the first inductive portions, and the second exposed openings exposing the first inner ends of the first inductive portions.