TWM520202U - Capacitor trip device and capacitance detection circuit thereof - Google Patents

Description

Capacitor trip device and its capacitance value detecting circuit

This creation is related to the capacitor tripping device; in particular, it refers to a capacitor tripping device with a capacitance value detecting circuit.

Capacitance tripping devices (CTD) are a very common product, but they are often overlooked. More specifically, after the accident caused by the explosion of the Circuit Breaker (CB) in the industry, the relevant quality control personnel found the fault record on the electronic instrument when the fault record was read. After the simulation was restored, The main cause of the above incident was that the capacitor tripping device used to provide the power required for the high-voltage circuit breaker to operate did not operate normally in the event of an accident, resulting in the failure of the high-voltage circuit breaker to immediately isolate the accident, thereby causing a second accident. .

After research, it is found that the main reason why the capacitor tripping device is not actuated is that the capacitor tripping device is used to provide the high-voltage circuit breaker energy, and the capacitor group is attenuated, resulting in insufficient capacity, and thus cannot provide sufficient power to the high-voltage circuit breaker. .

However, the current capacitive tripping device does not have a related circuit design for detecting the capacitance term of the capacitor. Therefore, when the capacitor tripping device is used for a period of time, the user does not know whether the capacitance of the capacitor is sufficient. As a result, it can be known from the above description that when the capacitance of the capacitor trip device is insufficient, in the event of a power jump or a circuit failure, it is difficult to estimate the loss.

In view of this, the purpose of the present invention is to provide a capacitance tripping device and a capacitance value detecting circuit capable of detecting and judging whether the capacitance value of the capacitor group is normal or not.

In order to achieve the above object, the capacitor tripping device provided by the present invention comprises: an AC/DC conversion circuit, a capacitance value detecting circuit, a capacitor group and a warning circuit. The AC/DC conversion circuit is configured to receive an AC power supply and convert it to a DC power supply for output. The capacitance value detecting circuit is electrically connected to the AC/DC converting circuit for receiving the DC power source. The capacitor group is electrically connected to the capacitance value detecting circuit. The warning circuit is electrically connected to the capacitance value detecting circuit. When the capacitance value detecting circuit is not activated, the capacitor group is electrically connected to the AC/DC converting circuit through the capacitor value detecting circuit to receive the DC power source for energy storage; and, when the capacitor value detecting circuit is used When activated, the capacitance value detecting circuit opens an open circuit between the capacitor group and the AC/DC converting circuit, so that the capacitor group stops receiving the DC power source, and discharges the capacitor group for a fixed time, and then detects the Whether the storage voltage of the capacitor group after the fixed time is lower than a rated value, and when the rated value is lower than the rated value, an error signal is generated to the warning circuit, and the warning circuit receives the error signal, and generates a Warning message.

In order to achieve the above object, the capacitor value detecting circuit provided by the present invention comprises: a starting switch, a trigger circuit, a charging circuit, a discharging circuit and a voltage comparing circuit. The start switch is configured to emit a start signal when the capacitance value detecting circuit is activated. The trigger circuit is electrically connected to the start switch to receive the start signal, and the trigger circuit sends a trigger signal after receiving the start signal and after the fixed time. The charging circuit is electrically connected to the starting switch, the AC/DC converting circuit and the capacitor group; when the charging circuit does not receive the starting signal output by the starting switch, the charging circuit is in an on state, so that the capacitor group is transparent The charging circuit is electrically connected to the The AC/DC conversion circuit can receive the DC power supply for energy storage; when the charging circuit receives the startup signal, the charging circuit exhibits a blocking state, causing an open circuit between the capacitor group and the AC/DC conversion circuit to stop receiving DC power supply. The discharge circuit is electrically connected to the start switch, the trigger circuit and the capacitor group, and is configured to control the capacitor group to start discharging when receiving the start signal, and after receiving the trigger signal, control the capacitor group to stop discharging. The voltage comparison circuit is electrically connected to the capacitor group for detecting whether the storage voltage when the capacitor group stops discharging is lower than the rated value, and when the rated value is lower than the rated value, the error signal is generated.

The effect of the creation is that the capacitor tripping device and its capacitance value detecting circuit can detect the capacitance of the capacitor group, and when the capacitance is too low, the user can immediately replace the capacitor group to ensure that the capacitor group has sufficient Electrical energy to discharge.

100,200‧‧‧Capacitor tripping device

10‧‧‧AC and DC conversion circuit

20‧‧‧Capacitance value detection circuit

21‧‧‧Start switch

22‧‧‧Trigger circuit

23‧‧‧Charging circuit

24‧‧‧Discharge circuit

25‧‧‧Voltage comparison circuit

251‧‧‧First voltage conversion circuit

252‧‧‧Rating generation circuit

V21‧‧‧1st foot

V24‧‧‧3rd foot

30‧‧‧Capacitor group

40‧‧‧Warning circuit

50‧‧‧Voltage detection circuit

51‧‧‧Second voltage conversion circuit

60‧‧‧ display circuit

70‧‧‧First relay

75‧‧‧Second relay

80‧‧‧ processor

90‧‧‧ display

101‧‧‧shell

102‧‧‧ dry joints

SW‧‧ switch

Vc‧‧‧ storage voltage

Vdc‧‧‧DC power supply

VS‧‧‧ power supply

ZD‧‧‧Jenner diode

C1~C4‧‧‧ capacitor

D1, D2‧‧‧ diode

L1~L4‧‧‧Light Emitter

R0~R34‧‧‧ resistance

OP1~OP4‧‧‧First Comparator~Four Comparator

Q1~Q15‧‧‧First transistor~Fifteenth transistor

1 is a block diagram of a capacitor tripping device of the first embodiment of the present invention.

FIG. 2 is a block diagram showing the capacitance value detecting circuit, the AC/DC converting circuit, the capacitor group, and the warning circuit of the first embodiment.

3 is a circuit diagram of the start switch, the trigger circuit, the charging circuit, the discharge circuit, and the capacitor group of the first embodiment of the present invention.

Fig. 4 is a circuit diagram showing the voltage comparison circuit and the warning circuit of the first embodiment described above.

FIG. 5 is a circuit diagram of the voltage detecting circuit of the first embodiment of the present invention.

Fig. 6 is a perspective view showing the capacitor tripping device of the first embodiment described above.

Figure 7 is a block diagram of a capacitor tripping device of the second embodiment of the present invention.

In order to explain the present invention more clearly, the preferred embodiment will be described in detail with reference to the accompanying drawings. Referring to FIG. 1 to FIG. 5, a capacitor tripping device of a first embodiment is created.

As shown in FIG. 1 , the capacitor tripping device 100 includes an AC/DC converting circuit 10 , a capacitance detecting circuit 20 , a capacitor group 30 , a warning circuit 40 , a voltage detecting circuit 50 , a display circuit 60 , and A first relay 70 and a second relay 75.

The AC/DC converter circuit 10 is configured to receive an AC power source and convert it to a DC power source Vdc (the voltage in the embodiment is 110 volts) and output it. The capacitance value detecting circuit 20 is electrically connected to the AC/DC converting circuit 10 for receiving the DC power source Vdc. The capacitor group 30 is electrically connected to the capacitance value detecting circuit 20. The warning circuit 40 is electrically connected to the capacitance value detecting circuit 20.

When the capacitance detecting circuit 20 is not activated, the capacitor group 30 is electrically connected to the AC/DC converting circuit 10 through the capacitor value detecting circuit 20 to receive the DC power source Vdc for energy storage.

In addition, when the capacitance value detecting circuit 20 is activated, the capacitance value detecting circuit 20 will open the capacitor group 30 and the AC/DC converting circuit 10, so that the capacitor group 30 stops receiving the DC power source Vdc. And discharging the capacitor group 30 for a fixed time, and then the capacitance detecting circuit 20 detects whether the storage voltage Vc of the capacitor group 30 after the fixed time is lower than a rated value, thereby deducing the Whether the capacitance of the capacitor group 30 is insufficient. In other words, when the capacitance value of the capacitor group 30 is too low, the storage voltage Vc (FIG. 2) after the capacitor group 30 is discharged for a fixed period of time will have a phenomenon lower than the rated value. At this time, the capacitance value is generated. The detecting circuit 20 generates an error signal to the warning circuit 40, and after receiving the error signal, the warning circuit 40 generates an alert message to inform the user that the capacitance value is insufficient. On the contrary, if it is the electricity When the storage voltage Vc of the capacitor group 30 after the capacitance detecting circuit 20 is measured is not lower than the rated value, it indicates that the capacitance value of the capacitor group 30 still meets the preset standard. At this time, the capacitor The value detecting circuit 20 generates a normal signal to the warning circuit 40, and after receiving the normal signal, the warning circuit 40 generates a normal message to inform the user that the capacitance value still meets the standard.

The voltage detecting circuit 50 is electrically connected to the AC/DC converting circuit 10 for receiving the DC power source Vdc and outputting a voltage normal signal when the DC power source Vdc is within a rated range, or when the DC power source Vdc exceeds or When it is below the rated range, a voltage abnormal signal is output.

The display circuit 60 is electrically connected to the voltage detecting circuit 50 for receiving the voltage normal signal or the voltage abnormal signal, and outputting a corresponding display message according to the voltage normal signal and the voltage abnormal signal to notify the user of the current voltage. status.

The first relay 70 is electrically connected to the capacitance value detecting circuit 20 for receiving the error signal generated by the capacitance value detecting circuit 20, and generates a corresponding electrical change according to the error signal (such as a contact point). From the normally closed state to the normally open state, or the normally open state to the normally closed state).

The second relay 75 is electrically connected to the display circuit 60, and when the display circuit 60 receives the voltage abnormal signal, it generates a corresponding electrical change (for example, the contact is changed from the normally closed state to the normally open state, or The normally open state is changed to the normally closed state).

The first relay 70 and the second relay 75 are electromagnetic relays in this embodiment, but in other embodiments, they may be optical relays, reed relays or other different types of relays, which are not limited thereto.

In addition, in order to describe the related circuit components of the capacitor value detecting circuit 20 in this embodiment, the capacitor value detecting circuit 20 of the present embodiment mainly includes a starting switch 21 and a trigger circuit 22. A charging circuit 23, a discharging circuit 24, and a voltage comparing circuit 25. its The start switch 21 is configured to emit a start signal when the capacitance value detecting circuit 20 is activated.

The trigger circuit 22 is electrically connected to the start switch 21 to receive the start signal, and the trigger circuit 22 sends a trigger signal after receiving the start signal and after the fixed time.

The charging circuit 23 is electrically connected to the starting switch 21, the AC/DC converting circuit 10, and the capacitor group 30. In addition, when the charging circuit 23 does not receive the activation signal output by the activation switch 21, the charging circuit 23 is in an on state, so that the capacitor group 30 can be electrically connected to the AC/DC conversion circuit 10 through the charging circuit 23. The DC power source is received for energy storage. On the other hand, when the charging circuit 23 receives the start signal, the charging circuit 23 assumes a blocking state, causing an open circuit between the capacitor group 30 and the AC/DC converting circuit 10 to stop receiving the DC power source.

The discharge circuit 24 is electrically connected to the start switch 21, the trigger circuit 22, and the capacitor group 30, and is configured to control the capacitor group 30 to start discharging when receiving the start signal, and receive the trigger signal (ie, After the fixed time), the capacitor group 30 is controlled to stop discharging.

The voltage comparison circuit 25 is electrically connected to the capacitor group 30 and the warning circuit 40 for detecting whether the storage voltage Vc after the capacitor group 30 stops discharging is lower than the rated value, and lower than the rated value. When the value is generated, the error signal is generated to the warning circuit 40, or when the storage voltage Vc is not lower than the rated value, the normal signal is generated to the warning circuit 40.

In addition, in order to more clearly illustrate the circuit design of the present invention, referring to FIG. 3, the capacitor group 30 of the embodiment includes capacitors C3 and C4 connected in parallel, and the total capacitance value of the capacitor group 30 is designed to be 4400 μF. However, other values may be used in other embodiments, and are not limited thereto. The detailed circuit of the start switch 21, the trigger circuit 22, the charging circuit 23, and the discharge circuit 24 is as follows: In the embodiment, the start switch 21 is a double-pole single-throw switch, and the third leg thereof And the 4th foot is grounded. When the start switch 21 is not pressed, the first leg V21 and the second leg are vacant. After the start switch 21 is pressed, the first leg V21 and the second leg of the start switch 21 are grounded, and an activation signal is issued to cause the capacitance value detecting circuit 20 to start operating. In other words, the activation signal generated by the start switch 21 in the embodiment is a low voltage level signal (ie, a ground level). Of course, in other feasible implementations, the activation signal can also be a high voltage level signal, a pulse signal or other feasible electrical signals.

In addition, the trigger circuit 22 includes a trigger signal generator IC, a plurality of capacitors C1 and C2, and a plurality of resistors R0 R R3. The trigger signal generator IC in this embodiment uses the LM555 timer, but is not limited thereto. The connection relationship of the above components is as follows. One end of the capacitor C1 is electrically connected to the sixth and seventh legs of the trigger signal generator IC, and is electrically connected to a power source VS (in this embodiment, DC 12 volts) through the resistor R1, and The other end is grounded. The capacitor C2 is connected in parallel with the resistor R0, and one end is electrically connected to the second leg of the trigger signal generator IC and electrically connected to the power source VS through the resistor R2, and the other end thereof is electrically connected to the second switch of the start switch 21 Feet. One end of the resistor R3 is electrically connected to the power source VS, and the other end of the resistor R3 is electrically connected to the first leg V21 of the start switch 21.

The charging circuit 23 includes a first transistor Q1, a second transistor Q2, a resistor R4, and a resistor R5. The first transistor Q1 in the embodiment is an NPN transistor and the second transistor Q2 is a P channel MOSFET. The connection relationship of the above components is as follows: the emitter of the first transistor Q1 is grounded, the base thereof is electrically connected to the first leg V21 of the start switch 21, and the collector pass resistance R5 and the second transistor Q2. The gate is electrically connected. The source of the second transistor Q2 is electrically connected to the AC/DC conversion circuit 10 and the drain are electrically connected to the capacitor bank 30. The two ends of the resistor R4 are electrically connected to the source and the gate of the second transistor Q2, respectively. In addition, after the capacitors C3 and C4 are connected in parallel, one end thereof is electrically connected to the drain of the second transistor Q2, and the other end is grounded.

The discharge circuit 24 includes a third transistor Q3, a fourth transistor Q4, a fifth transistor Q5, a quencher diode ZD, and a plurality of resistors R6-R8. The third transistor Q3 and the fourth transistor Q4 in this embodiment are NPN transistors, and the fifth transistor Q5 is a PNP transistor. The connection relationship of the above components is as follows: the collector of the third transistor Q3 is electrically connected to the capacitor group 30 through the resistor R6, the emitter thereof is grounded via R7, and the base thereof is electrically connected to the Zener diode ZD. positive electrode. The negative pole of the Zener diode ZD is grounded. The collector of the fourth transistor Q4 is electrically connected to the base of the third transistor Q3 and electrically connected to the power source VS through the resistor R8, and the base thereof is electrically connected to the first leg V21 of the start switch 21 and The emitter is grounded. The emitter of the fifth transistor Q5 is electrically connected to the base of the third transistor Q3 and the collector of the fourth transistor Q4, and the base thereof is electrically connected to the third leg V24 of the trigger signal generator IC and Its collector is grounded.

In this way, through the circuit design of FIG. 3, when the start switch 21 is not pressed (ie, the capacitance value detecting circuit 20 is not activated), the voltage of the first leg V21 and the second leg of the start-off is turned off. The value is the voltage value of the power source VS (ie, the high voltage level), so the first transistor Q1 and the fourth transistor Q4 do not receive the start signal output by the start switch 21 and assume an on state. The second transistor Q2 is controlled to be in an on state due to the conduction of the first transistor Q1, so that the capacitor group 30 is electrically connected to the AC/DC converter circuit 10 through the second transistor Q2 to receive the DC power source. Vdc performs energy storage. The third transistor Q3 is controlled to be in an off state due to the conduction of the fourth transistor Q4. In this embodiment, the preset DC power supply Vdc is 110 volts. Therefore, the storage voltage of the capacitor group 30 after energy storage is also 110. volt.

On the other hand, when the start switch 21 is pressed (that is, the capacitance value detecting circuit 20 is activated), the first pin V21 and the second leg of the start-off switch are grounded to generate the start signal of the low voltage level. The first transistor Q1 and the fourth transistor Q4 are in an off state, and the first transistor Q1 controls the second transistor Q2 to also assume an off state, that is, the charging circuit 23 exhibits a blocking state, in other words, at this time. The capacitor bank 30 and the AC/DC converter circuit 10 will be open, and the capacitor bank 30 will stop receiving the DC power source Vdc.

In addition, when the second leg of the startup gate 21 is grounded, the fifth transistor Q5 assumes an off state, and since the fourth transistor Q4 and the fifth transistor Q5 both assume an off state, the control is performed. The third transistor Q3 is turned on, and then the capacitor group 30 is controlled to discharge the resistor R6 and the resistor R7 through the third transistor Q3, and the second leg of the trigger signal generator IC receives the low voltage level. The trigger signal causes the third pin V24 of the trigger signal generator IC to output a high voltage level, and the power source VS charges the capacitor C1 through the resistor R1, and the trigger signal generator IC detects the storage of the capacitor C1. Whether the voltage reaches a preset threshold, and when the storage voltage of the capacitor C1 reaches the threshold, the third pin V24 of the trigger signal generator outputs a trigger signal of a low voltage level, thereby controlling The third transistor Q3 is turned off, and the capacitor group 30 is stopped.

In this way, the time during which the capacitor group 30 starts to discharge until the discharge is stopped (the aforementioned fixed time) can be controlled by the setting of the threshold. More specifically, in the present embodiment, the power supply VS is 12 volts, the resistance R1 is 10K ohms, and the capacitance C1 is 44 μF , and the threshold value of the LM555 timer used by the trigger signal generator IC is 4 volts. Therefore, the calculation formula of the charge and discharge through the capacitor shows that it takes 0.48 seconds to increase the voltage of the capacitor C1 from zero volts to 4 volts, that is, the 0.48 second is the fixed time designed. Of course, in actual implementation, the values of the resistor R1 and the capacitor C1 may also vary according to their design requirements, and are not limited to the above values.

In addition, in the present embodiment, the discharge current of the capacitor group 30 is 0.1 amp, so that the capacitance value of the capacitor group 30 can be allowed to allow a maximum error of 20%, and in the worst case, an additional 5% is added. margin, and the original of the capacitance of the capacitor bank 30 is 4400 μF, to infer the value of the minimum capacitance of the capacitor bank 30 allows 3300 μF, thus discharging the storage voltage Vc after the minimum period of time (0.48 seconds) should be 95.35 Volt, but this is only the result of considering the output capacitance error. If we further consider the error of the output voltage of the trigger signal generator IC and the AC/DC converter circuit 10, and use the simulation software for Monte Carlo analysis, the worst case will be obtained. When the capacitor group 30 stops discharging, the lowest allowable storage voltage Vc is about 90 volts.

After describing the circuit structure for controlling the charging and discharging of the capacitor group 30, the following will continue to explain the circuit structure of the voltage comparison and the prompt after the above-mentioned discharge. Referring to FIG. 4, the detailed circuit of the voltage comparison circuit 25 of the present embodiment includes A first voltage conversion circuit 251, a rating value generating circuit 252, a first comparator OP1, a sixth transistor Q6, an eighth transistor Q8, a ninth transistor Q9, and two diodes D1. D2, a second comparator OP2 and a plurality of resistors R14, R15, R18. The warning circuit 40 includes a seventh transistor Q7, a tenth transistor Q10, a first alert, a second alert, and four resistors R16, R17, R19, and R20. The sixth transistor Q6, the eighth transistor Q8, and the ninth transistor Q9 in this embodiment are NPN transistors. The seventh transistor Q7 and the tenth transistor Q10 are N-channel MOSFETs, and the first indicator and the second indicator are LEDs L1 and L2, respectively. The detailed circuit and connection relationship of the above components is as follows: The first voltage conversion circuit 251 includes a resistor R9 and a resistor R10. One end of the resistor R9 is electrically connected to the capacitor group 30, and the other end is electrically One end of the resistor R10 and the negative end of the first comparator OP1 are connected. The other end of the resistor R10 is grounded.

The rating generating circuit 252 includes three resistors R11 R R13 and a switch SW. One end of the resistor R11 is electrically connected to the power source VS, and the other end is connected to one end of the resistor R12, one end of the resistor R13, a cathode of the diode D1, a collector of the sixth transistor Q6, and The positive terminal of the first comparator OP1. The other end of the resistor R12 is grounded. The other end of the resistor R13 is electrically connected to the second leg of the switch SW, and the first leg of the switch SW is vacant, and the third leg is grounded.

The anode of the diode D1 is electrically connected to the output end of the first comparator OP1. The base of the sixth transistor Q6 is electrically connected to the first leg V21 of the start switch 21 and its emitter is grounded. The output end of the first comparator OP1 is electrically connected to the negative terminal of the second comparator OP2. One end of the resistor R14 is electrically connected to the power source VS, and the other end is electrically connected to the positive terminal of the second comparator OP2, the cathode of the diode D2, the collector of the eighth transistor Q8, and the ninth transistor. The collector of Q9 and one end of the resistor R15. The other end of the resistor R15 is grounded. The output end of the second comparator OP2 is electrically connected to the anode of the diode D2, one end of the resistor R16, and the gate of the seventh transistor Q7. The base of the eighth transistor Q8 is electrically connected to the first leg V21 of the start-up circuit, and the emitter is grounded. The base of the ninth transistor Q9 is electrically connected to the third leg V24 of the trigger signal generator via a resistor R18.

The gate of the tenth transistor Q10 of the warning circuit 40 is electrically connected to the output end of the first comparator OP1 and electrically connected to the power source VS through the resistor R19, and electrically connected to the cathode of the light emitting diode L2 through the resistor And the source is grounded. The positive electrode of the light-emitting diode L2 is electrically connected to the power source VS through the resistor R20. One end of the resistor R17 is electrically connected to the other end of the power source VS and the resistor R16, and the other end is electrically connected to the anode of the LED L1. The negative electrode of the light-emitting diode L1 is electrically connected to the seventh transistor Q7 pole. The source of the seventh transistor Q7 is grounded.

The fourth leg of the first relay 70 is electrically connected to the power source VS through a resistor R32, and the fifth leg is electrically connected to the drain of the fifteenth transistor Q15, and the gate of the fifteenth transistor Q15 The output of the first comparator OP1 is electrically connected, and the source thereof is grounded.

In this way, through the circuit design of FIG. 4 and the circuit structure of FIG. 3, when the start switch 21 is not pressed (ie, the capacitance value detecting circuit 20 is not activated), the first branch of the start-off switch 21 is The voltage values of the foot V21 and the second leg are the voltage values of the power source VS (ie, the high voltage level), so the sixth transistor Q6 and the eighth transistor Q8 do not receive the start signal output by the start switch 21 and present In the on state, the first comparator OP1 and the second comparator OP2 are respectively controlled to be inactive. At the same time, the third leg of the first relay 70 is electrically connected to the first leg.

On the contrary, after the start switch 21 sends the start signal and the trigger circuit 22 sends the trigger signal, the sixth transistor Q6, the eighth transistor Q8 and the ninth transistor Q9 of the voltage comparison circuit 25 are turned off. The first comparator OP1 and the second comparator OP2 are respectively activated, and the capacitor group 30 will stop discharging, and the first voltage conversion circuit 251 receives the storage voltage Vc when the capacitor group 30 stops discharging. And outputting a first voltage conversion signal to the first comparator OP1 according to the storage voltage Vc.

More specifically, the first voltage conversion circuit 251 reduces the storage voltage Vc when the capacitor group 30 stops discharging to a level acceptable to the first comparator OP1 by the voltage division of the resistor R9 and the resistor R10. The voltage value is outputted to the first comparator OP1 as the first voltage conversion signal by using the voltage division of the resistor R10. In addition, the rating generating circuit 252 divides the voltage by the resistor R11 and the resistor R12, and outputs a voltage corresponding to the rated value to the first comparator OP1 through the voltage division of the resistor R12. The minimum allowable voltage of the storage voltage Vc when the capacitor group 30 stops discharging The pressure is about 90 volts. In this embodiment, the resistor R9 is designed to be 200K ohms, the resistor R10 is 11.8K ohms, the resistor R11 is 10K ohms, and the resistor R12 is 7.15K ohms, so that the voltage drop of the resistor R12 is about It is 5 volts, and it can be inferred that the lowest allowable voltage of the storage voltage Vc when the capacitor group 30 stops discharging is 89.74 volts.

In other words, when the storage voltage Vc when the capacitor group 30 stops discharging is greater than 89.74 volts, the first voltage conversion signal (ie, the voltage division on the resistor R10) is greater than 5 volts, so that the first comparator OP1 Then, the low voltage level is output. Conversely, when the storage voltage Vc is less than 89.74 volts when the capacitor group 30 stops discharging, the first voltage conversion signal (ie, the voltage division on the resistor R10) is less than 5 volts. The first comparator OP1 is caused to output a high voltage level (ie, an error signal).

In this way, the tenth transistor Q10 of the warning circuit 40 assumes an off state when receiving the low voltage level, so that the light emitting diode L2 cannot receive power and exhibits a state of extinction; The transistor Q10 assumes an on state when receiving the high voltage level, and causes the light emitting diode L2 to receive electrical energy to emit light, thereby generating an alert message to notify the user that the capacitance value is abnormal. In addition, when the first comparator OP1 outputs an error signal of a high voltage level, the fifteenth transistor Q15 is turned on at the same time, and the first relay 70 is in a conducting state when the fifteenth transistor Q15 is turned on. The 3 legs will be electrically connected to the 2nd leg.

It should be noted that, in the circuit design of FIG. 4, the second comparator OP2 is for determining whether the first comparator OP1 outputs the error signal, and therefore, through the circuit design of FIG. 4, the first comparator OP1 is not When the error signal is output (ie, the output voltage level is low), the second comparator OP2 will output a high voltage level (ie, the correct signal), and the seventh transistor Q7 will be in a conducting state when receiving the high voltage level. And causing the light-emitting diode L1 to receive electrical energy to emit light, thereby generating the normal message by means of light emission. It is known that the user's capacitance value conforms to the standard. Conversely, when the first comparator OP1 outputs the error signal (ie, the high voltage level), the second comparator OP2 outputs a low voltage level. Therefore, the seventh transistor Q7 assumes an off state when receiving the low voltage level, so that the light emitting diode L1 cannot receive electric energy and assumes a state of being extinguished. Therefore, the user can know whether the capacitance value of the capacitor group 30 is satisfactory by the illumination of the LEDs L1 and L2.

In addition, it is worth mentioning that the rating generating circuit 252 can be further turned on or off by the design of the switch SW, so that the resistor R12 and the resistor R13 can be connected in parallel according to requirements, thereby adjusting the size of the divided voltage. The magnitude of this rating, in turn, allows the capacitive trip unit to meet the regulatory requirements of different countries and increase its versatility.

In addition, in addition to the above-mentioned capacitance detection, the voltage detection is described below. Referring to FIG. 5, the detailed circuit of the voltage detection circuit 50 of the present embodiment includes a second voltage conversion circuit 51 and a third comparison. The device OP3, the fourth comparator OP4 and the plurality of resistors R21 R R34. The display circuit 60 includes an eleventh transistor Q11, a twelfth transistor Q12, a thirteenth transistor Q13, a fourteenth transistor Q14, a third alert, and a fourth alert. The eleventh transistor Q11 and the twelfth transistor Q12 are N-channel MOSFETs. The thirteenth transistor Q13 and the fourteenth transistor Q14 are PNP transistors. The third warning device and the fourth warning device are the LEDs L3 and L4, respectively. The detailed circuit design and connection relationship of the above components are as follows: The second voltage conversion circuit 51 of the voltage detecting circuit 50 includes two resistors R29 and R30. One end of the resistor 29 is electrically connected to the AC/DC converter circuit 10 for receiving the DC power source Vdc, and the other end thereof is electrically connected to the resistor R30, and respectively passes through the resistor R24 and the resistor R25 and the negative terminal of the third comparator OP3 and The positive terminal of the four comparator OP4 is electrically connected. The The other end of the resistor R30 is grounded.

The positive terminal of the third comparator OP3 is electrically connected to the output end of the third comparator OP3 through the resistor R23, electrically connected to the power source VS through the resistor R21, and grounded through the resistor R22. The output end of the third comparator OP3 is electrically connected to the power source VS through the resistor R33. The positive terminal of the fourth comparator OP4 is electrically connected to the output end of the fourth comparator OP4 through the resistor R28. The negative terminal of the fourth comparator OP4 is electrically connected to the power source VS through the resistor R27 and to the ground through the resistor R26. The output end of the fourth comparator OP4 is electrically connected to the power source VS through the resistor R34.

The anodes of the LEDs L3 and L4 of the display circuit 60 are electrically connected to the power source VS. The anode of the eleventh transistor Q11 is electrically connected to the cathode of the LED diode L3, the source is electrically connected to the drain of the twelfth transistor Q12, and the gate is electrically connected to the third comparator OP3. The output. The source of the twelfth transistor Q12 is grounded and the gate is electrically connected to the output end of the fourth comparator OP4. The emitter of the thirteenth transistor Q13 is electrically connected to the negative terminal of the LED L4, the collector is grounded, and the base is electrically connected to the output end of the third comparator OP3. The emitter of the fourteenth transistor Q14 is electrically connected to the negative terminal of the light emitting diode L4, the collector is grounded, and the base is electrically connected to the output end of the fourth comparator OP4.

The fourth leg of the second relay 75 is electrically connected to the power source VS through the resistor R31, and the fifth leg is electrically connected to the emitter of the fourteenth transistor Q14.

As a result, the second voltage conversion circuit 51 of the voltage detecting circuit 50 receives the DC power supply Vdc, and then divides the voltage through the resistor R29 and the resistor R30, and uses the resistor. The voltage division on R30 is input as a second voltage conversion signal to the third comparator OP3 and the fourth comparator OP4, thereby determining whether the second voltage conversion signal is between an upper limit voltage value and a lower limit voltage value. Further determine the DC Whether the power supply Vdc is within a rated range, and outputting a voltage normal signal when the DC power supply Vdc is within the rated range, or outputting a voltage abnormal signal when the DC power supply Vdc is within or below the rated range. The display circuit 60 outputs a corresponding display message according to the receiving of the voltage normal signal or the voltage abnormal signal.

In order to achieve the above object, in the present embodiment, the determination point of the DC power supply Vdc is set to 110±10% volts. Therefore, the design of each resistor is: resistance R21 is 11.8K ohm, resistance R22 is 10K ohm, and resistance R26 is 10K. Ohm, resistor R27 is 16.5K ohms, resistor R29 is 210K ohms, and resistor R30 is 10K ohms. In this way, by the voltage division of the resistor R21 and the resistor R22, the voltage value received by the positive terminal of the third comparator OP3 is 5.47 volts, and 5.47 volts is defined as the upper limit voltage value, and the upper limit voltage value is calculated. The voltage value corresponding to the DC power supply Vdc can be 120.34 volts. In addition, by the voltage division of the resistor R26 and the resistor R27, the voltage value received by the negative terminal of the fourth comparator OP4 is 4.54 volts, and 4.54 volts is defined as the lower limit voltage value, and the lower limit voltage value corresponds to the DC power source. The voltage value of Vdc is 99.66 volts.

Therefore, if the voltage value of the DC power supply Vdc is between 99.66 volts and 120.34 volts, it means that the second voltage conversion signal (ie, the voltage division on the resistor R30) is also between the upper limit voltage value (5.47 volts) and the lower limit voltage. Between the values (4.54 volts), at this time, the third comparator OP3 and the fourth comparator OP4 respectively output the first control signal and the second control signal of the high voltage level, so that the eleventh transistor Q11 and the tenth The second transistor Q12 is in an on state, and the thirteenth transistor Q13 and the fourteenth transistor Q14 are in an off state, so that the LED L3 is actuated to generate a display signal indicating that the voltage is normal in a manner of emitting light, and The light-emitting diode L4 does not operate. In other words, in order to activate the LED L3, in the embodiment, the voltage detecting circuit 50 outputs the normal signal must include the first control. Signal and the second control signal.

Conversely, if the voltage value of the DC power source Vdc is greater than 120.34 volts or less than 99.66 volts, the second voltage conversion signal (ie, the divided voltage on the resistor R30) will exceed the upper limit voltage value (5.47 volts) or be lower than the lower limit voltage. a value (4.54 volts), such that the third comparator OP3 or the fourth comparator OP4 outputs a low level signal, and the eleventh transistor Q11 or the twelfth transistor Q12 exhibits an off state, and the thirteenth transistor The Q13 or the fourteenth transistor Q14 is turned on. Therefore, the light-emitting diode L3 is turned off without being activated, and the light-emitting diode L4 is activated to generate a display message indicating that the voltage is abnormal. In other words, in order to activate the LED L4, in the embodiment, the voltage abnormality signal output by the voltage detecting circuit 50 includes only one of the first control signal and the second control signal. In addition, when the voltage detecting circuit 50 outputs the voltage abnormal signal to cause the thirteenth transistor Q13 or the fourteenth transistor Q14 to be turned on, the second relay 75 will be due to the thirteenth transistor Q13 or The fourteenth transistor Q14 is turned on to electrically connect the third leg of the second relay 75 to the second leg.

It is to be noted that, in the actual design, the capacitor tripping device 100 further includes a housing 101, the trigger circuit 22, the charging circuit 23, the discharging circuit 24, and the voltage comparison. The circuit 25 and the relay 70 are disposed in the accommodating space of the housing 101. The switch SW, the start switch 21, and the LEDs L1 LL4 are disposed on the housing 101 and exposed outwardly for convenience. User operation and inspection. In addition, the housing 101 is provided with a plurality of dry contacts 102 connecting the first relay 70 and the first leg, the second leg and the third leg of the second relay 75, and an additional monitoring device is provided. Connecting, so that an additional monitoring device can know, through the dry contact 102, that the capacitance value detecting circuit 20 detects a circuit change abnormally generated by the capacitance value (ie, the first relay 70 is activated), or the voltage detection Circuit 50 detects the circuit change generated when the voltage is abnormal (that is, the second relay 75 is actuated), thereby achieving the purpose of multiple monitoring and protection.

In addition, the first to fourth warning devices in the above are in addition to the light emitting diodes, in other embodiments, they may also be buzzers, and the warning message is sound to indicate the capacitance group 30. Whether the capacitance value is sufficient and whether the voltage of the DC power supply Vdc is within the rated range.

In addition, in addition to the structure disclosed in the above embodiments, referring to FIG. 7, the capacitor tripping device 200 of the second embodiment further includes a processor 80 and a display 90 further on the basis of FIG. The capacitor 80 is electrically connected to the capacitor group 30 and the capacitor detecting circuit 20, and when the capacitor detecting circuit 20 is activated, detecting the storage voltage of the capacitor group 30 after the fixed time is discharged, and accordingly The capacitance value and the service life of the capacitor group 30 are calculated and outputted by a display signal. The display 90 is a liquid crystal display electrically connected to the processor 80 for receiving the display signal and displaying the capacitance value or the service life of the capacitor group 30 according to the display signal (for example, displaying the service life as a percentage).

In summary, the capacitor tripping device of the present invention can detect the capacitance of the capacitor group, and when the capacitance is too low, the user can immediately replace it to ensure that the capacitor group has enough power to discharge. When the capacitor trip device is in operation, it is also possible to monitor whether the voltage is normal or not, thereby achieving the purpose of multiple protection.

In addition, it should be noted that the above description is only a preferred embodiment of the present invention, and equivalent changes to the application of the present patent specification and the scope of the patent application are intended to be included in the scope of the present patent.

100‧‧‧Capacitance tripping device

10‧‧‧AC and DC conversion circuit

20‧‧‧Capacitance value detection circuit

30‧‧‧Capacitor group

40‧‧‧Warning circuit

50‧‧‧Voltage detection circuit

60‧‧‧ display circuit

70‧‧‧First relay

75‧‧‧Second relay

Vdc‧‧‧DC power supply

Claims (25)

A capacitor tripping device includes: an AC/DC converting circuit for receiving an AC power source and converting the output to a DC power source; and a capacitance value detecting circuit electrically connected to the AC/DC converting circuit for receiving the DC a power capacitor; a capacitor group electrically connected to the capacitor value detecting circuit; and a warning circuit electrically connected to the capacitor value detecting circuit; wherein when the capacitor value detecting circuit is not activated, the capacitor group transmits the capacitor The capacitance value detecting circuit is electrically connected to the AC/DC converting circuit to receive the DC power source for energy storage; and when the capacitance value detecting circuit is activated, the capacitance value detecting circuit will make the capacitor group intersect with the capacitor Opening a circuit between the DC conversion circuits, causing the capacitor group to stop receiving the DC power supply, and discharging the capacitor group for a fixed time, and then detecting whether the storage voltage of the capacitor group after the fixed time is lower than a rated voltage And when the value is lower than the rated value, an error signal is generated to the warning circuit, and the warning circuit receives the error signal to generate a warning message. The capacitor tripping device of claim 1, wherein the capacitor value detecting circuit comprises: a starting switch for emitting a start signal when the capacitor value detecting circuit is activated; a trigger circuit, electrically connecting The start switch receives the start signal, and the trigger circuit sends a trigger signal after receiving the start signal and after the fixed time; a charging circuit electrically connecting the starting switch, the AC/DC converting circuit and the capacitor group; when the charging circuit does not receive the starting signal output by the starting switch, the charging circuit is in an on state, so that the capacitor group is transparent The charging circuit is electrically connected to the AC/DC conversion circuit to receive the DC power source for energy storage; when the charging circuit receives the startup signal, the charging circuit is in a blocking state, so that the capacitor group and the AC/DC conversion circuit are An open circuit is provided to stop receiving the DC power source; a discharge circuit is electrically connected to the start switch, the trigger circuit and the capacitor group, and when receiving the start signal, controlling the capacitor group to start discharging, and receiving the After the trigger signal is received, the capacitor group is controlled to stop discharging; and a voltage comparison circuit is electrically connected to the capacitor group and the warning circuit for detecting whether the storage voltage of the capacitor group after the discharge is stopped is lower than the rated value. And when it is lower than the rated value, the error signal is generated to the warning circuit. The capacitor tripping device of claim 2, wherein the trigger circuit further comprises: a capacitor electrically connected to a power source, and the power source charges the capacitor after the fixed time, the storage voltage of the capacitor will reach a threshold value; and a trigger signal generator electrically connected to the start switch and the capacitor for receiving the start signal and detecting whether the storage voltage of the capacitor reaches the threshold, and the storage voltage of the capacitor When the threshold is reached, the trigger signal generator sends the trigger signal. The capacitor tripping device of claim 2, wherein the charging circuit comprises: a first transistor electrically connected to the startup switch; and a second transistor electrically connected to the first transistor, the AC and DC a switching circuit and the capacitor group; wherein the first transistor does not receive the startup signal, the second transistor is controlled to be in an on state, so that the capacitor group is electrically connected to the AC/DC conversion circuit through the second transistor Receiving the DC power source for energy storage; in addition, when receiving the start signal, the first transistor controls the second transistor to assume an off state, so that the capacitor group and the AC/DC conversion circuit are opened, and the The capacitor bank stops receiving the DC power. The capacitor tripping device of claim 2, wherein the discharging circuit comprises: a third transistor electrically connected to the capacitor group; a fourth transistor electrically connected to the third transistor and the starting switch; a fifth transistor electrically connected to the third transistor and the trigger circuit; wherein when the fourth transistor receives the enable signal and the fifth transistor does not receive the trigger signal, controlling the third transistor to be turned on And causing the capacitor group to start discharging through the third transistor, and when the fifth transistor receives the trigger signal, controlling the third transistor to be turned off, so that the capacitor group stops discharging. The capacitor tripping device of claim 2, wherein the voltage comparison circuit comprises: a first voltage conversion circuit electrically connected to the capacitor group for receiving a storage voltage when the capacitor group stops discharging, and outputting a first voltage conversion signal according to the storage voltage; a rated value generating circuit And outputting the voltage corresponding to the rated value; and a first comparator electrically connected to the first voltage conversion circuit and the rating generating circuit for detecting whether the first voltage conversion signal is lower than the rated value The value produces a voltage output by the circuit, and when it is lower, the error signal is generated to the warning circuit. The capacitor tripping device of claim 6, wherein the voltage comparison circuit further comprises: a sixth transistor electrically connected to the start switch and the first comparator, wherein the sixth transistor receives the start signal Controlling the first comparator to act. The capacitor tripping device of claim 6, wherein the voltage comparison circuit further comprises a second comparator electrically connected to the first comparator, and when the error signal generated by the first comparator is not received, Sending a correct signal; the warning circuit further includes a seventh transistor electrically connected to the second comparator; and a first alert electrically connected to the seventh transistor, wherein the seventh transistor receives the The first alarm is controlled to generate a normal message when the signal is correct. The capacitor tripping device of claim 8, wherein the voltage comparison circuit further comprises: an eighth transistor electrically connected to the second comparator and the startup switch; a ninth transistor electrically connected to the second comparator and the trigger circuit; wherein the eighth transistor receives the start signal, and when the ninth transistor receives the trigger signal, the eighth power The crystal and the ninth transistor control the second comparator to actuate. The capacitor tripping device of claim 1, wherein the warning circuit comprises: a tenth transistor electrically connected to the capacitance value detecting circuit; and a second alert electrically connected to the tenth transistor The tenth transistor controls the second alarm to act to send the warning message when receiving the error signal. The capacitor tripping device of claim 10, wherein the second alerter is a display light or a buzzer, and the second alerter is a display light, the alert message is a bright light, and the second alert The alert message is sound when the device is a buzzer. The capacitor tripping device of claim 10, further comprising a housing, the AC/DC converting circuit, the capacitor group and the capacitor value detecting circuit are disposed in the receiving space of the housing; the second alert setting On the housing and exposed outward. The capacitor tripping device of claim 1, further comprising: a voltage detecting circuit electrically connected to the AC/DC converting circuit for receiving the DC power source and determining whether the DC power source is within a rated range, and Outputting a voltage normal signal within the rated range, and outputting a voltage abnormal signal when the rated range is exceeded or lower; and a display circuit electrically connected to the voltage detecting circuit for receiving the voltage normal signal or voltage Abnormal signal and based on the voltage received The normal signal or the voltage abnormal signal outputs a corresponding voltage normal or voltage abnormality display message. The capacitor tripping device of claim 13, wherein the voltage detecting circuit comprises: a second voltage converting circuit electrically connected to the AC/DC converting circuit for receiving the DC power source, and outputting according to the DC power source a second voltage conversion signal; a third comparator receives an upper limit voltage value and is electrically connected to the voltage conversion circuit for outputting a first control signal when the second voltage conversion signal is lower than the upper limit voltage value And a fourth comparator receiving a lower limit voltage value and electrically connecting the voltage conversion circuit for outputting a second control signal when the second voltage conversion signal is higher than the lower limit voltage value; wherein the voltage is The normal signal includes the first control signal and the second control signal, and the voltage abnormal signal has only one of the first control signal and the second control signal. The capacitor tripping device of claim 14, wherein the display circuit comprises: a third alerter; an eleventh transistor electrically connected to the third alerter and the third comparator; and a tenth The second transistor is electrically connected to the eleventh transistor and the fourth comparator; wherein the eleventh transistor receives the first control signal, and the eleventh transistor receives the second control signal, the tenth a transistor and the The twelfth transistor simultaneously controls the actuation of the third alarm to generate the display message corresponding to the normal voltage. The capacitor tripping device of claim 14, wherein the display circuit comprises: a fourth alert; a thirteenth transistor electrically connected to the fourth alerter and the third comparator; and a tenth The fourth transistor is electrically connected to the fourth indicator and the fourth comparator; wherein when the thirteenth transistor does not receive the first control signal, the fourth alarm is controlled to operate, or the fourteen transistors are not received When the second control signal is used, the fourth alarm is controlled to be activated, and the display message corresponding to the abnormal voltage is generated. The capacitor tripping device of claim 1, further comprising: a processor electrically connected to the capacitor group and the capacitor value detecting circuit, configured to detect the capacitor group when the capacitor value detecting circuit is activated Discharging the storage voltage after the fixed time, and calculating the capacitance value or the service life of the capacitor group; and a display electrically connected to the processor to display the capacitance value or the service life of the capacitor group. A capacitance value detecting circuit of a capacitor tripping device, wherein the capacitor tripping device comprises a capacitor group and an AC/DC converting circuit, wherein the AC/DC converting circuit is configured to receive an AC power source and convert it into a DC power source, and output the The capacitance value detection circuit includes: a start switch for emitting a start signal when the capacitance value detecting circuit is activated; a trigger circuit electrically connecting the start switch to receive the start signal, and the trigger circuit receives the start signal and passes through a After a fixed time, a trigger signal is sent; a charging circuit is electrically connected to the startup switch, the AC/DC conversion circuit, and the capacitor group; and when the charging circuit does not receive the startup signal output by the startup switch, the charging circuit presents The conduction state is such that the capacitor group can be electrically connected to the AC/DC conversion circuit through the charging circuit to receive the DC power source for energy storage; when the charging circuit receives the startup signal, the charging circuit is in a blocking state, so that the charging circuit An open circuit is formed between the capacitor group and the AC/DC conversion circuit to stop receiving the DC power source; a discharge circuit is electrically connected to the start switch, the trigger circuit and the capacitor group for controlling the capacitor when receiving the start signal The group starts to discharge, and after receiving the trigger signal, controls the capacitor group to stop discharging; and a voltage comparison circuit Electrically connected to the capacitor bank, for detecting whether the voltage of the storage capacitor stops discharging is less than a rated value set, and when below the rated value, generate an error signal. The capacitance value detecting circuit of claim 18, wherein the trigger circuit further comprises: a capacitor electrically connected to a power source, and the power source charges the capacitor after the fixed time, the storage voltage of the capacitor will be Reach a threshold; and a trigger signal generator electrically connected to the start switch and the capacitor for receiving the start signal and detecting whether the storage voltage of the capacitor reaches the threshold, and when the storage voltage of the capacitor reaches the threshold , the trigger signal is issued. The capacitance value detecting circuit of claim 18, wherein the charging circuit comprises: a first transistor electrically connected to the starting switch; and a second transistor electrically connected to the first transistor, the intersection a DC conversion circuit and the capacitor group; wherein when the first transistor does not receive the startup signal, controlling the second transistor to be in an on state, so that the capacitor group will pass through the second transistor and the AC/DC conversion circuit Connected to receive the DC power source for energy storage; in addition, when the first transistor receives the start signal, the second transistor is controlled to be in an off state, so that the capacitor group and the AC/DC conversion circuit are opened, so that The capacitor bank stops receiving the DC power source. The capacitance value detecting circuit of claim 18, wherein the discharging circuit comprises: a third transistor electrically connected to the capacitor group; a fourth transistor electrically connected to the third transistor and the startup switch a fifth transistor electrically connected to the third transistor and the trigger circuit; wherein when the fourth transistor receives the start signal and the fifth transistor does not receive the trigger signal, controlling the third transistor Turning on, causing the capacitor group to start discharging through the third transistor, and receiving the fifth transistor When the trigger signal is triggered, the third transistor is controlled to be turned off, so that the capacitor group stops discharging. The capacitance value detecting circuit of claim 18, wherein the voltage comparison circuit comprises: a first voltage conversion circuit electrically connected to the capacitor group for receiving a storage voltage when the capacitor group stops discharging, and according to The storage voltage outputs a first voltage conversion signal; a rating generation circuit for outputting a voltage corresponding to the rated value; and a first comparator electrically connected to the first voltage conversion circuit and the rated The value generating circuit is configured to detect whether the first voltage conversion signal is lower than a voltage output by the rated value generating circuit, and when the value is lower than, the error signal is generated. The capacitance value detecting circuit of claim 22, wherein the voltage comparison circuit further comprises: a sixth transistor electrically connected to the start switch and the first comparator, wherein the sixth transistor receives the start signal The first comparator is controlled to operate. The capacitance value detecting circuit of claim 22, wherein the voltage comparison circuit further comprises a second comparator electrically connected to the first comparator, and when the error signal generated by the first comparator is not received Sending a correct signal; a seventh transistor electrically connected to the second comparator; and a first alert electrically connected to the seventh transistor, wherein the seventh transistor receives the correct signal The first alerter is activated to generate a normal message. The capacitance value detecting circuit of claim 24, wherein the voltage comparison circuit further comprises: an eighth transistor electrically connected to the second comparator and the start switch; and a ninth transistor electrically connected The second comparator and the trigger circuit; wherein the eighth transistor receives the start signal, and when the ninth transistor receives the trigger signal, the eighth transistor and the ninth transistor control the The second comparator is activated.