TWM512850U - Improved power switch control circuit - Google Patents
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- TWM512850U TWM512850U TW104211243U TW104211243U TWM512850U TW M512850 U TWM512850 U TW M512850U TW 104211243 U TW104211243 U TW 104211243U TW 104211243 U TW104211243 U TW 104211243U TW M512850 U TWM512850 U TW M512850U
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本創作係有關於一種改良型電源切換控制電路，特別是一種輸入的直流電壓可以低於超級電容的電壓的改良型電源切換控制電路。The present invention relates to an improved power switching control circuit, and more particularly to an improved power switching control circuit in which the input DC voltage can be lower than the voltage of the super capacitor.
習知技術之電源切換控制電路係應用於直流電壓供應裝置、超級電容及電源負載（或電源處理電路）；直流電壓供應裝置通過習知技術之電源切換控制電路傳送直流電壓對電源負載（或電源處理電路）供電；當直流電壓供應裝置停止傳送直流電壓時，超級電容即通過習知技術之電源切換控制電路對電源負載（或電源處理電路）供電。The power switching control circuit of the prior art is applied to a DC voltage supply device, a super capacitor and a power load (or a power processing circuit); the DC voltage supply device transmits a DC voltage to a power load (or a power supply through a power switching control circuit of the prior art) The processing circuit) supplies power; when the DC voltage supply device stops transmitting the DC voltage, the super capacitor supplies power to the power load (or the power processing circuit) through a power switching control circuit of the prior art.
上述習知技術的缺點是，直流電壓必須高於超級電容的電壓，否則超級電容與習知技術之電源切換控制電路即無法正常運作。這在應用於綠能電源（例如太陽能）時會發生問題；因為綠能電源的電壓有時會較低（例如陽光較弱）而低於超級電容的電壓，此時若無法利用上述的直流電壓，則整體電源的轉換效率會不佳。The disadvantage of the above-mentioned prior art is that the DC voltage must be higher than the voltage of the super capacitor, otherwise the super capacitor and the power switching control circuit of the prior art cannot operate normally. This can cause problems when applied to green power sources (such as solar energy); because the voltage of the green power source is sometimes lower (for example, the sun is weaker) and lower than the voltage of the super capacitor, if the above DC voltage cannot be used. , the overall power conversion efficiency will be poor.
為改善上述習知技術之缺點，本創作之目的在於提供一種改良型電源切換控制電路。In order to improve the above disadvantages of the prior art, the purpose of the present invention is to provide an improved power switching control circuit.
為改善上述習知技術之缺點，本創作之又一目的在於提供另外一種改良型電源切換控制電路。In order to improve the above disadvantages of the prior art, another object of the present invention is to provide another improved power switching control circuit.
為達成本創作之上述目的，本創作之改良型電源切換控制電路係應用於一直流電壓供應裝置及一超級電容，該改良型電源切換控制電路包含：一電壓輸入端，電性連接至該直流電壓供應裝置；一第一開關單元，電性連接至該電壓輸入端；一第二開關單元，電性連接至該超級電容；一第三開關單元，電性連接至該第二開關單元；一第四開關單元，電性連接至該第一開關單元；一開關控制單元，電性連接至該電壓輸入端、該第一開關單元、該第二開關單元、該第三開關單元及該第四開關單元；及一電壓輸出端，電性連接至該第三開關單元及該第四開關單元。其中當該直流電壓供應裝置傳送一直流電壓至該電壓輸入端時，該開關控制單元導通該第四開關單元且不導通該第二開關單元；接著，延遲一第一預定時間之後，該開關控制單元導通該第一開關單元且不導通該第三開關單元。其中當該直流電壓供應裝置停止傳送該直流電壓至該電壓輸入端時，該開關控制單元導通該第三開關單元且不導通該第一開關單元；接著，延遲一第二預定時間之後，該開關控制單元導通該第二開關單元且不導通該第四開關單元。In order to achieve the above object of the present invention, the improved power switching control circuit of the present invention is applied to a DC voltage supply device and a super capacitor. The improved power switching control circuit includes: a voltage input terminal electrically connected to the DC a voltage supply device; a first switch unit electrically connected to the voltage input terminal; a second switch unit electrically connected to the super capacitor; a third switch unit electrically connected to the second switch unit; a fourth switch unit electrically connected to the first switch unit; a switch control unit electrically connected to the voltage input end, the first switch unit, the second switch unit, the third switch unit, and the fourth a switching unit; and a voltage output terminal electrically connected to the third switching unit and the fourth switching unit. When the DC voltage supply device transmits the DC voltage to the voltage input terminal, the switch control unit turns on the fourth switch unit and does not turn on the second switch unit; and then, after a delay of a first predetermined time, the switch control The unit turns on the first switching unit and does not turn on the third switching unit. When the DC voltage supply device stops transmitting the DC voltage to the voltage input terminal, the switch control unit turns on the third switch unit and does not turn on the first switch unit; and then, after a second predetermined time delay, the switch The control unit turns on the second switching unit and does not turn on the fourth switching unit.
為達成本創作之上述又一目的，本創作之改良型電源切換控制電路係應用於一直流電壓供應裝置及一超級電容，該改良型電源切換控制電路包含：一電壓輸入端，電性連接至該直流電壓供應裝置；一第一開關單元，電性連接至該電壓輸入端；一第二開關單元，電性連接至該超級電容；一第三開關單元，電性連接至該第二開關單元；一開關控制單元，電性連接至該電壓輸入端、該第一開關單元、該第二開關單元及該第三開關單元；及一電壓輸出端，電性連接至該第一開關單元及該第三開關單元。其中當該直流電壓供應裝置傳送一直流電壓至該電壓輸入端時，該開關控制單元不導通該第二開關單元；接著，延遲一第一預定時間之後，該開關控制單元導通該第一開關單元且不導通該第三開關單元。其中當該直流電壓供應裝置停止傳送該直流電壓至該電壓輸入端時，該開關控制單元導通該第三開關單元且不導通該第一開關單元；接著，延遲一第二預定時間之後，該開關控制單元導通該第二開關單元。In order to achieve the above-mentioned other object of the present invention, the improved power switching control circuit of the present invention is applied to a DC voltage supply device and a super capacitor. The improved power switching control circuit includes: a voltage input terminal electrically connected to The DC voltage supply device; a first switch unit electrically connected to the voltage input terminal; a second switch unit electrically connected to the super capacitor; and a third switch unit electrically connected to the second switch unit a switch control unit electrically connected to the voltage input terminal, the first switch unit, the second switch unit and the third switch unit; and a voltage output terminal electrically connected to the first switch unit and the The third switching unit. When the DC voltage supply device transmits the DC voltage to the voltage input terminal, the switch control unit does not turn on the second switch unit; and then, after a delay of a first predetermined time, the switch control unit turns on the first switch unit And the third switching unit is not turned on. When the DC voltage supply device stops transmitting the DC voltage to the voltage input terminal, the switch control unit turns on the third switch unit and does not turn on the first switch unit; and then, after a second predetermined time delay, the switch The control unit turns on the second switching unit.
本創作之功效在於使輸入的直流電壓可以低於超級電容的電壓，因此對於電壓變動範圍大的綠能電源（例如太陽能）可以有更好的轉換效率。The effect of this creation is that the input DC voltage can be lower than that of the supercapacitor, so that a green energy source (such as solar energy) having a large voltage variation range can have better conversion efficiency.
有關本創作的詳細說明及技術內容，請參閱以下的詳細說明和附圖說明如下，而附圖與詳細說明僅作為說明之用，並非用於限制本創作。The detailed description and technical contents of the present invention are described in the following detailed description and the accompanying drawings.
請參考圖1，其係為本創作之改良型電源切換控制電路之第一實施例方塊圖。一改良型電源切換控制電路10係應用於一直流電壓供應裝置20及一超級電容30；該改良型電源切換控制電路10包含一電壓輸入端102、一第一開關單元104、一第二開關單元106、一第三開關單元108、一第四開關單元110、一開關控制單元112、一電壓輸出端114、一第一電阻116、一第二電阻118、一第三電阻120及一第四電阻122。該開關控制單元112包含一電壓比較子單元11202、一延遲子單元11204、一邏輯閘子單元11206及一拉低子單元11208。Please refer to FIG. 1, which is a block diagram of a first embodiment of the improved power switching control circuit of the present invention. An improved power switching control circuit 10 is applied to the DC voltage supply device 20 and a super capacitor 30. The improved power switching control circuit 10 includes a voltage input terminal 102, a first switching unit 104, and a second switching unit. 106, a third switch unit 108, a fourth switch unit 110, a switch control unit 112, a voltage output terminal 114, a first resistor 116, a second resistor 118, a third resistor 120 and a fourth resistor 122. The switch control unit 112 includes a voltage comparison subunit 11202, a delay subunit 11204, a logic gate unit 11206, and a pull down subunit 11208.
該電壓輸入端102電性連接至該直流電壓供應裝置20；該第一開關單元104電性連接至該電壓輸入端102；該第二開關單元106電性連接至該超級電容30；該第三開關單元108電性連接至該第二開關單元106；該第四開關單元110電性連接至該第一開關單元104；該開關控制單元112電性連接至該電壓輸入端102、該第一開關單元104、該第二開關單元106、該第三開關單元108及該第四開關單元110；該電壓輸出端114電性連接至該第三開關單元108及該第四開關單元110；該第一電阻116併接於該第一開關單元104的源極（source）與閘極（gate）；該第二電阻118併接於該第二開關單元106的源極與閘極；該第三電阻120併接於該第三開關單元108的源極與閘極；該第四電阻122併接於該第四開關單元110的源極與閘極；該電壓比較子單元11202電性連接至該電壓輸入端102；該延遲子單元11204電性連接至該電壓比較子單元11202；該邏輯閘子單元11206電性連接至該電壓比較子單元11202及該延遲子單元11204；該拉低子單元11208電性連接至該邏輯閘子單元11206、該第一開關單元104、該第二開關單元106、該第三開關單元108及該第四開關單元110。The voltage input terminal 102 is electrically connected to the DC voltage supply device 20; the first switch unit 104 is electrically connected to the voltage input terminal 102; the second switch unit 106 is electrically connected to the super capacitor 30; The switch unit 108 is electrically connected to the second switch unit 106; the fourth switch unit 110 is electrically connected to the first switch unit 104; the switch control unit 112 is electrically connected to the voltage input terminal 102, the first switch The unit 104, the second switch unit 106, the third switch unit 108, and the fourth switch unit 110; the voltage output end 114 is electrically connected to the third switch unit 108 and the fourth switch unit 110; The resistor 116 is connected to the source and the gate of the first switching unit 104; the second resistor 118 is connected to the source and the gate of the second switching unit 106; the third resistor 120 And connected to the source and the gate of the third switch unit 108; the fourth resistor 122 is connected to the source and the gate of the fourth switch unit 110; the voltage comparison subunit 11202 is electrically connected to the voltage input End 102; the delay subunit 11204 is electrically connected to a voltage comparison sub-unit 11202; the logic sub-unit 11206 is electrically connected to the voltage comparison sub-unit 11202 and the delay sub-unit 11204; the pull-down sub-unit 11208 is electrically connected to the logic brake sub-unit 11206, the first switch The unit 104, the second switch unit 106, the third switch unit 108, and the fourth switch unit 110.
當該直流電壓供應裝置20傳送一直流電壓22至該電壓輸入端102且該直流電壓22符合一標準電壓範圍時，該開關控制單元112導通該第四開關單元110且不導通該第二開關單元106，藉以避免該超級電容30被較高電壓回灌（即，避免回電給該超級電容30）；該超級電容30若被較高電壓回灌，會損壞該超級電容30甚至會發生危險；接著，延遲一第一預定時間之後，該開關控制單元112導通該第一開關單元104且不導通該第三開關單元108；導通該第一開關單元104可以避免開關MOS內部二極體壓降造成發熱與不必要的電源損耗。When the DC voltage supply device 20 transmits the DC voltage 22 to the voltage input terminal 102 and the DC voltage 22 meets a standard voltage range, the switch control unit 112 turns on the fourth switch unit 110 and does not turn on the second switch unit. 106, to avoid the super capacitor 30 being recharged by a higher voltage (ie, to avoid returning power to the super capacitor 30); if the super capacitor 30 is recharged by a higher voltage, the super capacitor 30 may be damaged or even dangerous; Then, after a delay of a first predetermined time, the switch control unit 112 turns on the first switch unit 104 and does not turn on the third switch unit 108; turning on the first switch unit 104 can avoid the internal diode voltage drop of the switch MOS Heat and unnecessary power loss.
當該直流電壓供應裝置20停止傳送該直流電壓22至該電壓輸入端102時，該開關控制單元112導通該第三開關單元108且不導通該第一開關單元104，藉以避免該電壓輸出端114之一輸出電壓降低（即，避免該電壓輸出端114掉電），同時避免回電到該直流電壓供應裝置20；接著，延遲一第二預定時間之後，該開關控制單元112導通該第二開關單元106且不導通該第四開關單元110；導通該第二開關單元106可以避免開關MOS內部二極體壓降造成發熱與不必要的電源損耗。When the DC voltage supply device 20 stops transmitting the DC voltage 22 to the voltage input terminal 102, the switch control unit 112 turns on the third switch unit 108 and does not turn on the first switch unit 104, thereby avoiding the voltage output terminal 114. One of the output voltages is lowered (ie, the voltage output terminal 114 is prevented from being powered down) while avoiding returning to the DC voltage supply device 20; then, after a second predetermined time delay, the switch control unit 112 turns on the second switch The unit 106 does not turn on the fourth switching unit 110; turning on the second switching unit 106 can avoid heat generation and unnecessary power loss caused by the internal diode voltage drop of the switching MOS.
該第一開關單元104係為一P型金氧半場效電晶體；該第二開關單元106係為一P型金氧半場效電晶體；該第三開關單元108係為一P型金氧半場效電晶體；該第四開關單元110係為一P型金氧半場效電晶體。該電壓輸出端114係連接一電源負載（圖1未示）或一電源處理電路（圖1未示）；該拉低子單元11208係包含至少一N型金氧半場效電晶體（圖1未示）。The first switching unit 104 is a P-type MOS field effect transistor; the second switching unit 106 is a P-type MOS field effect transistor; the third switching unit 108 is a P-type MOS field. The fourth switching unit 110 is a P-type gold-oxygen half field effect transistor. The voltage output terminal 114 is connected to a power supply load (not shown in FIG. 1) or a power processing circuit (not shown in FIG. 1); the pull-down sub-unit 11208 includes at least one N-type gold-oxygen half field effect transistor (FIG. 1 Show).
請參考圖2，其係為本創作之改良型電源切換控制電路之第二實施例方塊圖。一改良型電源切換控制電路10係應用於一直流電壓供應裝置20及一超級電容30；該改良型電源切換控制電路10包含一電壓輸入端102、一第一開關單元104、一第二開關單元106、一第三開關單元108、一開關控制單元112、一電壓輸出端114、一第一電阻116、一第二電阻118及一第三電阻120。該開關控制單元112包含一電壓比較子單元11202、一延遲子單元11204、一邏輯閘子單元11206及一拉低子單元11208。Please refer to FIG. 2, which is a block diagram of a second embodiment of the improved power switching control circuit of the present invention. An improved power switching control circuit 10 is applied to the DC voltage supply device 20 and a super capacitor 30. The improved power switching control circuit 10 includes a voltage input terminal 102, a first switching unit 104, and a second switching unit. 106. A third switch unit 108, a switch control unit 112, a voltage output terminal 114, a first resistor 116, a second resistor 118, and a third resistor 120. The switch control unit 112 includes a voltage comparison subunit 11202, a delay subunit 11204, a logic gate unit 11206, and a pull down subunit 11208.
該電壓輸入端102電性連接至該直流電壓供應裝置20；該第一開關單元104電性連接至該電壓輸入端102；該第二開關單元106電性連接至該超級電容30；該第三開關單元108電性連接至該第二開關單元106；該開關控制單元112電性連接至該電壓輸入端102、該第一開關單元104、該第二開關單元106及該第三開關單元108；該電壓輸出端114電性連接至該第一開關單元104及該第三開關單元108；該第一電阻116併接於該第一開關單元104的源極與閘極；該第二電阻118併接於該第二開關單元106的源極與閘極；該第三電阻120併接於該第三開關單元108的源極與閘極；該電壓比較子單元11202電性連接至該電壓輸入端102；該延遲子單元11204電性連接至該電壓比較子單元11202；該邏輯閘子單元11206電性連接至該電壓比較子單元11202及該延遲子單元11204；該拉低子單元11208電性連接至該邏輯閘子單元11206、該第一開關單元104、該第二開關單元106及該第三開關單元108。The voltage input terminal 102 is electrically connected to the DC voltage supply device 20; the first switch unit 104 is electrically connected to the voltage input terminal 102; the second switch unit 106 is electrically connected to the super capacitor 30; The switch unit 108 is electrically connected to the second switch unit 106; the switch control unit 112 is electrically connected to the voltage input terminal 102, the first switch unit 104, the second switch unit 106 and the third switch unit 108; The voltage output terminal 114 is electrically connected to the first switch unit 104 and the third switch unit 108; the first resistor 116 is connected to the source and the gate of the first switch unit 104; The third resistor 120 is connected to the source and the gate of the third switch unit 108; the voltage comparison subunit 11202 is electrically connected to the voltage input terminal. The delay subunit 11204 is electrically connected to the voltage comparison subunit 11202; the logic gate subunit 11206 is electrically connected to the voltage comparison subunit 11202 and the delay subunit 11204; the pull down subunit 11208 is electrically connected. To the logic gate 11206, the first switching unit 104, the second switching unit 106 and the third switch unit 108.
當該直流電壓供應裝置20傳送一直流電壓22至該電壓輸入端102且該直流電壓22符合一標準電壓範圍時，該開關控制單元112不導通該第二開關單元106，藉以避免該超級電容30被較高電壓回灌（即，避免回電給該超級電容30）；該超級電容30若被較高電壓回灌，會損壞該超級電容30甚至會發生危險；接著，延遲一第一預定時間之後，該開關控制單元112導通該第一開關單元104且不導通該第三開關單元108；導通該第一開關單元104可以避免開關MOS內部二極體壓降造成發熱與不必要的電源損耗。When the DC voltage supply device 20 transmits the DC voltage 22 to the voltage input terminal 102 and the DC voltage 22 meets a standard voltage range, the switch control unit 112 does not turn on the second switch unit 106 to avoid the super capacitor 30. Recharged by a higher voltage (ie, avoiding returning power to the supercapacitor 30); if the supercapacitor 30 is recharged by a higher voltage, the supercapacitor 30 may be damaged or even dangerous; then, delaying a first predetermined time Thereafter, the switch control unit 112 turns on the first switch unit 104 and does not turn on the third switch unit 108; turning on the first switch unit 104 can prevent the internal voltage drop of the switch MOS from causing heat generation and unnecessary power loss.
當該直流電壓供應裝置20停止傳送該直流電壓22至該電壓輸入端102時，該開關控制單元112導通該第三開關單元108且不導通該第一開關單元104，藉以避免該電壓輸出端114之一輸出電壓降低（即，避免該電壓輸出端114掉電），同時避免回電到該直流電壓供應裝置20；接著，延遲一第二預定時間之後，該開關控制單元112導通該第二開關單元106；導通該第二開關單元106可以避免開關MOS內部二極體壓降造成發熱與不必要的電源損耗。When the DC voltage supply device 20 stops transmitting the DC voltage 22 to the voltage input terminal 102, the switch control unit 112 turns on the third switch unit 108 and does not turn on the first switch unit 104, thereby avoiding the voltage output terminal 114. One of the output voltages is lowered (ie, the voltage output terminal 114 is prevented from being powered down) while avoiding returning to the DC voltage supply device 20; then, after a second predetermined time delay, the switch control unit 112 turns on the second switch The unit 106; turning on the second switch unit 106 can avoid heat generation and unnecessary power loss caused by the internal diode voltage drop of the switch MOS.
該第一開關單元104係為一P型金氧半場效電晶體；該第二開關單元106係為一P型金氧半場效電晶體；該第三開關單元108係為一P型金氧半場效電晶體。該電壓輸出端114係連接一電源負載（圖2未示）或一電源處理電路（圖2未示）；該拉低子單元11208係包含至少一N型金氧半場效電晶體（圖2未示）。The first switching unit 104 is a P-type MOS field effect transistor; the second switching unit 106 is a P-type MOS field effect transistor; the third switching unit 108 is a P-type MOS field. Effect transistor. The voltage output terminal 114 is connected to a power load (not shown in FIG. 2) or a power processing circuit (not shown in FIG. 2); the pull-down sub-unit 11208 includes at least one N-type MOS field-effect transistor (FIG. 2 Show).
本創作之功效在於使輸入的直流電壓可以低於超級電容的電壓，因此對於電壓變動範圍大的綠能電源（例如太陽能）可以有更好的轉換效率。The effect of this creation is that the input DC voltage can be lower than that of the supercapacitor, so that a green energy source (such as solar energy) having a large voltage variation range can have better conversion efficiency.
然以上所述者，僅為本創作之較佳實施例，當不能限定本創作實施之範圍，即凡依本創作申請專利範圍所作之均等變化與修飾等，皆應仍屬本創作之專利涵蓋範圍意圖保護之範疇。However, the above is only a preferred embodiment of the present invention, and the scope of the present invention cannot be limited, that is, the equal changes and modifications made by the scope of the patent application of the present invention should still be covered by the patent of the present invention. The scope of the scope is intended to protect.
10‧‧‧改良型電源切換控制電路10‧‧‧Modified power switching control circuit
20‧‧‧直流電壓供應裝置20‧‧‧DC voltage supply device
22‧‧‧直流電壓22‧‧‧DC voltage
30‧‧‧超級電容30‧‧‧Supercapacitors
102‧‧‧電壓輸入端102‧‧‧Voltage input
104‧‧‧第一開關單元104‧‧‧First switch unit
106‧‧‧第二開關單元106‧‧‧Second switch unit
108‧‧‧第三開關單元108‧‧‧Third switch unit
110‧‧‧第四開關單元110‧‧‧fourth switch unit
112‧‧‧開關控制單元112‧‧‧Switch control unit
114‧‧‧電壓輸出端114‧‧‧Voltage output
116‧‧‧第一電阻116‧‧‧First resistance
118‧‧‧第二電阻118‧‧‧second resistance
120‧‧‧第三電阻120‧‧‧third resistance
122‧‧‧第四電阻122‧‧‧fourth resistor
11202‧‧‧電壓比較子單元11202‧‧‧Voltage comparison subunit
11204‧‧‧延遲子單元11204‧‧‧Delay subunit
11206‧‧‧邏輯閘子單元11206‧‧‧Logical brake unit
11208‧‧‧拉低子單元11208‧‧‧Lower subunit
圖1為本創作之改良型電源切換控制電路之第一實施例方塊圖。1 is a block diagram of a first embodiment of an improved power switching control circuit of the present invention.
圖2為本創作之改良型電源切換控制電路之第二實施例方塊圖。2 is a block diagram of a second embodiment of the improved power switching control circuit of the present invention.
10‧‧‧改良型電源切換控制電路 10‧‧‧Modified power switching control circuit
20‧‧‧直流電壓供應裝置 20‧‧‧DC voltage supply device
22‧‧‧直流電壓 22‧‧‧DC voltage
30‧‧‧超級電容 30‧‧‧Supercapacitors
102‧‧‧電壓輸入端 102‧‧‧Voltage input
104‧‧‧第一開關單元 104‧‧‧First switch unit
106‧‧‧第二開關單元 106‧‧‧Second switch unit
108‧‧‧第三開關單元 108‧‧‧Third switch unit
110‧‧‧第四開關單元 110‧‧‧fourth switch unit
112‧‧‧開關控制單元 112‧‧‧Switch control unit
114‧‧‧電壓輸出端 114‧‧‧Voltage output
116‧‧‧第一電阻 116‧‧‧First resistance
118‧‧‧第二電阻 118‧‧‧second resistance
120‧‧‧第三電阻 120‧‧‧third resistance
122‧‧‧第四電阻 122‧‧‧fourth resistor
11202‧‧‧電壓比較子單元 11202‧‧‧Voltage comparison subunit
11204‧‧‧延遲子單元 11204‧‧‧Delay subunit
11206‧‧‧邏輯閘子單元 11206‧‧‧Logical brake unit
11208‧‧‧拉低子單元 11208‧‧‧Lower subunit
Claims (10)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW104211243U TWM512850U (en) | 2015-07-13 | 2015-07-13 | Improved power switch control circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW104211243U TWM512850U (en) | 2015-07-13 | 2015-07-13 | Improved power switch control circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| TWM512850U true TWM512850U (en) | 2015-11-21 |
Family
ID=55220010
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW104211243U TWM512850U (en) | 2015-07-13 | 2015-07-13 | Improved power switch control circuit |
Country Status (1)
| Country | Link |
|---|---|
| TW (1) | TWM512850U (en) |
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2015
- 2015-07-13 TW TW104211243U patent/TWM512850U/en unknown
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