TWM460455U - Voltage converter - Google Patents

Abstract

A voltage converter is disclosed. The voltage converter includes a constant on time signal generator, a first and second transistors, an inductor and a ripple signal injecting circuit. The ripple signal injecting circuit receives an output signal to generate a ripple injection signal. The constant on time signal generator generates a first and second driving signals according to the ripple injection signal, the output signal and a reference signal.

Description

Voltage converter

This creation is directed to a voltage converter, and more particularly to a buck voltage converter that produces an output signal that stabilizes chopping.

Please refer to FIG. 1A. FIG. 1A illustrates a conventional voltage converter 100. The voltage converter 100 includes a driver 110, a logic operation circuit 120, a comparator CMP1, transistors M1, M2, an inductor L1, a capacitor C1, and resistors R1 and R2. In the voltage converter 100, the comparator CMP1 sequentially transmits the drive signals DRV1 and DRV2 through the logic operation circuit 120 and the driver 110 by comparing the comparison result of the reference signal REF and the feedback signal VFB. In addition, the transistor M1 receives the power supply voltage VIN.

In the voltage converter 100, when the comparator CMP1 compares the feedback voltage VFB to be lower than the reference voltage REF, the transistor M1 is turned on for a period of time according to the driving signal DRV1, and the step-down output voltage VOUT is correspondingly raised, after which the transistor M1 is turned on. According to the driving signal DRV1 is disconnected and the transistor M2 is turned on according to the driving signal DRV2, and the step-down output voltage VOUT is decreased again until the feedback voltage VFB is lower than the reference voltage REF again, the transistor M1 is turned on for a period of time according to the driving signal DRV1.

When the equivalent series resistance ESR of the capacitor C1 is too low, please refer to the action waveform diagram of the voltage converter 100 illustrated in FIG. 1B. The chopping portion of the feedback voltage VFB will be inconspicuous, and the chopping phenomenon on the buck output voltage VOUT is unstable, and the quality of the buck output voltage VOUT is lowered.

This creation provides a voltage converter that effectively produces an output signal with stable chopping.

The present invention proposes a voltage converter comprising a fixed on-time signal generator, a first transistor, a second transistor, an inductor, and a chopper injection circuit. The fixed on-time signal generator generates a first drive signal and a second drive signal. The first transistor has a first end, a second end and a control end, the first end of which receives the power supply voltage, and the control end thereof receives the first driving signal. a second transistor having a first end, a second end, and a control end, the first end of the second transistor is coupled to the second end of the first transistor, and the control end of the second transistor receives the second driving signal, The second end of the second transistor is coupled to the reference ground voltage. The inductor is connected in series between the second end of the first transistor and the output of the voltage converter. An output signal is produced at the output of the voltage converter. The chopper injection circuit receives the output signal to generate a chopped injection signal. The fixed on-time signal generator generates the first and second driving signals according to the chopping injection signal, the output signal, and the reference signal.

In an embodiment of the present invention, the chopper injection circuit generates a ramp current according to the chopping portion and generates a ramp voltage according to the ramp current.

In one embodiment of the present invention, the chopping injection circuit described above includes a transconductance amplifier and a capacitor. One input of the transconductance amplifier receives the output signal, the other input receives the reference ground voltage, and the output produces a ramp current. The first end of the capacitor is coupled to the output of the transconductance amplifier and the fixed on-time signal generator, and the second end is coupled to the reference ground voltage, and the capacitor receives the ramp current and generates a ramp voltage at the first end thereof.

In an embodiment of the present invention, the chopper injection circuit further includes a reset switch. The reset switch is coupled to the capacitor in parallel, and the reset switch is turned on or off according to the control signal.

In one embodiment of the present invention, the fixed on-time signal generator adds an output signal and a ramp voltage to generate a feedback signal. And fixing the on-time signal generator and generating the first and second driving signals according to the comparison feedback signal and the reference signal.

In one embodiment of the present invention, the fixed on-time signal generator described above includes an adder and a comparator. The adder adds the output signal and the ramp voltage to generate a feedback signal. The comparator receives the feedback signal as well as the reference signal. The comparator generates a comparison result based on the comparison feedback signal and the reference signal. The fixed on-time signal generator generates the first and second driving signals according to the comparison result.

In an embodiment of the present invention, the fixed on-time signal generator further includes a logic operation circuit and a driver. Logic operation circuit coupled to the comparator Output. The logic operation circuit receives and performs a logic operation on the comparison result. The driver is coupled to the logic operation circuit, and receives and generates the first and second driving signals according to the operation result of the logic operation performed by the logic operation circuit.

In one embodiment of the present invention, the fixed on-time signal generator adds an output signal and a ramp voltage to generate a feedback signal. And fixing the on-time signal generator and generating the first and second driving signals according to the comparison feedback signal and the reference signal.

In one embodiment of the present invention, the fixed on-time signal generator described above includes an adder and a comparator. The adder adds a reference signal and a ramp voltage to generate a feedback signal. The comparator receives the feedback signal as well as the output signal. The comparator generates a comparison result based on comparing the feedback signal and the output signal. The fixed on-time signal generator generates the first and second driving signals according to the comparison result.

In an embodiment of the present invention, the voltage converter further includes an output capacitor. One end of the output capacitor is coupled to the output of the voltage converter, and the other end is coupled to the reference ground voltage. Wherein, the output capacitor is a capacitor with a low equivalent series resistance.

In an embodiment of the present invention, the voltage converter further includes a voltage dividing circuit. The voltage dividing circuit is coupled between the paths of the chopper injection circuit coupled to the output signal.

In an embodiment of the present invention, the voltage dividing circuit includes a first resistor and a second resistor. One end of the first resistor is coupled to the output of the voltage converter, and the other end of the first resistor is coupled to the chopper injection circuit. One end of the second resistor is coupled to the first resistor and The output of the voltage converter is coupled to the reference ground voltage at the other end.

In order to make the above features and advantages of the present invention more comprehensible, the following embodiments are described in detail with reference to the accompanying drawings.

100, 200, 300, 400‧‧‧ voltage converters

110, 311, 411‧‧‧ drive

120, 312, 412‧‧‧ logic operation circuit

CMP1‧‧‧ comparator

210, 310, 410‧‧‧ fixed on-time signal generator

220, 320, 420‧‧‧ chopping injection circuit

313, 413‧‧ ‧ adder

330, 430‧‧ ‧ voltage divider circuit

M1, M2‧‧‧ transistor

L1‧‧‧Inductance

C1, C2, C3‧‧‧ capacitors

VIN‧‧‧Power supply voltage

DRV1, DRV2‧‧‧ drive signal

GND‧‧‧reference ground voltage

OT‧‧‧ output

VOUT‧‧‧ output signal

REF‧‧‧ reference signal

VFB‧‧‧ feedback voltage

ESR‧‧‧ equivalent series resistance

OTA‧‧‧Transduction Amplifier

IRMP‧‧‧ ramp current

VRMP‧‧‧ ramp voltage

CTRL‧‧‧ control signal

SW1‧‧‧Reset switch

R1, R2‧‧‧ resistance

100‧‧‧Electronic devices

FIG. 1A illustrates a conventional voltage converter 100.

FIG. 1B illustrates an operation waveform diagram of the voltage converter 100.

2 is a schematic diagram of a voltage converter 200 in accordance with an embodiment of the present invention.

FIG. 3A is a schematic diagram of a voltage converter 300 of another embodiment of the present invention.

FIG. 3B is a waveform diagram of the voltage converter 300 of the present embodiment.

4A is a schematic diagram of a voltage converter 400 of another embodiment of the present invention.

FIG. 4B is a waveform diagram of the voltage converter 400 of the present embodiment.

Please refer to FIG. 2. FIG. 2 is a schematic diagram of a voltage converter 200 according to an embodiment of the present invention. The voltage converter 200 is a buck voltage converter including a fixed on-time signal generator 210, a chopper injection circuit 220, transistors M1 and M2, an inductor L1, and a capacitor C2. The fixed on-time signal generator 210 is used to generate the driving signal DRV1 and the driving signal DRV2. The transistor M1 has a first end, a second end and a control end. The first end of the transistor M1 receives the power supply voltage VIN, and the control end of the transistor M1 receives the driving signal DRV1 to be turned on or off. The transistor M2 has a first end, a second end and a control end, and the first end of the transistor M2 is coupled to the transistor M1 The second end of the transistor M2 receives the driving signal DRV2 to be turned on or off, and the second end of the transistor M2 is coupled to the reference ground voltage GND. Incidentally, the output capacitor C2 is connected in series between the output terminal OT and the reference ground voltage GND. The output capacitor C2 can be a low effective series resistance (ESR) capacitor.

The inductor L1 is connected in series between the second terminal of the transistor M1 and the output terminal OT of the voltage converter 200, and an output signal VOUT is generated at the output terminal OT of the voltage converter 200. The chopper injection circuit 220 is coupled to the output signal VOUT to capture the chopped portion of the output signal VOUT. The fixed on-time signal generator 210 generates the driving signals DRV1 and DRV2 according to the chopping portion, the output signal VOUT, and the reference signal REF captured by the chopper injection circuit 220.

Specifically, in the present embodiment, the chopper injection circuit 220 extracts the voltage of the output signal VOUT to generate a chopped injection signal into the fixed on-time signal generator 210. The fixed on-time signal generator 210 simultaneously generates the driving signals DRV1 and DRV2 according to the output signal VOUT, the reference signal REF, and the chopping injection signal. For example, the fixed on-time signal generator 210 may add an output signal VOUT and a chopping injection signal, compare the addition result with the reference signal REF, and generate the driving signals DRV1 and DRV2 according to the comparison result. . Alternatively, the fixed on-time signal generator 210 may also add a reference signal REF and a chopping injection signal generated according to the output signal VOUT, and compare the addition result with the output signal VOUT, and then according to the comparison result. Drive signals DRV1 and DRV2 are generated.

It is worth noting that the driving signals DRV1 and DRV2 are generated according to the chopping portion of the output signal VOUT. When the output capacitor C2 is a capacitor with a low equivalent series resistance, the chopping injection signal generated according to the output signal VOUT can also be Strengthened to generate drive signals DRV1 and DRV2. As such, the voltage converter 200 can generate an output signal VOUT with stable chopping.

Please refer to FIG. 3A. FIG. 3A is a schematic diagram of a voltage converter 300 according to another embodiment of the present invention. The voltage converter 300 includes a fixed on-time signal generator 310, a chopper injection circuit 320, a voltage dividing circuit 330, transistors M1 and M2, an inductor L1, and a capacitor C1.

The chopper injection circuit 320 includes a transimpedance amplifier OTA, a capacitor C3, and a reset switch SW1. An input terminal of the transconductance amplifier OTA receives a divided voltage DVOUT generated according to a voltage division of the output signal VOUT, and another input terminal of the transconductance amplifier OTA receives a reference ground voltage GND, and an output of the transduction amplifier OTA generates a ramp current IRMP. That is to say, the transimpedance amplifier OTA in the chopper injection circuit 320 captures the chopped portion of the output signal VOUT and converts the extracted chopped portion into a ramp current IRMP. The capacitor C3 is coupled to the output of the transconductance amplifier OTA to receive the ramp current IRMP for charging, and thereby generates a ramp voltage VRMP.

Incidentally, one end of the reset switch SW1 is coupled to the output end of the transconductance amplifier OTA, and the other end is coupled to the reference ground voltage GND. The reset switch SW1 is turned on or off according to the control signal CTRL, and when the reset switch SW1 is reset When turned on according to the control signal CTRL, the charge in the capacitor C3 can be discharged through the turned-on reset switch SW1, and the voltage difference across the capacitor C3 can be kept equal to zero volts before receiving the next ramp current IRMP. Since the chopping portion of the output signal VOUT is generated periodically, the ramp current IRMP is also generated periodically, and therefore, the on and off actions of the reset switch SW1 are also periodically interacted. occur.

In the present embodiment, the fixed on-time signal generator 310 includes a driver 311, a logic operation circuit 312, an adder 313, and a comparator CMP1. The adder 313 receives the ramp wave voltage VRMP from the capacitor C3 and the divided voltage DVOUT to perform a voltage addition operation, and accordingly generates a feedback voltage VFB. The comparator CMP1 compares the feedback voltage VFB and the reference signal REF, and transmits the comparison result to the logic operation circuit 312. The logic operation circuit 312 performs a logic operation on the comparison result generated by the comparator CMP1, and transfers the logic operation to the driver 311. The driver 311 is coupled to the logic operation circuit 312, and receives and generates the drive signals DRV1 and DRV2 according to the operation result of the logic operation.

Here, the details of the operation of the logic operation circuit 312 and the driver 311 are well known to those skilled in the art and will not be described here.

In addition, the chopper injection circuit 320 in the present embodiment does not directly receive the output signal VOUT, but receives the divided voltage DVOUT generated by the voltage division circuit 330 by dividing the output signal VOUT to perform the chopping portion. Take action. Here, the voltage dividing circuit 330 includes resistors R1 and R2. One end of the resistor R1 is coupled The other end of the output terminal OT of the voltage converter 300 is coupled to the chopper injection circuit 320. One end of the resistor R2 is coupled to the resistor R1 and the output terminal OT of the voltage converter 300, and the other end thereof is coupled to the reference ground voltage GND.

Please refer to FIG. 3B. FIG. 3B is a waveform diagram of the voltage converter 300 of the present embodiment. As can be clearly seen from FIG. 3B, the buck output voltage VOUT generated by the voltage converter 300 can have stable chopping.

Please refer to FIG. 4A below. FIG. 4A is a schematic diagram of a voltage converter 400 according to another embodiment of the present invention. The voltage converter 300 includes a fixed on-time signal generator 410, a chopper injection circuit 420, a voltage dividing circuit 430, transistors M1 and M2, an inductor L1, and a capacitor C1. Unlike the embodiment of FIG. 3A, the adder 413 adds the reference signal REF and the ramp voltage VRMP and generates a feedback voltage VFB. The comparator CMP1 compares the feedback voltage VFB and the divided voltage DVOUT, and transmits the comparison result to the logic operation circuit 412, so that the logic operation circuit 412 can generate the drive signals DRV1 and DRV2.

Please refer to FIG. 4B. FIG. 4B is a waveform diagram of the voltage converter 400 of the present embodiment. It can be clearly seen from FIG. 4B that the buck output voltage VOUT generated by the voltage converter 400 can also have stable chopping.

In summary, the present invention captures the chop portion of the output signal to cause the fixed on-time signal generator to generate a drive signal based on the chop portion, the output signal, and the preset reference signal, and to control the voltage conversion. The switching action of the transistor in the device. In this way, the voltage converter can generate a step-down output with stable chopping. Output voltage.

200‧‧‧Voltage Converter

210‧‧‧Fixed on-time signal generator

220‧‧‧Chopper injection circuit

M1, M2‧‧‧ transistor

L1‧‧‧Inductance

C1‧‧‧ capacitor

VIN‧‧‧Power supply voltage

DRV1, DRV2‧‧‧ drive signal

GND‧‧‧reference ground voltage

OT‧‧‧ output

VOUT‧‧‧ output signal

REF‧‧‧ reference signal

Claims (13)

A voltage converter includes: a fixed on-time signal generator for generating a first driving signal and a second driving signal; a first transistor having a first end, a second end, and a control end, the first end thereof Receiving a power supply voltage, the control terminal receiving the first driving signal; a second transistor having a first end, a second end, and a control end, the first end of the second transistor being coupled to the first transistor The second end, the control end of the second transistor receives the second driving signal, the second end of the second transistor is coupled to a reference ground voltage; and an inductor is connected in series to the second of the first transistor Between the end and the output of the voltage converter, an output signal is generated at the output of the voltage converter; and a chopping injection circuit is coupled to the output signal, and according to the output signal, a chopping injection signal is generated. The fixed on-time signal generator generates the first and second driving signals according to the chopping injection signal, the output signal, and a reference signal. The voltage converter of claim 1, wherein the chopper injection circuit generates a ramp current according to the output signal, and generates a ramp voltage according to the ramp current. The voltage converter of claim 2, wherein the chopper injection circuit comprises: a transduction amplifier, wherein an input terminal receives the output signal, another input terminal receives the reference ground voltage, and an output terminal thereof And a capacitor having a first end coupled to the output of the transconductance amplifier and the fixed on-time signal generator, the second end of which is coupled to the reference ground voltage, the capacitor receiving the ramp current And generating the ramp voltage at its first end. The voltage converter of claim 3, wherein the chopper injection circuit further comprises: a reset switch coupled in parallel with the capacitor, the reset switch being turned on or off according to a control signal. The voltage converter of claim 2, wherein the fixed on-time signal generator adds the output signal and the ramp voltage to generate a feedback signal, the fixed on-time signal generator and according to the comparison The signal and the reference signal are feedback to generate the first and second drive signals. The voltage converter of claim 5, wherein the fixed on-time signal generator comprises: an adder for adding the output signal and the ramp voltage to generate the feedback signal; and comparing Receiving the feedback signal and the reference signal, the comparator generates a comparison result according to comparing the feedback signal and the reference signal, wherein the fixed on-time signal generator generates the first according to the comparison result And the second drive signal. The voltage converter of claim 6, wherein the fixed on-time signal generator further comprises: a logic operation circuit coupled to the output of the comparator, receiving and performing a logic operation on the comparison result And a driver coupled to the logic operation circuit, receiving and generating the first and second driving signals according to the operation result of the logic operation. The voltage converter of claim 2, wherein the fixed on-time signal generator adds the output signal and the ramp voltage to generate a feedback signal, the fixed on-time signal generator and according to the comparison The signal and the reference signal are feedback to generate the first and second drive signals. The voltage converter of claim 8, wherein the fixed on-time signal generator comprises: an adder for adding the reference signal and the ramp voltage to generate the feedback signal; and comparing Receiving the feedback signal and the output signal, the comparator generates a comparison result according to comparing the feedback signal and the output signal, wherein the fixed on-time signal generator generates the first according to the comparison result And the second drive signal. The voltage converter of claim 9, wherein the fixed on-time signal generator further comprises: a logic operation circuit coupled to the output end of the comparator, and receiving the comparison result for performing a logic operation And a driver coupled to the logic operation circuit, receiving and generating the first and second driving signals according to the operation result of the logic operation. The voltage converter of claim 1, further comprising: an output capacitor, one end of which is coupled to the output end of the voltage converter, and the other end of which is coupled to the reference ground voltage, wherein the output The capacitor is a capacitor with a low equivalent series resistance. The voltage converter of claim 1, further comprising: a voltage dividing circuit coupled between the paths of the chopper injection circuit coupled to the output signal. The voltage converter of claim 12, wherein the voltage dividing circuit comprises: a first resistor, one end of which is coupled to the output end of the voltage converter, and the other end of which is coupled to the chopper injection And a second resistor, one end of which is coupled to the first resistor and the output of the voltage converter, and the other end of which is coupled to the reference ground voltage.