CN109149938B - DC-DC circuit - Google Patents
DC-DC circuit Download PDFInfo
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- CN109149938B CN109149938B CN201811005996.XA CN201811005996A CN109149938B CN 109149938 B CN109149938 B CN 109149938B CN 201811005996 A CN201811005996 A CN 201811005996A CN 109149938 B CN109149938 B CN 109149938B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
- H02M3/1584—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load with a plurality of power processing stages connected in parallel
Abstract
The invention discloses a DC-DC circuit, comprising: an input voltage terminal; an output voltage terminal; the first switch branch circuit controllably conducts the input voltage end and the first reference node under the action of the first driving signal; the second switch branch circuit controllably conducts the first reference node and the grounding terminal under the action of a second driving signal; the energy storage element is connected between the first reference node and the output voltage end; the PWM signal generating circuit is connected between the first switch branch and the second switch branch and compares a first voltage feedback signal sampled from an output voltage end with a voltage comparison signal through a ramp signal to generate a first driving signal and a second driving signal; under the switching signal effect, ramp signal produces through ramp signal generating circuit to trigger first voltage feedback signal, make the turning point of first voltage feedback signal stable, beneficial effect: the stability of the whole circuit is guaranteed, the ripple of the whole circuit is reduced, and meanwhile the characteristic that the response speed of the switch circuit is high is achieved.
Description
Technical Field
The invention relates to the technical field of switching power supplies, in particular to a DC-DC circuit.
Background
The DC-DC switching power supply has a plurality of control modes, and can be generally divided into a voltage mode and a current mode according to a sampling signal. The voltage mode carries out negative feedback by sampling output voltage, and the current mode carries out negative feedback by sampling input current and output voltage; the current formwork mechanism comprises: a Peak-Current Mode (Peak-Current Mode), an Average-Current Mode (Average-Current Mode), and a hysteresis-Current Mode (hystertic-Current Mode); the duty Modulation method includes Pulse Width Modulation (PWM), Pulse Frequency Modulation (PFM), Constant On Time (COT), Fixed Off Time (FOT), and dead-Bang control (Bang-Bang).
As shown in fig. 1, the circuit diagram of the conventional COT mode is very fast in response, but completely inoperable without ESR system, and has poor stability.
Disclosure of Invention
In view of the above problems in the prior art, a DC-DC circuit is now provided.
The specific technical scheme is as follows:
a DC-DC circuit, comprising:
an input voltage terminal;
an output voltage terminal;
the first switch branch circuit controllably conducts the input voltage end and a first reference node under the action of a first driving signal;
the second switch branch circuit controllably conducts the first reference node and the grounding terminal under the action of a second driving signal;
the energy storage element is connected between the first reference node and the output voltage end and alternately charges or discharges in the circuit operation;
the PWM signal generating circuit is connected between the first switch branch circuit and the second switch branch circuit, and compares a first voltage feedback signal sampled from the output voltage end with a voltage comparison signal through a ramp signal to generate a first driving signal and a second driving signal;
under the action of a switching signal, the ramp signal is generated by a ramp generating unit to trigger the first voltage feedback signal, so that the turning point of the first voltage feedback signal is stable.
Preferably, the ramp generating unit includes:
the first resistor is connected between the first voltage feedback signal and the ramp signal;
and the first capacitor is connected between the ramp signal and the grounding end.
Preferably, the voltage comparison signal is generated by an error amplifier, and the error amplifier is configured to generate a second voltage feedback signal fed back from the output voltage terminal after operating on a reference voltage.
Preferably, the PWM signal generating circuit includes:
the non-inverting input end of the comparator is connected with the voltage comparison signal, the inverting input end of the comparator is connected with the ramp signal, and the comparator is used for comparing the voltage comparison signal with the ramp signal to generate a comparison pulse signal;
and the signal driving unit is connected to the output end of the comparator and used for processing the signal output by the comparator to generate the first driving signal and the second driving signal.
Preferably, the switching signal is generated by a switching circuit, the switching circuit including:
the inverting amplifier is connected to the output end of the comparator;
and the grid electrode of the N-type switching tube is connected with the output end of the inverting amplifier, the source electrode of the N-type switching tube is connected with the grounding end, and the drain electrode of the N-type switching tube is connected with the first voltage feedback signal through a second resistor.
Preferably, the first voltage feedback signal is generated by a first resistor voltage-dividing branch, the first resistor voltage-dividing branch includes a predetermined number of first group of voltage-dividing resistors connected in series between the output voltage terminal and the ground terminal, a point connected between the first group of voltage-dividing resistors forms a voltage-dividing node, and the first voltage feedback signal is led out from the predetermined first voltage-dividing node.
Preferably, the second voltage feedback signal is generated by a second resistor voltage-dividing branch, the second resistor voltage-dividing branch includes a predetermined number of second groups of voltage-dividing resistors connected in series between the output voltage terminal and the ground terminal, a point connected between the second groups of voltage-dividing resistors forms a voltage-dividing node, and the second voltage feedback signal is led out from the predetermined second voltage-dividing node.
Preferably, a non-inverting input terminal of the error amplifier is connected to the second voltage feedback signal, and an inverting input terminal of the error amplifier is connected to the reference voltage.
Preferably, a second capacitor is connected between the output end of the error amplifier and the ground end.
Preferably, a load resistor is connected between the output voltage terminal and a ground terminal.
The technical scheme of the invention has the beneficial effects that: the ramp signal generating circuit is added for generating a ramp signal, under the action of the switching signal, the ramp signal triggers the first voltage feedback signal to ensure that the turning point of the first voltage feedback signal is stable, so that the stability of the whole circuit is ensured, the ripple of the whole circuit is reduced, and meanwhile, the characteristic of high response speed of the switching circuit is achieved.
Drawings
Embodiments of the present invention will now be described more fully hereinafter with reference to the accompanying drawings. The drawings are, however, to be regarded as illustrative and explanatory only and are not restrictive of the scope of the invention.
FIG. 1 is a circuit diagram of a COT mode in the prior art;
FIG. 2 is a circuit configuration diagram of a DC-DC circuit according to the present invention;
FIG. 3 is a waveform diagram of an output of a DC-DC circuit according to the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that the embodiments and features of the embodiments may be combined with each other without conflict.
The invention is further described with reference to the following drawings and specific examples, which are not intended to be limiting.
The present invention includes a DC-DC circuit, comprising,
an input voltage terminal VIN;
an output voltage terminal VOUT;
the first switching branch controllably connects the input voltage terminal VIN and a first reference node X0 under the action of a first driving signal HS;
the second switching branch controllably connects the first reference node X0 and the ground GND under the action of a second driving signal LS;
an energy storage element OLB connected between the first reference node X0 and the output voltage terminal VOUT for alternately charging or discharging during circuit operation;
the PWM signal generating circuit is connected between the first switch branch and the second switch branch, and compares a first voltage feedback signal FB S sampled from an output voltage end with a voltage comparison signal LPF through a ramp signal FB SC to generate a first driving signal HS and a second driving signal LS;
under the action of a switching signal SS, the ramp signal FB SC is generated by a ramp signal generating circuit RC to trigger the first voltage feedback signal FB S, so that the turning point of the first voltage feedback signal FB S is stable.
Through the technical scheme of the DC-DC circuit, as shown in FIG. 2, the DC-DC circuit is based on a basic COT framework, the COT framework can not work completely without an ESR system, but a ramp signal generating circuit RC is added to generate a ramp signal FB SC, and under the action of a switching signal SS, the ramp signal FB SC triggers a first voltage feedback signal FB S to ensure that the turning point of the first voltage feedback signal FB S is stable, so that the stability of the whole circuit is ensured, the ripple of the whole circuit is reduced, and meanwhile, the DC-DC circuit has the characteristic of high response speed of the switching circuit;
specifically, under the action of the switching signal SS, the ramp signal generating circuit RC generates a ramp signal FB SC, which is used for similar current control principles, except that the current mode includes a current inductor superimposed with a ramp current, and in this embodiment, the ramp signal FB SC is a ramp voltage generated separately; and further, the turning point of the first voltage feedback signal FB S is stable, so that the stability of the whole circuit, as shown in fig. 3, is stable and has no oscillation, the first voltage feedback signal FB S generates a ripple of 40mV, and the waveform output by the output voltage terminal VOUT has only a ripple of 3 mV.
In a preferred embodiment, the ramp signal generating circuit RC includes:
a first resistor R6 connected between the first voltage feedback signal FB S and the ramp signal FB SC; a first capacitor C3 is connected between the ramp signal FB SC and ground.
Specifically, the ramp signal generating circuit RC is composed of a first resistor R6 and a first capacitor C3, and it takes a while to establish, so the ramp signal FB SC is not a ramp with a fixed slope, and the final ramp voltage tends to be constant;
further, since the time constant formed by the first resistor R6 and the first capacitor C3 is much longer than the time for normally turning off, that is, in a normal case, when the ramp signal FB SC does not fall to the lowest point, the switching operation in the previous cycle is triggered; since the beginning of the next switching period is triggered in the descending process, the ramp voltage FB SC is compared with the voltage comparison signal LPF and then output, and the output signal tends to be stable;
meanwhile, although the ripple generated by the ramp signal FB SC is large enough and the delay time is long, the switching signal SS is very stable, so that the stability of the whole circuit is not affected, and the delay time of the ramp signal FB SC is short compared with that of an external decoupling capacitor and a load resistor, so that the response speed of the whole circuit is still very high.
In a preferred embodiment, the voltage comparison signal LPF is generated by an error amplifier OPA1, and the error amplifier OPA1 is configured to generate a second voltage feedback signal FB fed back from the output voltage terminal and a reference voltage VREF after being operated.
Specifically, the error amplifier OPA1 is used for generating a voltage comparison signal LPF after operating a second voltage feedback signal FB fed back from the output voltage terminal and a reference voltage VREF, so as to ensure the precision of the whole circuit;
the amplifier further comprises a second error amplifier, wherein the non-inverting input end of the second error amplifier is connected with a TEMPCO signal, and the inverting input end of the second error amplifier is connected with a reference VO signal; furthermore, the device also comprises a third error amplifier, wherein the non-inverting input end of the third error amplifier is connected with a XXX _ OTHER signal, and the inverting input end of the third error amplifier is connected with a reference V1 signal. The constant-current temperature control circuit is used for being connected with the error amplifier in parallel to realize the functions of temperature control and constant current.
In a preferred embodiment, the PWM signal generating circuit includes:
the comparator PWMCOMP is used for comparing the voltage comparison signal LPF with the ramp signal FB SC and generating a comparison pulse signal;
and the signal driving unit PWM DRV is connected with the output end of the comparator PWMCOMP and is used for processing the signal output by the comparator PWMCOMP and then generating a first driving signal HS and a second driving signal LS.
Specifically, the comparator PWMCOMP is used to accelerate the response speed and stabilize the loop, and is used to compare the voltage comparison signal LPF with the ramp signal FB SC to generate a comparison pulse signal, and then generate the first driving signal HS and the second driving signal LS after processing the signal output by the comparator PWMCOMP by the signal driving unit PWM DRV.
In a preferred embodiment, the switching signal SS is generated by a switching circuit comprising: an inverting amplifier PWMb connected to the output terminal of the comparator PWMCOMP;
an N-type switch M2, the gate of the N-type switch M2 is connected to the output terminal of the inverting amplifier PWMb, the source of the N-type switch M2 is connected to the ground, and the drain of the N-type switch M2 is connected to the first voltage feedback signal FB S through a second resistor R8.
Specifically, the switching circuit generates the switching signal SS composed of the inverting amplifier PWMb and the N-type switching tube M2, so that the pole of the voltage comparison signal LPF in the loop is close enough to the origin, and the loop phase margin is close to 90 degrees, resulting in stability of the whole circuit.
In a preferred embodiment, the first voltage feedback signal FB S is generated by a first resistor voltage-dividing branch, the first resistor voltage-dividing branch includes a predetermined number of first voltage-dividing resistors connected in series between the output voltage terminal VOUT and the ground terminal GND, a voltage-dividing node is formed at a point connected between the first voltage-dividing resistors, and the first voltage feedback signal FB S is extracted from the predetermined first voltage-dividing node.
In a preferred embodiment, the second voltage feedback signal FB is generated by a second resistor voltage-dividing branch, the second resistor voltage-dividing branch includes a predetermined number of second voltage-dividing resistors connected in series between the output voltage terminal VOUT and the ground terminal GND, a voltage-dividing node is formed at a point connected between the second voltage-dividing resistors, and the second voltage feedback signal FB is led out from the predetermined second voltage-dividing node.
Specifically, the first group of voltage dividing resistors comprises a resistor R0 and a resistor R1, a resistor R0 and a resistor R1 are connected in series, and the resistance ratio of the resistor R0 and the resistor R1 can be set arbitrarily; the second group of voltage division resistors comprises a resistor R5 and a resistor R4, and the resistor R5 and the resistor R4 are connected in series;
furthermore, compared with the prior art that only one group of resistance voltage division circuits are arranged, the resistance voltage division circuit is additionally provided with one group of resistance voltage division circuits, the error amplifier is additionally arranged, and the second resistance voltage division branch can be randomly set with lower voltage.
In a preferred embodiment, the non-inverting input of the error amplifier OPA1 is coupled to the second voltage feedback signal FB and the inverting input of the error amplifier OPA1 is coupled to the reference voltage VREF.
In a preferred embodiment, a second capacitor CF is connected between the output of the error amplifier OPA1 and the ground GND.
In a preferred embodiment, a load resistor RLOAD is connected between the output voltage terminal VOUT and the ground terminal GND.
In a preferred embodiment, the first switching branch comprises a PMOS transistor M1, a gate of the PMOS transistor M1 is connected to the first driving signal HS, a source is connected to the input voltage terminal VIN, a drain is connected to the first reference node X0, the second switching branch comprises an NMOS transistor M0, a gate of the NMOS transistor M0 is connected to the second driving signal LS, a source is connected to the ground terminal GND, and a drain is connected to the first reference node X0.
While the invention has been described with reference to a preferred embodiment, it will be understood by those skilled in the art that various changes in form and detail may be made therein without departing from the spirit and scope of the invention.
Claims (8)
1. A DC-DC circuit, comprising:
an input voltage terminal;
an output voltage terminal;
the first switch branch circuit controllably conducts the input voltage end and a first reference node under the action of a first driving signal;
the second switch branch circuit controllably conducts the first reference node and the grounding terminal under the action of a second driving signal;
the energy storage element is connected between the first reference node and the output voltage end and alternately charges or discharges in the circuit operation;
the PWM signal generating circuit is connected between the first switch branch circuit and the second switch branch circuit, and compares a first voltage feedback signal sampled from the output voltage end with a voltage comparison signal through a ramp signal to generate a first driving signal and a second driving signal;
under the action of a switching signal, the ramp signal is generated by a ramp signal generating circuit to trigger the first voltage feedback signal, so that the turning point of the first voltage feedback signal is stable;
the ramp signal generating circuit includes:
the first resistor is connected between the first voltage feedback signal and the ramp signal;
the first capacitor is connected between the ramp signal and the grounding end;
the voltage comparison signal is generated by an error amplifier, and the error amplifier is used for generating a second voltage feedback signal fed back from the output voltage end after operating with a reference voltage.
2. The DC-DC circuit of claim 1, wherein the PWM signal generation circuit comprises:
the non-inverting input end of the comparator is connected with the voltage comparison signal, the inverting input end of the comparator is connected with the ramp signal, and the comparator is used for comparing the voltage comparison signal with the ramp signal to generate a comparison pulse signal;
and the signal driving unit is connected to the output end of the comparator and used for processing the signal output by the comparator to generate the first driving signal and the second driving signal.
3. The DC-DC circuit of claim 2, wherein the switching signal is generated by a switching circuit comprising:
the inverting amplifier is connected to the output end of the comparator;
and the grid electrode of the N-type switching tube is connected with the output end of the inverting amplifier, the source electrode of the N-type switching tube is connected with the grounding end, and the drain electrode of the N-type switching tube is connected with the first voltage feedback signal through a second resistor.
4. The DC-DC circuit of claim 1, wherein the first voltage feedback signal is generated by a first resistor voltage dividing branch, the first resistor voltage dividing branch comprises a predetermined number of first voltage dividing resistors connected in series between the output voltage terminal and a ground terminal, a point of connection between the first voltage dividing resistors forms a voltage dividing node, and the first voltage feedback signal is derived from the predetermined first voltage dividing node.
5. The DC-DC circuit of claim 1, wherein the second voltage feedback signal is generated by a second resistor voltage-dividing branch, the second resistor voltage-dividing branch comprises a predetermined number of second voltage-dividing resistors connected in series between the output voltage terminal and the ground terminal, a point of connection between the second voltage-dividing resistors forms a voltage-dividing node, and the second voltage feedback signal is derived from the predetermined second voltage-dividing node.
6. The DC-DC circuit of claim 1, wherein the non-inverting input of the error amplifier is coupled to the second voltage feedback signal and the inverting input of the error amplifier is coupled to the reference voltage.
7. The DC-DC circuit of claim 1, wherein a second capacitor is connected between the output terminal of the error amplifier and ground.
8. The DC-DC circuit of claim 1, wherein a load resistor is connected between the output voltage terminal and a ground terminal.
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| CN201811005996.XA CN109149938B (en) | 2018-08-30 | 2018-08-30 | DC-DC circuit |
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| CN201811005996.XA CN109149938B (en) | 2018-08-30 | 2018-08-30 | DC-DC circuit |
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| CN109149938B true CN109149938B (en) | 2020-12-04 |
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| CN110658468B (en) * | 2019-09-17 | 2021-12-07 | 安徽容知日新科技股份有限公司 | Battery state detection device |
| CN111740610B (en) * | 2020-07-08 | 2022-05-10 | 北京新雷能科技股份有限公司 | Input voltage feedforward circuit, input voltage feedforward control method and device |
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| CN101710794B (en) * | 2009-12-17 | 2015-09-02 | 北京中星微电子有限公司 | AC-DC flyback converter under total energy translative mode and loop circuit compensation method thereof |
| US8643355B2 (en) * | 2011-02-07 | 2014-02-04 | Semiconductor Components Industries, Llc | Method for generating a signal and structure therefor |
| CN102931840B (en) * | 2011-08-12 | 2015-05-06 | 成都芯源系统有限公司 | Control circuit and control method for constant on-time conversion circuit |
| TWI483529B (en) * | 2012-12-24 | 2015-05-01 | Upi Semiconductor Corp | Multi-phase dc-dc power converter |
| US9431906B2 (en) * | 2013-03-29 | 2016-08-30 | Chengdu Monolithic Power Systems Co., Ltd. | Voltage converter circuit and associated control method to improve transient performance |
| CN104467428B (en) * | 2013-09-16 | 2018-03-06 | 通嘉科技股份有限公司 | Can improve the work(of underloading because power supply unit and control method |
| JP6307401B2 (en) * | 2014-09-24 | 2018-04-04 | ローム株式会社 | Current mode controlled switching power supply |
| CN105048808B (en) * | 2015-08-25 | 2018-06-26 | 华为技术有限公司 | Voltage conversion circuit, method and Multiphase Parallel power-supply system |
| CN105515387B (en) * | 2015-12-09 | 2018-11-27 | 深圳市英特源电子有限公司 | A kind of hyperfrequency low ripple reducing transformer and its decompression control method |
| CN108336905B (en) * | 2017-11-16 | 2020-12-04 | 上海芯导电子科技有限公司 | DC-DC circuit |
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Address after: No.7, Lane 2277, Zuchongzhi Road, China (Shanghai) pilot Free Trade Zone, Pudong New Area, Shanghai, 200120 Patentee after: Shanghai Xindao Electronic Technology Co.,Ltd. Address before: 201203 building 7, Lane 2277, Zuchongzhi Road, Zhangjiang High Tech Park, Pudong New Area, Shanghai Patentee before: SHANGHAI PRISEMI ELECTRONIC TECHNOLOGY Co.,Ltd. |