M418408 五、新型說明： 【新型所屬之技術領域】 本創作係關於一種帶通濾波器，尤指一種在帶通渡波 器内設一電容矩陣以增加位於帶拒頻帶的零點個數，使頻 率響應易於調整的微型多層帶通濾波器。 【先前技術】 _ 帶通濾波器是一種僅讓某頻帶訊號通過的濾波器，用 以使接收端只選擇傳輸訊號中頻率位於某一頻帶（稱為通帶） 者’訊號中帶拒頻帶的雜訊則被濾除，是以帶通濾波器對 於目别無線通訊裝置係為一不可或缺的元件。其中二階帶 通濾波器為一種常用的帶通濾波器，原始二階帶通渡波器 的電路圖如圖7所示，主要係將一共振電路81與一電容 CC1並聯，其中該共振電路81與接地端連接，該電容 的兩端分別設有一輸入端in及一輸出端〇ut，前述原始二 _階帶通遽波器的頻率響應如圖8所示，曲線S82係為原始 二階帶通濾波器從輸入端丨n至輸出端〇ut的插入損耗 (丨nsertion Loss)功率，而曲線S83係為原始二階帶通濾波 器從輸入端m至輸出端〇ut的回送損耗（Ret_ l〇叫功 率由虛線S82可：}于知原始二階帶通滤波器係在帶拒頻帶 的低頻側具有一零點，藉由調整該零點的位置可調整帶通 頻帶的位置。 、」而剛述原始二階帶通濾波器在帶拒頻帶的高頻側 /又有零點故濾除尚頻側雜訊的功能不佳，也無法調整高 3 M418408 頻側的頻率響應：為解決前述問題，我國發明專利權第 354號「二階帶通遽波器」提出了 —解決方案請參閱 圖9所示’該二階帶通慮波器包括有—雙埠網路91與—接 地電容C，該雙埠網路91包括有一第一埠 : ，且該第一…™ Si，該二== 輸出端So;該二階帶通濾波器的頻率響應如圖1〇所示， 由曲線S95係為既有二階帶通濾波器的插入損耗功率=實 際測量曲線，其在帶拒頻帶的低頻側與 零點’且藉由調整接地電容c的容值可改變兩二:有；; 唯，該二階帶通濾波器在低頻側的零點只有一個，故只能 針對單-頻段作有效抑制；以上所述皆為既有技術未療^ 想之處’實有待進一步檢討，並謀求可行的解決方案。 【新型内容】 有鑑於前述現有技術之缺點，本創作之目的在於提供 -種微麼多層帶通據波器，主要係在一微型多層帶通滤波 器内設有-電容矩陣，可使頻率響應在帶拒頻帶增加為三 零點，故可輕易調整其頻率響應，使本創作具有良好的電 路特性。 為達成前述目的採取的主要技術手段係令前述微型多 層帶通；慮波器包括有： 電今矩陣’其包括有第一至第四電容該第—電容 的兩端分別與第三、第四電容的一端連接，又第三、第四 電容的另端分別與第二電容的兩端連接；另第4容的兩 端係分別與一輸入端與一輸出端連接； 兩四配電路，各匹配電路分別包括有一匹配電容與一 M418408 傳輸線’該匹配電容的一端與該傳輸線的一端串接，又兩 傳輸線的另端分別與輪入端及輸出端連接，匹配電容的另 端則連接接地端； 一共振電路，係與前述電容矩陣連接，該共振電路具 有兩第一端與兩第二端，兩第一端分別與前述電容矩陣的 第一電容兩端連接，兩第二端則連接接地端。 由於本創作的帶通濾波器採用了電容矩陣，可將頻率 響應在帶拒頻帶增加為三零點，且可利用改變第三、四電 谷的電谷值以調整低頻側的兩零點，亦可透過調整第二電 谷的電容值以調整高頻側的一零點，故可輕易調整其頻率 響應，抑制高頻側的雜訊，且可由匹配電路調整阻抗匹配， 使本創作具有良好的電路特性。 本創作的電容矩陣中第三、第四電容使本創作較既有 技術新增有直流阻隔的功能，可形成直流電源的隔絕功 能，不需在電路外額外加上串連電容，更進一步節省電路 面積。 且本創作可由複數基板疊合而成，本創作在多層基板疊 合架構實現時，在有效的疊層設計下各電容容易實現於電 路中，且可由疊層間之耗合電容減少實際所需電容面積， 有效利用此寄生效應，間接使佈局更有彈性，並將形成電 容的基板集中，較易調整其電容值。 【實施方式】 以下配合圖式與本創作之較佳實施例，進一步聞述本 創作為達成預定創作目的所採取的技術手段。 請參閱圖1所示，本創作係為一種微型多層帶通渡波 5 器其匕括有一電容矩陣1〇、兩匹配電路⑼、2〇a I —共 振電路30，其中： 、 該電容矩陣10包括有第一至第四電容cc1、cC2、Cpl、 Cp2 ’該第—電容Cc1的兩端分別與第三、第四電容CP1、 cP2的-，，又第三、第四電容Cpi Cp2的另端分別 與第電合Cc2的兩端連接；另第一電容CC1的兩端係分別 與一輸入端in與一輸出端out連接； 各匹配電路2〇、2〇A分別包括有一匹配電容^、匕 與一傳輸線Ll、L2,其中匹配電路20的匹配電容Cl、C2 端與該傳輸線h的-端串接，匹配電路2()A的匹配電容M418408 V. New description: [New technical field] This creation is about a band-pass filter, especially a capacitor matrix in a bandpass ferrite to increase the number of zeros in the band rejection band, so that the frequency response A miniature multilayer bandpass filter that is easy to adjust. [Prior Art] _ Bandpass filter is a filter that only passes a certain frequency band signal, so that the receiving end only selects the frequency of the transmission signal in a certain frequency band (called a passband). The noise is filtered out, and the bandpass filter is an indispensable component for visualizing wireless communication devices. The second-order band-pass filter is a commonly used band-pass filter. The circuit diagram of the original second-order band-pass ferrite is shown in FIG. 7 , which mainly connects a resonant circuit 81 in parallel with a capacitor CC1 , wherein the resonant circuit 81 and the ground terminal Connected, both ends of the capacitor are respectively provided with an input terminal in and an output terminal 〇ut, the frequency response of the original second-order bandpass chopper is as shown in Fig. 8, and the curve S82 is the original second-order bandpass filter. The input loss 丨n to the output 〇ut insertion loss (丨nsertion Loss) power, and the curve S83 is the original second-order band-pass filter from the input terminal m to the output terminal 〇ut return loss (Ret_ l 功率 call power by the dotted line S82 can:: Know that the original second-order bandpass filter has a zero point on the low-frequency side of the band rejection band, and the position of the band-pass band can be adjusted by adjusting the position of the zero point.] and the original second-order band-pass filter is just described. The function of filtering the frequency side noise on the high frequency side/zero point of the band with the rejection band is not good, and the frequency response of the frequency side of the high 3 M418408 cannot be adjusted: in order to solve the above problem, China Patent No. 354 "Second-order bandpass The wave device is proposed - the solution is shown in Figure 9 'The second-order band pass filter includes a - double-turn network 91 and a grounding capacitor C, the dual-turn network 91 includes a first port: The first...TM Si, the second== output terminal So; the frequency response of the second-order bandpass filter is as shown in FIG. 1A, and the curve S95 is the insertion loss power of the existing second-order bandpass filter=actual measurement The curve, which is at the low-frequency side and the zero point of the band with the rejection band, can be changed by adjusting the capacitance of the grounding capacitor c: two; there is only one zero point on the low-frequency side of the second-order band-pass filter, so only Effective suppression for single-band; all of the above are unrecognized technologies of existing technologies, and need to be further reviewed and seek feasible solutions. [New content] In view of the shortcomings of the aforementioned prior art, this creation The purpose is to provide a micro-multi-layer bandpass data filter, which is mainly provided with a capacitance matrix in a micro-multilayer bandpass filter, which can increase the frequency response in the band rejection band to three zero points, so it can be easily adjusted. Frequency response makes this creation good Circuit characteristics. The main technical means for achieving the foregoing purpose is to enable the aforementioned micro-multi-layer band pass; the wave filter includes: a current matrix comprising: first to fourth capacitors, the first and second ends of the capacitor are respectively 3. The other end of the fourth capacitor is connected, and the other ends of the third and fourth capacitors are respectively connected to the two ends of the second capacitor; the other ends of the fourth capacitor are respectively connected with one input end and one output end; The matching circuit includes a matching capacitor and a M418408 transmission line respectively. One end of the matching capacitor is connected in series with one end of the transmission line, and the other ends of the two transmission lines are respectively connected to the wheel input end and the output end, and the other end of the matching capacitor is connected. Connected to the grounding end; a resonant circuit is connected to the capacitor matrix, the resonant circuit has two first ends and two second ends, the first ends are respectively connected with the first ends of the first capacitor of the capacitor matrix, and the second The terminal is connected to the ground. Since the bandpass filter of the present invention adopts a capacitance matrix, the frequency response can be increased to three zero points in the band rejection band, and the electric valleys of the third and fourth electric valleys can be changed to adjust the two zero points on the low frequency side. By adjusting the capacitance value of the second electric valley to adjust the zero point on the high frequency side, the frequency response can be easily adjusted, the noise on the high frequency side can be suppressed, and the impedance matching can be adjusted by the matching circuit, so that the creation has good performance. Circuit characteristics. The third and fourth capacitors in the capacitor matrix of the present invention enable the present invention to add a DC blocking function to the existing technology, which can form a DC power supply isolation function, and does not need to additionally add a series capacitor outside the circuit, thereby further saving. Circuit area. The present invention can be formed by stacking a plurality of substrates. When the multi-layer substrate is stacked, the capacitors can be easily realized in the circuit under the effective stack design, and the actual required capacitance can be reduced by the consumable capacitance between the layers. The area, effectively utilizing this parasitic effect, indirectly makes the layout more flexible, and concentrates the substrate forming the capacitor, making it easier to adjust its capacitance value. [Embodiment] The following is a description of the preferred embodiment of the present invention, and further describes the technical means by which the creation is intended to achieve the intended purpose of creation. Referring to FIG. 1 , the present invention is a miniature multi-layer band pass wave device comprising a capacitor matrix 1 〇, two matching circuits (9), 2 〇 a I — a resonant circuit 30, wherein: the capacitor matrix 10 includes There are first to fourth capacitors cc1, cC2, Cpl, Cp2 'the two ends of the first capacitor Cc1 and the third and fourth capacitors CP1, cP2, and the third and fourth capacitors Cpi Cp2 The two ends of the first capacitor CC1 are respectively connected to an input terminal in and an output terminal out; each matching circuit 2〇, 2〇A respectively includes a matching capacitor ^, 匕And a transmission line L1, L2, wherein the matching capacitors C1, C2 of the matching circuit 20 are connected in series with the - terminal of the transmission line h, and the matching capacitance of the matching circuit 2 () A
Cr端與該傳輸線^的一端串接，又兩傳輸線…匕的另 端分別與輸入端in及輸出端〇ut連接，匹配電容h、C2 的另端則連接接地端； 該共振電路3G係與前述電容矩陣1Q連接，該共振電 路3〇具有兩第—端與兩第二端，兩第-端分別與前述電容 矩陣10的第me2兩端連接，兩第二端則連接接地 端；在此較佳實施例中，該共振電路30係包括有兩個耗合 線L3、L4與兩電容C3、C4,其中各麵合線L3、u分別具有 一第一端與一第二端，兩輕合線L3、U的第一端分別為共 振電路30的兩第一端，兩耦合線“、u的第二端分別為該 共振電路3G的兩第：端，且該等輕合線L3、u係互相叙令， 且電合〇3與耦合線ι_3並聯，電容與耦合線^並聯電 办c3與搞。線l3的第—端連接，電容C4與耗合線^的第 -端連接，而各電容c3、c4的另一端係連接接地端。 圖2係為本創作第一較佳實施例於頻域下的功率衰減 M418408 曲線圖，虛線S21係為輸出端的入射損失（|nserti〇n l〇ss) 功率曲線，實線S11係為回送損耗（Return L〇ss)功率曲 線；因為此微型多層帶通濾波器具有該電容矩陣10，該電 容矩陣10上係形成有多重路徑，使本創作在帶拒頻帶低頻 側有二個零點，而高頻側的零點是由C1、L1與C2、L2造 成的’在此較佳實施例中低頻側的兩零點位置分別位於頻 帶1.18GHz & 1_74GHz’而高頻側的零點位置位於頻帶 7_〇GHz，而該入射損失功率S21的通帶中心頻率為 2.45GHz’故入射損失功率S21在約2 45GHz為最低，且 改變電容矩陣1〇㈣第三、第四電容Cpi、Cp』容值即 可調整低頻側零點位置，而改變第二電容CM的容值即可調 整高頻側零點位置。 本創作一較佳實施例於多層基板上實施的結構分解圖 如圖3所示，係由第一至第十二基板5〇〜61依順序由上至 下疊合而成，其中第十二基板61為端子基板，於四周邊形 成有兩相對訊號端面611與兩相對接地端面612，且不同 層基板可用導通孔（VIA)62連接，又第十基板59係形成有 大面積的接地金屬面591，第十一基板6〇的金屬面6〇1係 形成匹配電路20上的傳輸線|_1與匹配電容〇1，而金屬面 602係形成匹配電路20A上的傳輸線！_2與匹配電容〇2 ;而 第一、二基板50、51上的金屬面501、511係形成共振電 路30上的耦合線|_3,第一、二基板5〇、51上的金屬面5〇1、 512係形成共振電路30上的耦合線u;第三基板52上的 金屬面521形成電容矩陣1〇的第一電容Cc1 ;第四、八基 板53、57上的金屬面531、571形成電容矩陣1〇上的第 7 M418408 三電容Cm，而金屬面532、572形成電容矩陣1Q上的第 四電容Cp2;第五、七、九基板54、56、58上的金屬面541、 561、 581係形成共振電路3〇的電容〇3，而金屬面542、 562、 582係形成共振電路3〇的電容Q，第六基板55上 的金屬面551形成電容矩陣1〇上的第二電容Cc2。 本創作在多層基板疊合架構上實現時在有效的疊層 3又&十下各電谷容易實現於電路中且可由疊層間之耦合電 容減少實際所需電容面積，冑效利用此寄生效應，可使佈 局更有彈性’並將電容集中g己置，較易調整電容值。將共 振電路30之耦合線l3、l4實現於多層基板疊合架構中時， 將此耦合線L3、|_4放置至多層基板疊合架構的最上層可與 電容區隔減少干擾，亦可減少通帶損耗。 請參閱圖3所示，在前述實施例中，該等麵合線L3、 u係配置在此多層架構的最上面的第一二基板5〇、51， 而電容矩陣10及共振電路30的電容Cci Cc2、Cpi Cp2、 c3、c4係集中設於第三至第九基板52〜58，故此實施例容 易調整電容值。 解 第 層 及 中 實 本創作一較佳實施例於另-多層基板上實施的結構分 圖如圖4所不，係由第一至第十二基板依順序由 至下疊合而成，第十至+ ， 主十一基板74〜76的結構與圖3的 =至十二基板59〜61相同，且輕合線L3、L4也配置在多 -構的最上面的第一 '二基板65、66，而電容矩陣1〇 共振電路30的電容CC1、ο ^ 机私 2、Cpi、CP2、C3、C4 也集 : 至第九基板67〜73，故此種在另-多層基板上 施的實施例也容易調整電容值；其中第十二基㈣為端 M418408 子基板，於四周邊形成有兩相對訊號端面761與兩相對接 地端面762,且不同層基板可用導通孔（v丨A)77連接，第十 基板74形成有大面積的接地金屬面74彳，第十一基板 的金屬面751係形成匹配電路20上的傳輸線…與匹配電 容C! ’而金屬面752係形成匹配電路2〇A上的傳輸線^ 與匹配電容C2;而第一、二基板65、66上的金屬面651 ' 661係形成共振電路3〇上的耦合線[a，第一二基板65、The Cr end is connected in series with one end of the transmission line ^, and the other ends of the two transmission lines... are respectively connected to the input end in and the output end 〇ut, and the other ends of the matching capacitors h and C2 are connected to the ground end; the resonant circuit 3G is connected with The capacitor matrix 1Q is connected. The resonant circuit 3 has two first ends and two second ends. The two ends are respectively connected to the second ends of the capacitor matrix 10, and the second ends are connected to the ground end. In the preferred embodiment, the resonant circuit 30 includes two consumable lines L3, L4 and two capacitors C3, C4, wherein each of the facing wires L3, u has a first end and a second end, respectively The first ends of the wires L3 and U are respectively the first ends of the resonant circuit 30, and the second ends of the two coupling lines ", u are respectively the two ends of the resonant circuit 3G, and the light-emitting wires L3, The u system is mutually ordered, and the electric junction 〇3 is connected in parallel with the coupling line ι_3, and the capacitor and the coupling line are connected in parallel to the c3. The first end of the line l3 is connected, and the capacitor C4 is connected to the first end of the consumable line ^, The other ends of the capacitors c3 and c4 are connected to the ground. FIG. 2 is a power attenuation M4 in the frequency domain according to the first preferred embodiment of the present invention. 18408 graph, the dotted line S21 is the incident loss (|nserti〇nl〇ss) power curve at the output, and the solid line S11 is the return loss (Return L〇ss) power curve; because this miniature multilayer bandpass filter has this capacitance In the matrix 10, the capacitor matrix 10 is formed with multiple paths, so that the present invention has two zero points on the low frequency side of the band rejection band, and the zero point on the high frequency side is caused by C1, L1 and C2, L2. In the embodiment, the two zero positions on the low frequency side are respectively located in the frequency band 1.18 GHz & 1_74 GHz', and the zero point position on the high frequency side is located in the frequency band 7_〇 GHz, and the passband center frequency of the incident loss power S21 is 2.45 GHz. The power S21 is the lowest at about 2 45 GHz, and the capacitance matrix 1 〇 (4) third, fourth capacitance Cpi, Cp 』 capacitance can be adjusted to adjust the low-frequency side zero position, and the capacitance of the second capacitor CM can be adjusted to adjust the high frequency The position of the side zero point. The structure exploded view of the preferred embodiment of the present invention is shown in FIG. 3, which is formed by stacking the first to twelfth substrates 5〇~61 in order from top to bottom. The twelfth substrate 61 is the end The substrate has two opposite signal end faces 611 and two opposite ground end faces 612 formed on the periphery thereof, and different layer substrates may be connected by via holes (VIA) 62, and the tenth substrate 59 is formed with a large area grounded metal surface 591, tenth The metal surface 6〇1 of a substrate 6〇 forms the transmission line |_1 on the matching circuit 20 and the matching capacitor 〇1, and the metal surface 602 forms the transmission line _2 on the matching circuit 20A and the matching capacitor 〇2; The metal faces 501, 511 on the two substrates 50, 51 form a coupling line |_3 on the resonant circuit 30, and the metal faces 5?1, 512 on the first and second substrates 5?, 51 form a coupling on the resonant circuit 30. a line u; a metal surface 521 on the third substrate 52 forms a first capacitor Cc1 of the capacitor matrix 1〇; and metal faces 531, 571 on the fourth and eighth substrates 53, 57 form a 7th M418408 triple capacitor on the capacitor matrix 1〇 Cm, and the metal faces 532, 572 form a fourth capacitor Cp2 on the capacitor matrix 1Q; the metal faces 541, 561, 581 on the fifth, seventh, and ninth substrates 54, 56, 58 form a capacitor 〇3 of the resonant circuit 3? And the metal faces 542, 562, and 582 form the capacitance Q of the resonant circuit 3〇, the sixth Metal face plate 55 on the second capacitor 551 on the capacitor Cc2 1〇 matrix. When the present invention is implemented on a multi-layer substrate stacking structure, the effective stack 3 and the electric valley are easily realized in the circuit and the actual required capacitance area can be reduced by the coupling capacitance between the layers, thereby effectively utilizing the parasitic effect. , the layout can be made more flexible' and the capacitance is set to be set, which makes it easier to adjust the capacitance value. When the coupling lines l3, l4 of the resonant circuit 30 are implemented in the multi-layer substrate stacking structure, the coupling lines L3, |_4 are placed on the uppermost layer of the multi-layer substrate stacking structure to reduce interference and reduce the interference. With loss. Referring to FIG. 3, in the foregoing embodiment, the surface lines L3 and u are disposed on the uppermost first two substrates 5〇, 51 of the multi-layer structure, and the capacitance of the capacitor matrix 10 and the resonant circuit 30. Since Cci Cc2, Cpi Cp2, c3, and c4 are collectively provided on the third to ninth substrates 52 to 58, the embodiment easily adjusts the capacitance value. The structure of the first layer to the twelfth substrate is sequentially stacked from the first to the twelfth substrate, as shown in FIG. Ten to +, the structure of the main eleven substrates 74 to 76 is the same as that of the sub-frames 59 to 61 of FIG. 3, and the light-conducting lines L3 and L4 are also disposed on the uppermost first 'two-substrate 65 of the multi-frame. 66, and the capacitances CC1, ο ^ 2, Cpi, CP2, C3, C4 of the capacitance matrix 1〇 resonance circuit 30 are also collected: to the ninth substrates 67 to 73, so the implementation on the other-multilayer substrate The example is also easy to adjust the capacitance value; wherein the twelfth base (four) is the terminal M418408 sub-substrate, two opposite signal end faces 761 and two opposite ground end faces 762 are formed on the periphery of the four, and the different layer substrates can be connected by the via holes (v丨A) 77 The tenth substrate 74 is formed with a large-area grounded metal surface 74A, and the metal surface 751 of the eleventh substrate forms a transmission line on the matching circuit 20... and the matching capacitor C!' and the metal surface 752 forms a matching circuit 2A The upper transmission line ^ and the matching capacitor C2; and the metal surface 651 ' 661 on the first and second substrates 65, 66 are shaped a coupling line on the resonant circuit 3〇[a, the first two substrates 65,
66上的金屬面651、662係形成共振電路3〇上的耦合線 u;第三、七、九基板67、71、73上的金屬面671、711、 731係形成共振電路3〇的電容C3，而金屬面672、7彳2、 732係形成共振電路3〇的電容C4 ;第四基板68上的金屬 面681形成電容矩陣1〇的第一電容Cci;第五八基板69、 72上的金屬面691、721形成電容矩陣1〇上的第三電容 Cm，而金屬面692、722形成電容矩陣1〇上的第四電容The metal faces 651 and 662 on the 66 form a coupling line u on the resonant circuit 3〇; the metal faces 671, 711, and 731 on the third, seventh, and ninth substrates 67, 71, and 73 form a capacitor C3 of the resonant circuit 3〇. The metal faces 672, 7彳2, 732 form a capacitor C4 of the resonant circuit 3〇; the metal face 681 on the fourth substrate 68 forms a first capacitor Cci of the capacitance matrix 1〇; and the fifth and eighth substrates 69, 72 The metal faces 691, 721 form a third capacitor Cm on the capacitor matrix 1〇, and the metal faces 692, 722 form a fourth capacitor on the capacitor matrix 1〇
Cm;第六基板70上的金屬面701形成電容矩陣1〇上的第 一'電容Cu。 本創作的第二較佳實施例如圖5所示，本創作的第二 較佳實施例與第一較佳實施例大致相同，不同之處在於第 二實施例中，該共振電路3〇的兩個耦合線！_3、“係為多段 設計，兩個耦合線La、U係分為複數區段，故在設計上可 更有彈性地實現電路佈@，此第二較佳實施例在多層基板 上實現時，合線L3、U可分為複數區段設於複數基 板上’使電容矩陣10中第三、第四電纟Cpi、Cp2的部分 電容值可由構成耦合線L3、u的該等基板間的耦合電容代 替，以有效減少S三、第四電容Cpi、Cp2占據的基板面積。 9 M418408 本創作的第三較佳實施例如圖6所示’本創作的第三 較佳實施例與第二較佳實施例大致相同，不同之處在於第 三實施例中，該共振電路30兩個耦合線1-3、U採用多段設 計，故形成複數區段，耦合線L3、L4 一個以上的區段可使 用微小對地電容C5、C6替代，用以形成等效耦合線區段， 而耦合線l3、l4未被替代的區段與對地電容c5、c6合起來 的功效係等於第二較佳實施例的耦合線L3、U，其中該對 地電容C5、C6的數量級可為1〇-12F ;因為耦合線L3、U 一個以上的區段係用對地電容c5、C6替代，使耦合線L3、 U的長度可以縮短，故可減少整體電路面積，以利於微型 化的設計。 以上所述僅為本創作之較佳實施例，並非對本創作作 任何形式上之限制，雖然本創作已以較佳實施例揭露如 上’然而並非用以限定本創作’任何熟悉本專業的技術人 員，在不脫離本創作技術方案的範圍内，當可利用上述揭 不的技術内容作出些許更動或修飾為等同變化的等效實施 例，但凡是未脫離本創作技術方案的内容，依據本創作的 技術實質對以上實施例所作的任何簡單修改、等同變化與 修飾，均仍屬於本創作技術方案的範圍内。 【圖式簡單說明】 圖1係本創作第一較佳實施例之電路示意圖。 圖2係本創作第一較佳實施例於頻域下的功率衰減曲Cm; the metal face 701 on the sixth substrate 70 forms the first 'capacitance Cu' on the capacitance matrix 1〇. A second preferred embodiment of the present invention is shown in FIG. 5. The second preferred embodiment of the present invention is substantially the same as the first preferred embodiment except that in the second embodiment, the two resonant circuits are Coupling lines! _3, "It is a multi-segment design, and the two coupling lines La and U are divided into a plurality of sections, so that the circuit cloth can be realized more flexibly in design. When the second preferred embodiment is implemented on a multi-layer substrate, The line L3, U can be divided into a plurality of sections provided on a plurality of substrates. 'The partial capacitance values of the third and fourth electrodes Cpi and Cp2 in the capacitor matrix 10 can be coupled by the substrates constituting the coupling lines L3, u. The capacitor is replaced to effectively reduce the substrate area occupied by the S3 and the fourth capacitors Cpi and Cp2. 9 M418408 A third preferred embodiment of the present invention is shown in FIG. 6 as a third preferred embodiment and a second preferred embodiment of the present invention. The embodiment is substantially the same, except that in the third embodiment, the two coupling lines 1-3, U of the resonant circuit 30 are designed in multiple stages, so that a plurality of sections are formed, and more than one section of the coupling lines L3, L4 can be used. The small-to-ground capacitances C5 and C6 are used instead to form an equivalent coupling line section, and the functions of the unconnected sections of the coupling lines l3 and 14 and the ground capacitances c5 and c6 are equal to the second preferred embodiment. Coupling lines L3, U, wherein the pair of ground capacitances C5, C6 can be of the order of magnitude It is 1〇-12F; because one or more sections of the coupling line L3, U are replaced by the capacitances c5 and C6 to the ground, the length of the coupling lines L3, U can be shortened, so that the overall circuit area can be reduced to facilitate miniaturization. The above description is only a preferred embodiment of the present invention, and is not intended to limit the present invention in any way, although the present invention has been disclosed in the preferred embodiments as above, but is not intended to limit the present invention. A person skilled in the art can make some modifications or modifications to equivalent embodiments by using the above-mentioned technical content without departing from the technical scope of the present invention. Any simple modification, equivalent change, and modification of the above embodiments are still within the scope of the present technical solution. [Simplified Schematic] FIG. 1 is a circuit diagram of the first preferred embodiment of the present invention. Figure 2 is a power attenuation curve of the first preferred embodiment of the present invention in the frequency domain.
構分解圖。 一較佳實施例於多層基板上實施的結 M418408 圖4係本創作第一 一結構分解圖。 較佳實施例於多層基板上 實施的另 ®係本創作第二較佳實施例之電路示意圖。 圖6係本創作第三較佳實施例之電路示意圖。 圖7係原始二階帶通遽波器之電路示意圖。 圖8係原始二階帶通壚波器於頻域下的頻率響應特性 曲線圖。Construct an exploded view. A preferred embodiment is implemented on a multilayer substrate. M418408 Figure 4 is a first structural exploded view of the present invention. A preferred embodiment of the present invention is a schematic circuit diagram of a second preferred embodiment of the present invention. Figure 6 is a circuit diagram showing a third preferred embodiment of the present invention. Figure 7 is a schematic diagram of the circuit of the original second-order bandpass chopper. Figure 8 is a plot of the frequency response characteristics of the original second-order bandpass chopper in the frequency domain.
圖9係既有二階帶通濾波器之電路示意圖。 圖1 〇係既有二階帶通濾波器於頻域下的頻率響應特性 曲線圖。 【主要元件符號說明】 1 0電容矩陣 20、20A匹配電路 30共振電路 50~61第一基板〜第十二基板 591接地金屬面 501、511、512、521、531、532、541、542、551、 561、562、571、572、581、582、601、602 金屬面 611訊號端面 612接地端面 62導通孔 65~76第一基板〜第十二基板 741接地金屬面 651 ' 661 ' 662、671、672、681、691、692、701、 711、712、721、722、731、732、751、752 金屬面 11 M418408 761 訊號端面 762接地端面 77導通孔 81共振電路 91 雙埠網路 92第一埠 93第二埠Figure 9 is a schematic diagram of a circuit having both a second-order bandpass filter. Figure 1 shows the frequency response characteristics of the second-order bandpass filter in the frequency domain. [Description of main component symbols] 10 capacitor matrix 20, 20A matching circuit 30 resonant circuit 50-61 first substrate to twelfth substrate 591 ground metal faces 501, 511, 512, 521, 531, 532, 541, 542, 551 561, 562, 571, 572, 581, 582, 601, 602 metal surface 611 signal end surface 612 ground end surface 62 via hole 65~76 first substrate to twelfth substrate 741 ground metal surface 651 '661 ' 662, 671, 672, 681, 691, 692, 701, 711, 712, 721, 722, 731, 732, 751, 752 metal surface 11 M418408 761 signal end face 762 ground end face 77 through hole 81 resonant circuit 91 double 埠 network 92 first 埠93 second