M399441 五、新型說明： 【新型所屬之技術領域】 本創作係關於一種蕭特基二極體，尤指—種可減少逆 向漏電流之高度防止逆向漏電流之蕭特基二極體。 【先前技術】 簡單的蕭特基二極體由半導體基板（通常為N型）及位 於基板上之金屬層所組成，半導體基板中的自由電子能階 較金屬層中的自由電子能階低，在沒有偏壓的情況下，半 導體基板中的電子無法躍遷至高能階的金屬層中，形成蕭 特基障礙，當施加順向偏壓時，半導體基板中的自由電子 獲得能量而可躍遷到高能階的金屬層中，產生電流，而因 為金屬層中沒有少數的載子，所以無電荷儲存，逆向回復 的時間短’ EU匕’蕭特基二極體適用於高頻整流應用，蕭 特基障礙越小順向電壓值就可越小，然而，在蕭特基障礙 不夠大的情形下施加逆向電& ’蕭特基二極體之逆向漏電 流高，此為蕭特基二極體的最大缺點。 如圖4所示者’為了改善此缺點，在習用技術中，先 在半導體基板7上沈積一層低摻雜的半導體層8,再以蝕刻 產士溝槽80 ’並在溝槽8〇的内壁沈積氧化物層9，最後再 覆蓋金屬;t 10 ’在這種結構下，施加逆向電壓時，負電荷 可累積在氧化物層9,產生表面電場屏蔽作用，限制電流導 通’雖然有較之前無氧化物時降低漏電流，但為了更有效 的達到電場屏蔽的效果，必須增加溝槽8〇的深度，同時為 3 M399441 了在正向導通時，電流導通的有效面積增加’必須將溝槽 80寬度窄化’如此「深寬比」大的溝槽8〇在製程上有一定 的難度，因此無法同時兼顧屏蔽電場及高導通電流的優點。 【新型内容】 本創作之目的在於提供一高度防止逆向漏電流之蕭特 基一極體期望藉由此設計改善蕭特基二極體逆向漏電流過 .大的問題，且提供足夠的電流導通有效面積，進而使蕭特基 0 二極體可應用在更多的領域。 為達成前述目的，本創作提供了一種高度防止逆向漏電 流之蕭特基二極體係包含有： 一基板； 一限流層，係以間隔方式形成在該基板表面，相鄰限 流層之間形成間隙； 一磊晶半導體層，係填滿各限流層之間的間隙並延伸 t蓋部分限流層，該磊晶半導體層以間隔方式形成複數溝M399441 V. New Description: [New Technology Field] This creation is about a Schottky diode, especially a Schottky diode that reduces the reverse leakage current and prevents reverse leakage current. [Prior Art] A simple Schottky diode consists of a semiconductor substrate (usually an N-type) and a metal layer on the substrate. The free electron energy level in the semiconductor substrate is lower than the free electron energy level in the metal layer. In the absence of a bias voltage, electrons in the semiconductor substrate cannot transition into the high-energy metal layer, forming a Schottky barrier. When a forward bias is applied, the free electrons in the semiconductor substrate gain energy and can transition to high energy. In the metal layer of the order, current is generated, and because there are not a few carriers in the metal layer, there is no charge storage, and the reverse recovery time is short. 'EU匕' Schottky diode is suitable for high frequency rectification applications, Schottky The smaller the obstacle, the smaller the forward voltage value can be. However, the reverse power is applied in the case where the Schottky barrier is not large enough. The reverse leakage current of the Schottky diode is high. This is the Schottky diode. The biggest drawback. As shown in FIG. 4, in order to improve this disadvantage, in the conventional technique, a low-doped semiconductor layer 8 is first deposited on the semiconductor substrate 7, and then the stems 80' are etched and the inner walls of the trenches 8' Depositing the oxide layer 9, and finally covering the metal; t 10 'In this structure, when a reverse voltage is applied, a negative charge can accumulate in the oxide layer 9, generating a surface electric field shielding effect, limiting current conduction' although there is no previous When the oxide is used, the leakage current is reduced, but in order to achieve the effect of the electric field shielding more effectively, it is necessary to increase the depth of the trench 8 ,, and at the same time, for the 3 M399441, when the forward conduction is performed, the effective area of the current conduction increases. The narrow width of the groove 8 which is so large in the aspect ratio has a certain difficulty in the process, so that the advantages of the shield electric field and the high on current cannot be simultaneously considered. [New content] The purpose of this creation is to provide a high degree of anti-reverse leakage current. The Schottky diode is expected to improve the reverse leakage current of the Schottky diode and provide sufficient current conduction. The effective area, in turn, allows the Schottky 0 diode to be used in more fields. To achieve the foregoing objectives, the present invention provides a Schottky diode system that is highly resistant to reverse leakage currents comprising: a substrate; a current limiting layer formed on the surface of the substrate in a spaced relationship between adjacent current limiting layers Forming a gap; an epitaxial semiconductor layer fills a gap between the current limiting layers and extends a portion of the current limiting layer, and the epitaxial semiconductor layer forms a plurality of trenches in a spaced manner
;槽，各溝槽向下延伸至未被磊晶半導體層覆蓋之限流層頂 ' 部； S 複數佈植區，係形成於該磊晶半導體層中，且與該磊 晶半導體層具有相異導電性質而產生pN接面，各佈植區係 分佈在該限流層之間隙位置； 一介電層’係覆蓋於該磊晶半導體層的表面； 一金屬層，係延伸覆蓋於該介電層表面且填充於該些溝 槽内部’位於溝槽内部之該金層層與磊晶半導體層之側壁係 形成蕭特基接觸。 土 4 M399441 其中，磊晶半導體層可為N型半導體層，該些佈植區 可為P型摻雜。 其中’該限流層可為氧化物層或p型半導體層。 其中，該介電層可為氧化層。 藉由上述結構，因為介電層為介電材質，當施與逆向偏 反時，電荷會累積在介電層中，因此磊晶半導體層鄰近介電 層處形成一靜電場，在此靜電場作用下發生電場屏蔽效應， 而降低逆向漏電流，且磊晶半導體層中因相異導電性的佈 植區所形成的pN接面，其空乏區可減少漏電面積，降低逆 向漏電流，藉由此兩種效應創作出高度防止逆向漏電流之蕭 寺基極體，並利用調整磊晶半導體層的厚度來增加電流導 通時的有效面積。 【實施方式】a trench, each trench extending downward to a top portion of the current limiting layer not covered by the epitaxial semiconductor layer; and a plurality of implant regions formed in the epitaxial semiconductor layer and having a phase with the epitaxial semiconductor layer a pN junction is formed by a heteroconductive property, and each of the implanted regions is distributed at a gap position of the current limiting layer; a dielectric layer is overlying the surface of the epitaxial semiconductor layer; and a metal layer is extended over the dielectric layer The surface of the electrical layer is filled in the interior of the trenches. The gold layer located inside the trench forms a Schottky contact with the sidewalls of the epitaxial semiconductor layer. Soil 4 M399441 wherein the epitaxial semiconductor layer can be an N-type semiconductor layer, and the implant regions can be P-type doped. Wherein the current limiting layer can be an oxide layer or a p-type semiconductor layer. Wherein, the dielectric layer can be an oxide layer. With the above structure, since the dielectric layer is a dielectric material, when a reverse bias is applied, charges are accumulated in the dielectric layer, so that the epitaxial semiconductor layer forms an electrostatic field adjacent to the dielectric layer, where the electrostatic field The electric field shielding effect occurs under the action, and the reverse leakage current is reduced, and the pN junction formed by the different conductivity implantation regions in the epitaxial semiconductor layer can reduce the leakage area and reduce the reverse leakage current by the pN junction. These two effects create a base body that is highly resistant to reverse leakage current, and adjusts the thickness of the epitaxial semiconductor layer to increase the effective area when the current is turned on. [Embodiment]
如圖1所TF，係本創作之高度防止逆向》爲電流之蕭特基 二極體數種較佳實施例，此高度防止逆向漏電流之蕭特基二 極體係包3 -板1、—限流層2、一蟲晶半導體層3、複數 佈植區31、一介電層4及_金屬層5。 “土板1可A N型半導體材料，例如石夕、緒，並推雜 有五價離子，例如石申、战， 、 J如甲&，因此在N型半導體基板]中形 成多餘的自由電子。 該限流層2以間隔方式形成在該基板1表面，故在相 鄰的限流層2之間形成有間隙2〇,該限流層2可為氧化物 層或广型半導體層，以限制電子流可流動的路徑。 V…曰半V體層3係以與該基板，相同導電性之材料 5 M399441 構成，本實施例中為一 N型磊晶半導體層3，係填滿於該限 流層2之間的間隙20，並覆蓋於部分限流層2表面，該為 晶半導體層3形成複數個溝槽30,各溝槽30向下延伸至限 流層2頂部’並可藉由調整該磊晶半導體層3的厚度來増 加電流導通時的有效面積，該磊晶半導體層3為半導體材 料’例如矽、鍺。並在磊晶半導體層3中對應限流層2間 的間隙20位置上形成有相異導電性的佈植區31，例如本實 . 施例中之佈植區31係摻雜有三價離子，例如硼、鋁、嫁， • 形成P型佈植區31 ’其餘磊晶半導體層3中的位置摻雜有 五價離子，例如砷、磷，形成N型磊晶半導體層3，且其摻 雜物的濃度小於該基板1中摻雜物的濃度，該p型佈植區 31與N型磊晶半導體層3之間形成pn接面，並有空乏區 32 ； 該介電層4覆蓋於該磊晶半導體層3的表面。 該金屬層5係延伸覆蓋介電層4表面且填充於該些溝槽 30内，位於溝槽3〇内部之該金屬層5與磊晶半導體層3 = 壁之間形成蕭特基接觸。 本創作之高度防止逆向漏電流之蕭特基二極體，在無偏 壓的情況下，基板1及磊晶半導體層3中的載子無法躍 至自由電子能階較高的金屬層5中；在本創作一較佳實施 例’基板1與磊晶半導體層3均# N型半導體，該些佈植 區為P型摻雜，如圖2所示者，當施加順向偏壓時，N型 1中的自由電子獲得能量而可躍遷到高能階的 、’ 乂 5 +，產生電流，電子流由N型半導體基板】通過 限“"2間的間隙2〇，進入磊晶半導體層3，再克服金屬 6 M399441 層5與蟲晶半導體層3側壁之間的蕭特基障礙而導通。 如圖3所示者’當施加逆向偏壓時，自金屬層5中的游 離的電荷會累積在介電層4上，因此在接近介電層4的蟲 晶半導體層3中形成一靜電場6’產生屏蔽作用，排斥金屬 層5中的游離自由電子’此外’磊晶半導體層3與摻雜有p 型摻雜物之佈植區31間形成PN接面，並產生空之區32， 減少漏電面積’利用介電層4及空乏區32減少逆向透電流 的產生。 综合上述說明可得知，本創作藉由介電層4的設計使電 荷可以累積在其上，以形成一靜電場6產生屏蔽作用排斥 自由電子，以及磊晶半導體層3中因相異導電性的佈植區 所產生的PN接面，產生空乏區32減少漏電面積，進而減 J逆向漏電流，使得蕭特基二極體之漏電缺點獲得改善， 並使蕭特基二極體能做更廣泛的應用。 【圖式簡單說明】 圖1係本創作高度防止逆向漏電流之蕭特基二極體第 一較佳實施例之剖面示意圖。 圖2係本創作高度防止逆向漏電流之蕭特基二極體第 二較佳實施例順向電壓下之操作示意圖。 圖3係本創作高度防止逆向漏電流之蕭特基二極體第 二較佳實施例逆向電壓下之操作示意圖。 圖4係省用蕭特基二極體之剖面示意圖。 7 M399441 【主要元件符號說明】 1基板 2限流層 20間隙 3磊晶半導體層 30溝槽 31佈植區 32 空乏區 4介電層 5金屬層 6靜電場 7半導體基板 8半導體層 80溝槽 10金屬層 9氧化物層As shown in Fig. 1, the TF is a preferred embodiment of the high-definition diode of the present invention. The height is prevented by the reverse leakage current of the Schottky diode system 3-plate 1, The current limiting layer 2, a silicon crystal semiconductor layer 3, a plurality of implant regions 31, a dielectric layer 4, and a metal layer 5. "Soil board 1 can be AN-type semiconductor materials, such as Shi Xi, Xu, and pentads, such as Shishen, War, J, such as A &, thus forming excess free electrons in N-type semiconductor substrates] The current limiting layer 2 is formed on the surface of the substrate 1 in a spaced manner, so that a gap 2 形成 is formed between the adjacent current limiting layers 2, and the current limiting layer 2 may be an oxide layer or a wide semiconductor layer. a path for restricting the flow of electrons. The V...曰V body layer 3 is composed of a material 5 M399441 having the same conductivity as the substrate, and in this embodiment, an N-type epitaxial semiconductor layer 3 is filled in the limit. a gap 20 between the flow layers 2 and covering a portion of the surface of the current limiting layer 2, the crystalline semiconductor layer 3 forming a plurality of trenches 30, each trench 30 extending downward to the top of the current limiting layer 2 and The thickness of the epitaxial semiconductor layer 3 is adjusted to increase the effective area when the current is conducted. The epitaxial semiconductor layer 3 is a semiconductor material such as germanium or germanium, and corresponds to a gap 20 between the current limiting layers 2 in the epitaxial semiconductor layer 3. A planting area 31 having different conductivity is formed at a position, for example, the present embodiment. The 31 series is doped with trivalent ions, such as boron, aluminum, and marry, • forms a P-type implanted region 31'. The remaining epitaxial semiconductor layer 3 is doped with pentavalent ions, such as arsenic and phosphorus, to form N-type epitaxial grains. The semiconductor layer 3, and the concentration of the dopant is smaller than the concentration of the dopant in the substrate 1, the p-type implant region 31 and the N-type epitaxial semiconductor layer 3 form a pn junction, and there is a depletion region 32; The dielectric layer 4 covers the surface of the epitaxial semiconductor layer 3. The metal layer 5 extends over the surface of the dielectric layer 4 and fills the trenches 30. The metal layer 5 located inside the trench 3〇 Epitaxial semiconductor layer 3 = Schottky contact is formed between the walls. The height of this creation is to prevent the reverse leakage current of the Schottky diode, in the case of no bias, the substrate 1 and the epitaxial semiconductor layer 3 The sub-layer cannot be leaped into the metal layer 5 having a higher free electron energy level; in the preferred embodiment of the present invention, the substrate 1 and the epitaxial semiconductor layer 3 are both N-type semiconductors, and the implant regions are P-doped. As shown in FIG. 2, when a forward bias is applied, the free electrons in the N-type 1 gain energy and can transition to a high-energy level. '乂5 +, generating current, electron flow from the N-type semiconductor substrate】passes the gap between the two spaces, enters the epitaxial semiconductor layer 3, and overcomes the metal 6 M399441 layer 5 and the sidewall of the insect crystal semiconductor layer 3 The Schottky barrier between the two is turned on. As shown in FIG. 3, when a reverse bias is applied, free charges from the metal layer 5 are accumulated on the dielectric layer 4, thereby forming an electrostatic field in the silicon germane semiconductor layer 3 close to the dielectric layer 4. 6' produces a shielding effect, and the free free electrons in the metal layer 5 are repelled to form a PN junction between the epitaxial semiconductor layer 3 and the implanted region 31 doped with the p-type dopant, and an empty region 32 is formed. Reducing the leakage area 'utilizes the dielectric layer 4 and the depletion region 32 to reduce the generation of reverse current. As can be seen from the above description, the present invention allows the charge layer to be accumulated thereon by the design of the dielectric layer 4 to form an electrostatic field 6 to generate a shielding effect to repel free electrons, and the different conductivity in the epitaxial semiconductor layer 3 The PN junction generated by the implanted area produces a depleted area 32 to reduce the leakage area, thereby reducing the J reverse leakage current, which makes the leakage defect of the Schottky diode improved, and enables the Schottky diode to be more widely used. Applications. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic cross-sectional view showing a first preferred embodiment of a Schottky diode which is highly resistant to reverse leakage current. Fig. 2 is a schematic view showing the operation of the second preferred embodiment of the Schottky diode of the present invention to prevent reverse leakage current. Fig. 3 is a schematic view showing the operation of the second preferred embodiment of the Schottky diode which is highly resistant to reverse leakage current under reverse voltage. Figure 4 is a schematic cross-sectional view of a Schottky diode. 7 M399441 [Main component symbol description] 1 substrate 2 current limiting layer 20 gap 3 epitaxial semiconductor layer 30 trench 31 implantation region 32 depletion region 4 dielectric layer 5 metal layer 6 electrostatic field 7 semiconductor substrate 8 semiconductor layer 80 trench 10 metal layer 9 oxide layer