TWM352844U - Apparatus for providing, supporting or detecting piggybacked positive acknowledgement or negative acknowledgement field indicator and polling indicator - Google Patents

Apparatus for providing, supporting or detecting piggybacked positive acknowledgement or negative acknowledgement field indicator and polling indicator Download PDF

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Publication number
TWM352844U
TWM352844U TW097207913U TW97207913U TWM352844U TW M352844 U TWM352844 U TW M352844U TW 097207913 U TW097207913 U TW 097207913U TW 97207913 U TW97207913 U TW 97207913U TW M352844 U TWM352844 U TW M352844U
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Taiwan
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data block
indicator
polling
header
block
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TW097207913U
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Chinese (zh)
Inventor
Prabhakar R Chitrapu
Behrouz Aghili
Marian Rudolf
Stephen G Dick
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Interdigital Tech Corp
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/12—Arrangements for detecting or preventing errors in the information received by using return channel
    • H04L1/16—Arrangements for detecting or preventing errors in the information received by using return channel in which the return channel carries supervisory signals, e.g. repetition request signals
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/12—Arrangements for detecting or preventing errors in the information received by using return channel
    • H04L1/16—Arrangements for detecting or preventing errors in the information received by using return channel in which the return channel carries supervisory signals, e.g. repetition request signals
    • H04L1/1607—Details of the supervisory signal
    • H04L1/1664—Details of the supervisory signal the supervisory signal being transmitted together with payload signals; piggybacking
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/12—Arrangements for detecting or preventing errors in the information received by using return channel
    • H04L1/16—Arrangements for detecting or preventing errors in the information received by using return channel in which the return channel carries supervisory signals, e.g. repetition request signals
    • H04L1/1607—Details of the supervisory signal
    • H04L1/1685—Details of the supervisory signal the supervisory signal being transmitted in response to a specific request, e.g. to a polling signal
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/12—Arrangements for detecting or preventing errors in the information received by using return channel
    • H04L1/16—Arrangements for detecting or preventing errors in the information received by using return channel in which the return channel carries supervisory signals, e.g. repetition request signals
    • H04L1/18—Automatic repetition systems, e.g. Van Duuren systems
    • H04L1/1867—Arrangements specially adapted for the transmitter end
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/12—Arrangements for detecting or preventing errors in the information received by using return channel
    • H04L1/16—Arrangements for detecting or preventing errors in the information received by using return channel in which the return channel carries supervisory signals, e.g. repetition request signals
    • H04L1/18—Automatic repetition systems, e.g. Van Duuren systems
    • H04L1/1867—Arrangements specially adapted for the transmitter end
    • H04L1/1896—ARQ related signaling

Abstract

An apparatus of providing a piggybacked positive acknowledgement/negative acknowledgement (ACK/NACK) (PAN) field indicator (PANI) and a polling indicator are disclosed. A combined field of a PANI bit, a relative reserved block period (RRBP) bit and an EGPRS supplementary polling (ES/P) field may indicate a polling scheme and a presence of a PAN field. Alternatively, the presence of the PAN field in the data block may be indicated by using a specific training sequence. Alternatively, a forward error correction (FEC) coding may be performed on the data block including the header, and the presence of the PAN field may be indicated by scrambling the encoded bits corresponding the header with a specific scrambling sequence. Alternatively, a header check sequence (HCS) may be generated and the presence of the PAN field is indicated by mixing a predetermined sequence with the HCS.

Description

M352844 97. ；i〇; 3 xM352844 97. ;i〇; 3 x

八、新型說明： 【新型所屬之技術領域】 本申請與無線通信有關。 【先前技術】 在GSM/EDGE無線電存取網路（GERAN)中，降低 等待時間是考慮因素之一。已建議兩種用於降低等待時間 的技術：降低的傳輸時間間隔（RTTI)和快速確認或否定 φ 確認（ACK 或 NACK)報告（FANR)。 在目前GERAN協定下，網路可通過輪詢從行動站獲 取回饋資料（即下行鏈路資料封包的ACK或NACK)。經 由演進型通用封包無線電服務（EGPRS)補充輪詢（ES/P) 爛位來指示輪沟。兩（2)個ES/P位元指示相對預留塊週 期（RRBP)攔位是否有效以及下一個上行鏈路控制塊應包 含什麼攔位。Eight, new description: [New technology field] This application is related to wireless communications. [Prior Art] In the GSM/EDGE Radio Access Network (GERAN), reducing latency is one of the considerations. Two techniques for reducing latency have been suggested: reduced transmission time interval (RTTI) and fast acknowledgment or negative φ acknowledgment (ACK or NACK) report (FANR). Under the current GERAN agreement, the network can obtain feedback data (ie, ACK or NACK of the downlink data packet) from the mobile station by polling. The wheel gutter is indicated by the Evolved General Packet Radio Service (EGPRS) Supplemental Polling (ES/P) rotten bit. Two (2) ES/P bits indicate whether the Relative Reserved Block Period (RRBP) block is valid and what the next uplink control block should contain.

第1-3圖分別顯示出了傳統EGPRS下行鏈路無線電鏈 路控制/媒體存取控制（RLC/MAC)標頭類型1、2和h ES/P棚位和RRBp欄位兩者均出現在所有三個 了傳統的2位元ES/P 位元Figures 1-3 show the traditional EGPRS downlink radio link control/media access control (RLC/MAC) header types 1, 2 and h ES/P booths and RRBp fields, respectively. All three traditional 2-bit ES/P bits

ES/P (無輪詢)__ RRBP欄位有效—擴展Ack或Nack點陣圖 FPB 、 -夾帶的Ack或Nack點陣圖類型 6 0 M352844ES/P (no polling) __ RRBP field valid - extended Ack or Nack bitmap FPB, - entrained Ack or Nack bitmap type 6 0 M352844

FPB 11 RRBP欄位有效—擴展Ack或Nack點陣圖類型 NPB，包括測量報告 表1 通常地，在顯式訊息中發送ACK或NACK報告，該 顯式訊息也被稱為RLC/MAC控制塊。ACK或NACK報告 被編址到被稱為臨時塊流（TBF)的特定無線電資源。TBF 鲁 是行動站與網路之間的臨時連接，用以支援單向資料傳 輸。TBF是臨時的且僅被保持在資料傳輸的持續時間内。 已建議某些TBF的ACK或NACK回饋“被夾帶”在可 被編址到另一 TBF上的RLC/MAC資料塊上。攜帶該ACK 或NACK回饋的欄位被稱為“夾帶的ACK或NACK(PAN) 欄位”。由PAN指示符（PAM)指示RLC/MAC資料塊中 PAN欄位的在與不在。 為了發送PANI，如第1-3圖所示，可在下行鏈路資料 封包標頭中包含額外位元。但是，目前在下行鏈路資料封 包標頭中沒有可用空間。已建議對常規2位元_Ρ攔位 進行劃分，由此一個位元被用於RRBP攔位，而其他欄位 被用於PANI。表2和3顯示出了 1位元RRBP欄位和1位 元PANI欄位的含義。 表2 位 元 具有TDMA訊框號的全速PDCH上行鏈 路塊 0 -1 (N+8 或 N+9)模 2715648 7 M352844 表3 位元 PANI 0 -*·*-〜--- 不包含PAN欄位 1 ----- 包含PAN欄位FPB 11 RRBP field valid—Extended Ack or Nack bitmap type NPB, including measurement report Table 1 Generally, an ACK or NACK report is sent in an explicit message, which is also called an RLC/MAC control block. The ACK or NACK report is addressed to a specific radio resource called a Temporary Block Flow (TBF). TBF Lu is a temporary connection between the mobile station and the network to support one-way data transmission. The TBF is temporary and is only kept for the duration of the data transmission. It has been suggested that ACK or NACK feedback for certain TBFs is "entrained" on RLC/MAC data blocks that can be addressed to another TBF. The field carrying this ACK or NACK feedback is referred to as the "Entrained ACK or NACK (PAN) field." The presence and absence of the PAN field in the RLC/MAC data block is indicated by the PAN indicator (PAM). In order to transmit the PANI, as shown in Figures 1-3, additional bits may be included in the downlink data packet header. However, there is currently no space available in the downlink data packet header. It has been proposed to divide the regular 2-bit_Ρ block, whereby one bit is used for the RRBP block and the other fields are used for the PANI. Tables 2 and 3 show the meaning of the 1-bit RRBP field and the 1-bit PANI field. Table 2 Bits Full-speed PDCH uplink block with TDMA frame number 0 -1 (N+8 or N+9) modulo 2715648 7 M352844 Table 3 Bit PANI 0 -*·*-~--- Does not contain PAN Field 1 ----- contains the PAN field

根據該建議’標頭大小保持相同。但是，在位元組合 中有冗餘。如果ES/P位元是“〇〇，，，（即沒有輪詢請求時）， 則_卩位元和PANI位元的組合包括三（3)個組合的耗 費。因此，期望提供-種用於PANI、RRBP和輪^示符 的更有效信令的方案。 【新型内容】According to the recommendation, the header size remains the same. However, there is redundancy in the bit combination. If the ES/P bit is "〇〇,,, (ie, when there is no polling request), then the combination of the _ 卩 bit and the PANI bit includes the cost of three (3) combinations. Therefore, it is desirable to provide - More efficient signaling scheme for PANI, RRBP and round indicator. [New content]

揭露了一種提供PANI和輪詢指示符的裝置。pANI位 凡、RRBP位元和ES/P攔位敝合麻可絲輪詢方案以 及PAN攔位的存在。或者，可採用特定訓練序列來指示資 料=中PAN樹竭存在。或者，謂包含翻的資料塊執 行别向糾錯（FEC)編碼，且可通過翻特定擾i序列來 加擾對應於標_編碼位元來指示pAN欄位的存在。或 可產生標賴查剌（HCS)且通過顧定相和 混合來指示PAN麻畴在。可_塊序舰2⑽犯） 來指示PAN欄位的存在。 【實施方式】 文引用的術語“無線發射/接收單元（WTRU)，，包括 但不揭限於用戶設備（UE)、行動站、固定或行動用戶單 叫4、蜂窩電話、個人數位助理（pDA)、電腦或是 、他任何能在無線環境中工作的用戶設備。下文引用的術 8 M352844 . 語“基地台包括但不限制於節點、站點控制器、存取 Γ 冑（AP)或是其他任何能在無線環境巾操作關邊設備。 • 根據第一具體實施方式，RLC/MAC標頭中的1位元 PANI獅、1位兀RRBP她以及2餘ES/p欄位被組 合在-起以用於指示輪詢方案和資料塊巾pAN攔位的存 在。PAM攔位、rrbp欄位和ES/p攔位的位元組合沒有 任何冗餘。在表4顯示出了 PANI、RRgp和ES/p位元組 φ 合實例以及它們的含義。 在表4中，從左讀第一個位元是pANI襴位，第二個 位元疋RRBP欄位，而第三和第四個位元是ES/p攔位。當 將第-個位元（即PANI欄位）設定為t<1，，時，它用於指 示PAN攔位被包含在資料塊中，而如果將第一個位元設定 為’它則用於指示PAN欄位不被包含在資料塊中。 應當注意的是，表4巾的位元組合作為實例而並不作為限 制提供，可使用任何其他組合，並且任何含義可與該位元 組合相關聯。A device for providing PANI and polling indicators is disclosed. The pANI bit, the RRBP bit, and the ES/P block match the existence of the Marcos polling scheme and the PAN block. Alternatively, a specific training sequence may be employed to indicate that the data = medium PAN tree is exhausted. Alternatively, the data block containing the flip is subjected to Error Correction (FEC) encoding, and the presence of the pAN field can be indicated by scrambling the corresponding scrambling sequence to reflect the presence of the pAN field. Or it can generate a standard (HCS) and indicate the PAN by means of phase and mixing. _ Block Ship 2 (10) commits to indicate the presence of the PAN field. [Embodiment] The term "wireless transmitting/receiving unit (WTRU), including but not limited to user equipment (UE), mobile station, fixed or mobile subscriber single call 4, cellular telephone, personal digital assistant (pDA) , computer or any user equipment that can work in a wireless environment. The following refers to the technique 8 M352844. "The base station includes but is not limited to nodes, site controllers, access devices (AP) or other Any device that can operate in a wireless environment towel. • According to the first embodiment, the 1-bit PANI lion, the 1 兀 RRBP her, and the 2 ES/p fields in the RLC/MAC header are combined to indicate the polling scheme and the data block towel. The existence of the pAN block. The bit combinations of PAM, rrbp, and ES/p are not redundant. Table 4 shows examples of PANI, RRgp, and ES/p byte combinations and their meanings. In Table 4, the first bit read from the left is the pANI clamp, the second bit is the RRBP field, and the third and fourth bits are the ES/p block. When the first bit (ie, the PANI field) is set to t<1, it is used to indicate that the PAN block is included in the data block, and if the first bit is set to 'it' Indicates that the PAN field is not included in the data block. It should be noted that the bit combinations of Table 4 are provided as examples and are not provided as limitations, any other combination may be used, and any meaning may be associated with the bit combination.

PANI+RRBP+ 含義 E5 5/P 0 0 0 0 無輪詢；無PAN 0 1 0 0 輪詢（FPB點陣圖；n+M);益PAN 1 0 0 0 輪詢（FPB點陣圖作為uL_pAN ; N+M); PAN ------- 1 1 0 0 無輪詢；PAN 0 0 0 1 輪詢（FPB點陣圖；n+8或N+9);無PAN M352844PANI+RRBP+ Meaning E5 5/P 0 0 0 0 No polling; no PAN 0 1 0 0 polling (FPB bitmap; n+M); benefit PAN 1 0 0 0 polling (FPB bitmap as uL_pAN ; N+M); PAN ------- 1 1 0 0 No polling; PAN 0 0 0 1 Polling (FPB bitmap; n+8 or N+9); no PAN M352844

輪詢（FPBj^_gj Ν+13);無 PANPolling (FPBj^_gj Ν+13); no PAN

輪詢（FPB$J^gj N+8 或 N+9) ; PAN ο ο ο ο ο ο ο 0 0 ΟPolling (FPB$J^gj N+8 or N+9); PAN ο ο ο ο ο ο ο 0 0 Ο

輪詢（FPB·雙陣n+13) ; PANPolling (FPB·double array n+13); PAN

輪詢（FPB點陣圖作為UL-PAN ; N+8或 N+9);無 PANPolling (FPB bitmap as UL-PAN; N+8 or N+9); no PAN

輪詢（FPB點陣圖作為瓜-卩⑽：讲⑴； 無PANPolling (FPB dot map as melon - 卩 (10): speak (1); no PAN

輪詢（FPB點陣圖作為; Ν+8或 N+9) ； PAN 輪詢（FPB點陣圖作為ul_pan ; ν+13 ); PANPolling (FPB bitmap as; Ν+8 or N+9); PAN polling (FPB bitmap as ul_pan; ν+13); PAN

輪詢（CQR-NPB點陣圖；Ν+8或Ν+9 ); 無 PAN___ 輪詢（CQR-NPB 點&圖;Ν+13 );無 PANPolling (CQR-NPB dot pattern; Ν+8 or Ν+9); no PAN___ polling (CQR-NPB point ↦Ν+13); no PAN

輪詢（CQR-NPB點陣圖；n+8或N+9); PAN 輪詢（CQR-NPB 點 ) ； pan 表4 例如，位元組合0100和1000可用於指定附加輪詢方 案’（例如’將傳統的RRBP位元從2減到1中所排除的那 些）或用於當沒有足夠空間來發送通道品質報告（CQR) 或下一個部分點陣圖（NPB)兩者時要求報告該CqR和 NPB。可合適地選擇參數Μ。 M352844 - 根據第二具體實施方式，可採用訓練序列來指示 * ' IC/MAC資料塊中PAN攔位的存在。在目前GERAN規 - 範中，八（8)個訓練序列中的一個用於胞元中WTRU與 網路之間的通信。根據該第二具體實方式，將八（8)個訓 練序列組定義為每組具有二（2)個訓練序列。一個訓練序 列在胞元中用於WTRU與網路之間的所有通信，且採用該 訓練序列組中的其他訓練序列來指示RLC/MAC資料塊中 φ PAN攔位的存在。 根據第三具體實施方式，採用加擾碼來指示 資料塊中PAN攔位的存在。第4圖是根據第三具體實施方 式的基地台400的方塊圖。基地台4⑻包括資料塊處理實 體402、編碼器404、擾亂器406和收發器408。資料塊處 理實體402 |生包含標頭的資料塊。該標頭包含ES/p攔位 和RRBP欄位。編碼器4〇4對包含標頭的資料塊執行败 編碼。如果資料塊不包含PAN樹立，則如習知技術中一樣 _ 由收發器傭來傳輸資料塊。如果#料塊包含則欄位， 則擾亂"：406採用擾乱序列來加擾對應於標頭的編石馬位 元，且經由收發器408來傳輸包含加擾位元的資料塊。 為了進行加擾，編敬元觀2相加至預先特定的加 擾序列。擾亂序列的長度與對應於標頭的編碼位元的長户 相同。擾亂序列是唯—的且對於基地台和WTRU是已^ 的。可以U錄方式產生祕碼，或者根據魏碼與全‘‘〇，， 序列之間的距離最大的標準來選擇擾亂碼。 第5圖疋根據第三種具體實施方式的Wtru篇的方 11 M352844 塊圖。WTRU500包括收發器5〇2、解碼器5〇4、解擾器5〇6 和控制器508。收發器502從基地台400接收資料塊位元 序列。如在習知技術中一樣，解碼器5〇4對接收到的位元 序列執行FEC解碼。如果資料塊不包含pAN欄位且因此 在基地台400對應於標頭的位元未被加擾，則解碼器5〇4 可成功解碼。但是，如果資料塊包含^^攔位且因此在基 地台400對應於標頭的位元被加擾，由於有太多位元誤 差，因此接收到的位元序列將被拒絕。如果接收到的位元 序列被拒絕，則由解擾器506對與標頭對應的接收到的位 70 (即，與擾亂序列模2相加）進行解擾。接著，由解碼 器504再次對具有位元序列的解擾後的標頭部分的接收到 的位元序列進行解碼。如果第二次FEC解碼成功，則控制 器508檢測到PAN欄位被包含在資料塊中。 根據第四種具體實施方式’採用修改後的HCS來指示 PAN攔位的存在。用於資料傳輸的無線電塊包含一個 RLC/MAC標頭、Hcs、一個或多個rlc資料塊以及塊檢 查序列（BCS)。資料塊可包含PAN欄位以及可選PAC檢 查序列（PCS )。HCS用於RLC/MAC標頭的誤差檢測。HCS 可以是8個位元長。Polling (CQR-NPB bitmap; n+8 or N+9); PAN polling (CQR-NPB point); pan Table 4 For example, bit combinations 0100 and 1000 can be used to specify an additional polling scheme' (eg 'Those that are excluded by subtracting the traditional RRBP bit from 2 to 1) or to report the CqR when there is not enough space to send both the channel quality report (CQR) or the next partial bitmap (NPB) And NPB. The parameter Μ can be selected as appropriate. M352844 - According to a second embodiment, a training sequence may be employed to indicate the presence of a PAN block in the *' IC/MAC data block. In the current GERAN specification, one of eight (8) training sequences is used for communication between the WTRU and the network in the cell. According to this second embodiment, eight (8) training sequence groups are defined as having two (2) training sequences per group. A training sequence is used in the cell for all communications between the WTRU and the network, and other training sequences in the training sequence set are used to indicate the presence of the φ PAN block in the RLC/MAC data block. According to a third embodiment, a scrambling code is employed to indicate the presence of a PAN block in the data block. Figure 4 is a block diagram of a base station 400 in accordance with a third embodiment. Base station 4 (8) includes a block processing entity 402, an encoder 404, a scrambler 406, and a transceiver 408. The data block processing entity 402 | generates a data block containing the header. This header contains the ES/p block and RRBP fields. The encoder 4〇4 performs de-encoding on the data block containing the header. If the data block does not contain a PAN establishment, then as in the prior art, the data block is transmitted by the transceiver. If the #block contains the field, then the scrambling ":406 scrambles the sequenced stone bit corresponding to the header and transmits the data block containing the scrambled bit via the transceiver 408. In order to perform scrambling, the edited meta-view 2 is added to a pre-specified scrambling sequence. The length of the scrambling sequence is the same as the length of the coded bit corresponding to the header. The scrambling sequence is unique and is available to the base station and the WTRU. The secret code can be generated by the U-recording method, or the scrambling code can be selected according to the standard that the Wei code and the full ‘〇, the distance between the sequences is the largest. Fig. 5 is a block diagram of the square 11 M352844 according to the Wtru section of the third embodiment. The WTRU 500 includes a transceiver 5〇2, a decoder 5〇4, a descrambler 5〇6, and a controller 508. Transceiver 502 receives a sequence of bit bytes from base station 400. As in the prior art, the decoder 5〇4 performs FEC decoding on the received bit sequence. If the data block does not contain a pAN field and thus the bit corresponding to the header at the base station 400 is not scrambled, the decoder 5〇4 can successfully decode. However, if the data block contains a block and therefore the bit corresponding to the header at the base station 400 is scrambled, the received bit sequence will be rejected due to too many bit errors. If the received bit sequence is rejected, the received bit 70 corresponding to the header (i.e., added to the scrambling sequence modulo 2) is descrambled by the descrambler 506. Next, the received bit sequence with the descrambled header portion of the bit sequence is decoded again by decoder 504. If the second FEC decoding is successful, the controller 508 detects that the PAN field is included in the data block. The modified HCS is employed in accordance with the fourth embodiment to indicate the presence of a PAN block. The radio block used for data transmission contains an RLC/MAC header, Hcs, one or more rlc data blocks, and a Block Check Sequence (BCS). The data block can contain a PAN field and an optional PAC Check Sequence (PCS). HCS is used for error detection of the RLC/MAC header. HCS can be 8 bits long.

第6圖是根據第四種具體實施方式的基地台600的方 塊圖。基地台600包括資料塊處理實體602、HCS編碼器 604、模2加法器606和收發器608。資料塊處理實體602 產生包含標頭的資料塊。該標頭包含ES/P攔位和RRBP欄 位。HCS編碼器604產生HCS。如果無線電塊不包含PAN 12 M352844 : 欄位，則如在習知技術中一樣，由收發器608來傳輸無線 電塊。如果該無線電塊包含ΡΑΝ欄位，則模2加法器6〇6 將預定序列加至HCS，且由收發器608來傳輸具有修改後 的HCS的無線電塊。例如，序列lllmil可用作預定序列。 在^1_種情況下，將HCS位元反向。 第7圖是根據第四種具體實施方式的WTRU 7⑻的方 塊圖。WTRU 7〇〇包括收發器702、HCS解碼器704、模2 • 加法器706和控制器7〇8。收發器702從基地台600接收 >料塊。HCS解碼器704以接收到的資料塊的標頭以及接 收到的HCS來執行HCS解碼。如果沒有錯誤地接收標頭， (即’ HCS檢查通過），則控制器708可假定在 資料塊中沒有PAN存在。如果HCS檢查失敗，則模2加 法器706將接收到的標頭與預定序列模2相加，且再次執 行HCS檢查。如果第二次HCS檢查通過，則控制器708 可假定標頭正確且PAN欄位被包含在RLC/MAC資料塊 # 中。 根據弟五種具體實施方式，可採用塊序列號（BSN) 來以信號告知PAN欄位的存在。目前，該標頭包含η位 元的BSN1和1〇位元的BSN2。一旦指定了 BSN1，則強 制BSN2在BSN1的確定附近内。由視窗大小（ws)來指 定該附近。通常地，10位元WS已足夠。根據第五種具體 實施方式，平分目前WS，由此只需要9個位元來以信號 告知BSN2。可採用標頭中未使用的第十個bSN2位元來指 示 PANI。 13 M352844 . 軸本__徵和元件錢麵實施科中以特定 $…進行m但每個特徵或元件可以在沒有該較佳 貝施例中的其他特徵和元件的情況下單獨使用，或在與或 不與本創作的其他特徵和元件結合的各種航下使用。本 創作提供的方法歧糊可叫由_ t腦歧理器執行 的電齡式、軟體妨體巾實施，其巾所述電腦程式、軟 體或勃體Τ^Χ有形的方式包含在電腦可讀贿媒體中的， ^ _f腦可讀儲存媒體的實例包括唯讀記憶體 (ROM)、 隨機存取記聽（編）、暫存H、_記、半導體 5己憶襄置、内部硬碟和可移動磁片之類的磁性媒體、磁光 媒體以及CD-R〇M碟片和數位多用途光碟（DVD)之類的 光學媒體。 时舉例來說，適當的處理器包括：通用處理器、專用處 理斋、常規處理器、數位信號處理1 (DSP)、多個微處理 器、與DSP核心相關聯的一或多個微處理器、控制器、微 Φ 控制器、專用積體電路(ASIC)、現場可編程閘陣列（FPGA) 電路、任何一種積體電路及/或狀態機。 與軟體相關的處理器可用於實現射頻收發器，以在無 線發射接收單元（WTRU)、用戶設備（UE)、終端、基地 台、無線電網路控制器（RNC)或是任何一種主機電腦中 Μ使°WTRU可以與制硬航/或倾形式實施的模 組結合使用，例如相機、攝像機模組、視訊電路、揚聲器 電活、振動設備、揚聲器、麥克風、電視收發器 '免持耳 機、鍵盤、藍牙®模組、調頻（FM)無線電單元、液晶顯 M352844Fig. 6 is a block diagram of a base station 600 according to a fourth embodiment. Base station 600 includes a data block processing entity 602, an HCS encoder 604, a modulo-2 adder 606, and a transceiver 608. The data block processing entity 602 generates a data block containing the header. This header contains the ES/P Block and RRBP fields. The HCS encoder 604 generates an HCS. If the radio block does not contain the PAN 12 M352844: field, the radio block is transmitted by the transceiver 608 as in the prior art. If the radio block contains a field, the modulo-2 adder 6〇6 adds a predetermined sequence to the HCS, and the transceiver 608 transmits the radio block with the modified HCS. For example, the sequence lllmil can be used as a predetermined sequence. In the case of ^1_, the HCS bit is inverted. Figure 7 is a block diagram of a WTRU 7 (8) in accordance with a fourth embodiment. The WTRU 7A includes a transceiver 702, an HCS decoder 704, a modulo 2, an adder 706, and a controller 〇8. Transceiver 702 receives >blocks from base station 600. The HCS decoder 704 performs HCS decoding with the header of the received data block and the received HCS. If the header is not received erroneously (i.e., the HCS check passes), the controller 708 can assume that no PAN is present in the data block. If the HCS check fails, the modulo-2 adder 706 adds the received header to the predetermined sequence modulo 2 and performs the HCS check again. If the second HCS check passes, the controller 708 can assume that the header is correct and the PAN field is included in the RLC/MAC data block #. According to the five specific implementations, the block serial number (BSN) can be used to signal the presence of the PAN field. Currently, this header contains BSN1 of n bits and BSN2 of 1 bit. Once BSN1 is specified, BSN2 is forced to be within the vicinity of the determination of BSN1. The neighborhood is specified by the window size (ws). Typically, a 10-bit WS is sufficient. According to a fifth embodiment, the current WS is equally divided, whereby only 9 bits are needed to signal BSN2. The tenth bSN2 bit not used in the header can be used to indicate PANI. 13 M352844. The axis __ sign and component face implementation section is performed with a specific $... but each feature or component can be used alone without the other features and components of the preferred embodiment, or Various underwater use with or without the other features and elements of this creation. The method provided by the present invention may be implemented by an electric age type or a soft body towel executed by a _ t brain processor, and the computer program, the software body or the body Τ Χ Χ tangible manner is included in the computer readable form. In the bribe media, examples of ^ _f brain-readable storage media include read-only memory (ROM), random access recording (edit), temporary storage H, _ note, semiconductor 5 memory, internal hard disk and Magnetic media such as removable magnetic disks, magneto-optical media, and optical media such as CD-R〇M discs and digital versatile discs (DVDs). For example, suitable processors include: general purpose processors, dedicated processing, conventional processors, digital signal processing 1 (DSP), multiple microprocessors, one or more microprocessors associated with the DSP core. , controller, micro Φ controller, dedicated integrated circuit (ASIC), field programmable gate array (FPGA) circuit, any integrated circuit and / or state machine. The software-related processor can be used to implement a radio frequency transceiver for use in a wireless transmit receive unit (WTRU), user equipment (UE), terminal, base station, radio network controller (RNC), or any host computer. Enables the WTRU to be used in conjunction with hard-wired or tilt-implemented modules, such as cameras, camera modules, video circuits, speaker live, vibration devices, speakers, microphones, TV transceivers, hands-free headsets, keyboards, Bluetooth® module, FM radio unit, LCD display M352844

示器（LCD)顯示單元、有機發光二極體（OLED)顯示單 元、數位音樂播放器、媒體播放器、視訊遊戲機模組、網 際網路瀏覽器及/或任何一種無線區域網路（WLAN)模組 或超寬頻（UWB)模組。 15 M352844 r-·— I. * — '· 97 ilO. 3 x i -：' ；： .-... ： 【圖式簡單說明】 — 從以下結合所附圖式並且作為實例給出的描述中可以 更洋細地瞭解本創作，其中： 第1-3圖分別顯示出了傳統的EGPRS下行鏈路 RLC/MAC標頭類型1、2、和3 ; 第4圖疋根據弟二具體貫施方式的基地台的方塊圖； 第5圖疋根據弟二具體貫施方式的wtru的方塊圖； ► 第6圖是根據第四具體實施方式的基地台的方塊圖； 以及 5 第7圖是根據第四具體實施方式的WTRU的方塊圖。 【主要元件符號說明】 RRBP 相對預留塊週期 ES/P 演進型通用封包無線電服務補充輪詢 400、600 基地台 500、700 無線發射接收單元 HCS 標頭檢查序列 606、706 模2加法器 BSN 塊序列號 402 資料塊處理實體 404 編碼器 406 擾亂器 408 收發器 16Display unit (LCD) display unit, organic light emitting diode (OLED) display unit, digital music player, media player, video game console module, internet browser and/or any wireless local area network (WLAN) Module or ultra-wideband (UWB) module. 15 M352844 r-·— I. * — '· 97 ilO. 3 xi -:' ;: .-... : [Simple description of the diagram] — from the following description in conjunction with the figures and as an example You can learn more about this creation in detail, where: Figures 1-3 show the traditional EGPRS downlink RLC/MAC header types 1, 2, and 3 respectively; Figure 4 shows the specific implementation method according to the second a block diagram of a base station; FIG. 5 is a block diagram of a wtru according to a second embodiment; ► FIG. 6 is a block diagram of a base station according to a fourth embodiment; and FIG. 7 is based on A block diagram of a WTRU of four embodiments. [Main component symbol description] RRBP Relative reserved block period ES/P Evolved Universal Packet Radio Service Supplementary polling 400, 600 Base station 500, 700 Wireless transmitting and receiving unit HCS Header check sequence 606, 706 Modular 2 adder BSN block Serial Number 402 Data Block Processing Entity 404 Encoder 406 Scrambler 408 Transceiver 16

Claims (1)

M352844 …f ·-、'· - -· .； t1 ’丨M352844 ...f ·-,'· - -· .; t1 ’丨 .申請專利範圍： 1. -種被配置用於提供-夾帶的肯定確認或衫確認欄 位指示符(PANI)和一輪詢指示符的裝置，該裝置包括： -資料塊處理實體，被配置為設定包含—夾帶的肯定確 認或否定確認攔位指示符位元、一相對預留塊週期 (RRBP)位元以及-演進型剌封包無線電服務補充輪 詢(ES/P)欄位的一組合欄位，以指示一輪詢方案以及一 資料塊中-夾帶的肯定確認或否定確認棚位的存在；以 及 一收發器，被配置為發送包含該組合攔位的該資料塊。 2. -種被配置驗支援—夾帶財定確認或找確認棚 位指示符和一輪詢指示符的裝置，該裝置包括： 一收發器，被配置用於接收一資料塊，該資料塊包含具 有一夾帶的肯定確認或否定確認攔位指示符位元、一相 • 留塊週期位元以及一演進型通用封包無線電服務 補充輪詢攔位的一組合欄位；以及 一控制器，被配置用以基於該組合攔位來確定一輪詢方 案以及該資料塊中的一夾帶的肯定確認或否定確認攔 位的存在。 3·種被配置用於提供一失帶的肯定確認或否定確認欄 位指示符和一輪詢指示符的裝置，該裝置包括： 一資料塊處理實體，被配置用於產生包含該輪詢指示符 的一資料塊；以及 一收發器，被配置用於將該資料塊連同一訓練序列一起 17 97.M352844 10. 3 年月 .·. ·.' '·! r η" ^ -in 發运’該訓練序顺翻以驗彳旨示該資料塊中的一夹 帶的肯定確認或否定確認攔位的存在。 4. 如申請專利範圍第3項所述的褒置，其特徵在於，該訓 練序列是在一胞元中使用的兩個訓練序列中的一個。 5. -種被配置用於檢測一夾帶的f定確認、或否定確認搁 位指不符和一輪詢指示符的裝置，該裝置包括： 一收發器，被配置用於接收一訓練序列以及包含該輪詢 # 指示符的一資料塊；以及 =控制器’被配置用於在該訓練序列是被預留以用於指 不該資料塊中的一夾帶的肯定確認或否定確認攔位的 存在的那一個訓練序列的情況下檢測該資料塊是否包 含一夹帶的肯定確認或否定確認攔位。 6. 如申請專利範圍第5項所述的裝置，其中該訓練序列是 在一胞元中使用的兩個訓練序列中的一個。 7. —種被配置用於提供一夾帶的肯定確認或否定確認攔 位指示符和一輪詢指示符的裝置，該裝置包括： 一資料塊處理實體，被配置用於產生包含一標頭的一資 料塊’該標頭包含該輪詢指示符； 一編碼器，被配置用於對包含該標頭的資料塊執行一前 向糾錯編竭； 一擾亂器，被配置用於在該資料塊包含一夾帶的肯定確 °心或否疋確認欄位的情況下以一擾亂序列來加擾對應 於該標頭的編碼位元；以及 一收發器，被配置用於發送包含該加擾後的位元的該資 18 ^352844 料塊。 … ，被配置用於檢測—夾帶的奴確認或否定確認攔 位指不符和-輪触示符置，該裝置包括： 二收發器，被配置用於接收一資料塊的編碼位元； 解螞器，被配置用於對該接收到的編碼位元執行一前 向糾錯(FEC)解碼； 解擾器，被配置用於在前向糾錯解碼失敗的情況下以 b擾亂碼來解擾該減到的編碼位元，該解擾後的位元 是由該解碼器解碼；以及 —控制器，被配置用於在對該解擾後的位元的前向糾錯 解碼成功的情況下檢測一夾帶的肯定確認、或否定確認 欄位是否被包含在該資料塊中。 9.種被配置用於提供一夾帶的肯定確認或否定確認攔 位指示符和-輪詢指示符的裝置，該裝置包括： 一=貝料塊處理實體，被配置用於產生包含一標頭的一資 料塊’該標頭包含該輪詢指示符； 一編碼器，被配置用於產生一標頭檢查序列(HCS); 模2加法器，被配置用於在一夾帶的肯定確認或否定 確認欄位被包含在該資料塊中的情況下將一預定序列 與該標頭檢查序列混合；以及 一收發器’被配置用於發送該資料塊。 10‘一種被配置用於檢測一夾帶的肯定確認或否定確認欄 位指示符和一輪詢指示符的裝置，該裝置包括： 收發器’被配置用於接收一資料塊； 19 M352844 97.Patent Application Range: 1. Apparatus configured to provide an entrained positive confirmation or shirt confirmation field indicator (PANI) and a polling indicator, the apparatus comprising: - a data block processing entity configured to Set a combo-encrypted positive or negative acknowledgement block indicator bit, a relative reserved block period (RRBP) bit, and a combo column of the Evolved Packet Radio Service Supplemental Polling (ES/P) field Bits to indicate a polling scheme and the presence of a positive acknowledgement or negative acknowledgement in a data block; and a transceiver configured to transmit the data block containing the combined barrier. 2. A device that is configured to perform a check-in-confirmation or to find a confirmation stash indicator and a polling indicator, the device comprising: a transceiver configured to receive a data block, the data block comprising An entrained positive acknowledgment or negative acknowledgment intercept indicator bit, a phase/retention block period bit, and a combined field of an evolved universal packet radio service supplemental polling block; and a controller configured A determination is made based on the combined block to determine a polling scheme and an affirmative or negative acknowledgement of an entrainment in the data block. 3. Apparatus for providing a lost positive or negative confirmation field indicator and a polling indicator, the apparatus comprising: a data block processing entity configured to generate the polling indicator a data block; and a transceiver configured to connect the data block together with the same training sequence. 17 97.M352844 10. 3 years..·.. '·! r η" ^ -in shipping' The training sequence is followed by a positive confirmation or a negative confirmation of the presence of an entrainment in the data block. 4. The device of claim 3, wherein the training sequence is one of two training sequences used in a cell. 5. A device configured to detect an entrained acknowledgement or a negative acknowledgement mismatch and a polling indicator, the apparatus comprising: a transceiver configured to receive a training sequence and to include the a data block of the poll # indicator; and = controller 'is configured to be used in the training sequence to be used to indicate the presence of a positive acknowledgement or a negative acknowledgement block in the data block In the case of that training sequence, it is detected whether the data block contains an entrained positive or negative acknowledgement block. 6. The device of claim 5, wherein the training sequence is one of two training sequences used in a cell. 7. Apparatus for providing an entrained positive or negative acknowledgement intercept indicator and a polling indicator, the apparatus comprising: a data block processing entity configured to generate a header comprising a header a data block 'the header includes the polling indicator; an encoder configured to perform a forward error correction compilation on the data block containing the header; a scrambler configured to be in the data block Acquiring a coded bit corresponding to the header with a scrambling sequence if an entrained positive or negative acknowledgement field is included; and a transceiver configured to transmit the scrambled The bit of the 18 ^ 352 844 block. ... configured to detect - entrained slave confirmation or negative confirmation intercept pointer mismatch and - wheel touch gesture, the apparatus comprising: two transceivers configured to receive a data block coding bit; And configured to perform a forward error correction (FEC) decoding on the received coded bit; a descrambler configured to descramble with a b scrambling code if the forward error correction decoding fails The subtracted coded bit, the descrambled bit is decoded by the decoder; and - the controller is configured to be successful in decoding the forward error correction of the descrambled bit A positive confirmation of an entrainment or a negative confirmation field is detected in the data block. 9. Apparatus configured to provide an entrained positive or negative acknowledgement intercept indicator and a polling indicator, the apparatus comprising: a = block material processing entity configured to generate a header a data block 'the header contains the polling indicator; an encoder configured to generate a header check sequence (HCS); a modulo 2 adder configured to positively acknowledge or negate in an entrainment A predetermined sequence is mixed with the header check sequence if the confirmation field is included in the data block; and a transceiver 'is configured to transmit the data block. 10 'A device configured to detect a positive acknowledgement or negative acknowledgement field indicator and a polling indicator of an entrainment, the apparatus comprising: the transceiver 'configured to receive a data block; 19 M352844 97. 一解碼器，被配置用於以該資料塊的一標頭以及被包含 在該資料塊中的一標頭檢查序列來執行一標頭檢查 列解碼； 一模2加法器，被配置用於在該標頭檢查序列解碼失敗 的情況下將-預定序列與該標頭檢查序列混合，由該解 碼器以該標頭和一混合後的標頭檢查序列來執行第二 次標頭檢查序列解碼；以及a decoder configured to perform a header check column decoding with a header of the data block and a header check sequence included in the data block; a modulo-2 adder configured to If the header check sequence fails to decode, the pre-determined sequence is mixed with the header check sequence, and the decoder performs the second header check sequence decoding with the header and a mixed header check sequence; as well as 控制裔被配置用於在該第二次標頭檢查序列解碼成 功的情況下&測該資料塊是否包含—夾帶的肯定確認 或否定確認欄位。 11. 一種被配置用於提供一夾帶的肯定確認或否定確認棚位 指示符和一輪詢指示符的裝置，該裝置包括： -資料塊處理實體’被配置用於產生包含—夾帶的肯定 確認或否定確認她的―資料塊，且設定塊序列號2位 元中的個來才曰示該資料塊中的一夾帶的肯定確認或 否定確認欄位的存在；以及 一收發器，被配置用於發送該資料塊。 12. -種伽置胁檢測—夾帶的肯定確認或紋讀認棚 位指示符和-輪詢指示符的裝置，該裝置包括： 一收發器，被配置用於接收一資料塊；以及 一控制器，被配置用以基於塊序列號2位元中的一個來 檢測該身料塊中-夹帶的肯定確認或否定確認搁位的 存在。 20The control person is configured to detect whether the data block contains a positive acknowledgement or a negative acknowledgement field if the second header check sequence is successfully decoded. 11. Apparatus configured to provide an entrained positive or negative confirmation stash indicator and a polling indicator, the apparatus comprising: - a data block processing entity 'configured to generate a positive acknowledgement comprising - entrainment or Negatively confirming her "data block" and setting one of the block serial number 2 bits to indicate the presence of a positive acknowledgement or negative acknowledgement field in the data block; and a transceiver configured to Send the data block. 12. - gamma detection - means for positively acknowledging or engraving the shed indicator and - polling indicator, the apparatus comprising: a transceiver configured to receive a data block; and a control And configured to detect the presence of a positive acknowledgement or a negative acknowledgement of the entrainment in the body block based on one of the block sequence number 2 bits. 20 M352844 i η補充i 七、指定代表圖： (一) 本案指定代表圖為：第（4 )圖。 (二) 本代表圖之元件符號簡單說明： 400 基地台 402 資料塊處理實體 404 編碼器 406 擾亂器 408 收發器M352844 i ηSupplement i VII. Designation of representative drawings: (1) The representative representative of the case is: (4). (b) A brief description of the component symbols of this representative diagram: 400 base station 402 data block processing entity 404 encoder 406 scrambler 408 transceiver
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