TWM341297U - Thermistor chip - Google Patents

Thermistor chip Download PDF

Info

Publication number
TWM341297U
TWM341297U TW97206356U TW97206356U TWM341297U TW M341297 U TWM341297 U TW M341297U TW 97206356 U TW97206356 U TW 97206356U TW 97206356 U TW97206356 U TW 97206356U TW M341297 U TWM341297 U TW M341297U
Authority
TW
Taiwan
Prior art keywords
thermistor
conductive portion
layer
wafer
electrically insulating
Prior art date
Application number
TW97206356U
Other languages
Chinese (zh)
Inventor
Hsiung-Ming Chen
Original Assignee
Tayao Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tayao Technology Co Ltd filed Critical Tayao Technology Co Ltd
Priority to TW97206356U priority Critical patent/TWM341297U/en
Publication of TWM341297U publication Critical patent/TWM341297U/en

Links

Landscapes

  • Thermistors And Varistors (AREA)

Abstract

A thermistor chip is disclosed. The thermistor chip comprises an insulated substrate, a thermistor layer, a first electrical conductive portion, a passivation layer and a second electrical conductive portion. The thermistor layer is formed on a first surface of the insulated substrate. The passivation layer at least covers the thermistor layer. The first electrical conductive portion and the second electrical conductive portion respectively extend onto a second surface and the first surface of the insulated substrate, thereby reducing the height of disposing the thermistor chip.

Description

M341297 八、新型說明: 【新型所屬之技術領域】 本創作是有關於一種熱敏電阻晶片,且特別是有關於 厚膜式的熱敏電阻晶片。 【先前技術】M341297 VIII. New description: [New technical field] This creation is related to a thermistor wafer, and in particular to a thick film type thermistor wafer. [Prior Art]

熱敏電阻係一種含有金屬(鐵、鋁、銅、鈦、銻、錳、 鋇、鋰、鈷、鎳)氧化物的陶瓷燒結半導體材料。其中熱敏 電阻之阻值會隨溫度變化而改變。在實際運用上,則是利 用熱敏電阻的電阻-溫度之關係,結合其他被動元件,例如 電阻,用來作為電子線路和儀錶測量電路中的溫度補償、 電路保護、溫度量測、或溫度控制之裝置。習知的熱敏電 阻可以製造成珠(Bead)狀、碟狀、桿狀、晶片或薄片結構, 再藉由電極連結於電子電路之上。 請參照第1圖,其係根據習知厚膜式熱敏電阻晶片的 結構示意圖。以厚膜式熱敏電阻晶片為例,由於厚膜式熱 敏電阻晶片100可利用厚膜印刷或網版印刷方式來塗佈熱 敏電阻材料11G於電性絕緣基材12G i,因而適合用以自 動化大量生產,而可降低製造成本。 當厚膜式熱敏餘^ _謹連接於-電子元件101(例 如感測器)的側面時’熱敏電阻晶片1〇〇本身的長度(或寬度 會限制電子元件之高度,增加電子元件之薄型化的困難。 *然而’隨著科技的進步’電子元件與裝置已逐漸朝向 輕薄短小的方向發展…般的厚膜式熱敏電阻晶片!⑽之 電極導線13G係朝電性絕緣基材12()上的下方伸出,因而 M341297 【新型内容】 因此本創作之一方面係在於提供一種熱敏電阻晶片, 藉以設置降低熱敏電阻晶片的設置高度,因而提升電子元 件薄型化的可能性。 ㈣本創作之實施例,本創作之熱敏電阻晶片可包含 • 冑電性絕緣基材、熱敏電阻層、第-導電部、絕緣保護層 &第二導電部。電性絕緣基材具有相對之_第—表面和一 _ 帛一表面,#敏電阻層形成於電性絕緣基材之第一表面 上,第一導電部形成於熱敏電阻層之一側,並延伸至電性 絕緣基材的第二表面上,絕緣保護層至少包覆於熱敏電阻 層上,第二導電部形成於熱敏電阻層之另一侧,並相對於 第導電部,其中部分第二導電部係延伸至絕緣保護層上。 因此,本創作之熱敏電阻晶片可適用於設置於電子元 件之一側面,以降低熱敏電阻晶片的設置高度,避免影響 電子元件或其裝置的薄型化。 【實施方式】 為讓本創作之上述和其他目的、特徵、優點與實施例 忐更明顯易懂,本說明書將特舉出一系列實施例來加以說 明。但值得注意的是,此些實施例只是用以說明本創作之 實施方式,而非用以限定本創作。 請參照第2圖,其繪示依照本創作之實施例之熱敏電 阻晶片的剖面示意圖。本實施例之熱敏電阻晶片200係厚 膜式熱敏電阻晶片,其可包含電性絕緣基材21〇、熱敏電阻 6 M341297 層220、第一導電部230、絕緣保護層240及第二導電部 250。熱敏電阻層220係形成於電性絕緣基材210上,第一 導電部230和第二導電部250係分別形成於熱敏電阻層220 的相對兩側,絕緣保護層係至少包覆於熱敏電阻層220上, 以保護熱敏電阻層220,並隔絕第一導電部230和第二導電 部 250。 如第2圖所示,本實施例之電性絕緣基材210之熔點 例如大於l,〇〇〇°C,其材質例如為例如氧化锆或氧化鋁的陶 瓷基材。電性絕緣基材210具有第一表面211、第二表面 212、第一端面213及第二端面214。第一表面211和第二 表面212係分別位於電性絕緣基材210的相對兩側,第一 端面213和第二端面214係形成於第一表面211和第二表 面212之間,且位於電性絕緣基材210的另相對兩側,其 中第一端面213和第二端面214的高度係小於第一表面211 或第二表面212的長度或寬度。 如第2圖所示,本實施例之熱敏電阻層220係形成於 電性絕緣基材210的第一表面211上,熱敏電阻層220之 材料例如為正溫度係數(Positive Temperature Coefficient; PTC)熱敏電阻膏或負溫度係數(Negative Temperature Coefficient; NTC)熱敏電阻膏,其可利用例如:旋轉塗佈、 壓印、滾輪塗佈(Roller Coating)、戳印(Stamping)、網印 (Screen Printing)或點膠(Syringe Dispensing)等方式來形成 於第一表面211上。在熱敏電阻膏塗佈於電性絕緣基材210 上後,可再進行一低溫燒結步驟。此時,燒結溫度例如約 介於600°C到l,〇〇〇°C之間,藉以燒結熱敏電阻膏成具有陶 7 M341297 瓷半導體材質之熱敏電阻層220。 如第2圖所示,本實施例之第一導電部230和第二導 電部250例如係以金屬材料所形成,例如金、銀、銅、鋁、 欽、錯、麵、把、鎳、鶴、錫、氧化锅、錫、氧化錫、氧 化銦錫(ITO)、鉬、銥、铑或上述金屬之合金。第一導電 部230和第二導電部250可利用沉積或塗佈(Coating)的方 式來形成,例如旋轉塗佈、壓印、滾輪塗佈、戳印、網印、 點膠、物理氣相沉積技術(Physical Vapor Deposition; ❿ PVD)、化學氣相沉積技術(Chemical Vapor Deposition ; CVD)、蒸鍵(Evaporation Deposition)、離子鍍(Ion Plating)、原子層沉積法(Atomic Layer Deposition ; ALD) 或濺鍵(Sputtering Deposition)等方法。第一導電部230係 形成於熱敏電阻層220之一側,並經由第一端面213來延 伸至電性絕緣基材210的第二表面212上。絕緣保護層 240之材料例如為環氧樹脂、PMMA、聚碳酸酯 (Polycarbonate)、玻璃或矽膠、紫外光硬化型樹脂(UV Φ Curable Heat-resistant Resin ),其至少包覆於熱敏電阻層 220上,以密封保護此熱敏電阻層220,並電性絕緣第一 導電部230和第二導電部250。在本實施中,絕緣保護層 ’ 240較佳係包覆熱敏電阻層220、部分第一導電部230及 部分第二導電部250,以確保第一導電部230和第二導電 部250之間的電性絕緣。第二導電部25〇係形成於熱敏電 阻層220之另一侧,而相對於第一導電部230,其中部分 第二導電部250係延伸至絕緣保護層240上。 如第2圖所示,本實施例之熱敏電阻晶片200更可包 g M341297 含外部金屬層260,其形成於第一導電部230和第二導電部 250所暴露之表面上,外部金屬層260之材料較佳係具有良 好焊接特性之金屬,例如:錫、船、銀、銅、鎳、絲、铭、 銦或其上述任意組成之合金,用以分別電性連接二電極導 線270於第一導電部230和第二導電部250,外部金屬層 260可利用沉積法(例如氣相沉積技術或濺鍍)、塗佈法(例 如網印)、端子鉚合法、電鍍(或無電電鍍)或焊接法等方式 來形成。 請參照第3圖,其繪示依照本創作之實施例之熱敏電 阻晶片與電子元件的剖面示意圖。本實施例之熱敏電阻晶 片200的第一導電部230和第二導電部250係分別延伸至 電性絕緣基材210的第二表面212和第一表面211上,藉 以分別橫向連接電極導線270(亦即電極導線270的延伸方 向平行於第一表面211和第二表面212),因而當熱敏電阻 晶片200設置於一電子元件300(例如感測元件)的一侧時, 熱敏電阻晶片200之第二端面214(或第一端面213)可直接 面對於電子元件300的側面,由於熱敏電阻晶片200之第 二端面214(或第一端面213)的高度係小於第一表面211或 第二表面212的長度或寬度,因而可降低熱敏電阻晶片200 的設置高度,以避免影響電子元件300的薄型化。 請參照第4A圖至第4E圖,其繪示依照本創作之實施 例之熱敏電阻晶片的製程剖面圖。當製造本實施例之熱敏 電阻晶片200時,首先,提供電性絕緣基材210。接著,形 成第一導電層231於電性絕緣基材210的第二表面212上, 並形成第二導電層251於電性絕緣基材210的第一表面211 9 M341297 上,其中第一導電層231和第二導電層251係分別位於電 性絕緣基材210的相對兩側。第一導電層231和第二導電 層較佳可利用網印的方式來形成。接著,形成熱敏電阻層 220於電性絕緣基材210的第一表面211上,且位於第一導 電層231和第二導電層251之間,較佳為分別部分重疊於 第二導電層251上。接著,再形成第一導電層231於部分 熱敏電阻層220上,並相對於第二導電層251。接著,形成 絕緣保護層240來包覆於熱敏電阻層220、部分第一導電層 231及部分第二導電層251,並暴露出部分第二導電層 251。接著,形成導電材料(例如銀膠)於部分暴露第二導電 層251和部分絕緣保護層240上,因而形成第二導電部 250。在本實施例中,第一導電層231、第二導電層251、 熱敏電阻層220及絕緣保護層240可形成於一大面積之電 性絕緣基材210上,再進行裁切,以分割成複數個長條形 的單元(未繪示),並外露出電性絕緣基材210的第一端面 213和第二端面214。接著,形成(例如濺鍍)一導電材料於 電性絕緣基材210的第一端面213上,以連接分別位於第 一表面211和第二表面212上的第一導電層231,因而形成 第一導電部230。接著,再進行裁切步驟,以分割長條形單 元成複數個熱敏電阻晶片單元。接著,形成外部金屬層260 於第一導電部230和第二導電部250所暴露之表面上。然 後,分別橫向連接(例如焊接)電極導線270於每一熱敏電阻 晶片單元的外部金屬層260上,因而完成本實施例之熱敏 電阻晶片200。值得注意的是,上述之熱敏電阻晶片的製程 方法或步驟僅用以舉例說明,其應不限於此,本創作之熱 M341297 敏電阻晶片亦可藉由其他製程方法或步驟來製造。 由上述本創作的實施例可知,本創作的熱敏電阻晶片 可適用於電性連接於電子元件之一側面,並可降低設置高 度’因而增加電子元件薄型化之可能性。 雖然本創作已以實施例揭露如上,然其並非用以限定 本創作,任何熟習此技藝者,在不脫離本創作之精神和範 圍内,當可作各種之更動與潤飾,因此本創作之保護範圍 當視後附之申請專利範圍所界定者為準。 【圖式簡單說明】 為讓本創作之上述和其他目的、特徵、優點與實施例 能更明顯易懂,所附圖式之詳細說明如下·· 第1圖係繪示依照習知厚膜式熱敏電阻晶片的結構示 意圖。 第2圖係繪示依照本創作之實施例之熱敏電阻晶片的 剖面示意圖。 第3圖係繪示依照本創作之實施例之熱敏電阻晶片與 電子元件的刮面示意圖。 第4 A圖至第4E圓係纟會示依照本創作之實施例之熱敏 電阻晶片的製程剖面圖。 【主要元件符號說明】 1〇1 :電子元件 100:熱敏電阻晶片 110:熱敏電阻材料 120:電性絕緣基材 130:電極導線 11 M341297 200 : 熱敏電阻晶片 210 : 211 : 第一表面 212 : ) 213 : 第一端面 214 : 220 : 熱敏電阻層 230 : 231 : 第一導電層 240 : 250 : 第二導電部 251 : 260 : 外部金屬層 270 : 300 : 電子元件 電性絕緣基材 第二表面 第二端面 第一導電部 絕緣保護層 第二導電層 電極導線A thermistor is a ceramic sintered semiconductor material containing a metal (iron, aluminum, copper, titanium, tantalum, manganese, lanthanum, lithium, cobalt, nickel) oxide. The resistance of the thermistor changes with temperature. In practice, the resistance-temperature relationship of the thermistor is combined with other passive components, such as resistors, for temperature compensation, circuit protection, temperature measurement, or temperature control in electronic circuit and meter measurement circuits. Device. Conventional thermistors can be fabricated in a Bead shape, a dish, a rod, a wafer or a sheet structure and then bonded to an electronic circuit by electrodes. Please refer to Fig. 1, which is a schematic view of the structure of a conventional thick film thermistor wafer. Taking a thick film thermistor wafer as an example, since the thick film thermistor wafer 100 can coat the thermistor material 11G on the electrically insulating substrate 12G i by thick film printing or screen printing, it is suitable for use. Automated mass production reduces manufacturing costs. When the thick film type heat sensitive device is connected to the side of the electronic component 101 (for example, the sensor), the length of the thermistor wafer 1 itself (or the width limits the height of the electronic component, and the electronic component is added) Difficulty in thinning. *However, with the advancement of technology, electronic components and devices have gradually developed toward a thin, light and short direction... a thick film type thermistor chip! (10) The electrode lead 13G is oriented toward the electrically insulating substrate 12 The lower part of the () is extended, and thus M341297 [new content] Therefore, one aspect of the present invention is to provide a thermistor wafer, whereby the setting height of the thermistor wafer is lowered, thereby increasing the possibility of thinning the electronic component. (4) In the embodiment of the present invention, the thermistor wafer of the present invention may include: a 绝缘 electrically insulating substrate, a thermistor layer, a first conductive portion, an insulating protective layer & a second conductive portion. The electrically insulating substrate has The first ohmic resistance layer is formed on the first surface of the electrically insulating substrate, and the first conductive portion is formed on one side of the thermistor layer, and extends to the electrical surface, opposite to the first surface and the first surface. On the second surface of the edge substrate, the insulating protective layer is coated on at least the thermistor layer, the second conductive portion is formed on the other side of the thermistor layer, and the second conductive portion is opposite to the first conductive portion. The device is extended to the insulating protective layer. Therefore, the thermistor wafer of the present invention can be applied to one side of the electronic component to reduce the height of the thermistor wafer and avoid affecting the thinning of the electronic component or its device. The above and other objects, features, advantages and embodiments of the present invention will become more apparent and understood. The embodiment of the present invention is described, but is not intended to limit the creation. Referring to Figure 2, there is shown a cross-sectional view of a thermistor wafer according to an embodiment of the present invention. The thermistor wafer 200 of the present embodiment A thick film type thermistor wafer, which may include an electrically insulating substrate 21 , a thermistor 6 M341297 layer 220 , a first conductive portion 230 , an insulating protective layer 240 , and a second conductive portion 250 . The thermistor layer 220 is formed on the electrically insulating substrate 210. The first conductive portion 230 and the second conductive portion 250 are respectively formed on opposite sides of the thermistor layer 220, and the insulating protective layer is coated with at least heat. The ohmic resistance layer 220 protects the thermistor layer 220 and isolates the first conductive portion 230 and the second conductive portion 250. As shown in Fig. 2, the melting point of the electrically insulating substrate 210 of the present embodiment is, for example, greater than l. The material is, for example, a ceramic substrate such as zirconia or alumina. The electrically insulating substrate 210 has a first surface 211, a second surface 212, a first end surface 213, and a second end surface 214. A surface 211 and a second surface 212 are respectively located on opposite sides of the electrically insulating substrate 210. The first end surface 213 and the second end surface 214 are formed between the first surface 211 and the second surface 212, and are electrically located. The other opposite sides of the insulating substrate 210, wherein the heights of the first end surface 213 and the second end surface 214 are smaller than the length or width of the first surface 211 or the second surface 212. As shown in FIG. 2, the thermistor layer 220 of the present embodiment is formed on the first surface 211 of the electrically insulating substrate 210. The material of the thermistor layer 220 is, for example, a positive temperature coefficient (PTC). a thermistor paste or a negative temperature coefficient (NTC) thermistor paste, which can be, for example, spin coating, stamping, roller coating, stamping, screen printing ( Screen printing) or dispensing (Syringe Dispensing) or the like is formed on the first surface 211. After the thermistor paste is applied to the electrically insulating substrate 210, a low temperature sintering step can be performed. At this time, the sintering temperature is, for example, between about 600 ° C and 1, 〇〇〇 ° C, whereby the thermistor paste is sintered into a thermistor layer 220 having a ceramic material of the ceramic No. 7 M341297. As shown in FIG. 2, the first conductive portion 230 and the second conductive portion 250 of the present embodiment are formed, for example, of a metal material, such as gold, silver, copper, aluminum, chin, mis, face, handle, nickel, crane. , tin, oxidizing pot, tin, tin oxide, indium tin oxide (ITO), molybdenum, niobium, tantalum or an alloy of the above metals. The first conductive portion 230 and the second conductive portion 250 may be formed by deposition or coating, such as spin coating, stamping, roller coating, stamping, screen printing, dispensing, physical vapor deposition. Technology (Physical Vapor Deposition; ❿ PVD), Chemical Vapor Deposition (CVD), Evaporation Deposition, Ion Plating, Atomic Layer Deposition (ALD) or splash Method such as Sputtering Deposition. The first conductive portion 230 is formed on one side of the thermistor layer 220 and extends through the first end surface 213 to the second surface 212 of the electrically insulating substrate 210. The material of the insulating protective layer 240 is, for example, epoxy resin, PMMA, polycarbonate, glass or silicone, or UV Φ Curable Heat-resistant Resin, which is coated on at least the thermistor layer 220. The thermistor layer 220 is sealed and electrically insulated from the first conductive portion 230 and the second conductive portion 250. In the present embodiment, the insulating protective layer '240 is preferably coated with the thermistor layer 220, a portion of the first conductive portion 230, and a portion of the second conductive portion 250 to ensure a space between the first conductive portion 230 and the second conductive portion 250. Electrical insulation. The second conductive portion 25 is formed on the other side of the thermistor layer 220, and a portion of the second conductive portion 250 extends to the insulating protective layer 240 with respect to the first conductive portion 230. As shown in FIG. 2, the thermistor wafer 200 of the present embodiment may further include an external metal layer 260 formed on the surface exposed by the first conductive portion 230 and the second conductive portion 250, and an outer metal layer. The material of 260 is preferably a metal having good welding characteristics, such as tin, boat, silver, copper, nickel, wire, indium, indium or an alloy thereof, for electrically connecting the two electrode wires 270 to the first a conductive portion 230 and a second conductive portion 250, the outer metal layer 260 may be deposited by a deposition method (such as vapor deposition technique or sputtering), a coating method (such as screen printing), terminal riveting, electroplating (or electroless plating) or Forming by welding or the like. Referring to Figure 3, there is shown a cross-sectional view of a thermistor wafer and electronic components in accordance with an embodiment of the present invention. The first conductive portion 230 and the second conductive portion 250 of the thermistor wafer 200 of the present embodiment extend to the second surface 212 and the first surface 211 of the electrically insulating substrate 210, respectively, thereby laterally connecting the electrode leads 270, respectively. (ie, the direction in which the electrode wires 270 extend is parallel to the first surface 211 and the second surface 212), and thus when the thermistor wafer 200 is disposed on one side of an electronic component 300 (eg, a sensing component), the thermistor wafer The second end surface 214 (or the first end surface 213) of 200 may directly face the side of the electronic component 300, since the height of the second end surface 214 (or the first end surface 213) of the thermistor wafer 200 is smaller than the first surface 211 or The length or width of the second surface 212 can thus reduce the height of the thermistor wafer 200 to avoid affecting the thinning of the electronic component 300. Referring to Figures 4A through 4E, there are shown process cross-sectional views of a thermistor wafer in accordance with an embodiment of the present invention. When the thermistor wafer 200 of the present embodiment is fabricated, first, an electrically insulating substrate 210 is provided. Next, a first conductive layer 231 is formed on the second surface 212 of the electrically insulating substrate 210, and a second conductive layer 251 is formed on the first surface 21109 M341297 of the electrically insulating substrate 210, wherein the first conductive layer 231 and the second conductive layer 251 are respectively located on opposite sides of the electrically insulating substrate 210. The first conductive layer 231 and the second conductive layer are preferably formed by screen printing. Next, the thermistor layer 220 is formed on the first surface 211 of the electrically insulating substrate 210 and between the first conductive layer 231 and the second conductive layer 251, preferably partially overlapping the second conductive layer 251, respectively. on. Next, a first conductive layer 231 is formed on the partial thermistor layer 220 and opposite to the second conductive layer 251. Next, an insulating protective layer 240 is formed to cover the thermistor layer 220, a portion of the first conductive layer 231, and a portion of the second conductive layer 251, and a portion of the second conductive layer 251 is exposed. Next, a conductive material (e.g., silver paste) is formed to partially expose the second conductive layer 251 and the portion of the insulating protective layer 240, thereby forming the second conductive portion 250. In this embodiment, the first conductive layer 231, the second conductive layer 251, the thermistor layer 220, and the insulating protective layer 240 may be formed on a large area of the electrically insulating substrate 210, and then cut to divide A plurality of elongated units (not shown) are formed, and the first end surface 213 and the second end surface 214 of the electrically insulating substrate 210 are exposed. Next, a conductive material is formed (eg, sputtered) on the first end surface 213 of the electrically insulating substrate 210 to connect the first conductive layer 231 on the first surface 211 and the second surface 212, thereby forming the first Conductive portion 230. Next, a cutting step is performed to divide the elongated unit into a plurality of thermistor wafer units. Next, an outer metal layer 260 is formed on the exposed surface of the first conductive portion 230 and the second conductive portion 250. Then, the electrode wires 270 are laterally connected (e.g., soldered) to the outer metal layer 260 of each of the thermistor wafer units, respectively, thereby completing the thermistor wafer 200 of the present embodiment. It should be noted that the method or the steps of the above the thermistor wafer are only for exemplification, and are not limited thereto. The heat M341297 varistor wafer of the present invention can also be manufactured by other process methods or steps. As is apparent from the above-described embodiments of the present invention, the thermistor wafer of the present invention can be suitably used to be electrically connected to one side of an electronic component, and the height of the setting can be lowered, thereby increasing the possibility of thinning the electronic component. Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention, and any person skilled in the art can make various changes and refinements without departing from the spirit and scope of the present invention. The scope is subject to the definition of the scope of the patent application attached. BRIEF DESCRIPTION OF THE DRAWINGS In order to make the above and other objects, features, advantages and embodiments of the present invention more comprehensible, the detailed description of the drawings is as follows: Figure 1 shows a thick film thermal according to the conventional method. Schematic diagram of the structure of the resistor wafer. Figure 2 is a cross-sectional view showing a thermistor wafer in accordance with an embodiment of the present invention. Figure 3 is a schematic view showing the shaving surface of the thermistor wafer and the electronic component in accordance with an embodiment of the present invention. Sections 4A through 4E show a process cross-sectional view of the thermistor wafer in accordance with an embodiment of the present invention. [Main component symbol description] 1〇1: Electronic component 100: Thermistor wafer 110: Thermistor material 120: Electrically insulating substrate 130: Electrode wire 11 M341297 200: Thermistor wafer 210: 211: First surface 212 : ) 213 : first end face 214 : 220 : thermistor layer 230 : 231 : first conductive layer 240 : 250 : second conductive portion 251 : 260 : outer metal layer 270 : 300 : electronic component electrical insulating substrate Second surface second end surface first conductive portion insulating protective layer second conductive layer electrode lead

1212

Claims (1)

M341297 九、申請專利範圍: 1. 一種熱敏電阻晶片,至少包含: 一電性絕緣基材,具有相對之一第一表面和一第二表 面; 一熱敏電阻層,形成於該電性絕緣基材之該第一表面 上 一第一導電部,形成於該熱敏電阻層之一側,並延伸 至該電性絕緣基材的該第二表面上; ® —絕緣保護層,至少包覆於該熱敏電阻層上;以及 一第二導電部,形成於該熱敏電阻層之另一侧,並相 對於該第一導電部,其中部分該第二導電部係延伸至該絕 緣保護層上。 2. 如申請專利範圍第1項所述之熱敏電阻晶片,其中 該電性絕緣基材之材質為陶瓷基材。 B 3·如申請專利範圍第2項所述之熱敏電阻晶片,其中 該電性絕緣基材之材質為氧化锆或氧化鋁。 4·如申請專利範圍第1項所述之熱敏電阻晶片,其中 該熱敏電阻層之材料為正溫度係數(Positive Temperature Coefficient ; PTC)熱敏電阻膏或負溫度係數(Negative Temperature Coefficient ; NTC)熱敏電阻膏0 13 M341297 5·如申請專利範圍第1項所述之熱敏電阻晶片,其中 該熱敏電阻層之材料之形成方式為旋轉塗佈、壓印、滾輪 塗佈(Roller Coating)、戳印(Stamping)、網印(Screen Printing) 或點膝(Syringe Dispensing)。 6.如申請專利範圍第1項所述之熱敏電阻晶片,其中 該第一導電部和該第二導電部之材料為金、銀、銅、鋁、 鈦、錯、鉑、把、鎳、鶴、鑛、氧化鑛 '錫、氧化錫、氧 化銦錫(ITO)、翻、銥、姥或上述金屬之合金。 7·如申請專利範圍第1項所述之熱敏電阻晶片,其中 該第一導電部和該第二導電部係利用沉積或塗佈(Coating) 的方式來形成。 8·如申請專利範圍第7項所述之熱敏電阻晶片,其中 該第一導電部和該第二導電部的形成方式為旋轉塗佈、壓 印、滾輪塗佈、戳印、網印、點膠、物理氣相沉積技術 (Physical Vapor Deposition ; PVD)、化學氣相沉積技術 (Chemical Vapor Deposition ; CVD)、蒸鍵(Evaporation Deposition)、離子鍍(Ion Plating)、原子層沉積法(Atomic Layer Deposition ; ALD)或滅鑛(Sputtering Deposition) 〇 9.如申請專利範圍第1項所述之熱敏電阻晶片,其中 該絕緣保護層之材料係選自由環氧樹脂、ΡΜΜΑ、聚碳酸 西旨(Polycarbonate)、玻璃或石夕膠、紫外光硬化型樹脂(UV M341297 族群 Curable Heat-resistant Resin )所組成之一 電部 如中請專利範圍第1項所述之熱敏電阻晶片其 =該絕緣保護層更包,分該第—導電部和部^第二導 包含: η.如申請專利_ i項所述之熱敏電阻晶片, 更 -外部金屬層,形成於該第-導電部和該第二導電部 所暴露之表面上。 12·如中請專利範圍第卩項所述之熱敏電阻晶片,其 中該外部金屬層之材料係選自由錫、鉛、銀、銅、鎳、鉍: 鋁、銦及其合金所組成之一族群》 ' 13·如申請專利範圍第i項所述之熱敏電阻晶片 包含: 二電極導線’分別電性連接㈣第—導電部和該二導 電部,且平行於該電性絕緣基材的該第二表面和該第一表 面0 14·種熱敏電阻晶片,設置於一電子元件之〆御( 面,其中該熱敏電阻晶片至少包含: 一電性絕緣基材,具有相對之一第一表面和一第二表 面,以及相對之二端面,其中該些端面係形成於該第一表 15 M341297 面和該第二表面之間,且該些端面的其中一者係直接面對 於該電子元件的該側面; 一熱敏電阻層,形成於該電性絕緣基材之該第一表面 上 一第一導電部,形成於該熱敏電阻層之一側,並延伸 至該電性絕緣基材的該第二表面上; 一絕緣保護層,至少包覆於該熱敏電阻層上;以及 一第二導電部,形成於該熱敏電阻層之另一侧,並相 對於該第一導電部,其中部分該第二導電部係延伸至該絕 緣保護層上。 15·如申請專利範圍第14項所述之熱敏電阻晶片,其 中該電性絕緣基材之材質為陶瓷基材。 16·如申請專利範圍第15項所述之熱敏電阻晶片,其 中該電性絕緣基材之材質為氧化锆或氧化鋁。 17·如申請專利範圍第14項所述之熱敏電阻晶片,其 中該熱敏電阻層之材料為正溫度係數(Positive Temperature Coefficient ; PTC)熱敏電阻膏或負溫度係數(Negative Temperature Coefficient ; NTC)熱敏電阻膏0 18·如申請專利範圍第14項所述之熱敏電阻晶片,其 中該熱敏電阻層之材料之形成方式為旋轉塗佈、壓印、滾 輪塗佈(Roller Coating)、戳印(Stamping)、網印(screen M341297 Printing)或點膠(Syringe Dispensing)。 19·如申請專利範圍第14項所述之熱敏電阻晶片,其 中該第一導電部和該第二導電部之材料為金、銀、銅、鋁、 鈦、錯、銘、纪、鎳、鶴、鑛、氧化鑛、錫、氧化錫、氧 化銦錫(ΙΤΟ)、鉬、銥、铑或上述金屬之合金。 20·如申請專利範圍第14項所述之熱敏電阻晶片,其 中該第一導電部和該第二導電部係利用沉積或塗佈 (Coating)的方式來形成。 21·如申請專利範圍第20項所述之熱敏電阻晶片,其 中該第一導電部和該第二導電部的形成方式為旋轉塗佈、 壓印、滾輪塗佈、戳印、網印、點膠、物理氣相沉積技術 (Physical Vapor Deposition ; PVD)、化學氣相沉積技術 (Chemical Vapor Deposition ; CVD)、蒸鍍(Evaporation Deposition)、離子鑛(Ion Plating)、原子層沉積法(Atomic Layer Deposition ; ALD)或藏艘(Sputtering Deposition)。 22·如申請專利範圍第14項所述之熱敏電阻晶片,其 中該絕緣保護層之材料係選自由環氧樹脂、PMMA、聚碳 酸酯(Polycarbonate)、玻璃或石夕膠、紫外光硬化型樹脂(UV Curable Heat-resistant Resin)所組成之一族群0 23.如申請專利範圍第14項所述之熱敏電阻晶片,其 17 M341297 中該絕緣保護層更包覆部分該第一導 電部。 P和部分該第;導 24·如申請專利範圍第14項所述之執 包含: 、、、電組晶片,更 一外部金屬層,形成於該第一導電 所暴露之表面上D 部和讀第 導電 部 25.如申請專利範園第24項所述之熱 中該外部金屬層之材料係選自由錫、錯、、:片仏其 鋁、銦及其合金所組成之一族群。 ^蜾、铋、 包含2:6.如中請專㈣圍第14項所述之熱敏電阻晶片,更 二電極導線,分別電性連接於該第一導 電部,且平行於該電性絕緣基材的該第二表面和該第Π 面。 18M341297 IX. Patent application scope: 1. A thermistor wafer comprising at least: an electrically insulating substrate having a first surface and a second surface; a thermistor layer formed on the electrical insulation a first conductive portion on the first surface of the substrate is formed on one side of the thermistor layer and extends to the second surface of the electrically insulating substrate; ® - an insulating protective layer covering at least On the thermistor layer; and a second conductive portion formed on the other side of the thermistor layer, and a portion of the second conductive portion extends to the insulating protective layer with respect to the first conductive portion on. 2. The thermistor wafer of claim 1, wherein the electrically insulating substrate is made of a ceramic substrate. The thermistor wafer of claim 2, wherein the electrically insulating substrate is made of zirconia or alumina. 4. The thermistor wafer according to claim 1, wherein the material of the thermistor layer is a positive temperature coefficient (PTC) thermistor paste or a negative temperature coefficient (Negative Temperature Coefficient; NTC). Thermistor paste 0 13 M341297 5 The thermistor wafer according to claim 1, wherein the material of the thermistor layer is formed by spin coating, stamping, and roller coating (Roller Coating) ), Stamping, Screen Printing, or Syringe Dispensing. 6. The thermistor wafer of claim 1, wherein the first conductive portion and the second conductive portion are made of gold, silver, copper, aluminum, titanium, erbium, platinum, palladium, nickel, Crane, ore, oxidized ore 'tin, tin oxide, indium tin oxide (ITO), turned, bismuth, antimony or an alloy of the above metals. 7. The thermistor wafer of claim 1, wherein the first conductive portion and the second conductive portion are formed by deposition or coating. 8. The thermistor wafer of claim 7, wherein the first conductive portion and the second conductive portion are formed by spin coating, stamping, roller coating, stamping, screen printing, Dispensing, Physical Vapor Deposition (PVD), Chemical Vapor Deposition (CVD), Evaporation Deposition, Ion Plating, Atomic Layer The thermistor wafer of claim 1, wherein the material of the insulating protective layer is selected from the group consisting of epoxy resin, bismuth, and polycarbonate ( Polycarbonate), glass or stellite, UV-curable resin (UV M341297 group of Curable Heat-resistant Resin), the electric part of the thermistor wafer as described in the first paragraph of the patent scope = the insulation protection The layer is further packaged, and the second conductive portion and the second conductive portion include: η. The thermistor wafer according to claim _, wherein an external metal layer is formed on the first conductive And the exposed upper surface of the second conductive portion. The thermistor wafer according to the above aspect of the invention, wherein the material of the outer metal layer is selected from the group consisting of tin, lead, silver, copper, nickel, niobium: aluminum, indium and alloys thereof. The group of the thermistor wafer as described in claim i includes: a two-electrode wire electrically connected to the fourth conductive portion and the two conductive portions, and parallel to the electrically insulating substrate The second surface and the first surface of the thermistor wafer are disposed on an electronic component, wherein the thermistor wafer comprises at least: an electrically insulating substrate having a relative one a surface and a second surface, and opposite end faces, wherein the end faces are formed between the face of the first watch 15 M341297 and the second surface, and one of the end faces directly faces the electron a side surface of the component; a thermistor layer formed on the first surface of the electrically insulating substrate, a first conductive portion formed on one side of the thermistor layer and extending to the electrically insulating base On the second surface of the material; The edge protection layer is coated on at least the thermistor layer; and a second conductive portion is formed on the other side of the thermistor layer, and a portion of the second conductive portion is opposite to the first conductive portion The device is extended to the insulating protective layer. The thermistor wafer according to claim 14, wherein the electrically insulating substrate is made of a ceramic substrate. The thermistor wafer, wherein the material of the electrically insulating substrate is zirconia or alumina. The thermistor wafer according to claim 14, wherein the material of the thermistor layer is positive. A temperature coefficient (PTC) thermistor paste or a negative temperature coefficient (NTC) thermistor paste. The thermistor wafer according to claim 14, wherein the heat sensitive film The material of the resistive layer is formed by spin coating, stamping, Roller Coating, Stamping, screen M341297 Printing or Syringe Dispensing. The thermistor wafer of claim 14, wherein the first conductive portion and the second conductive portion are made of gold, silver, copper, aluminum, titanium, er, ming, ji, nickel, crane, ore. An oxidized ore, tin, tin oxide, indium tin oxide (yttrium), molybdenum, niobium, tantalum or an alloy of the above metals. The thermistor wafer of claim 14, wherein the first conductive portion And the second conductive portion is formed by a method of depositing or coating. The thermistor wafer of claim 20, wherein the first conductive portion and the second conductive portion Forming methods include spin coating, stamping, roller coating, stamping, screen printing, dispensing, physical vapor deposition (PVD), chemical vapor deposition (CVD), steaming Evaporation Deposition, Ion Plating, Atomic Layer Deposition (ALD) or Sputtering Deposition. The thermistor wafer of claim 14, wherein the material of the insulating protective layer is selected from the group consisting of epoxy resin, PMMA, polycarbonate (polycarbonate), glass or shijiao, ultraviolet curing type. A group of the heat-resistance wafers of the invention, wherein the insulating protective layer further covers a portion of the first conductive portion in the 17 M341297. P and a portion of the first; the invention as described in claim 14 includes: , , , an electric group wafer, and an outer metal layer formed on the surface of the first conductive exposed surface D and read The first conductive portion 25. The material of the outer metal layer in the heat described in claim 24 is selected from the group consisting of tin, aluminum, aluminum, indium and alloys thereof. ^蜾,铋, contains 2:6. For example, the thermistor wafer described in item 14 of the special (4), and the second electrode lead are electrically connected to the first conductive portion and parallel to the electrical insulation. The second surface of the substrate and the first surface. 18
TW97206356U 2008-04-14 2008-04-14 Thermistor chip TWM341297U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW97206356U TWM341297U (en) 2008-04-14 2008-04-14 Thermistor chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW97206356U TWM341297U (en) 2008-04-14 2008-04-14 Thermistor chip

Publications (1)

Publication Number Publication Date
TWM341297U true TWM341297U (en) 2008-09-21

Family

ID=44334027

Family Applications (1)

Application Number Title Priority Date Filing Date
TW97206356U TWM341297U (en) 2008-04-14 2008-04-14 Thermistor chip

Country Status (1)

Country Link
TW (1) TWM341297U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103295709A (en) * 2012-03-03 2013-09-11 株式会社村田制作所 Semiconductor ceramic composition for NTC thermistors

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103295709A (en) * 2012-03-03 2013-09-11 株式会社村田制作所 Semiconductor ceramic composition for NTC thermistors
US8669841B2 (en) 2012-03-03 2014-03-11 Murata Manufacturing Co., Ltd. Semiconductor ceramic composition for NTC thermistors
CN103295709B (en) * 2012-03-03 2016-06-22 株式会社村田制作所 NTC thermistor semiconductive ceramic composition

Similar Documents

Publication Publication Date Title
TW535172B (en) Thermistor and method of manufacture
CN106465481B (en) Planar heating element with PTC resistor structure
US7746212B2 (en) Temperature sensor and method for its production
JP6564533B2 (en) Sensor element and method for manufacturing the sensor element
KR101646711B1 (en) Temperature sensor element and method for manufacturing the same
JP2022530944A (en) Heat ray type gas sensor chip, sensor and manufacturing method of sensor
TW200949886A (en) Circuit protection device including resistor and fuse element
JP3489000B2 (en) NTC thermistor, chip type NTC thermistor, and method of manufacturing temperature-sensitive resistive thin-film element
EP1041586B1 (en) Chip thermistor
US6529115B2 (en) Surface mounted resistor
TWM341297U (en) Thermistor chip
KR101892751B1 (en) Resistor and method for manufacturing the same
CN101515496A (en) Thermal resistor and manufacturing method thereof
TW201133517A (en) Chip resistor having a low resistance and method for manufacturing the same
JP2003068502A (en) Chip resistor
CN110199363A (en) Chip resister
JP4714260B2 (en) Thin film resistor structure and manufacturing method thereof
KR101645020B1 (en) Temperature sensor and manufacturing method for temperature sensor
US10319493B2 (en) Apparatus and method for establishing an electrically conductive and mechanical connection
CN201237957Y (en) Thermal resistor chip
TWI249750B (en) Thick film thermistor chip and the manufacturing method thereof
JP2002015838A (en) Resistance-heating element and its manufacturing method
JPH02244531A (en) Base board type thermo-fuse and resistance element and manufacture of them
CN107993782A (en) A kind of laminated film resistance of low resistance temperature coefficient and preparation method thereof
TWI325139B (en)

Legal Events

Date Code Title Description
MM4K Annulment or lapse of a utility model due to non-payment of fees