M329237 八、新型說明： 【新型所屬之技術領域】 本創作係關於一種半導體機台之改良機構，特別是有 關於一種藉由蝕刻製程室内複數個晶圓載盤之配置，以提 ‘ 升濺射清潔效率之半導體機台之改良機構。 【先前技術】M329237 VIII. New Description: [New Technology Field] This creation is about an improved mechanism for a semiconductor machine, especially for a configuration in which a plurality of wafer carriers are etched in a process chamber to improve the sputtering process. An improved mechanism for the efficiency of semiconductor machines. [Prior Art]
一般而言，半導體製程如經過姓刻製程以產生一介層 洞（via hole)或一接觸洞（contact hole)後，在洞内常遺留 一些聚合物殘留物，此類殘留物可能影響後續之沉積製程 的品質，必須藉由清潔加以去除。常用的清潔方法有電漿 /月洗（plasma clean)與氬氣濺射清潔（Arg〇n SpU廿er ciean) 兩種，電漿清洗的原理為利用喷出之電漿，與洞内之殘留 物接觸後產生北學或物理變化，藉以清潔洞内表面，電漿 清洗之特色在於速度快但清潔度較差。氬氣_清潔的原 理為利麟離氬氣粒子，對於晶圓進行騎轟擊，以移除 殘留物’其特色在於清潔度好但速度較慢。業界基於生產 效率的需求’多制㈣清洗之方式。“，因電裝清洗 的清潔度較差，後續之沉積製程之良率會受到電漿清洗的 清潔度較差的影響而嚴重降低，故如何兼顧清潔製 質與速度成為半導體製程的重要關鍵之一。 M329237 【新型内容】 #半導體機台之 内複數個晶 |發機台之改良 有鐘於此，本創作之目的在於 改良機構，特別是有關於—種藉由_夢 圓載盤之配置，以提升_清潔效率之: 根據此創作’提供一種半導體 包括-餘刻製程室、複數個沉積製程室” i機構，其中 蝕刻製程室具有複數個晶圓载盤與-濺射：及〜移轉室。 室係設置於_製程室與複數個沉積#I潔裝置。移轉 移轉崎程室與複數個沉積製程室内T之間’且用於 半導體機台Μ由為方|制 硬數個晶圓。此 域難程室颠數個 到提升賤射清潔效率 配置’達 力“+導體製程效率。 【實施方式】 以下以具體之實施例，對本創作揭a 以詳細說明。 <各形態内容加 半導體^1第1圖’第1圖分別為根據本創作所提供之一種 改良機構10之示意圖，其中包括-賴程 、後數個沉積製程tl2、以及—移轉室13 矛壬至11内設詈古、4衣 又置有贿個晶圓載盤lu與一漱射清潔襄置 〔未頒不）。移 積製程室12之間躲侧㈣製程室11與複數個沉 ，亦即，移轉室13係連接蝕刻製程室u M329237 與複數個沉積製程室12，用以移轉蝕刻製程室11與複數 個沉積製程室12内之複數個晶圓（未顯示）。舉例而言，移 轉室13係根據一移轉路線以移轉蝕刻製程室11與複數個 沉積製程室12内之複數個晶圓，其中，移轉路線可為一圓 周，而移轉室13係設於此圓周之中心位置，而蝕刻製程室 11與複數個沉積製程室12則設於此圓周之外緣位置。— • 其中，在蝕刻製程後，複數個晶圓上經常會產生接觸 ' 洞（contact hole，未顯示）或介層洞（via hole，未顯示）等結 > 構，以便於後續半導體製程中線路之連接。若捨電漿清洗 方式而採藏射清潔方式，其特色在於清潔度好但速度較 慢，濺射清潔裝置係具有提供氬氣濺擊粒子功能之濺射清 潔裝置，對於接觸洞與介層洞此氬氣濺擊粒子具有高品質 的清潔效果。然而，氬氣濺射清潔之速度較慢，故需改善 其清潔速度慢之缺點，本發明提供之方式係在蝕刻製程室 _ 11中設置複數個晶圓載盤111，以同時對複數個晶圓進行 氬氣濺射清潔，以择高製程效率。其中，晶圓載盤111之 數目可視需要而定，例如係根據蝕刻製程室11之大小而 定，其數目較佳的係至少兩個或以上，以蝕刻製程室11之 大小為限，且只要能達到提高製程清潔效率之目的即可。 進一步，複數個沉積製程室12之數量須對應於複數個晶圓 載盤111之數量（例如第1圖中顯示三個晶圓載盤111，而 M329237 沉積製程室12之數量亦為三個），才能達到提高整體製程 效率之功效。 其中，複數個沉積製程室可為物理氣相沉積室或化學 ^ 氣相沉積室；此外亦可能為進行金凸塊或鉛錫凸塊封裝之製程 -- 室，而所述濺射清潔裝置可在晶圓接受金凸塊或鉛錫凸塊封 • 裝前，用於清潔晶圓表面，使凸塊附著更強。 . 雖然本創作已以較佳實施例揭露如上，然其並非用以 限定本創作，任何熟習此技藝者，在不脫離本創作之精神 φ 和範圍内，當可作些許之更動與潤飾，例如變更晶圓載盤 或變更沉積製程室之數量。因此本創作之保護範圍當視後 附之申請專利範圍所界定者為準。 M329237 【圖式簡單說明】 第1圖係根據本發明之一實施例，一種半導體機台之改 良機構示意圖。 【主要元件符號說明】 10:半導體機台之改良機構； 11:蝕刻製程室； 111:複數個晶圓載盤； 12:複數個沉積製程室； 13:移轉室。In general, after a semiconductor process is performed to create a via hole or a contact hole, a polymer residue is often left in the hole, and such residue may affect subsequent deposition. The quality of the process must be removed by cleaning. Commonly used cleaning methods are plasma clean and argon sputter cleaning (Arg〇n SpU廿er ciean). The principle of plasma cleaning is to use the sprayed plasma and the residue in the hole. Northern contact or physical changes occur after contact, so as to clean the inner surface of the hole. The characteristics of plasma cleaning are fast but poor cleanliness. The principle of argon _ cleaning is that the argon particles are separated from the argon particles, and the wafer is bombarded to remove the residue. The feature is that the cleanliness is good but the speed is slow. The industry's demand for production efficiency is based on multi-system (four) cleaning methods. "Because of the poor cleanliness of electrical cleaning, the yield of subsequent deposition processes will be seriously reduced by the poor cleanliness of plasma cleaning. Therefore, how to balance cleaning quality and speed has become one of the important keys of semiconductor manufacturing. M329237 [New Content] #Multiple crystals in the semiconductor machine|The improvement of the engine station is here. The purpose of this creation is to improve the mechanism, especially regarding the configuration of the _ dream round carrier to enhance _ cleaning efficiency: According to the creation 'providing a semiconductor including - a residual process chamber, a plurality of deposition process chambers" i mechanism, wherein the etching process chamber has a plurality of wafer carriers and - sputtering: and ~ transfer chamber. The chamber is set in the process chamber and a plurality of deposition devices. The transfer is between the transfer process chamber and the plurality of deposition process chambers T and is used to make a plurality of wafers for the semiconductor machine. In this domain, the refractory chamber is turned up to the efficiencies of the radiant cleaning efficiency configuration 'Da Li' + conductor process efficiency. [Embodiment] The following is a detailed description of the present application. ^1Fig. 1 'Fig. 1 is a schematic diagram of an improved mechanism 10 provided according to the present invention, including a lagoon, a plurality of deposition processes t12, and a transfer chamber 13 spears to 11 In the ancient and the four clothes, there is a bribe wafer carrier and a cleaning device (not issued). The migration process chamber 12 hides the side (4) the process chamber 11 and a plurality of sinks, that is, the transfer room The 13 series is connected to the etching process chamber u M329237 and the plurality of deposition processing chambers 12 for transferring a plurality of wafers (not shown) in the etching process chamber 11 and the plurality of deposition processing chambers 12. For example, the transfer chamber 13 According to a transfer route, the plurality of wafers in the etching process chamber 11 and the plurality of deposition processing chambers 12 are transferred, wherein the transfer route can be a circumference, and the transfer chamber 13 is disposed at the center of the circumference. And etching the processing chamber 11 and the plurality of deposition processing chambers 12 The outer edge of the circumference.— • Where, after the etching process, a contact hole (not shown) or a via hole (not shown) is often formed on a plurality of wafers. In order to facilitate the connection of the lines in the subsequent semiconductor process. If the plasma cleaning method is adopted, the cleaning method is characterized in that the cleanliness is good but the speed is slow, and the sputter cleaning device has the function of providing argon splash particles. The sputter cleaning device has high quality cleaning effect on the argon splash particles for the contact hole and the via hole. However, the argon gas sputtering cleaning speed is slow, so it is required to improve the shortcoming of the cleaning speed, and the present invention provides The method is to set a plurality of wafer carriers 111 in the etching process chamber 11 to simultaneously perform argon sputtering cleaning on a plurality of wafers to select process efficiency. The number of wafer carriers 111 may be determined according to requirements. For example, depending on the size of the etching process chamber 11, the number is preferably at least two or more, limited to the size of the etching process chamber 11, and as long as the process cleaning efficiency can be improved. Further, the number of the plurality of deposition processing chambers 12 must correspond to the number of the plurality of wafer carriers 111 (for example, three wafer carriers 111 are shown in FIG. 1, and the number of the M329237 deposition processing chambers 12 is also three. In order to improve the overall process efficiency, a plurality of deposition process chambers may be physical vapor deposition chambers or chemical vapor deposition chambers; and may also be a process for gold bump or lead tin bump packaging. a chamber, and the sputter cleaning device can be used to clean the surface of the wafer before the wafer is subjected to gold bumps or lead-tin bumps to make the bumps stronger. The preferred embodiment is disclosed above, but it is not intended to limit the present invention. Anyone skilled in the art can make some changes and refinements, such as changing the wafer carrier or changing the deposition, without departing from the spirit and scope of the present invention. The number of process chambers. Therefore, the scope of protection of this creation is subject to the definition of the scope of the patent application. M329237 [Simple Description of the Drawings] Fig. 1 is a schematic view showing a modified mechanism of a semiconductor machine in accordance with an embodiment of the present invention. [Main component symbol description] 10: Improved mechanism of semiconductor machine; 11: etching process chamber; 111: plural wafer carriers; 12: plural deposition process chambers; 13: transfer chamber.