M319583 八、新型說明： 【新型所屬之技術領域】 本創作係有關於-種切換式磁阻馬達智慧型驅動裝置，尤指一種以 類神經網職射之小迦彻並結合灰到理論綠計的馬達 驅動裝置。 【先前技術】 對工業界而言，建立—高性能雜馬達軸裝置是相當重要的，一 般來說，高性能雖馬達卿裝置必須具備優異触態速度追縱以及 負載變動響應，這些性能的達成除了必須對裝置參數的變化不靈敏， 還必須對外部負載的擾動具有強健性。 磁阻馬達驅動系統中，繞組的電阻、轉動慣量、摩擦係數以聽合 負載的各種外部參數皆難以精確獲得。受控系統參數資訊不足，將造 成控制器設計日杨_，再加上稱的雜性特性以及轉矩與激磁電 流之間的雜性_ ’使得磁阻騎在控制上相當不容易。 β -般常㈣PI控制器軸可以解決控㈣統中大多數的問題，但 夕面對刀換式雖馬達驅動系統時，ΡΙ控彻參數麟定需要花費更 夕時間來克服其系統資訊不足以及非線性問題。此外，傳統PI控制器 邊設計過程，往往需針對系統採取合理的假設忽略以及線性化的動 、"^數在裝置運轉雜是無法變更的，控彻參數無賴命令變 =衣兄的改1而自我㈣’導致於面對高度非線性或複雜的受控裝 才/、控概月b的表現並不容易達到要求，造成許多控制上的困擾。 M319583 【新型内容】 七刀換式磁阻馬達(Switched Reluctance Motor)，其高度的非線性磁 、路紐’造成PI控制器的參數設計困難。JL PI控制器的性能只維持 .在-k為狹窄的控速範圍内，導致馬達在變轉速命令條件應用上失去 k勢。再者’導人南等控制學理冗長的數學分析過程，使得控制器在 。又计架構上的精簡程度失去競爭力，往往無法輕易滿足所要求的控制 •系統規格。因此，本創作提出一具線上調適參數能力之pi控制器，以 克服切換式磁阻馬達控制器參數設計上的困難，並且在控制器設計中 導入灰色預測理論，使得所設計之控制器不但擁有線上調適參數的能 力，更能具備預測系統響應走勢，提前控制加以補償之特性。 本創作主要包括括一運算處理裝置，一控制器裝置，一轉換裝置， 一偵測裝置，一保護裝置，及一驅動裝置。其中控制器裝置是用類神 •經網路技術中的小腦模型控制器（Cerebellar Model ArtieUlati〇n • C〇ntr〇ller，CMAC)以及灰色預測理論(gray prediction theory)來進行設 計，並結合投影演算法(projection algorithm)，提出具線上參數即時調 適功能的新型灰色小腦模型PI控制器（Gray_Cerebdlar M〇dd Articulation PI Controller，Gray_CMAPIC)，此控制架構皆能直接取代主 控制器’降低系統複雜度，更可避免控制器設計過程中之複雜的系統 建模與數學分析，增加硬體實現的經濟價值，並確保控制器具高性能 的表現。 7 M319583 本創作具有下列功效： 1·將投影演算法結合CMAC以及灰色預測模型設計控制器，在面 對高度非線性受控體時，控制器性能優異。 2·導入灰色預測理論，使得所設計之控制器不但擁有線上調適參 數的能力’更能具備預測系統響應走勢，提前控制加以補償之特 性。 3·以相同控制器參數進行實驗，採本文之控制策略在寬廣的速度 命令範圍内，其控制器性能皆相當優異。 4·所提出之控制策略皆具結構精簡，性能優異的特色，適合運用 積體電路實現。 【實施方式】 本創作係有關於一種以類神經網路技術中的小腦模型控制器以 籲及灰色預測理論來設計的切換式磁阻馬達驅動裝置，其一之態樣如第 1圖所示，主要係包括運算處理裝置(11)，控制器裝置(12)，轉換裝置 (13)，偵測裝置(14)，保護裝置(15)，及驅動裝置(16)構成，其中：運 异處理裝置(11)與控制器裝置(12)係由數位訊號處理器(DigitalM319583 VIII. New description: [New technology field] This creation department has a kind of intelligent drive device for switched reluctance motor, especially a kind of small carcher with a neural network and combined with gray to the theoretical green meter. Motor drive unit. [Prior Art] For the industry, it is very important to establish a high-performance hybrid motor shaft device. Generally speaking, high performance, although the motorized device must have excellent contact speed tracking and load fluctuation response, these performances are achieved. In addition to being insensitive to changes in device parameters, it must also be robust to disturbances from external loads. In the reluctance motor drive system, the resistance, moment of inertia, and friction coefficient of the winding are difficult to accurately obtain by various external parameters of the hearing load. Insufficient information on the parameters of the controlled system will result in a controller design, _, coupled with the so-called hybrid characteristics and the _ _ ' between the torque and the excitation current making the reluctance ride difficult to control. The β-normal (four) PI controller axis can solve most of the problems in the control system. However, when the motor-driven system is used in the face-changing mode, it takes more time to overcome the lack of system information. Nonlinear problem. In addition, the traditional PI controller side design process often needs to take reasonable assumptions for the system to ignore and linearize the movement, "^ number in the device operation can not be changed, control the parameter rogue command change = clothing brother changed 1 The self (four)' leads to the performance of highly nonlinear or complex controlled installations, and the performance of the control month b is not easy to meet the requirements, causing many control problems. M319583 [New content] The Switched Reluctance Motor has a high degree of nonlinear magnetic and road conditions, which makes it difficult to design the parameters of the PI controller. The performance of the JL PI controller is only maintained. In the narrow speed range of -k, the motor loses the k potential in the variable speed command condition application. Furthermore, the guidance of the south of the control theory is a lengthy mathematical analysis process that makes the controller. In addition, the degree of simplification of the architecture is uncompetitive and often cannot easily meet the required control system specifications. Therefore, this creation proposes a pi controller with on-line tuning parameters to overcome the difficulty in designing the parameters of the switched reluctance motor controller, and introduces the gray prediction theory into the controller design, so that the designed controller not only has The ability to adjust parameters on the line is more capable of predicting the response of the system and controlling it in advance. The creation mainly includes an arithmetic processing device, a controller device, a conversion device, a detecting device, a protection device, and a driving device. The controller device is designed with the Cerebellar Model ArtieUlati〇n • C〇ntr〇ller (CMAC) and gray prediction theory in the network technology, combined with projection. The algorithm (projection algorithm) proposes a new gray cerebellar model PI controller (Gray_Cerebdlar M〇dd Articulation PI Controller, Gray_CMAPIC) with on-line parameter adjustment function. This control architecture can directly replace the main controller to reduce system complexity. It can avoid complicated system modeling and mathematical analysis in the controller design process, increase the economic value of hardware implementation, and ensure the performance of the controller with high performance. 7 M319583 This creation has the following functions: 1. Combine the projection algorithm with CMAC and the gray prediction model design controller. When facing a highly nonlinear controlled body, the controller has excellent performance. 2. Introduce the gray prediction theory, so that the designed controller not only has the ability to adjust the parameters online, but also has the characteristics of predicting the response of the system and controlling it in advance. 3. Experiment with the same controller parameters. The control strategy of this paper is excellent in the controller performance under a wide range of speed commands. 4. The proposed control strategy has the characteristics of streamlined structure and excellent performance, which is suitable for implementation with integrated circuits. [Embodiment] The present invention relates to a switched reluctance motor driving device designed by a cerebellar model controller in a neural network-like technique and appealing to a gray prediction theory, and the aspect thereof is as shown in FIG. Mainly comprising an arithmetic processing device (11), a controller device (12), a conversion device (13), a detecting device (14), a protection device (15), and a driving device (16), wherein: the different processing The device (11) and the controller device (12) are digital signal processors (Digital
SignalSignal
Processing，DSP)實現，其中運算處理裝置(11)主要作為將匯流排回傳 之各式訊號處理後，再供給控制器裝置運算進而產生適當的控制量。 控制裔裝置(12) ’係由小腦模型控制器以及灰色預測模型所組成， 其用以將欲驅動的馬達的性能和效率提昇，當輸入於運算處理裝置(u) 8 M319583 的資料運算之後，會送到控制器裝置(12)進行處理，然後再透過匯流 排’傳到轉換裝置(13)，其中小腦模型控制器CMAC的基本觀念是將 所學習到的資訊，有系統的儲存在部分重疊的區域之内，這些資料可 以很谷易的被回想(recane(j)且在高雜訊或不完全訊號輸入的狀況下， 利用本身的區域推廣能力來還原原始的輸入訊號。 小腦模型控制器屬於聯想記憶類神經網路架構，其基本架構如圖2 所示’包含狀態變數層S(state variable)、聯想記憶體層A (association _ memory)、實體記憶體層w(actualmem〇fy)。運作原理分為回想階段(亦 稱輸出階段)及學習階段，其中回想階段是將問題域裡的學習樣本 (learning sample)量化成„個離散輸入狀態心&义，用以決定輸入之學 習樣本所對應的聯想記憶體，量化程度攸關對學習樣本的解析能力。 每個輸入狀悲對應聯想記憶體層内的一組聯想記憶體，聯想記憶體扮 廣狀悲的映射指則色，並映射不同狀態輸人時實體記紐層内的權 重(welght)，最後將實體記憶體權重加總得到實際輸出，即完成回想階 _段。以圖2為例，每組聯想記憶體映射三個真實記憶體，且彳目鄰輸入 狀態經聯想記麵映射的實體記讎有兩個重疊，因此真實記憶體總 數所為《+2個，實體記憶體數會隨量化程度及實體記麵重疊數量而 增減i由於CMAC具有區域推廣(generalizati〇n)的特性，故相^ 入狀恶至少需有-個以上重疊的實體記髓。記髓權重初值採給定 初值的方式’至於學習P自b段是以絲的方絲修正誤差，在學習階段 裡將輸出與目標值(desired ou_)相減獲得誤差(咖)後，經學習演算 法來平均分配修正回想階段所映射到的實體記憶體内容，如此即絲 9 M319583 該學習樣本的CMAC學習階段，完整的CMAC運作行為即是反覆的 執行回想階段和學習階段，將所有學習樣本學習修正過後即完成—次 CMAC的學習週期，最後計算學習誤差是否容忍，再決定是否執行下 一次的學習週期。 / 上述的運作除了增加系統複雜度之外，若受控體本身為極度非線 性系統時，此時CMAC則需具備相當高解析的能力才能使其輸出能更 符合相對應的非線性系統的反函數，如此亦產生記憶體使用量過多的 參問題，因此本創作提出一具線上修正能力的新型灰色小腦模型PI控制 器(Gray-Cerebellar Model Articulation Π controller，Gray_CMAPIC)。植 入Gray-CMAPIC之控制系統架構如圖3所示，此種架構主要是利用 灰色預測模型對系統響應進行預測，再透過此預測值對系統之未來響 應進行適當的補償，使所設計之控制器具有預測系統響應走勢，提前 控制加以補償之特性。 至於植入投影演算法的小腦模型控制器（Cerebdlar M〇dd • Articulation I>I controller，CMAPIC)，則是將Pi控制器參數心和先置入 CMAC巾兩個大小維度均相同的實際記憶體内，再以投影演算法來完 成貫體德體權重修正的動作。所設計的CMApic如圖4所示，此架 構下谷和毛即時依系統誤差進行調適，CMApic在面對各種速度誤差 輸入時’可運用已學習過的記憶體内容％和先），來立即獲得相對應的 控制律’因此CMAPIC除了具備精簡控制架構的優點外，亦可在較少 數置的記紐條件下獲得優異的㈣律輸出。 轉換裝置(13)，其肋將控繼裝置(12)處理後的資訊經過轉換 M319583 後，能讓偵測及驅動裝置可以接受的型態。 偵測裝置(14)，係由電流偵測電路所組成，其用以彳貞測馬達電流是 否異常，採用霍爾元件量測實際電流。考慮受控體的額定電流，採用 的元件為LEM公司生產型號為HAS-50S的霍爾感測器(hall sensor)， 其規格為50A電流轉換成±4V電壓的線性比例感測元件。由於所採用 之DSP硬體介面的類比/數位介面電壓等級為±1〇v，因此霍爾元件减 測後轉換出的電壓配合控制平台的類比/數位輸入介面，需經2·5倍的 _增益放大，並加入低通濾波器來濾除電流訊號雜訊，所設計的電流量 測電路如圖5所示。 保護裝置(15)，係由電流保護裝置所組成，其用以保護驅動裝置， 若有異常則不動作，如圖6所示，該電路與電流量測電路同步接收霍 爾元件感測的電壓虎’並利用參考電位(reference voltage)的變化來設 定所感測出的電壓訊號是否超過設定的容許範圍，若偵測出電壓訊號 過大，則輸出訊號與驅動電路保護訊號接腳相連將使驅動電路失去功 • 月b ’其中馬達逛透過編碼器將位址資訊傳回到保護裝置。 •辱ε動裝置(16) ’其用以將欲驅動的馬達運作，如圖7所示，電路 的動作顧為：當縣PWM訊縣高躲Q2導通且倾域為低電 位時，電流經由R3、D1及HCPL-3120的第2和3號接腳内的二極體 形成回路，將7號接腳電位升至8號接腳電位，此時絕緣閘雙極性電 晶體(Insulated Gate Bipolar Transistor, IGBT)閘級與射級間產生正丨5伏 特電位差而導通。當電壓PWM訊號為低電位Q2截止且保護訊號為低 電位時，電流無法形成回路，並將6號接腳電位降至5號接腳電位， 11 M319583 騰閑級與射級間產生負15伏特的電位差而截止，當保護訊號為高 電位時，將使D1截止，使霍爾感測器(HCpL_312〇)第2和3號接腳間 電流路徑斷路而暫停驅動電路功能。 【圖式簡單說明】 第1圖係本創作之系統方塊圖 第2圖係本創作之CMAC架構圖 第3圖係本創作之Gray-CMAPIC控制系統架構圖 第4圖係本創作於投影演算法之CMAPIC架構 第5圖係本創作之電流偵測電路圖 第6圖係本創作之電流保護電路圖 第7圖係本創作之驅動電路圖 12 M319583 【主要元件符號說明】 (11) 運算處理裝置 (12) 控制器裝置 ' (13)轉換裝置 ' (14)偵測裝置 (15) 保護裝置 (16) 驅動裝置 φ (21)學習演算法 (22) 實際輸出 (23) 誤差 (24) 期望輸出 (31) 小腦模型PI控制器(CMAPIC) (32) 灰色預測模型 ， （33)授控裝置 參 （41)投影演算法 (42)合成輸出 (51) 霍爾感測器 (52) 低通濾波器 (61)保護訊號 (71) 絕緣閘雙極性電晶體 (72) 霍爾元件 (73) 保護信號 13 M319583 (74) PWM信號 S(H4):狀態變數層 A ( …办，"2，· · ·瓜，《 + 2 ) ·聯想 §己憶體 wu， W2 * * * ^n+2 5 * * * ^kp, « + 2 5 Wki,\ · * * Wki, n + 2 I真實記憶體層 I^Proportional Integral):比例積分 CMAC:小腦模型控制器 少ft):神經網路輸出值或函數輸出值 /闪：目標值 1/(幻：A時刻的輸出控制律 e(A：): A：時刻的回授誤差 電流控制器比例增益 ’ 知電流控制器積分增益Processing, DSP) is realized, in which the arithmetic processing device (11) is mainly processed as various signals for returning the bus, and then supplied to the controller device for calculation to generate an appropriate control amount. The control device (12) is composed of a cerebellar model controller and a gray prediction model for improving the performance and efficiency of the motor to be driven, and after inputting the data operation of the arithmetic processing device (u) 8 M319583, It will be sent to the controller device (12) for processing, and then transmitted to the conversion device (13) through the busbar. The basic concept of the cerebellar model controller CMAC is to systematically store the learned information in partial overlap. Within the region, this information can be recalled (recane(j) and use its own regional promotion capabilities to restore the original input signal in the case of high noise or incomplete signal input. Cerebellar model controller It belongs to the associative memory neural network architecture, and its basic architecture is shown in Figure 2, which includes the state variable S, the association memory A, and the physical memory layer w (actualmem〇fy). Divided into a recall phase (also known as an output phase) and a learning phase, in which the recall phase quantizes the learning sample in the problem domain into a discrete input state. & meaning, used to determine the associative memory corresponding to the input learning sample, the degree of quantification is related to the analytical ability of the learning sample. Each input sorrow corresponds to a set of associative memory within the associative memory layer, associative memory The sorrowful mapping refers to the color of the indicator, and maps the weights in the entity's key layer when different states are input. Finally, the weight of the physical memory is added to get the actual output, that is, the recall stage is completed. For example, each group of associative memory maps three real memories, and there are two overlaps in the entity records recorded by the association face mapping, so the total number of real memories is "+2, the number of physical memory will be Increase or decrease with the degree of quantification and the number of overlaps in physical records. Since CMAC has the characteristics of regional generalization, at least one or more overlapping entities must be remembered. The way to give the initial value 'As for learning P from the b segment is the square wire correction error, in the learning phase, the output is subtracted from the target value (desired ou_) to obtain the error (coffee), and then averaged by the learning algorithm. Minute Correct the content of the physical memory mapped to the recall stage. Thus, the MMAC operation phase of the learning sample, the complete CMAC operation behavior is the repeated execution recall phase and the learning phase, and all learning sample learning is corrected and completed. - The learning cycle of the secondary CMAC, and finally calculate whether the learning error is tolerated, and then decide whether to execute the next learning cycle. / In addition to increasing the complexity of the system, if the controlled body itself is an extremely nonlinear system, then CMAC needs to have a fairly high resolution ability to make its output more in line with the inverse function of the corresponding nonlinear system, which also causes a problem of excessive memory usage. Therefore, this creation proposes a new gray with online correction capability. Gray-Cerebellar Model Articulation Π controller, Gray_CMAPIC. The control system architecture of the Gray-CMAPIC is shown in Figure 3. This architecture mainly uses the gray prediction model to predict the system response, and then uses the predicted value to properly compensate the future response of the system to make the designed control. The device has the characteristics of predicting the response of the system and controlling it in advance. As for the cerebellar model controller (Cerebdlar M〇dd • Articulation I>I controller, CCMAC) implanted with the projection algorithm, the physical parameters of the Pi controller parameters and the first two dimensions of the CMAC towel are the same. Then, the projection algorithm is used to complete the action of the body weight correction. The designed CMApic is shown in Figure 4. Under this architecture, the valley and the wool are adjusted according to the system error. CMApic can use the learned memory content % and first in the face of various speed error inputs to get the phase immediately. Corresponding control law' Therefore, in addition to the advantages of the streamlined control architecture, CMIPC can also obtain excellent (four) law output under a few counts. The conversion device (13) has a rib that allows the information processed by the control device (12) to be converted to M319583 to enable the detection and drive device to accept the type. The detecting device (14) is composed of a current detecting circuit for detecting whether the motor current is abnormal or not, and measuring the actual current by using a Hall element. Considering the rated current of the controlled body, the component used is LEM's Hall sensor model HAS-50S, which is a linear proportional sensing element with a 50A current converted to ±4V. Since the analog/digital interface voltage level of the DSP hardware interface used is ±1〇v, the voltage converted by the Hall element after subtraction is matched with the analog/digital input interface of the control platform, which is required to be 2.5 times _ The gain is amplified and a low-pass filter is added to filter out the current signal noise. The current measurement circuit is shown in Figure 5. The protection device (15) is composed of a current protection device, which is used to protect the driving device, and does not operate if there is an abnormality. As shown in FIG. 6, the circuit and the current measuring circuit synchronously receive the voltage sensed by the Hall element. The tiger's use the reference voltage to set whether the sensed voltage signal exceeds the set allowable range. If the detected voltage signal is too large, the output signal is connected to the drive circuit protection signal pin to make the drive circuit. Lost work • Month b 'where the motor walks through the encoder to transfer the address information back to the protection device. • Insulting device (16) 'It is used to operate the motor to be driven, as shown in Figure 7, the action of the circuit is: when the county PWM County is high, the Q2 is turned on and the tilting domain is low, the current is passed. The diodes in pins 2 and 3 of R3, D1 and HCPL-3120 form a loop, and the potential of pin 7 is raised to the pin potential of pin 8. At this time, the insulated gate bipolar transistor (Insulated Gate Bipolar Transistor) , IGBT) Between the gate level and the emitter stage produces a positive 5 volt potential difference and conducts. When the voltage PWM signal is low and Q2 is off and the protection signal is low, the current cannot form a loop, and the potential of pin 6 is reduced to the pin potential of pin 5. 11 M319583 produces a negative 15 volt between the idle stage and the emitter stage. The potential difference is cut off. When the protection signal is high, D1 is turned off, and the current path between the pins 2 and 3 of the Hall sensor (HCpL_312〇) is broken to suspend the drive circuit function. [Simple diagram of the diagram] The first diagram is the system block diagram of the creation. The second diagram is the CMAC architecture diagram of the creation. The third diagram is the Gray-CMAPIC control system architecture diagram of the creation. The fourth diagram is the projection algorithm. Figure 5 of the CAPIPC architecture is the current detection circuit diagram of the present invention. Figure 6 is the current protection circuit diagram of the creation. Figure 7 is the driving circuit of the creation. Figure 12 M319583 [Description of main components] (11) Operation processing device (12) Controller device '(13) Conversion device' (14) Detection device (15) Protection device (16) Drive device φ (21) Learning algorithm (22) Actual output (23) Error (24) Expected output (31) Cerebellar model PI controller (CMAPIC) (32) Grey prediction model, (33) Control device reference (41) Projection algorithm (42) Synthesis output (51) Hall sensor (52) Low-pass filter (61) ) Protection signal (71) Insulated gate bipolar transistor (72) Hall element (73) Protection signal 13 M319583 (74) PWM signal S (H4): State variable layer A (..., "2,· · · Melon, "+ 2" · Lenovo § Remembrance wu, W2 * * * ^n+2 5 * * * ^kp, « + 2 5 Wki, \ · * * Wki, n + 2 I Real memory layer I^Proportional Integral): Proportional integral CMAC: Cerebellar model controller less ft): Neural network output value or function output value / flash: Target value 1 (Fantasy: Output control law e at time A ( A:): A: Time feedback error current controller proportional gain ' Know current controller integral gain