TWI718677B - Data sensing device and data sensing method thereof - Google Patents

Data sensing device and data sensing method thereof Download PDF

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TWI718677B
TWI718677B TW108134322A TW108134322A TWI718677B TW I718677 B TWI718677 B TW I718677B TW 108134322 A TW108134322 A TW 108134322A TW 108134322 A TW108134322 A TW 108134322A TW I718677 B TWI718677 B TW I718677B
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memory cells
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TW202113688A (en
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魏旻良
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旺宏電子股份有限公司
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Abstract

A data sensing device and a data sensing method thereof are provided. The data sensing device includes a compensation signal generator, a weighting operator and an arithmetic operator. The compensation signal generator receives a basic input signal and a plurality of reference weighting values, and generates a compensation signal according to the basic input signal and the reference weighting values. The weighting operator has a plurality of memory cells, performs writing operation on the memory cells according to the weighting values based on an address information, and the weighting operator generates an output signal by the memory cells by receiving a plurality of input signals. The arithmetic operator performs an arithmetic operator on the output signal and the compensation signal to generate a compensated output signal.

Description

資料感測裝置及其資料感測方法Data sensing device and data sensing method

本發明是有關於一種資料感測裝置及其資料感測方法,且特別是有關於一種能實現負數輸入且適用於類神經網路運算的資料感測裝置及其資料感測方法。The present invention relates to a data sensing device and a data sensing method thereof, and more particularly to a data sensing device and a data sensing method that can realize negative number input and is suitable for neural network-like operations.

隨著電子技術的演進,人工智慧技術逐漸成為一種主流。而類神經網路更是執行人工智慧演算的一個重要方式。With the evolution of electronic technology, artificial intelligence technology has gradually become a mainstream. And the similar neural network is an important way to perform artificial intelligence calculations.

類神經網路需伴隨大量的運算,在習知的技術領域中,常透過數位電路或高階的處理器來執行類神經網路的運算。這樣的做法需要相對高的硬體成本,且也需要耗去相對高的功率來執行運算動作。對應於此,習知技術透過非揮發性記憶體來執行類神經網路運算,可有效減小電路面積,並降低所需的功耗。Neural network-like networks need to be accompanied by a large number of operations. In the conventional technical field, digital circuits or high-end processors are often used to perform neural network-like operations. Such an approach requires relatively high hardware costs, and also requires relatively high power consumption to perform computing operations. Corresponding to this, the conventional technology uses non-volatile memory to perform neural network-like operations, which can effectively reduce the circuit area and reduce the required power consumption.

在習知的技術領域中,透過非揮發性記憶體中的記憶胞的轉導值(transconductance),可提供作為類神經網路中的權重。再透過記憶胞所接收的輸入信號,與記憶胞的轉導值的乘積,可實現類神經網路的運算動作。In the conventional technical field, the transconductance of a memory cell in a non-volatile memory can be used as a weight in a neural network. Through the product of the input signal received by the memory cell and the transduction value of the memory cell, a neural network-like arithmetic operation can be realized.

然而在實際的應用中,類神經網路的運算動作常具有負值的輸入信號。在硬體架構上,為實現具有負值的輸入信號,需要將該輸入信號以兩個數值相減來表示,例如第一數值減第二數值,運算時,先後將第一數值與第二數值作為類神經網路的輸入,並將第二次的輸出乘上負號後加上第一次的輸出,以此方法實現含負數的類神經網路運算會提高兩倍的運算量,提升實施上的困難度,且造成電路成本的增加。However, in practical applications, the arithmetic actions of similar neural networks often have negative input signals. In the hardware architecture, in order to realize an input signal with a negative value, the input signal needs to be expressed by subtracting two values, for example, the first value minus the second value. When calculating, the first value and the second value are successively As the input of the neural network, the second output is multiplied by the negative sign and then the first output is added. In this way, the neural network operation with negative numbers will increase the amount of calculation twice and improve the implementation. The difficulty of the above, and cause the increase of the circuit cost.

本發明提供一種資料感測裝置以及資料感測方法,用以實現具有負值輸入信號的類神經網路運算。The invention provides a data sensing device and a data sensing method, which are used for realizing a neural network-like operation with a negative input signal.

本發明的資料感測裝置包括補償信號產生器、權重運算器以及算術運算器。補償信號產生器接收基準輸入信號以及多個參考權重值,依據基準輸入信號以及參考權重值以產生補償信號。權重運算器具有多個記憶胞,權重運算器基於位址資訊,對記憶胞以依據多個權重值進行寫入動作,權重運算器並使記憶胞接收多個輸入信號以產生輸出信號。算術運算器耦接補償信號產生器以及權重運算器,使輸出信號與補償信號進行運算以產生補償後輸出信號。The data sensing device of the present invention includes a compensation signal generator, a weighting operator and an arithmetic operator. The compensation signal generator receives a reference input signal and a plurality of reference weight values, and generates a compensation signal according to the reference input signal and the reference weight value. The weight calculator has a plurality of memory cells, the weight calculator writes the memory cells according to multiple weight values based on the address information, and the weight calculator allows the memory cells to receive a plurality of input signals to generate output signals. The arithmetic operation unit is coupled to the compensation signal generator and the weight operation unit, and operates the output signal and the compensation signal to generate a compensated output signal.

本發明的資料感測方法包括:提供補償信號產生器以接收基準輸入信號以及多個參考權重值,依據該基準輸入信號以及參考權重值以產生補償信號;提供權重運算器,基於位址資訊,對權重運算器中的多個記憶胞以依據多個權重值進行寫入動作,並使記憶胞接收多個輸入信號以產生輸出信號;以及,提供算術運算器以使輸出信號與補償信號進行運算以產生補償後輸出信號。The data sensing method of the present invention includes: providing a compensation signal generator to receive a reference input signal and a plurality of reference weight values, and generating a compensation signal based on the reference input signal and the reference weight value; providing a weight calculator, based on address information, Perform write operations on multiple memory cells in the weight calculator based on multiple weight values, and make the memory cells receive multiple input signals to generate output signals; and provide an arithmetic calculator to perform calculations on the output signal and the compensation signal To generate the output signal after compensation.

基於上述,本發明透過補償信號產生器以計算補償信號,透過計算偏移至正值信號的輸入信號以產生輸出信號,再透過使輸出信號以及補償信號進行運算來產生可能具有負值信號的輸入信號的補償後輸出信號。在簡單的硬體架構下,實現具有負值輸入信號的類神經網路運算。Based on the above, the present invention uses a compensation signal generator to calculate a compensation signal, calculates an input signal offset to a positive signal to generate an output signal, and then generates an input that may have a negative signal by performing calculations on the output signal and the compensation signal. The signal is output after the signal is compensated. Under a simple hardware architecture, neural network-like operations with negative input signals are realized.

為讓本發明的上述特徵和優點能更明顯易懂,下文特舉實施例,並配合所附圖式作詳細說明如下。In order to make the above-mentioned features and advantages of the present invention more comprehensible, the following specific embodiments are described in detail in conjunction with the accompanying drawings.

請參照圖1,圖1繪示本發明一實施例的資料感測裝置的示意圖。資料感測裝置100包括補償信號產生器110、權重運算器120以及算術運算器130。補償信號產生器110接收基準輸入信號V base以及多個參考權重值WR。補償信號產生器110依據基準輸入信號V base以及參考權重值WR以產生補償信號CV。細節上來說明,補償信號產生器110可計算參考權重值WR的參考權重總和,並使參考權重總和與基準輸入信號V base相乘以獲得補償信號CV。在本發明其他實施例中,補償信號產生器110也可以是一個資料儲存元件,補償信號CV可在補償信號產生器110外部進行計算,並存入補償信號產生器110中。 Please refer to FIG. 1. FIG. 1 is a schematic diagram of a data sensing device according to an embodiment of the present invention. The data sensing device 100 includes a compensation signal generator 110, a weight operator 120 and an arithmetic operator 130. The compensation signal generator 110 receives a reference input signal V base and a plurality of reference weight values WR. The compensation signal generator 110 generates the compensation signal CV according to the reference input signal V base and the reference weight value WR. In detail, the compensation signal generator 110 may calculate the reference weight sum of the reference weight value WR, and multiply the reference weight sum by the reference input signal V base to obtain the compensation signal CV. In other embodiments of the present invention, the compensation signal generator 110 may also be a data storage device, and the compensation signal CV may be calculated outside the compensation signal generator 110 and stored in the compensation signal generator 110.

在另一方面,在本發明實施例中,權重運算器120接收位址資訊ADD以及多個權重值W 1~W M。權重運算器120中可具有多個非揮發性的記憶胞,權重運算器120並可基於位址資訊ADD,依據權重值W 1~W M來對非揮發性的記憶胞進行寫入動作。其中,完成寫入動作後的非揮發性記憶胞的轉導值,為分別依據權重值W 1~W M來設定,例如權重值W 1~W M可以為分別對應的轉導值的A倍,A可以為任意實數。此外,權重運算器120另接收輸入信號V 1~V N,並使輸入信號V 1~V N分別被施加至多個非揮發性的記憶胞中,並據以產生輸出信號OUT。在此請注意,在當類神經網路具有負值的輸入信號後,可針對所有的輸入信號,依據基準輸入信號V base執行一偏移動作,以使偏移後的輸入信號V 1~V N全部均為正值的信號。如此一來,權重運算器120可依據輸入信號V 1~V N,有效執行類神經網路運算,並產生輸出信號OUT。在此請注意,權重值W 1~W M的總和,等於參考權重值WR的參考權重值總和。 On the other hand, in the embodiment of the present invention, the weight calculator 120 receives address information ADD and a plurality of weight values W 1 ˜W M. The weight calculator 120 may have a plurality of non-volatile memory cells, and the weight calculator 120 may perform write operations on the non-volatile memory cells based on the address information ADD according to the weight values W 1 ˜W M. Among them, the transduction value of the non-volatile memory cell after the writing operation is set according to the weight value W 1 ~W M , for example, the weight value W 1 ~W M can be A times of the corresponding transduction value. , A can be any real number. In addition, the weighting calculator 120 further receives the input signals V 1 ˜V N , and causes the input signals V 1 ˜V N to be respectively applied to a plurality of non-volatile memory cells, and generates an output signal OUT accordingly. Please note here that when the neural network has a negative input signal, it can perform an offset operation based on the reference input signal V base for all input signals, so that the offset input signal V 1 ~V N is all positive signals. In this way, the weight calculator 120 can effectively perform neural network-like operations according to the input signals V 1 to V N , and generate the output signal OUT. Please note here that the sum of the weight values W 1 ~W M is equal to the sum of the reference weight values of the reference weight value WR.

在另一方面,算術運算器130耦接補償信號產生器110以及權重運算器120,並使輸出信號OUT與補償信號CV進行算術運算以產生補償後輸出信號COUT。其中,算術運算器130可使輸出信號OUT減去補償信號CV以產生補償後輸出信號COUT。如此一來,資料感測裝置100可產生實際對應具有負值的輸入信號所進行的類神經網路運算的輸出信號(即為補償後輸出信號COUT)。On the other hand, the arithmetic operator 130 is coupled to the compensation signal generator 110 and the weighting operator 120, and performs arithmetic operations on the output signal OUT and the compensation signal CV to generate the compensated output signal COUT. The arithmetic operator 130 may subtract the compensation signal CV from the output signal OUT to generate the compensated output signal COUT. In this way, the data sensing device 100 can generate an output signal (that is, the compensated output signal COUT) that actually corresponds to the neural network-like operation performed on the input signal with a negative value.

以下請參照圖2,圖2繪示本發明實施例的資料感測裝置的一實施方式的示意圖。資料感測裝置200包括補償信號產生器210、權重運算器220以及算術運算器230。在本實施方式中,補償信號產生器210接收基準輸入信號V base以及參考權重值WR,並使基準輸入信號V base以及參考權重值WR的總和相乘以產生補償信號CV。在本發明其他實施方式中,可補償信號產生器210以是一個資料儲存元件,補償信號CV可在補償信號產生器210外部進行計算,並存入補償信號產生器210中。 Please refer to FIG. 2 below. FIG. 2 is a schematic diagram of an implementation of a data sensing device according to an embodiment of the present invention. The data sensing device 200 includes a compensation signal generator 210, a weight operator 220, and an arithmetic operator 230. In this embodiment, the compensation signal generator 210 receives the reference input signal V base and the reference weight value WR, and multiplies the sum of the reference input signal V base and the reference weight value WR to generate the compensation signal CV. In other embodiments of the present invention, the compensable signal generator 210 is a data storage element, and the compensation signal CV can be calculated outside the compensation signal generator 210 and stored in the compensation signal generator 210.

在另一方面,在本發明實施例中,權重運算器220具有多個記憶胞MC1~MCM。權重運算器220基於位址資訊ADD,對記憶胞MC1~MCM以依據多個權重值W 1~W M進行寫入動作。另外,權重運算器220並使記憶胞MC1~MCM分別接收多個輸入信號V 1~V N以產生輸出信號OUT。其中,記憶胞MC1~MCM可建構在相同的記憶體串222上。在當針對記憶胞MC1~MCM進行權重值W 1~W M的寫入動作時,可先計算進行權重值W 1~W M分別對應的記憶胞的轉導值,再依據分別計算出的轉導值,來對記憶胞MC1~MCM執行寫入動作。 On the other hand, in the embodiment of the present invention, the weight calculator 220 has a plurality of memory cells MC1 ˜MCM. Based on the address information ADD, the weight calculator 220 performs a write operation on the memory cells MC1 to MCM according to a plurality of weight values W 1 to W M. In addition, the weight calculator 220 also makes the memory cells MC1 ˜MCM respectively receive a plurality of input signals V 1 ˜V N to generate an output signal OUT. Among them, the memory cells MC1 ˜MCM can be constructed on the same memory string 222. When the weight value W 1 ~ W M is written to the memory cells MC1 ~ MCM , the transduction values of the memory cells corresponding to the weight values W 1 ~ W M can be calculated first, and then the transduction values calculated according to the respectively calculated Guide value to perform write operations on memory cells MC1~MCM.

權重運算器220另包括感測放大器221。感測放大器221耦接至記憶體串222,並接收記憶體串222依據所接收的輸入信號V 1~V N所產生的讀取電流IR。感測放大器221並使讀取電流IR與多個參考電流進行比較,並藉以產生輸出信號OUT。 The weight operator 220 further includes a sense amplifier 221. The sense amplifier 221 is coupled to the memory string 222, and receives the read current IR generated by the memory string 222 according to the received input signal V 1 ~V N. The sense amplifier 221 also compares the read current IR with a plurality of reference currents to generate an output signal OUT.

值得一提的,權重運算器220中的記憶胞的數量可以依據類神經網路中,權重值的W 1~W M數量來進行設置,沒有特別的限制。此外,本實施方式中的記憶胞MC1~MCM可以為快閃記憶胞。 It is worth mentioning that the number of memory cells in the weight calculator 220 can be set according to the number of weight values W 1 to W M in the neural network, and there is no particular limitation. In addition, the memory cells MC1 to MCM in this embodiment may be flash memory cells.

運算器230耦接至補償信號產生器210以及權重運算器220。運算器230接收補償信號產生器210所產生的補償信號CV,接收權重運算器220所產生的輸出信號OUT,並使輸出信號OUT以及補償信號CV進行算術運算以產生補償後輸出信號COUT。運算器230可包括加法器231,加法器231可用以使輸出信號OUT與補償信號CV進行減法動作,以產生補償後輸出信號COUT。The calculator 230 is coupled to the compensation signal generator 210 and the weight calculator 220. The arithmetic unit 230 receives the compensation signal CV generated by the compensation signal generator 210, receives the output signal OUT generated by the weight calculator 220, and performs arithmetic operations on the output signal OUT and the compensation signal CV to generate the compensated output signal COUT. The arithmetic unit 230 may include an adder 231, and the adder 231 may subtract the output signal OUT and the compensation signal CV to generate the compensated output signal COUT.

請同步參照圖2以及圖3,其中圖3繪示本發明圖2實施方式的動作流程圖。在步驟S310中,可在補償信號產生器210中儲存參考權重值WR,並計算出參考權重值WR的總和(參考權重總和),且計算參考權重總和與基準輸入信號的乘積來產生補償信號。此外,步驟S320則傳送輸入信號V 1~V N至權重運算器220,並依據位址資訊以使輸入信號V 1~V N分別與對應的權重值進行運算,以產生輸出信號OUT。步驟S330則使輸出信號OUT與補償信號CV相減以產生補償輸出信號COUT。 Please refer to FIG. 2 and FIG. 3 simultaneously. FIG. 3 is a flowchart of the operation of the embodiment of the present invention in FIG. 2. In step S310, the reference weight value WR may be stored in the compensation signal generator 210, and the sum of the reference weight values WR (reference weight sum) is calculated, and the product of the reference weight sum and the reference input signal is calculated to generate the compensation signal. In addition, in step S320, the input signals V 1 ˜V N are sent to the weight calculator 220, and the input signals V 1 ˜V N are respectively operated with corresponding weight values according to the address information to generate the output signal OUT. In step S330, the output signal OUT is subtracted from the compensation signal CV to generate the compensation output signal COUT.

接著請參照圖4,圖4繪示本發明實施例的資料感測裝置的另一實施方式的示意圖。資料感測裝置400包括補償信號產生器410、權重運算器420以及算術運算器430。補償信號產生器410包括由多個參考記憶胞MCR1~MCR3所構成的記憶體串411。補償信號產生器410並依據多個參考權重以針對參考記憶胞MCR1~MCR3進行寫入動作,並使參考記憶胞MCR1~MCR3分別提供多個參考傳導值G 1、G 2以及G 3。另外,補償信號產生器410的記憶體串411並接收基準輸入信號V base,並透過記憶體串411的位元線BL1提供讀取電流以做為補償信號CV。 Please refer to FIG. 4. FIG. 4 is a schematic diagram of another implementation of the data sensing device according to the embodiment of the present invention. The data sensing device 400 includes a compensation signal generator 410, a weight operator 420, and an arithmetic operator 430. The compensation signal generator 410 includes a memory string 411 formed by a plurality of reference memory cells MCR1 ˜MCR3. And compensation signal generator 410 based on the plurality of weights to the reference writing operation for the reference memory cell MCR1 ~ MCR3, and the reference memory cell MCR1 ~ MCR3 are provided a plurality of reference conductance value G '1, G' 2 and G '3 . In addition, the memory string 411 of the compensation signal generator 410 also receives the reference input signal V base , and provides a read current through the bit line BL1 of the memory string 411 as the compensation signal CV.

在另一方面,權重運算器420具有多個記憶胞MC1~MC3所構成的記憶體串421。權重運算器420並依據多個權重值以分別對記憶胞MC1~MC3進行寫入動作,以使記憶胞MC1~MC3分別提供多個傳導值G 1、G 2以及G 3。值得一提的,參考傳導值G 1、G 2以及G 3的總和與傳導值G 1、G 2以及G 3的總和相同。此外,記憶胞MC1~MC3分別接收輸入信號V 1、V 2、V 3,並透過記憶體串421的位元線BL2來提供讀取電流以做為輸出信號OUT。 On the other hand, the weight calculator 420 has a memory string 421 formed by a plurality of memory cells MC1 to MC3. The weight calculator 420 performs write operations on the memory cells MC1 to MC3 respectively according to the multiple weight values, so that the memory cells MC1 to MC3 provide multiple conduction values G 1 , G 2, and G 3, respectively . It is worth mentioning that the sum of the reference conduction values G′ 1 , G 2 and G 3 is the same as the sum of the conduction values G 1 , G 2 and G 3 . In addition, the memory cells MC1 to MC3 respectively receive input signals V 1 , V 2 , and V 3 , and provide a read current through the bit line BL2 of the memory string 421 as the output signal OUT.

算術運算器430包括感測放大器(SA)431以及電流減法器432。電流減法器432接收補償信號CV以及輸出信號OUT,並使輸出信號OUT減去補償信號CV(使補償信號CV乘以-1並加上輸出信號OUT)。感測放大器431則耦接至電流減法器432並使電流減法器432所產生的減法結果與預設的多個參考電流進行比較,並藉以感測出補償後輸出信號COUT。The arithmetic operator 430 includes a sense amplifier (SA) 431 and a current subtractor 432. The current subtractor 432 receives the compensation signal CV and the output signal OUT, and subtracts the compensation signal CV from the output signal OUT (multiplies the compensation signal CV by -1 and adds the output signal OUT). The sense amplifier 431 is coupled to the current subtractor 432 and compares the subtraction result generated by the current subtractor 432 with a plurality of preset reference currents, and thereby senses the compensated output signal COUT.

在本實施方式中,記憶體串411以及421可以設置在不相同的位置,但共享相同的位址資訊。也就是說,記憶體串411以及421可以同時被進行寫入動作,並可同時被讀取以同時提供讀取電流。In this embodiment, the memory strings 411 and 421 can be set in different positions, but share the same address information. In other words, the memory strings 411 and 421 can be simultaneously written and read at the same time to provide read current at the same time.

請同步參照圖4以及圖5,其中圖5繪示本發明圖4實施方式的動作流程圖。步驟S510分轉換多個權重為多個轉導值G 1、G 2以及G 3,並依據轉導值產生另一組的多個參考轉導值G 1、G 2以及G 3。其中,轉導值G 1、G 2以及G 3的總與參考轉導值G 1、G 2以及G 3的總和相同。並且,依據轉導值G 1、G 2以及G 3以及參考轉導值G 1、G 2以及G 3,分別針對記憶胞MC1~MC3以及參考記憶胞MCR1~MCR3進行寫入動作。此外,步驟S520則提供輸入信號V 1~V 3至記憶胞MC1~MC3以獲得輸出信號OUT,並提供基準輸入信號V base至參考記憶胞MCR1~MCR3以獲得補償信號CV。步驟S530則針對輸出信號OUT與補償信號CV的差進行感測動作以產生補償輸出信號COUT。 Please refer to FIG. 4 and FIG. 5 simultaneously. FIG. 5 is a flowchart of the operation of the embodiment of the present invention in FIG. 4. Step S510 converts multiple weights into multiple transduction values G 1 , G 2 and G 3 , and generates another set of multiple reference transduction values G ' 1 , G ' 2 and G ' 3 according to the transduction values. Wherein, the total of the transduction values G 1 , G 2, and G 3 is the same as the total of the reference transduction values G 1 , G 2 and G 3 . And, according to the transduction values G 1 , G 2, and G 3 and the reference transduction values G 1 , G 2 and G 3 , write operations are performed on the memory cells MC1 to MC3 and the reference memory cells MCR1 to MCR3, respectively. In addition, step S520 provides the input signals V 1 to V 3 to the memory cells MC1 to MC3 to obtain the output signal OUT, and provides the reference input signal V base to the reference memory cells MCR1 to MCR3 to obtain the compensation signal CV. Step S530 is to perform a sensing action on the difference between the output signal OUT and the compensation signal CV to generate the compensation output signal COUT.

接著請參照圖6,圖6繪示本發明實施例的資料感測裝置的另一實施方式的示意圖。資料感測裝置600包括補償信號產生器610、權重運算器620以及算術運算器630。補償信號產生器610包括由多個參考記憶胞MCR1~MCR3所構成的記憶體串611。補償信號產生器610並依據多個參考權重以針對參考記憶胞MCR1~MCR3進行寫入動作,並使參考記憶胞MCR1~MCR3分別提供多個參考傳導值。另外,補償信號產生器610的記憶體串611並接收基準輸入信號V base,並透過記憶體串611的位元線BL1提供讀取電流以做為補償信號CV。 Please refer to FIG. 6. FIG. 6 is a schematic diagram of another implementation of the data sensing device according to the embodiment of the present invention. The data sensing device 600 includes a compensation signal generator 610, a weight operator 620, and an arithmetic operator 630. The compensation signal generator 610 includes a memory string 611 formed by a plurality of reference memory cells MCR1 ˜MCR3. The compensation signal generator 610 performs a write operation on the reference memory cells MCR1 ˜MCR3 according to a plurality of reference weights, and causes the reference memory cells MCR1 ˜MCR3 to provide a plurality of reference conduction values respectively. In addition, the memory string 611 of the compensation signal generator 610 also receives the reference input signal V base , and provides a read current through the bit line BL1 of the memory string 611 as the compensation signal CV.

在另一方面,權重運算器620具有多個記憶胞MC1~MC3所構成的記憶體串621。權重運算器620並依據多個權重值以分別對記憶胞MC1~MC3進行寫入動作,以使記憶胞MC1~MC3分別提供多個傳導值。值得一提的,參考傳導值的總和與傳導值的總和相同。此外,記憶胞MC1~MC3分別接收輸入信號V 1、V 2、V 3,並透過記憶體串621的位元線BL2來提供讀取電流以做為輸出信號OUT。 On the other hand, the weight calculator 620 has a memory string 621 formed by a plurality of memory cells MC1-MC3. The weight calculator 620 performs write operations on the memory cells MC1~MC3 respectively according to a plurality of weight values, so that the memory cells MC1~MC3 respectively provide a plurality of conduction values. It is worth mentioning that the sum of the reference conduction values is the same as the sum of the conduction values. In addition, the memory cells MC1 to MC3 respectively receive input signals V 1 , V 2 , and V 3 , and provide a read current through the bit line BL2 of the memory string 621 as the output signal OUT.

在本實施例中,記憶體串611以及621可以對應相同的字元線,並分別對應不相同的位元線BL1、BL2。In this embodiment, the memory strings 611 and 621 may correspond to the same word line, and respectively correspond to different bit lines BL1 and BL2.

在本實施方式中,算術運算器630包括電流加法器631以及感測放大器632。電流加法器631接收補償信號CV以及多個參考電流ref a,並使參考電流ref a與補償信號CV相加以產生多個補償參考電流ref b。電流加法器631並提供補償參考電流ref b至感測放大器632。感測放大器632另接收輸出信號OUT,並透過比較輸出信號OUT與補償參考電流ref b來產生補償輸出信號COUT。 In this embodiment, the arithmetic operator 630 includes a current adder 631 and a sense amplifier 632. The current adder 631 receives the compensation signal CV and a plurality of reference currents ref a , and adds the reference current ref a and the compensation signal CV to generate a plurality of compensation reference currents ref b . The current adder 631 also provides the compensation reference current ref b to the sense amplifier 632. The sense amplifier 632 further receives the output signal OUT, and generates the compensation output signal COUT by comparing the output signal OUT with the compensation reference current ref b.

在此請參照圖7繪示的本發明實施例的參考電流的偏移動作示意圖,在圖6的實施方式中,算術運算器630透過使感測放大器632作為感測依據的參考電流ref a進行偏移以產生補償參考電流ref b,再透過比較輸出信號OUT與補償參考電流ref b,同樣可有效產生正確的補償輸出信號COUT。 Please refer to FIG. 7 for a schematic diagram of the offset operation of the reference current according to the embodiment of the present invention. In the embodiment of FIG. 6, the arithmetic operator 630 performs the operation by using the reference current ref a of the sense amplifier 632 as the sensing basis. The offset is used to generate the compensation reference current ref b , and then by comparing the output signal OUT with the compensation reference current ref b , the correct compensation output signal COUT can also be effectively generated.

請同步參照圖6以及圖8,其中圖8繪示本發明圖6實施方式的動作流程圖。步驟S810分轉換多個權重為多個轉導值,並依據轉導值產生另一組的多個參考轉導值。其中,轉導值的總與參考轉導值的總和相同。並且,依據轉導值以及參考轉導值,分別針對記憶胞MC1~MC3以及參考記憶胞MCR1~MCR3進行寫入動作。此外,步驟S820則提供輸入信號V 1~V 3至記憶胞MC1~MC3以獲得輸出信號OUT,並提供基準輸入信號V base至參考記憶胞MCR1~MCR3以獲得補償信號CV。步驟S830則使補償信號CV與參考電流ref a相加以獲得多個補償參考電流ref b,並依據補償參考電流ref b對輸出信號OUT進行感測動作,以產生補償輸出信號COUT。 Please refer to FIG. 6 and FIG. 8 simultaneously. FIG. 8 is a flowchart of the operation of the embodiment of the present invention in FIG. 6. Step S810 converts multiple weights into multiple transduction values, and generates another set of multiple reference transduction values according to the transduction values. Among them, the total transduction value is the same as the sum of the reference transduction value. And, according to the transduction value and the reference transduction value, write operations are performed on the memory cells MC1~MC3 and the reference memory cells MCR1~MCR3, respectively. Further, step S820 provides the input signals V 1 ~ V 3 to the memory cell MC1 ~ MC3 to obtain an output signal OUT, and provides a reference input to the reference signal V base MCR1 ~ MCR3 memory cell to obtain a compensation signal CV. In step S830, the compensation signal CV and the reference current ref a are added to obtain a plurality of compensation reference currents ref b , and the output signal OUT is sensed according to the compensation reference current ref b to generate the compensation output signal COUT.

以下請參照圖9,圖9繪示本發明實施例的資料感測方法的流程圖。其中,步驟S910提供補償信號產生器以接收基準輸入信號以及多個參考權重值,依據基準輸入信號以及參考權重值以產生補償信號;步驟S920提供權重運算器,基於位址資訊,對權重運算器中的多個記憶胞以依據多個權重值進行寫入動作,並使記憶胞接收多個輸入信號以產生輸出信號;以及,步驟S930提供算術運算器以使輸出信號與該補償信號進行運算以產生補償後輸出信號。Please refer to FIG. 9 below. FIG. 9 shows a flowchart of a data sensing method according to an embodiment of the present invention. Wherein, step S910 provides a compensation signal generator to receive a reference input signal and a plurality of reference weight values, and generates a compensation signal according to the reference input signal and the reference weight value; step S920 provides a weight calculator, and based on the address information, the weight calculator The multiple memory cells in the memory cell perform write operations according to multiple weight values, and the memory cells receive multiple input signals to generate output signals; and, in step S930, an arithmetic operator is provided to perform operations on the output signal and the compensation signal. Generate output signal after compensation.

關於上述步驟的實施細節,在前述實施例以及實施方式中已有詳盡的說明,在此恕不多贅述。The implementation details of the foregoing steps have been described in detail in the foregoing embodiments and implementation manners, and will not be repeated here.

綜上所述,本發明透過提供補償信號產生器,以依據基準輸入信號以及多個參考權重值來產生補償信號,並使權重運算器所產生的類神經運算的運算結果(輸出信號),與參考信號進行算術運算來產生補償後輸出信號。由於補償之訊號獨立於其輸入,其補償訊號可以事先算好,因此在實際應用時可較習知技術僅花一半的運算量,此外,在多個權重運算器運算相同權重的情況下,其補償訊號產生器可以共用,所以本發明可以利用較低的運算量來完成具有負值的輸入信號的類神經網路的運算動作。In summary, the present invention provides a compensation signal generator to generate a compensation signal based on a reference input signal and a plurality of reference weight values, and enables the neural operation result (output signal) generated by the weight calculator to generate the compensation signal, and The reference signal performs arithmetic operations to generate the compensated output signal. Since the compensation signal is independent of its input, the compensation signal can be calculated in advance. Therefore, in actual application, it can only take half the amount of calculation compared with the conventional technology. In addition, when multiple weight calculators calculate the same weight, its The compensation signal generator can be shared, so the present invention can use a lower amount of calculation to complete a neural network-like calculation action with a negative input signal.

雖然本發明已以實施例揭露如上,然其並非用以限定本發明,任何所屬技術領域中具有通常知識者,在不脫離本發明的精神和範圍內,當可作些許的更動與潤飾,故本發明的保護範圍當視後附的申請專利範圍所界定者為準。Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention. Anyone with ordinary knowledge in the relevant technical field can make some changes and modifications without departing from the spirit and scope of the present invention. The scope of protection of the present invention shall be determined by the scope of the attached patent application.

100、200、400、600:資料感測裝置 110、210、410、610:補償信號產生器 120、220、420、620:權重運算器 130、230、430、630:算術運算器 221、431、632、SA:感測放大器 222、421、411、611:記憶體串 432:電流減法器 631:電流加法器 BL1、BL2:位元線 V base:基準輸入信號 WR:參考權重值 CV:補償信號 ADD:位址資訊 W 1~W M:權重值 V 1~V N:輸入信號 OUT:輸出信號 COUT:補償後輸出信號 MC1~MCM:記憶胞 MCR1~MCR3:參考記憶胞 G 1、G 2、G 3:參考傳導值 G 1、G 2、G 3:傳導值 ref a:參考電流 ref b:補償參考電流 S310~S330、S510~S530、S810~S830、S910~S930:資料感測步驟 100, 200, 400, 600: Data sensing device 110, 210, 410, 610: Compensation signal generator 120, 220, 420, 620: Weight calculator 130, 230, 430, 630: Arithmetic calculator 221, 431, 632, SA: Sense amplifier 222, 421, 411, 611: Memory string 432: Current subtractor 631: Current adder BL1, BL2: Bit line V base : Reference input signal WR: Reference weight value CV: Compensation signal ADD: address information W 1 ~ W M : weight value V 1 ~ V N : input signal OUT: output signal COUT: output signal after compensation MC1~MCM: memory cell MCR1~MCR3: reference memory cell G ' 1 , G ' 2. G ' 3 : Reference conduction value G 1 , G 2 , G 3 : Conduction value ref a : Reference current ref b : Compensation reference current S310~S330, S510~S530, S810~S830, S910~S930: Data sensing step

圖1繪示本發明一實施例的資料感測裝置的示意圖。 圖2繪示本發明實施例的資料感測裝置的一實施方式的示意圖。 圖3繪示本發明圖2實施方式的動作流程圖。 圖4繪示本發明實施例的資料感測裝置的另一實施方式的示意圖。 圖5繪示本發明圖4實施方式的動作流程圖。 圖6繪示本發明實施例的資料感測裝置的另一實施方式的示意圖。 圖7繪示本發明實施例的參考電流的偏移動作示意圖。 圖8繪示本發明圖6實施方式的動作流程圖。 圖9繪示本發明實施例的資料感測方法的流程圖。 FIG. 1 is a schematic diagram of a data sensing device according to an embodiment of the invention. FIG. 2 is a schematic diagram of an implementation of the data sensing device according to the embodiment of the present invention. Fig. 3 shows a flowchart of the operation of the embodiment of Fig. 2 of the present invention. FIG. 4 is a schematic diagram of another implementation of the data sensing device according to the embodiment of the present invention. FIG. 5 shows a flowchart of the operation of the embodiment in FIG. 4 of the present invention. FIG. 6 is a schematic diagram of another implementation of the data sensing device according to the embodiment of the present invention. FIG. 7 is a schematic diagram of the offset operation of the reference current according to the embodiment of the present invention. FIG. 8 is a flowchart of the operation of the embodiment of FIG. 6 of the present invention. FIG. 9 shows a flowchart of a data sensing method according to an embodiment of the present invention.

100:資料感測裝置 100: data sensing device

110:補償信號產生器 110: Compensation signal generator

120:權重運算器 120: weight calculator

130:算術運算器 130: Arithmetic Operator

Vbase:基準輸入信號 V base : reference input signal

WR:參考權重值 WR: Reference weight value

CV:補償信號 CV: Compensation signal

ADD:位址資訊 ADD: address information

W1~WM:權重值 W 1 ~W M : weight value

V1~VN:輸入信號 V 1 ~V N : Input signal

OUT:輸出信號 OUT: output signal

COUT:補償後輸出信號 COUT: Output signal after compensation

Claims (12)

一種資料感測裝置,耦接至一記憶體陣列,包括:一補償信號產生器,接收一基準輸入信號以及多個參考權重值,使該基準輸入信號以及該些參考權重值的總和相乘以產生一補償信號;一權重運算器,具有多個記憶胞,該權重運算器基於一位址資訊,對該些記憶胞以分別依據多個權重值進行寫入動作,該權重運算器並使該些記憶胞接收多個輸入信號以產生一輸出信號;以及一算術運算器,耦接該補償信號產生器以及該權重運算器,依據該輸出信號與該補償信號相減的結果以產生一補償後輸出信號,或者,使該補償信號與多個第一參考電流的和與該輸出信號比較,以產生該補償後輸出信號。 A data sensing device, coupled to a memory array, includes: a compensation signal generator that receives a reference input signal and a plurality of reference weight values, and multiplies the sum of the reference input signal and the reference weight values by A compensation signal is generated; a weighting calculator has a plurality of memory cells, the weighting calculator is based on one-bit address information, the memory cells are written according to a plurality of weight values, and the weighting calculator makes the The memory cells receive a plurality of input signals to generate an output signal; and an arithmetic operator, coupled to the compensation signal generator and the weighting operator, generates a compensated signal according to the result of the subtraction of the output signal and the compensation signal The output signal, or the sum of the compensation signal and a plurality of first reference currents, is compared with the output signal to generate the compensated output signal. 如申請專利範圍第1項所述的資料感測裝置,其中該權重運算器使該些記憶胞分別接收該些輸入信號,並產生一讀取電流,該權重運算器更透過感測該讀取電流以產生該輸出信號。 For the data sensing device described in claim 1, wherein the weighting calculator makes the memory cells receive the input signals and generate a reading current, and the weighting calculator further senses the reading Current to generate the output signal. 如申請專利範圍第2項所述的資料感測裝置,其中該權重運算器更包括一感測放大器,使該讀取電流與多個第二參考電流進行比較以產生該輸出信號。 According to the data sensing device described in claim 2, wherein the weighting operator further includes a sense amplifier to compare the read current with a plurality of second reference currents to generate the output signal. 如申請專利範圍第1項所述的資料感測裝置,其中該些記憶胞為非揮發性記憶胞。 In the data sensing device described in item 1 of the scope of patent application, the memory cells are non-volatile memory cells. 如申請專利範圍第1項所述的資料感測裝置,其中該些記憶胞依據對應的該些權重值以分別提供多個轉導值。 According to the data sensing device described in item 1 of the scope of patent application, the memory cells respectively provide a plurality of transduction values according to the corresponding weight values. 如申請專利範圍第1項所述的資料感測裝置,其中該補償信號產生器包括多個參考記憶胞,該補償信號產生器基於該位址資訊,對該些參考記憶胞以依據該些參考權重值進行寫入動作,該補償信號產生器並使該些參考記憶胞接收該基準輸入信號以產生該補償信號,其中該些參考權重值的和與該些權重值的和相等。 According to the data sensing device described in claim 1, wherein the compensation signal generator includes a plurality of reference memory cells, the compensation signal generator is based on the address information, and the reference memory cells are based on the reference The weight value is written in, and the compensation signal generator causes the reference memory cells to receive the reference input signal to generate the compensation signal, wherein the sum of the reference weight values is equal to the sum of the weight values. 如申請專利範圍第6項所述的資料感測裝置,其中該算術運算器包括:一電流減法器,耦接該補償信號產生器以及該權重運算器,使該輸出信號減去該補償信號以產生一減法結果;以及一感測放大器,耦接該電流減法器,依據比較該減法結果與多個參考電流以產生該補償後輸出信號。 According to the data sensing device described in item 6 of the scope of patent application, the arithmetic operator includes: a current subtractor, coupled to the compensation signal generator and the weight operator, so that the output signal is subtracted from the compensation signal to Generating a subtraction result; and a sense amplifier, coupled to the current subtractor, and generating the compensated output signal based on comparing the subtraction result with a plurality of reference currents. 如申請專利範圍第6項所述的資料感測裝置,其中該算術運算器包括:一電流加法器,耦接該補償信號產生器,使該補償信號與多個參考電流相加以產生多個補償參考電流;以及一感測放大器,耦接該電流加法器,依據比較該輸出信號與該些補償參考電流以產生該補償後輸出信號。 According to the data sensing device described in claim 6, wherein the arithmetic operator includes: a current adder, coupled to the compensation signal generator, so that the compensation signal and a plurality of reference currents are added to generate a plurality of compensations Reference current; and a sense amplifier, coupled to the current adder, based on comparing the output signal with the compensation reference currents to generate the compensated output signal. 如申請專利範圍第6項所述的資料感測裝置,其中該些該些參考記憶胞為非揮發性記憶胞。 According to the data sensing device described in item 6 of the scope of patent application, the reference memory cells are non-volatile memory cells. 一種資料感測方法,包括:提供一補償信號產生器以接收一基準輸入信號以及多個參考權重值,使該基準輸入信號以及該些參考權重值的總和相乘以產生一補償信號;提供一權重運算器,基於一位址資訊,對該權重運算器中的多個記憶胞以分別依據多個權重值進行寫入動作,並使該些記憶胞接收多個輸入信號以產生一輸出信號;以及提供一算術運算器以依據該輸出信號與該補償信號相減的結果以產生一補償後輸出信號,或者,使該補償信號與多個第一參考電流的和與該輸出信號比較以產生該補償後輸出信號。 A data sensing method includes: providing a compensation signal generator to receive a reference input signal and a plurality of reference weight values, multiplying the reference input signal and the sum of the reference weight values to generate a compensation signal; providing a The weighting calculator, based on one-bit address information, performs write operations on the plurality of memory cells in the weighting calculator according to a plurality of weight values, and makes the memory cells receive a plurality of input signals to generate an output signal; And providing an arithmetic operator to generate a compensated output signal according to the result of the subtraction of the output signal and the compensation signal, or compare the sum of the compensation signal and a plurality of first reference currents with the output signal to generate the Output signal after compensation. 如申請專利範圍第10項所述的資料感測方法,其中使該些記憶胞接收該些輸入信號以產生該輸出信號的步驟包括:使該些記憶胞分別接收該些輸入信號以產生一讀取電流;以及感測該讀取電流以產生該輸出信號。 For the data sensing method described in claim 10, the step of making the memory cells receive the input signals to generate the output signal includes: making the memory cells receive the input signals to generate a reading Taking a current; and sensing the read current to generate the output signal. 如申請專利範圍第10項所述的資料感測方法,其中提供該補償信號產生器以接收該基準輸入信號以及多個權重值,使該基準輸入信號以及該些參考權重值的總和相乘以產生該補償信號的步驟包括:在該補償信號產生器中設置多個參考記憶胞;基於該位址資訊,對該些參考記憶胞以依據該些參考權重值進行寫入動作;以及 使該些參考記憶胞接收該基準輸入信號以產生該補償信號,其中,該些參考權重值的和與該些權重值的和相等。 For example, the data sensing method of claim 10, wherein the compensation signal generator is provided to receive the reference input signal and a plurality of weight values, and the sum of the reference input signal and the reference weight values is multiplied by The step of generating the compensation signal includes: setting a plurality of reference memory cells in the compensation signal generator; based on the address information, performing a write operation on the reference memory cells according to the reference weight values; and The reference memory cells are made to receive the reference input signal to generate the compensation signal, wherein the sum of the reference weight values is equal to the sum of the weight values.
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