TWM316434U - Circuit for saving power - Google Patents

Description

M316434 VIII. New Description: [New Technology Field] Shutdown This creation involves an energy-saving circuit, especially a computer-powered shutdown energy-saving circuit that reduces power consumption after a computer. [Prior Art] According to ACPI (Advanced Configuration and η P〇Wer

Interface, advanced configuration and power interface) specification, computer power system can divide the working state of the computer into SO to S5, they represent the system 3 meaning: Positive 50: The computer works normally, all hardware devices are all playing, often Work cancer, _ work, 51: Also known as POS (Power on Suspend), the CPU stops other hardware devices still working normally; 52: The CPU is turned off, but the rest of the hardware devices are still running. 53 : Usually called STR (Suspend to RAM, hangs 5 Bu ~ 圮 圮 )), writes the running poor material into the memory and closes the hard disk; 54: Also known as STD (Suspend to Disk, hangs to the stone disc) The memory information is written to the hard disk, and then all the components are stopped. & 55: All hardware devices (including the power supply) are turned off, and the computer is turned off. The user can enable or view the power mode through the power management interface of the computer. When the computer is in the SO state, the power is turned on; after the f brain is turned off, the power supply starts to enter the S5 state, and the motherboard is also connected with +5VSB. The backup voltage signal is used as the power supply monitoring circuit of the motherboard. M316434% is used as the power supply to support the functions such as wake-up of the computer. Therefore, the motherboard is still consuming power after shutdown, causing unnecessary waste. [New content] In the above content, it is necessary to provide a computer shutdown energy-saving circuit that can cut off the backup voltage signal of the motherboard after shutdown to reduce power consumption. A computer shutdown energy-saving circuit includes a power supply, a motherboard and a switch circuit, the power supply has a backup voltage signal output pin, the host_board has a backup voltage signal input pin, and the switch circuit has an input a backup voltage signal output pin of the power source is connected to an input end of the switch circuit, and a backup voltage signal input pin of the motherboard is connected to an output end of the switch circuit, the switch circuit The control terminal introduces a standby state signal that is low after the computer is turned off, and the switch circuit is a switch circuit that is turned off when the standby state signal is low. Compared with the prior art, the computer power-off circuit of the computer is controlled by a switch circuit to control the supply state of the backup voltage signal of the motherboard. When the computer is working normally, the switch circuit is turned on, and the power output outputs a backup voltage signal to the motherboard. It does not affect the normal operation of the motherboard; when the computer is turned off, the switch circuit is disconnected, the motherboard has no backup voltage signal, and does not consume power after shutdown, thus saving power. [Embodiment] Referring to FIG. 1 , a preferred embodiment of the computer power-off circuit of the present invention includes a motherboard 10 , a power source 20 , a first control signal line i , a second control signal line 2 , and a third control signal. Line 3, a fourth control signal line 4, a first transistor Q1, a second transistor 〇2, and two M316434 first resistors R1. The motherboard 10 includes a backup voltage signal input pin MB_+5VSB, a select signal output pin GPIO, and a standby state signal pin S5#. The pin GPIO output selection signal GPIO of the motherboard 10 can be The selection signal GPIO needs to be set to a high or low level signal through the BIOS, and the pin S5# of the motherboard 10 outputs a standby state signal S5#, and the S5# signal is low when the computer is turned off, in the computer. It is high after power on. • The power supply 20 has a backup voltage signal output pin PS_+5VSB and a power signal output pin that can output a +12V signal. The pin PS_+5VSB of the power source 20 outputs a PS_+5VSB signal, and the PS_+5VSB signal is +5V when the power source 20 is turned on or off. The +12V signal is +12V after the power source 20 is turned on, after the power source 20 is turned off. Is low. The first transistor Q1 is an N-channel enhancement type MOS field effect transistor, the first one of which is extremely gate G, the second is extremely poleless D, and the third source is spring S, the gate of the first transistor Q1 The pole G is connected to a node A, the drain-D is connected to a node B, and the source S is grounded. The node B introduces the PS_+5VSB signal through the first resistor R1. The first transistor Q1 is turned on when the voltage of the gate G is at a high level, and is turned off when it is at a low level.

The second transistor Q2 is a P-channel enhancement type MOS field effect transistor, and the first gate G, the second pole D, the third source S, and the gate of the second transistor Q2 G is connected to the node B, the drain D is connected to the pin MB_+5VSB of the motherboard 10, and the source S is connected to the pin PS_+5VSB of the power source 20. The second transistor Q2 is turned on when the voltage of the gate G M316434 is at a low level, and is turned off when it is at a high level. The first transistor "Q1" and the second transistor Q2 are connected to form a three-terminal switching circuit. The control terminal of the switching circuit is connected to the node A. The input terminal of the switching circuit and the backup voltage signal output of the power source 20 are output. The pin PS_+5VSB is connected, and the output end of the switch circuit is connected with the backup voltage signal input pin MB-+5VSB of the motherboard 10. When the voltage of the node A is high, both Q1 and Q2 are turned on, and the node A is low. The first control signal line 1 includes a third transistor Q3 and a fourth transistor Q4. The third transistor Q3 is an NPN type transistor, and the first extremely base is B, the second extreme collector C, the third extreme emitter E, the base B of the third transistor Q3 is introduced into the standby state signal S5# through a resistor R2, and the collector C is introduced into the PS_+5VSB through a resistor R3. The signal, the emitter E is grounded; the fourth transistor Q4 is an N-channel enhancement type MOS field effect transistor, the first extreme gate G, the second pole D, and the third source S, the first The gate G of the fourth transistor Q4 is connected to the collector C of the third transistor | body Q3, and the drain D and the first One end of the resistor R4 is connected to the anode of a first diode D1, and the other end of the resistor R4 is connected to the PS +5VSB signal. The cathode of the diode D1 is connected to the node A, and the source of the fourth transistor Q4 The second control signal line 2 includes a second diode D2, the positive pole of the second diode D2 is introduced into the +12V signal, and the negative pole is connected to the node A. The third control signal line 3 includes a a fifth transistor Q5, the fifth transistor Q5 is an N-channel enhancement type MOS field effect transistor, the first gate G of the M316434, the second pole D, and the third source S, The gate of the fifth transistor Q5 introduces a PWRBTN# switch signal and is connected to one end of a resistor R5. The other end of the resistor R5 introduces the PS +5VSB signal, and the drain D of the fifth transistor Q5 transmits through a resistor. R6 introduces the PS_+5VSB signal and is connected to the anode of a third diode D3. The cathode of the third diode D3 is connected to the node A, and the source S of the fifth transistor Q5 is grounded. The fourth control signal line 4 includes a fourth diode D4. The anode of the fourth diode D4 introduces the selection signal GPIO and introduces the PS_+5VSB signal through a resistor R7, and the cathode is connected to the node A. When the computer is turned off, the selection signal GPIO is first set to a low level, the fourth diode D4 is turned off, and the fourth control signal line 4 is turned off. After the computer is turned off, the S5# signal is low level, the +12V signal is low level, the PWRBTN# signal is high level, so the third transistor Q3 is turned off, and the fourth transistor Q4 is turned on, the node A is The level is low, the first transistor Q1 is turned off, the level of the node B is high level, the second transistor Q2 is turned off, the pin of the motherboard 10 is MB_+5VSB and the pin of the power source 20 PS_+5VSB is equivalent to disconnection. After the computer is turned off, the motherboard 10 does not receive the backup voltage signal of +5VSB, so it does not consume power after shutdown. If the power is turned on again, press the power switch of the computer, the PWRBTN# signal jumps from a high level to a low level, the fifth transistor Q5 is turned off, the third diode D3 is turned on, and the level of the node A is high. Ping, the first transistor Q1 is turned on, the level of the node B is low level, and Q2 is also turned on. The pin MB_+5VSB of the motherboard 10 and the pin M316434 PS_+5VSB of the power source 20 pass through the low impedance. The drain source is connected, and the motherboard 20 is connected with a backup voltage signal of -5VSB as the working power supply of the power supply monitoring circuit of the motherboard; after the power switch is released, the computer starts, and the PWRBTN# signal returns to the high level, the fifth transistor Q5 is turned on, the third diode D3 is turned off, the third control line 3 is turned off, but the +12V signal is high level, the S5# signal is also high level, and thus D1 and D2 are turned on, and the node A is The voltage is still high, Q1 and q2 are still on. The pin MB_+5 VSB of the motherboard 10 is connected to the low-impedance drain source of the pin 20 of the power supply 20, ❿ the motherboard 20 is turned on. The backup voltage signal of +5VSB is continuously connected. If the voltage of +5VSB is still needed after the computer is turned off to support the standby wake-up function, the selection signal GPIO can be set to a high level, and the fourth diode D4 is turned on, regardless of the S5# signal, the +12V signal, and the PWRBTN. #Which level is the signal, the voltage of the node A is always high level, Q1 and Q2 are both on, and the motherboard 10 is connected with +5vSB voltage regardless of whether it is turned on or off. In summary, the creation department meets the requirements for new patent applications, and _ filed a patent application according to law. However, the above is only a preferred embodiment of the present invention, and equivalent modifications or variations made by those skilled in the art to the spirit of the present invention should be included in the following claims. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a circuit diagram of a preferred embodiment of the computer-powered shutdown power-saving circuit. [Main component symbol description] 20 Motherboard 1〇 Power supply

11 M316434 First control signal line 1 Second control signal line 2 Third control signal line 3 Fourth control signal line 4 First transistor Q1 Second transistor Q2 First resistor R1 Third transistor Q3 Fourth transistor Q4 Second resistor R2 third resistor R3 fourth resistor R4 first diode D1 second diode D2 fifth transistor Q5 fifth resistor R5 sixth resistor R6 third diode D3 fourth diode D4 Seven resistors R7 12

Claims (1)

M316434 IX. Patent application scope: 1. A computer shutdown energy-saving circuit, comprising a power source, a motherboard and a switch circuit, the power source has a backup voltage signal output pin, and the motherboard has a backup voltage signal input pin. The switch circuit has an input end, an output end and a control end, and the backup voltage signal output pin of the power source is connected to the input end of the switch circuit, and the backup voltage signal input pin of the motherboard and the output of the switch circuit Connected to the terminal, the control terminal of the switch circuit introduces a standby state signal that is low after the computer is turned off, and the switch circuit is a switch circuit that is turned off when the standby state signal is low. 2. The computer-off energy-saving circuit according to claim 1, wherein the switch circuit comprises a first transistor having a first-pole voltage at a high level, a first transistor having a low level, and a first-pole voltage. When the current is low, the second transistor is turned off when the level is high, the first pole of the first transistor introduces the standby state signal, and the second pole of the first transistor and the backup voltage signal output of the power source a third pole of the first transistor is connected to the ground, a first pole of the second transistor is connected to a second pole of the first transistor, and a second pole of the second transistor is backed up by the motherboard The voltage signal input pin is connected, and the third electrode of the second transistor is connected to the backup voltage signal output pin of the power source. 3. The computer-powered energy-saving circuit according to item 2 of the scope of the patent application, wherein the first pole of the first transistor passes through a _8th standby state signal. #控遽线入4· The computer shutdown energy-saving circuit according to item 3 of the patent application scope, wherein 13 < S M316434 the first control signal line comprises a third transistor and a fourth transistor; The first pole of the second transistor is introduced into the standby state disk I through a resistor. The second pole of the transistor and the first pole of the fourth transistor are connected to the backup voltage signal output pin of the power source. a fourth transistor, one pole is connected to the backup voltage signal output pin of the power source and the first pole of the first transistor, and the second pole of the third transistor and the fourth transistor are grounded. The computer power-off circuit of the fourth aspect, wherein the second pole of the T fourth transistor is connected to the first pole of the first electric body through a first diode and the second pole of the fourth transistor Connected to the positive pole of the first diode, the negative pole of the first diode is connected to the first pole of the first transistor. The computer shutdown energy-saving circuit according to item 5 of the patent scope of 2 °, wherein = - and the fourth transistor is an N-channel enhanced MOSFET field effect f body 'this: the transistor is - P channel enhanced MOS field effect electricity day _ 曰 body: the third transistor is - NPN type transistor 'the first, the first and the fourth transistor - The poles are all gates, the second poles are all bungee poles, the poles are all sources, the third transistor is the first pole, the second pole is extremely concentrated, and the third pole is the emitter. ^ The computer shutdown energy-saving circuit according to Item 1, wherein the i-th transistor is connected to the second control signal line, and the second (four) line 2 includes a second diode, and the power source further includes - power remaining f output pin 'the power signal output pin is connected with the second name of the second diode'. The negative electrode of the second diode is connected to the first pole M316434 of the first transistor. The computer power-off circuit of the computer of claim 1, wherein the first electric day body is connected to a second control signal line, and the third control signal line comprises a fifth transistor and a third diode. The first pole of the fifth transistor introduces a switch signal and is connected to a backup signal output pin of the power source, a second pole of the fifth transistor is connected to the backup signal output pin of the power source, a third pole of the fifth transistor is grounded, and a positive pole of the third diode is connected to a second pole of the fifth transistor, The negative electrode of the third diode is connected to the first electrode of the first transistor. 9. The electric energy saving circuit of the electric machine according to the eighth aspect of the invention, wherein the fifth transistor is - Ν channel enhancement The MOS field effect transistor, the fifth transistor ^ the first extreme gate, the second is extremely finite, and the second refinement is the source. Coin - 10 · For example, the computer shutdown energy saving mentioned in the patent scope i a circuit, wherein the first transistor is connected to a fourth control signal line, the fourth control signal line includes a fourth diode, the positive electrode of the fourth diode is introduced, and the first slogan is the fourth two A cathode of the pole body is coupled to the first pole of the first transistor. 15